1 //=- SystemZScheduleZ196.td - SystemZ Scheduling Definitions ---*- tblgen -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the machine model for Z196 to support instruction
11 // scheduling and other instruction cost heuristics.
13 // Pseudos expanded right after isel do not need to be modelled here.
15 //===----------------------------------------------------------------------===//
17 def Z196Model : SchedMachineModel {
19 let UnsupportedFeatures = Arch9UnsupportedFeatures.List;
22 let MicroOpBufferSize = 40; // Issue queues
23 let LoadLatency = 1; // Optimistic load latency.
25 let PostRAScheduler = 1;
27 // Extra cycles for a mispredicted branch.
28 let MispredictPenalty = 16;
31 let SchedModel = Z196Model in {
32 // These definitions need the SchedModel value. They could be put in a
33 // subtarget common include file, but it seems the include system in Tablegen
34 // currently (2016) rejects multiple includes of same file.
36 // Decoder grouping rules
37 let NumMicroOps = 1 in {
38 def : WriteRes<NormalGr, []>;
39 def : WriteRes<BeginGroup, []> { let BeginGroup = 1; }
40 def : WriteRes<EndGroup, []> { let EndGroup = 1; }
42 def : WriteRes<Cracked, []> {
46 def : WriteRes<GroupAlone, []> {
52 // Incoming latency removed from the register operand which is used together
53 // with a memory operand by the instruction.
54 def : ReadAdvance<RegReadAdv, 4>;
56 // LoadLatency (above) is not used for instructions in this file. This is
57 // instead the role of LSULatency, which is the latency value added to the
58 // result of loads and instructions with folded memory operands.
59 def : WriteRes<LSULatency, []> { let Latency = 4; let NumMicroOps = 0; }
61 let NumMicroOps = 0 in {
63 def : WriteRes<!cast<SchedWrite>("WLat"#L), []> { let Latency = L; }
68 def Z196_FXUnit : ProcResource<2>;
69 def Z196_LSUnit : ProcResource<2>;
70 def Z196_FPUnit : ProcResource<1>;
71 def Z196_DFUnit : ProcResource<1>;
72 def Z196_MCD : ProcResource<1>;
74 // Subtarget specific definitions of scheduling resources.
75 let NumMicroOps = 0 in {
76 def : WriteRes<FXU, [Z196_FXUnit]>;
77 def : WriteRes<LSU, [Z196_LSUnit]>;
78 def : WriteRes<FPU, [Z196_FPUnit]>;
79 def : WriteRes<DFU, [Z196_DFUnit]>;
80 foreach Num = 2-6 in { let ResourceCycles = [Num] in {
81 def : WriteRes<!cast<SchedWrite>("FXU"#Num), [Z196_FXUnit]>;
82 def : WriteRes<!cast<SchedWrite>("LSU"#Num), [Z196_LSUnit]>;
83 def : WriteRes<!cast<SchedWrite>("FPU"#Num), [Z196_FPUnit]>;
84 def : WriteRes<!cast<SchedWrite>("DFU"#Num), [Z196_DFUnit]>;
88 def : WriteRes<MCD, [Z196_MCD]> { let NumMicroOps = 3;
92 // -------------------------- INSTRUCTIONS ---------------------------------- //
94 // InstRW constructs have been used in order to preserve the
95 // readability of the InstrInfo files.
97 // For each instruction, as matched by a regexp, provide a list of
98 // resources that it needs. These will be combined into a SchedClass.
100 //===----------------------------------------------------------------------===//
102 //===----------------------------------------------------------------------===//
104 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ADJDYNALLOC$")>; // Pseudo -> LA / LAY
106 //===----------------------------------------------------------------------===//
107 // Branch instructions
108 //===----------------------------------------------------------------------===//
111 def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BRC(L)?(Asm.*)?$")>;
112 def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?J(G)?(Asm.*)?$")>;
113 def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?BC(R)?(Asm.*)?$")>;
114 def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Call)?B(R)?(Asm.*)?$")>;
115 def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BRCT(G|H)?$")>;
116 def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BCT(G)?(R)?$")>;
117 def : InstRW<[WLat1, FXU3, LSU, GroupAlone],
118 (instregex "B(R)?X(H|L).*$")>;
120 // Compare and branch
121 def : InstRW<[WLat1, FXU, LSU, GroupAlone],
122 (instregex "C(L)?(G)?(I|R)J(Asm.*)?$")>;
123 def : InstRW<[WLat1, FXU, LSU, GroupAlone],
124 (instregex "C(L)?(G)?(I|R)B(Call|Return|Asm.*)?$")>;
126 //===----------------------------------------------------------------------===//
128 //===----------------------------------------------------------------------===//
131 def : InstRW<[WLat1, LSU, EndGroup], (instregex "(Cond)?Trap$")>;
134 def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?(I|R)T(Asm.*)?$")>;
135 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(G)?RT(Asm.*)?$")>;
136 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CL(F|G)IT(Asm.*)?$")>;
138 //===----------------------------------------------------------------------===//
139 // Call and return instructions
140 //===----------------------------------------------------------------------===//
143 def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRAS$")>;
144 def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BRASL$")>;
145 def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "(Call)?BAS(R)?$")>;
146 def : InstRW<[WLat1, LSU, FXU2, GroupAlone], (instregex "TLS_(G|L)DCALL$")>;
149 def : InstRW<[WLat1, LSU, EndGroup], (instregex "Return$")>;
150 def : InstRW<[WLat1, LSU, EndGroup], (instregex "CondReturn$")>;
152 //===----------------------------------------------------------------------===//
154 //===----------------------------------------------------------------------===//
157 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MV(G|H)?HI$")>;
158 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "MVI(Y)?$")>;
161 def : InstRW<[WLat1, FXU, LSU3, GroupAlone], (instregex "MVC$")>;
162 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVCL(E|U)?$")>;
164 // Pseudo -> reg move
165 def : InstRW<[WLat1, FXU, NormalGr], (instregex "COPY(_TO_REGCLASS)?$")>;
166 def : InstRW<[WLat1, FXU, NormalGr], (instregex "EXTRACT_SUBREG$")>;
167 def : InstRW<[WLat1, FXU, NormalGr], (instregex "INSERT_SUBREG$")>;
168 def : InstRW<[WLat1, FXU, NormalGr], (instregex "REG_SEQUENCE$")>;
171 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(Y|FH|RL|Mux)?$")>;
172 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LG(RL)?$")>;
173 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L128$")>;
175 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIH(F|H|L)$")>;
176 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLIL(F|H|L)$")>;
178 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(F|H)I$")>;
179 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LHI(Mux)?$")>;
180 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LR(Mux)?$")>;
183 def : InstRW<[WLat1LSU, WLat1LSU, LSU, FXU, NormalGr], (instregex "LT(G)?$")>;
184 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LT(G)?R$")>;
187 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STG(RL)?$")>;
188 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST128$")>;
189 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(Y|FH|RL|Mux)?$")>;
192 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "MVST$")>;
194 //===----------------------------------------------------------------------===//
195 // Conditional move instructions
196 //===----------------------------------------------------------------------===//
198 def : InstRW<[WLat2, FXU, EndGroup], (instregex "LOC(G)?R(Asm.*)?$")>;
199 def : InstRW<[WLat2LSU, RegReadAdv, FXU, LSU, EndGroup],
200 (instregex "LOC(G)?(Asm.*)?$")>;
201 def : InstRW<[WLat1, FXU, LSU, EndGroup], (instregex "STOC(G)?(Asm.*)?$")>;
203 //===----------------------------------------------------------------------===//
205 //===----------------------------------------------------------------------===//
207 def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(B|H|G)R$")>;
208 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LG(B|H|F)R$")>;
210 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LTGF$")>;
211 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LTGFR$")>;
213 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LB(H|Mux)?$")>;
214 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(Y)?$")>;
215 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LH(H|Mux|RL)$")>;
216 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(B|H|F)$")>;
217 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LG(H|F)RL$")>;
219 //===----------------------------------------------------------------------===//
221 //===----------------------------------------------------------------------===//
223 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLCR(Mux)?$")>;
224 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLHR(Mux)?$")>;
225 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LLG(C|H|F|T)R$")>;
226 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLC(Mux)?$")>;
227 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLH(Mux)?$")>;
228 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LL(C|H)H$")>;
229 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLHRL$")>;
230 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LLG(C|H|F|T|HRL|FRL)$")>;
232 //===----------------------------------------------------------------------===//
234 //===----------------------------------------------------------------------===//
236 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STC(H|Y|Mux)?$")>;
237 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STH(H|Y|RL|Mux)?$")>;
238 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STCM(H|Y)?$")>;
240 //===----------------------------------------------------------------------===//
241 // Multi-register moves
242 //===----------------------------------------------------------------------===//
244 // Load multiple (estimated average of 5 ops)
245 def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LM(H|Y|G)?$")>;
247 // Load multiple disjoint
248 def : InstRW<[WLat30, WLat30, MCD], (instregex "LMD$")>;
250 // Store multiple (estimated average of 3 ops)
251 def : InstRW<[WLat1, LSU2, FXU5, GroupAlone], (instregex "STM(H|Y|G)?$")>;
253 //===----------------------------------------------------------------------===//
255 //===----------------------------------------------------------------------===//
257 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LRV(G)?R$")>;
258 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "LRV(G|H)?$")>;
259 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STRV(G|H)?$")>;
260 def : InstRW<[WLat30, MCD], (instregex "MVCIN$")>;
262 //===----------------------------------------------------------------------===//
263 // Load address instructions
264 //===----------------------------------------------------------------------===//
266 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LA(Y|RL)?$")>;
268 // Load the Global Offset Table address
269 def : InstRW<[WLat1, FXU, NormalGr], (instregex "GOT$")>;
271 //===----------------------------------------------------------------------===//
272 // Absolute and Negation
273 //===----------------------------------------------------------------------===//
275 def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LP(G)?R$")>;
276 def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "L(N|P)GFR$")>;
277 def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "LN(R|GR)$")>;
278 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LC(R|GR)$")>;
279 def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "LCGFR$")>;
281 //===----------------------------------------------------------------------===//
283 //===----------------------------------------------------------------------===//
285 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "IC(Y)?$")>;
286 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
287 (instregex "IC32(Y)?$")>;
288 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
289 (instregex "ICM(H|Y)?$")>;
290 def : InstRW<[WLat1, FXU, NormalGr], (instregex "II(F|H|L)Mux$")>;
291 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHF(64)?$")>;
292 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHH(64)?$")>;
293 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IIHL(64)?$")>;
294 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILF(64)?$")>;
295 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILH(64)?$")>;
296 def : InstRW<[WLat1, FXU, NormalGr], (instregex "IILL(64)?$")>;
298 //===----------------------------------------------------------------------===//
300 //===----------------------------------------------------------------------===//
302 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
303 (instregex "A(L)?(Y)?$")>;
304 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?SI$")>;
305 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
306 (instregex "AH(Y)?$")>;
307 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AIH$")>;
308 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AFI(Mux)?$")>;
309 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGFI$")>;
310 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGHI(K)?$")>;
311 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AGR(K)?$")>;
312 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHI(K)?$")>;
313 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AHIMux(K)?$")>;
314 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AL(FI|HSIK)$")>;
315 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
316 (instregex "ALGF$")>;
317 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGHSIK$")>;
318 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGF(I|R)$")>;
319 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALGR(K)?$")>;
320 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALR(K)?$")>;
321 def : InstRW<[WLat1, FXU, NormalGr], (instregex "AR(K)?$")>;
322 def : InstRW<[WLat1, FXU, NormalGr], (instregex "A(L)?HHHR$")>;
323 def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "A(L)?HHLR$")>;
324 def : InstRW<[WLat1, FXU, NormalGr], (instregex "ALSIH(N)?$")>;
325 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
326 (instregex "A(L)?G$")>;
327 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "A(L)?GSI$")>;
329 // Logical addition with carry
330 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone],
331 (instregex "ALC(G)?$")>;
332 def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "ALC(G)?R$")>;
334 // Add with sign extension (32 -> 64)
335 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
337 def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "AGFR$")>;
339 //===----------------------------------------------------------------------===//
341 //===----------------------------------------------------------------------===//
343 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
344 (instregex "S(G|Y)?$")>;
345 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
346 (instregex "SH(Y)?$")>;
347 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SGR(K)?$")>;
348 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLFI$")>;
349 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
350 (instregex "SL(G|GF|Y)?$")>;
351 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGF(I|R)$")>;
352 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLGR(K)?$")>;
353 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLR(K)?$")>;
354 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SR(K)?$")>;
355 def : InstRW<[WLat1, FXU, NormalGr], (instregex "S(L)?HHHR$")>;
356 def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "S(L)?HHLR$")>;
358 // Subtraction with borrow
359 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU, LSU, GroupAlone],
360 (instregex "SLB(G)?$")>;
361 def : InstRW<[WLat2, WLat2, FXU, GroupAlone], (instregex "SLB(G)?R$")>;
363 // Subtraction with sign extension (32 -> 64)
364 def : InstRW<[WLat2LSU, WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
366 def : InstRW<[WLat2, WLat2, FXU2, GroupAlone], (instregex "SGFR$")>;
368 //===----------------------------------------------------------------------===//
370 //===----------------------------------------------------------------------===//
372 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
373 (instregex "N(G|Y)?$")>;
374 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NGR(K)?$")>;
375 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NI(FMux|HMux|LMux)$")>;
376 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "NI(Y)?$")>;
377 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHF(64)?$")>;
378 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHH(64)?$")>;
379 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NIHL(64)?$")>;
380 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILF(64)?$")>;
381 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILH(64)?$")>;
382 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NILL(64)?$")>;
383 def : InstRW<[WLat1, FXU, NormalGr], (instregex "NR(K)?$")>;
384 def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "NC$")>;
386 //===----------------------------------------------------------------------===//
388 //===----------------------------------------------------------------------===//
390 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
391 (instregex "O(G|Y)?$")>;
392 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OGR(K)?$")>;
393 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "OI(Y)?$")>;
394 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OI(FMux|HMux|LMux)$")>;
395 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHF(64)?$")>;
396 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHH(64)?$")>;
397 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OIHL(64)?$")>;
398 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILF(64)?$")>;
399 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILH(64)?$")>;
400 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OILL(64)?$")>;
401 def : InstRW<[WLat1, FXU, NormalGr], (instregex "OR(K)?$")>;
402 def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "OC$")>;
404 //===----------------------------------------------------------------------===//
406 //===----------------------------------------------------------------------===//
408 def : InstRW<[WLat1LSU, WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
409 (instregex "X(G|Y)?$")>;
410 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "XI(Y)?$")>;
411 def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIFMux$")>;
412 def : InstRW<[WLat1, FXU, NormalGr], (instregex "XGR(K)?$")>;
413 def : InstRW<[WLat1, FXU, NormalGr], (instregex "XIHF(64)?$")>;
414 def : InstRW<[WLat1, FXU, NormalGr], (instregex "XILF(64)?$")>;
415 def : InstRW<[WLat1, FXU, NormalGr], (instregex "XR(K)?$")>;
416 def : InstRW<[WLat5LSU, LSU2, FXU, GroupAlone], (instregex "XC$")>;
418 //===----------------------------------------------------------------------===//
420 //===----------------------------------------------------------------------===//
422 def : InstRW<[WLat6LSU, RegReadAdv, FXU, LSU, NormalGr],
423 (instregex "MS(GF|Y)?$")>;
424 def : InstRW<[WLat6, FXU, NormalGr], (instregex "MS(R|FI)$")>;
425 def : InstRW<[WLat8LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MSG$")>;
426 def : InstRW<[WLat8, FXU, NormalGr], (instregex "MSGR$")>;
427 def : InstRW<[WLat6, FXU, NormalGr], (instregex "MSGF(I|R)$")>;
428 def : InstRW<[WLat11LSU, RegReadAdv, FXU2, LSU, GroupAlone],
430 def : InstRW<[WLat9, FXU2, GroupAlone], (instregex "MLGR$")>;
431 def : InstRW<[WLat5, FXU, NormalGr], (instregex "MGHI$")>;
432 def : InstRW<[WLat5, FXU, NormalGr], (instregex "MHI$")>;
433 def : InstRW<[WLat5LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "MH(Y)?$")>;
434 def : InstRW<[WLat7, FXU2, GroupAlone], (instregex "M(L)?R$")>;
435 def : InstRW<[WLat7LSU, RegReadAdv, FXU2, LSU, GroupAlone],
436 (instregex "M(FY|L)?$")>;
438 //===----------------------------------------------------------------------===//
439 // Division and remainder
440 //===----------------------------------------------------------------------===//
442 def : InstRW<[WLat30, FPU4, FXU5, GroupAlone], (instregex "DR$")>;
443 def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone],
445 def : InstRW<[WLat30, FPU4, FXU4, GroupAlone], (instregex "DSG(F)?R$")>;
446 def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU3, GroupAlone],
447 (instregex "DSG(F)?$")>;
448 def : InstRW<[WLat30, FPU4, FXU5, GroupAlone], (instregex "DL(G)?R$")>;
449 def : InstRW<[WLat30, RegReadAdv, FPU4, LSU, FXU4, GroupAlone],
450 (instregex "DL(G)?$")>;
452 //===----------------------------------------------------------------------===//
454 //===----------------------------------------------------------------------===//
456 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SLL(G|K)?$")>;
457 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRL(G|K)?$")>;
458 def : InstRW<[WLat1, FXU, NormalGr], (instregex "SRA(G|K)?$")>;
459 def : InstRW<[WLat2, WLat2, FXU, NormalGr], (instregex "SLA(G|K)?$")>;
460 def : InstRW<[WLat5LSU, WLat5LSU, FXU4, LSU, GroupAlone],
461 (instregex "S(L|R)D(A|L)$")>;
464 def : InstRW<[WLat2LSU, FXU, LSU, NormalGr], (instregex "RLL(G)?$")>;
467 def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBG(32)?$")>;
468 def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBH(G|H|L)$")>;
469 def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBL(G|H|L)$")>;
470 def : InstRW<[WLat1, FXU, NormalGr], (instregex "RISBMux$")>;
473 def : InstRW<[WLat3, WLat3, FXU2, GroupAlone], (instregex "R(N|O|X)SBG$")>;
475 //===----------------------------------------------------------------------===//
477 //===----------------------------------------------------------------------===//
479 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "C(G|Y|Mux|RL)?$")>;
480 def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(F|H)I(Mux)?$")>;
481 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CG(F|H)I$")>;
482 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CG(HSI|RL)$")>;
483 def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(G)?R$")>;
484 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CIH$")>;
485 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CHF$")>;
486 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CHSI$")>;
487 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr],
488 (instregex "CL(Y|Mux)?$")>;
489 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLFHSI$")>;
490 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLFI(Mux)?$")>;
491 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLG$")>;
492 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLG(HRL|HSI)$")>;
493 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLGF$")>;
494 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGFRL$")>;
495 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGF(I|R)$")>;
496 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLGR$")>;
497 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLGRL$")>;
498 def : InstRW<[WLat1LSU, RegReadAdv, FXU, LSU, NormalGr], (instregex "CLHF$")>;
499 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLH(RL|HSI)$")>;
500 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLIH$")>;
501 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLI(Y)?$")>;
502 def : InstRW<[WLat1, FXU, NormalGr], (instregex "CLR$")>;
503 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "CLRL$")>;
504 def : InstRW<[WLat1, FXU, NormalGr], (instregex "C(L)?HHR$")>;
505 def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "C(L)?HLR$")>;
508 def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
509 (instregex "CH(Y)?$")>;
510 def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHRL$")>;
511 def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGH$")>;
512 def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGHRL$")>;
513 def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CHHSI$")>;
515 // Compare with sign extension (32 -> 64)
516 def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone], (instregex "CGF$")>;
517 def : InstRW<[WLat2LSU, FXU2, LSU, GroupAlone], (instregex "CGFRL$")>;
518 def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "CGFR$")>;
520 // Compare logical character
521 def : InstRW<[WLat9, FXU, LSU2, GroupAlone], (instregex "CLC$")>;
522 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLCL(E|U)?$")>;
523 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CLST$")>;
526 def : InstRW<[WLat1LSU, FXU, LSU, NormalGr], (instregex "TM(Y)?$")>;
527 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TM(H|L)Mux$")>;
528 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHH(64)?$")>;
529 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMHL(64)?$")>;
530 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLH(64)?$")>;
531 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TMLL(64)?$")>;
533 // Compare logical characters under mask
534 def : InstRW<[WLat2LSU, RegReadAdv, FXU2, LSU, GroupAlone],
535 (instregex "CLM(H|Y)?$")>;
537 //===----------------------------------------------------------------------===//
539 //===----------------------------------------------------------------------===//
541 def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PFD(RL)?$")>;
543 //===----------------------------------------------------------------------===//
545 //===----------------------------------------------------------------------===//
547 def : InstRW<[WLat1, LSU, EndGroup], (instregex "Serialize$")>;
549 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAA(G)?$")>;
550 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAAL(G)?$")>;
551 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAN(G)?$")>;
552 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAO(G)?$")>;
553 def : InstRW<[WLat1LSU, WLat1LSU, FXU, LSU, NormalGr], (instregex "LAX(G)?$")>;
556 def : InstRW<[WLat1LSU, FXU, LSU, EndGroup], (instregex "TS$")>;
559 def : InstRW<[WLat2LSU, WLat2LSU, FXU2, LSU, GroupAlone],
560 (instregex "CS(G|Y)?$")>;
562 // Compare double and swap
563 def : InstRW<[WLat5LSU, WLat5LSU, FXU5, LSU, GroupAlone],
564 (instregex "CDS(Y)?$")>;
565 def : InstRW<[WLat12, WLat12, FXU6, LSU2, GroupAlone],
566 (instregex "CDSG$")>;
568 // Compare and swap and store
569 def : InstRW<[WLat30, MCD], (instregex "CSST$")>;
571 // Perform locked operation
572 def : InstRW<[WLat30, MCD], (instregex "PLO$")>;
574 // Load/store pair from/to quadword
575 def : InstRW<[WLat4LSU, LSU2, GroupAlone], (instregex "LPQ$")>;
576 def : InstRW<[WLat1, FXU2, LSU2, GroupAlone], (instregex "STPQ$")>;
578 // Load pair disjoint
579 def : InstRW<[WLat2LSU, WLat2LSU, LSU2, GroupAlone], (instregex "LPD(G)?$")>;
581 //===----------------------------------------------------------------------===//
582 // Translate and convert
583 //===----------------------------------------------------------------------===//
585 def : InstRW<[WLat30, MCD], (instregex "TR$")>;
586 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT$")>;
587 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRTR$")>;
588 def : InstRW<[WLat30, WLat30, MCD], (instregex "TRE$")>;
589 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TRT(R)?E(Opt)?$")>;
590 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "TR(T|O)(T|O)(Opt)?$")>;
591 def : InstRW<[WLat30, WLat30, WLat30, MCD],
592 (instregex "CU(12|14|21|24|41|42)(Opt)?$")>;
593 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(CUUTF|CUTFU)(Opt)?$")>;
595 //===----------------------------------------------------------------------===//
596 // Message-security assist
597 //===----------------------------------------------------------------------===//
599 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD],
600 (instregex "KM(C|F|O|CTR)?$")>;
601 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "(KIMD|KLMD|KMAC|PCC)$")>;
603 //===----------------------------------------------------------------------===//
604 // Decimal arithmetic
605 //===----------------------------------------------------------------------===//
607 def : InstRW<[WLat30, RegReadAdv, FXU, DFU2, LSU2, GroupAlone],
608 (instregex "CVBG$")>;
609 def : InstRW<[WLat20, RegReadAdv, FXU, DFU, LSU, GroupAlone],
610 (instregex "CVB(Y)?$")>;
611 def : InstRW<[WLat1, FXU3, DFU4, LSU, GroupAlone], (instregex "CVDG$")>;
612 def : InstRW<[WLat1, FXU2, DFU, LSU, GroupAlone], (instregex "CVD(Y)?$")>;
613 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "MV(N|O|Z)$")>;
614 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "(PACK|PKA|PKU)$")>;
615 def : InstRW<[WLat10, LSU5, GroupAlone], (instregex "UNPK(A|U)$")>;
616 def : InstRW<[WLat1, LSU5, GroupAlone], (instregex "UNPK$")>;
618 def : InstRW<[WLat11LSU, FXU, DFU4, LSU2, GroupAlone],
619 (instregex "(A|S|ZA)P$")>;
620 def : InstRW<[WLat1, FXU, DFU4, LSU2, GroupAlone], (instregex "(M|D)P$")>;
621 def : InstRW<[WLat15, FXU2, DFU4, LSU3, GroupAlone], (instregex "SRP$")>;
622 def : InstRW<[WLat11, DFU4, LSU2, GroupAlone], (instregex "CP$")>;
623 def : InstRW<[WLat5LSU, DFU2, LSU2, GroupAlone], (instregex "TP$")>;
624 def : InstRW<[WLat30, MCD], (instregex "ED(MK)?$")>;
626 //===----------------------------------------------------------------------===//
628 //===----------------------------------------------------------------------===//
630 // Extract/set/copy access register
631 def : InstRW<[WLat3, LSU, NormalGr], (instregex "(EAR|SAR|CPYA)$")>;
633 // Load address extended
634 def : InstRW<[WLat5, LSU, FXU, GroupAlone], (instregex "LAE(Y)?$")>;
636 // Load/store access multiple (not modeled precisely)
637 def : InstRW<[WLat10, WLat10, LSU5, GroupAlone], (instregex "LAM(Y)?$")>;
638 def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STAM(Y)?$")>;
640 //===----------------------------------------------------------------------===//
641 // Program mask and addressing mode
642 //===----------------------------------------------------------------------===//
644 // Insert Program Mask
645 def : InstRW<[WLat3, FXU, EndGroup], (instregex "IPM$")>;
648 def : InstRW<[WLat3, LSU, EndGroup], (instregex "SPM$")>;
651 def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BAL(R)?$")>;
653 // Test addressing mode
654 def : InstRW<[WLat1, FXU, NormalGr], (instregex "TAM$")>;
656 // Set addressing mode
657 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAM(24|31|64)$")>;
659 // Branch (and save) and set mode.
660 def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "BSM$")>;
661 def : InstRW<[WLat1, FXU2, LSU, GroupAlone], (instregex "BASSM$")>;
663 //===----------------------------------------------------------------------===//
664 // Miscellaneous Instructions.
665 //===----------------------------------------------------------------------===//
668 def : InstRW<[WLat7, WLat7, FXU2, GroupAlone], (instregex "FLOGR$")>;
671 def : InstRW<[WLat3, WLat3, FXU, NormalGr], (instregex "POPCNT$")>;
673 // String instructions
674 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "SRST(U)?$")>;
675 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CUSE$")>;
677 // Various complex instructions
678 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CFC$")>;
679 def : InstRW<[WLat30, WLat30, WLat30, WLat30, WLat30, WLat30, MCD],
681 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "CKSM$")>;
682 def : InstRW<[WLat30, WLat30, WLat30, WLat30, MCD], (instregex "CMPSC$")>;
685 def : InstRW<[LSU, GroupAlone], (instregex "EX(RL)?$")>;
687 //===----------------------------------------------------------------------===//
688 // .insn directive instructions
689 //===----------------------------------------------------------------------===//
691 // An "empty" sched-class will be assigned instead of the "invalid sched-class".
692 // getNumDecoderSlots() will then return 1 instead of 0.
693 def : InstRW<[], (instregex "Insn.*")>;
696 // ----------------------------- Floating point ----------------------------- //
698 //===----------------------------------------------------------------------===//
699 // FP: Move instructions
700 //===----------------------------------------------------------------------===//
703 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LZ(DR|ER)$")>;
704 def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "LZXR$")>;
707 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LER$")>;
708 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LD(R|R32|GR)$")>;
709 def : InstRW<[WLat3, FXU, NormalGr], (instregex "LGDR$")>;
710 def : InstRW<[WLat2, FXU2, GroupAlone], (instregex "LXR$")>;
713 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)BR$")>;
714 def : InstRW<[WLat9, FPU, NormalGr], (instregex "LT(E|D)BRCompare$")>;
715 def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "LTXBR(Compare)?$")>;
718 def : InstRW<[WLat5, FXU2, GroupAlone], (instregex "CPSDR(d|s)(d|s)$")>;
720 //===----------------------------------------------------------------------===//
721 // FP: Load instructions
722 //===----------------------------------------------------------------------===//
724 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "L(E|D)(Y|E32)?$")>;
725 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LX$")>;
727 //===----------------------------------------------------------------------===//
728 // FP: Store instructions
729 //===----------------------------------------------------------------------===//
731 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "ST(E|D)(Y)?$")>;
732 def : InstRW<[WLat1, FXU, LSU, NormalGr], (instregex "STX$")>;
734 //===----------------------------------------------------------------------===//
735 // FP: Conversion instructions
736 //===----------------------------------------------------------------------===//
739 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEDBR(A)?$")>;
740 def : InstRW<[WLat9, FPU2, NormalGr], (instregex "L(E|D)XBR(A)?$")>;
743 def : InstRW<[WLat7LSU, FPU, LSU, NormalGr], (instregex "LDEB$")>;
744 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LDEBR$")>;
745 def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)B$")>;
746 def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "LX(E|D)BR$")>;
748 // Convert from fixed / logical
749 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)BR(A)?$")>;
750 def : InstRW<[WLat11, FXU, FPU4, GroupAlone], (instregex "CX(F|G)BR(A?)$")>;
751 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CEL(F|G)BR$")>;
752 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "CDL(F|G)BR$")>;
753 def : InstRW<[WLat11, FXU, FPU4, GroupAlone], (instregex "CXL(F|G)BR$")>;
755 // Convert to fixed / logical
756 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
757 (instregex "C(F|G)(E|D)BR(A?)$")>;
758 def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone],
759 (instregex "C(F|G)XBR(A?)$")>;
760 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
761 (instregex "CL(F|G)(E|D)BR$")>;
762 def : InstRW<[WLat12, WLat12, FXU, FPU2, GroupAlone], (instregex "CL(F|G)XBR$")>;
764 //===----------------------------------------------------------------------===//
765 // FP: Unary arithmetic
766 //===----------------------------------------------------------------------===//
768 // Load Complement / Negative / Positive
769 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)BR$")>;
770 def : InstRW<[WLat1, FXU, NormalGr], (instregex "L(C|N|P)DFR(_32)?$")>;
771 def : InstRW<[WLat10, WLat10, FPU4, GroupAlone], (instregex "L(C|N|P)XBR$")>;
774 def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)B$")>;
775 def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)BR$")>;
776 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXBR$")>;
779 def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)BR(A)?$")>;
780 def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXBR(A)?$")>;
782 //===----------------------------------------------------------------------===//
783 // FP: Binary arithmetic
784 //===----------------------------------------------------------------------===//
787 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
788 (instregex "A(E|D)B$")>;
789 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D)BR$")>;
790 def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "AXBR$")>;
793 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
794 (instregex "S(E|D)B$")>;
795 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D)BR$")>;
796 def : InstRW<[WLat20, WLat20, FPU4, GroupAlone], (instregex "SXBR$")>;
799 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
800 (instregex "M(D|DE|EE)B$")>;
801 def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|DE|EE)BR$")>;
802 def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone],
803 (instregex "MXDB$")>;
804 def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDBR$")>;
805 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXBR$")>;
807 // Multiply and add / subtract
808 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone],
809 (instregex "M(A|S)EB$")>;
810 def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)EBR$")>;
811 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone],
812 (instregex "M(A|S)DB$")>;
813 def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)DBR$")>;
816 def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)B$")>;
817 def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)BR$")>;
818 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXBR$")>;
821 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "DI(E|D)BR$")>;
823 //===----------------------------------------------------------------------===//
825 //===----------------------------------------------------------------------===//
828 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr],
829 (instregex "(K|C)(E|D)B$")>;
830 def : InstRW<[WLat9, FPU, NormalGr], (instregex "(K|C)(E|D)BR$")>;
831 def : InstRW<[WLat30, FPU2, NormalGr], (instregex "(K|C)XBR$")>;
834 def : InstRW<[WLat15, FPU, LSU, NormalGr], (instregex "TC(E|D)B$")>;
835 def : InstRW<[WLat15, FPU4, LSU, GroupAlone], (instregex "TCXB$")>;
837 //===----------------------------------------------------------------------===//
838 // FP: Floating-point control register instructions
839 //===----------------------------------------------------------------------===//
841 def : InstRW<[WLat4, FXU, LSU, GroupAlone], (instregex "EFPC$")>;
842 def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "STFPC$")>;
843 def : InstRW<[WLat1, LSU, GroupAlone], (instregex "SFPC$")>;
844 def : InstRW<[WLat1, LSU2, GroupAlone], (instregex "LFPC$")>;
845 def : InstRW<[WLat30, MCD], (instregex "SFASR$")>;
846 def : InstRW<[WLat30, MCD], (instregex "LFAS$")>;
847 def : InstRW<[WLat2, FXU, GroupAlone], (instregex "SRNM(B|T)?$")>;
850 // --------------------- Hexadecimal floating point ------------------------- //
852 //===----------------------------------------------------------------------===//
853 // HFP: Move instructions
854 //===----------------------------------------------------------------------===//
857 def : InstRW<[WLat9, WLat9, FPU, NormalGr], (instregex "LT(E|D)R$")>;
858 def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "LTXR$")>;
860 //===----------------------------------------------------------------------===//
861 // HFP: Conversion instructions
862 //===----------------------------------------------------------------------===//
865 def : InstRW<[WLat7, FPU, NormalGr], (instregex "(LEDR|LRER)$")>;
866 def : InstRW<[WLat7, FPU, NormalGr], (instregex "LEXR$")>;
867 def : InstRW<[WLat9, FPU, NormalGr], (instregex "(LDXR|LRDR)$")>;
870 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "LDE$")>;
871 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LDER$")>;
872 def : InstRW<[WLat11LSU, FPU4, LSU, GroupAlone], (instregex "LX(E|D)$")>;
873 def : InstRW<[WLat9, FPU4, GroupAlone], (instregex "LX(E|D)R$")>;
875 // Convert from fixed
876 def : InstRW<[WLat8, FXU, FPU, GroupAlone], (instregex "C(E|D)(F|G)R$")>;
877 def : InstRW<[WLat10, FXU, FPU4, GroupAlone], (instregex "CX(F|G)R$")>;
880 def : InstRW<[WLat12, WLat12, FXU, FPU, GroupAlone],
881 (instregex "C(F|G)(E|D)R$")>;
882 def : InstRW<[WLat30, WLat30, FXU, FPU2, GroupAlone], (instregex "C(F|G)XR$")>;
884 // Convert BFP to HFP / HFP to BFP.
885 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "THD(E)?R$")>;
886 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "TB(E)?DR$")>;
888 //===----------------------------------------------------------------------===//
889 // HFP: Unary arithmetic
890 //===----------------------------------------------------------------------===//
892 // Load Complement / Negative / Positive
893 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "L(C|N|P)(E|D)R$")>;
894 def : InstRW<[WLat9, WLat9, FPU4, GroupAlone], (instregex "L(C|N|P)XR$")>;
897 def : InstRW<[WLat7, FPU, NormalGr], (instregex "H(E|D)R$")>;
900 def : InstRW<[WLat30, FPU, LSU, NormalGr], (instregex "SQ(E|D)$")>;
901 def : InstRW<[WLat30, FPU, NormalGr], (instregex "SQ(E|D)R$")>;
902 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "SQXR$")>;
905 def : InstRW<[WLat7, FPU, NormalGr], (instregex "FI(E|D)R$")>;
906 def : InstRW<[WLat15, FPU4, GroupAlone], (instregex "FIXR$")>;
908 //===----------------------------------------------------------------------===//
909 // HFP: Binary arithmetic
910 //===----------------------------------------------------------------------===//
913 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
914 (instregex "A(E|D|U|W)$")>;
915 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "A(E|D|U|W)R$")>;
916 def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "AXR$")>;
919 def : InstRW<[WLat7LSU, WLat7LSU, RegReadAdv, FPU, LSU, NormalGr],
920 (instregex "S(E|D|U|W)$")>;
921 def : InstRW<[WLat7, WLat7, FPU, NormalGr], (instregex "S(E|D|U|W)R$")>;
922 def : InstRW<[WLat15, WLat15, FPU4, GroupAlone], (instregex "SXR$")>;
925 def : InstRW<[WLat7LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(D|EE)$")>;
926 def : InstRW<[WLat8LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "M(DE|E)$")>;
927 def : InstRW<[WLat7, FPU, NormalGr], (instregex "M(D|EE)R$")>;
928 def : InstRW<[WLat8, FPU, NormalGr], (instregex "M(DE|E)R$")>;
929 def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MXD$")>;
930 def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MXDR$")>;
931 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "MXR$")>;
932 def : InstRW<[WLat11LSU, RegReadAdv, FPU4, LSU, GroupAlone], (instregex "MY$")>;
933 def : InstRW<[WLat7LSU, RegReadAdv, FPU2, LSU, GroupAlone],
934 (instregex "MY(H|L)$")>;
935 def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MYR$")>;
936 def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MY(H|L)R$")>;
938 // Multiply and add / subtract
939 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone],
940 (instregex "M(A|S)(E|D)$")>;
941 def : InstRW<[WLat7, FPU, GroupAlone], (instregex "M(A|S)(E|D)R$")>;
942 def : InstRW<[WLat11LSU, RegReadAdv, RegReadAdv, FPU4, LSU, GroupAlone],
944 def : InstRW<[WLat7LSU, RegReadAdv, RegReadAdv, FPU2, LSU, GroupAlone],
945 (instregex "MAY(H|L)$")>;
946 def : InstRW<[WLat10, FPU4, GroupAlone], (instregex "MAYR$")>;
947 def : InstRW<[WLat7, FPU, GroupAlone], (instregex "MAY(H|L)R$")>;
950 def : InstRW<[WLat30, RegReadAdv, FPU, LSU, NormalGr], (instregex "D(E|D)$")>;
951 def : InstRW<[WLat30, FPU, NormalGr], (instregex "D(E|D)R$")>;
952 def : InstRW<[WLat30, FPU4, GroupAlone], (instregex "DXR$")>;
954 //===----------------------------------------------------------------------===//
956 //===----------------------------------------------------------------------===//
959 def : InstRW<[WLat11LSU, RegReadAdv, FPU, LSU, NormalGr], (instregex "C(E|D)$")>;
960 def : InstRW<[WLat9, FPU, NormalGr], (instregex "C(E|D)R$")>;
961 def : InstRW<[WLat15, FPU2, NormalGr], (instregex "CXR$")>;
964 // ------------------------ Decimal floating point -------------------------- //
966 //===----------------------------------------------------------------------===//
967 // DFP: Move instructions
968 //===----------------------------------------------------------------------===//
971 def : InstRW<[WLat4, WLat4, DFU, NormalGr], (instregex "LTDTR$")>;
972 def : InstRW<[WLat6, WLat6, DFU4, GroupAlone], (instregex "LTXTR$")>;
974 //===----------------------------------------------------------------------===//
975 // DFP: Conversion instructions
976 //===----------------------------------------------------------------------===//
979 def : InstRW<[WLat30, DFU, NormalGr], (instregex "LEDTR$")>;
980 def : InstRW<[WLat30, DFU2, NormalGr], (instregex "LDXTR$")>;
983 def : InstRW<[WLat7, DFU, NormalGr], (instregex "LDETR$")>;
984 def : InstRW<[WLat6, DFU4, GroupAlone], (instregex "LXDTR$")>;
986 // Convert from fixed / logical
987 def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDFTR$")>;
988 def : InstRW<[WLat30, FXU, DFU, GroupAlone], (instregex "CDGTR(A)?$")>;
989 def : InstRW<[WLat5, FXU, DFU4, GroupAlone], (instregex "CXFTR(A)?$")>;
990 def : InstRW<[WLat30, FXU, DFU4, GroupAlone], (instregex "CXGTR(A)?$")>;
991 def : InstRW<[WLat9, FXU, DFU, GroupAlone], (instregex "CDL(F|G)TR$")>;
992 def : InstRW<[WLat9, FXU, DFU4, GroupAlone], (instregex "CXLFTR$")>;
993 def : InstRW<[WLat5, FXU, DFU4, GroupAlone], (instregex "CXLGTR$")>;
995 // Convert to fixed / logical
996 def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CFDTR(A)?$")>;
997 def : InstRW<[WLat30, WLat30, FXU, DFU, GroupAlone], (instregex "CGDTR(A)?$")>;
998 def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CFXTR$")>;
999 def : InstRW<[WLat30, WLat30, FXU, DFU2, GroupAlone], (instregex "CGXTR(A)?$")>;
1000 def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "CL(F|G)DTR$")>;
1001 def : InstRW<[WLat7, WLat7, FXU, DFU2, GroupAlone], (instregex "CL(F|G)XTR$")>;
1003 // Convert from / to signed / unsigned packed
1004 def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "CD(S|U)TR$")>;
1005 def : InstRW<[WLat8, FXU2, DFU4, GroupAlone], (instregex "CX(S|U)TR$")>;
1006 def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "C(S|U)DTR$")>;
1007 def : InstRW<[WLat12, FXU2, DFU4, GroupAlone], (instregex "C(S|U)XTR$")>;
1009 // Perform floating-point operation
1010 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "PFPO$")>;
1012 //===----------------------------------------------------------------------===//
1013 // DFP: Unary arithmetic
1014 //===----------------------------------------------------------------------===//
1017 def : InstRW<[WLat8, DFU, NormalGr], (instregex "FIDTR$")>;
1018 def : InstRW<[WLat10, DFU4, GroupAlone], (instregex "FIXTR$")>;
1020 // Extract biased exponent
1021 def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "EEDTR$")>;
1022 def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "EEXTR$")>;
1024 // Extract significance
1025 def : InstRW<[WLat7, FXU, DFU, GroupAlone], (instregex "ESDTR$")>;
1026 def : InstRW<[WLat8, FXU, DFU2, GroupAlone], (instregex "ESXTR$")>;
1028 //===----------------------------------------------------------------------===//
1029 // DFP: Binary arithmetic
1030 //===----------------------------------------------------------------------===//
1033 def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "ADTR(A)?$")>;
1034 def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "AXTR(A)?$")>;
1037 def : InstRW<[WLat9, WLat9, DFU, NormalGr], (instregex "SDTR(A)?$")>;
1038 def : InstRW<[WLat30, WLat30, DFU4, GroupAlone], (instregex "SXTR(A)?$")>;
1041 def : InstRW<[WLat30, DFU, NormalGr], (instregex "MDTR(A)?$")>;
1042 def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "MXTR(A)?$")>;
1045 def : InstRW<[WLat30, DFU, NormalGr], (instregex "DDTR(A)?$")>;
1046 def : InstRW<[WLat30, DFU4, GroupAlone], (instregex "DXTR(A)?$")>;
1049 def : InstRW<[WLat8, WLat8, DFU, NormalGr], (instregex "QADTR$")>;
1050 def : InstRW<[WLat10, WLat10, DFU4, GroupAlone], (instregex "QAXTR$")>;
1053 def : InstRW<[WLat11, WLat11, FXU, DFU, GroupAlone], (instregex "RRDTR$")>;
1054 def : InstRW<[WLat30, WLat30, FXU, DFU4, GroupAlone], (instregex "RRXTR$")>;
1056 // Shift significand left/right
1057 def : InstRW<[WLat7LSU, LSU, DFU, GroupAlone], (instregex "S(L|R)DT$")>;
1058 def : InstRW<[WLat11LSU, LSU, DFU4, GroupAlone], (instregex "S(L|R)XT$")>;
1060 // Insert biased exponent
1061 def : InstRW<[WLat5, FXU, DFU, GroupAlone], (instregex "IEDTR$")>;
1062 def : InstRW<[WLat7, FXU, DFU4, GroupAlone], (instregex "IEXTR$")>;
1064 //===----------------------------------------------------------------------===//
1066 //===----------------------------------------------------------------------===//
1069 def : InstRW<[WLat9, DFU, NormalGr], (instregex "(K|C)DTR$")>;
1070 def : InstRW<[WLat10, DFU2, NormalGr], (instregex "(K|C)XTR$")>;
1072 // Compare biased exponent
1073 def : InstRW<[WLat4, DFU, NormalGr], (instregex "CEDTR$")>;
1074 def : InstRW<[WLat5, DFU2, NormalGr], (instregex "CEXTR$")>;
1076 // Test Data Class/Group
1077 def : InstRW<[WLat9, LSU, DFU, NormalGr], (instregex "TD(C|G)DT$")>;
1078 def : InstRW<[WLat10, LSU, DFU, NormalGr], (instregex "TD(C|G)ET$")>;
1079 def : InstRW<[WLat10, LSU, DFU2, NormalGr], (instregex "TD(C|G)XT$")>;
1082 // -------------------------------- System ---------------------------------- //
1084 //===----------------------------------------------------------------------===//
1085 // System: Program-Status Word Instructions
1086 //===----------------------------------------------------------------------===//
1088 def : InstRW<[WLat30, WLat30, MCD], (instregex "EPSW$")>;
1089 def : InstRW<[WLat30, MCD], (instregex "LPSW(E)?$")>;
1090 def : InstRW<[WLat3, FXU, GroupAlone], (instregex "IPK$")>;
1091 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SPKA$")>;
1092 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SSM$")>;
1093 def : InstRW<[WLat1, FXU, LSU, GroupAlone], (instregex "ST(N|O)SM$")>;
1094 def : InstRW<[WLat3, FXU, NormalGr], (instregex "IAC$")>;
1095 def : InstRW<[WLat1, LSU, EndGroup], (instregex "SAC(F)?$")>;
1097 //===----------------------------------------------------------------------===//
1098 // System: Control Register Instructions
1099 //===----------------------------------------------------------------------===//
1101 def : InstRW<[WLat10, WLat10, LSU2, GroupAlone], (instregex "LCTL(G)?$")>;
1102 def : InstRW<[WLat1, FXU5, LSU5, GroupAlone], (instregex "STCT(L|G)$")>;
1103 def : InstRW<[LSULatency, LSU, NormalGr], (instregex "E(P|S)A(I)?R$")>;
1104 def : InstRW<[WLat30, MCD], (instregex "SSA(I)?R$")>;
1105 def : InstRW<[WLat30, MCD], (instregex "ESEA$")>;
1107 //===----------------------------------------------------------------------===//
1108 // System: Prefix-Register Instructions
1109 //===----------------------------------------------------------------------===//
1111 def : InstRW<[WLat30, MCD], (instregex "S(T)?PX$")>;
1113 //===----------------------------------------------------------------------===//
1114 // System: Storage-Key and Real Memory Instructions
1115 //===----------------------------------------------------------------------===//
1117 def : InstRW<[WLat30, MCD], (instregex "ISKE$")>;
1118 def : InstRW<[WLat30, MCD], (instregex "IVSK$")>;
1119 def : InstRW<[WLat30, MCD], (instregex "SSKE(Opt)?$")>;
1120 def : InstRW<[WLat30, MCD], (instregex "RRB(E|M)$")>;
1121 def : InstRW<[WLat30, MCD], (instregex "PFMF$")>;
1122 def : InstRW<[WLat30, WLat30, MCD], (instregex "TB$")>;
1123 def : InstRW<[WLat30, MCD], (instregex "PGIN$")>;
1124 def : InstRW<[WLat30, MCD], (instregex "PGOUT$")>;
1126 //===----------------------------------------------------------------------===//
1127 // System: Dynamic-Address-Translation Instructions
1128 //===----------------------------------------------------------------------===//
1130 def : InstRW<[WLat30, MCD], (instregex "IPTE(Opt)?(Opt)?$")>;
1131 def : InstRW<[WLat30, MCD], (instregex "IDTE(Opt)?$")>;
1132 def : InstRW<[WLat30, MCD], (instregex "PTLB$")>;
1133 def : InstRW<[WLat30, WLat30, MCD], (instregex "CSP(G)?$")>;
1134 def : InstRW<[WLat30, WLat30, WLat30, MCD], (instregex "LPTEA$")>;
1135 def : InstRW<[WLat30, WLat30, MCD], (instregex "LRA(Y|G)?$")>;
1136 def : InstRW<[WLat30, MCD], (instregex "STRAG$")>;
1137 def : InstRW<[WLat30, MCD], (instregex "LURA(G)?$")>;
1138 def : InstRW<[WLat30, MCD], (instregex "STUR(A|G)$")>;
1139 def : InstRW<[WLat30, MCD], (instregex "TPROT$")>;
1141 //===----------------------------------------------------------------------===//
1142 // System: Memory-move Instructions
1143 //===----------------------------------------------------------------------===//
1145 def : InstRW<[WLat30, MCD], (instregex "MVC(K|P|S)$")>;
1146 def : InstRW<[WLat30, MCD], (instregex "MVC(S|D)K$")>;
1147 def : InstRW<[WLat30, MCD], (instregex "MVCOS$")>;
1148 def : InstRW<[WLat30, MCD], (instregex "MVPG$")>;
1150 //===----------------------------------------------------------------------===//
1151 // System: Address-Space Instructions
1152 //===----------------------------------------------------------------------===//
1154 def : InstRW<[WLat30, MCD], (instregex "LASP$")>;
1155 def : InstRW<[WLat1, LSU, GroupAlone], (instregex "PALB$")>;
1156 def : InstRW<[WLat30, MCD], (instregex "PC$")>;
1157 def : InstRW<[WLat30, MCD], (instregex "PR$")>;
1158 def : InstRW<[WLat30, MCD], (instregex "PT(I)?$")>;
1159 def : InstRW<[WLat30, MCD], (instregex "RP$")>;
1160 def : InstRW<[WLat30, MCD], (instregex "BS(G|A)$")>;
1161 def : InstRW<[WLat30, MCD], (instregex "TAR$")>;
1163 //===----------------------------------------------------------------------===//
1164 // System: Linkage-Stack Instructions
1165 //===----------------------------------------------------------------------===//
1167 def : InstRW<[WLat30, MCD], (instregex "BAKR$")>;
1168 def : InstRW<[WLat30, MCD], (instregex "EREG(G)?$")>;
1169 def : InstRW<[WLat30, WLat30, MCD], (instregex "(E|M)STA$")>;
1171 //===----------------------------------------------------------------------===//
1172 // System: Time-Related Instructions
1173 //===----------------------------------------------------------------------===//
1175 def : InstRW<[WLat30, MCD], (instregex "PTFF$")>;
1176 def : InstRW<[WLat30, MCD], (instregex "SCK$")>;
1177 def : InstRW<[WLat30, MCD], (instregex "SCKPF$")>;
1178 def : InstRW<[WLat30, MCD], (instregex "SCKC$")>;
1179 def : InstRW<[WLat30, MCD], (instregex "SPT$")>;
1180 def : InstRW<[WLat30, MCD], (instregex "STCK(F)?$")>;
1181 def : InstRW<[WLat30, MCD], (instregex "STCKE$")>;
1182 def : InstRW<[WLat30, MCD], (instregex "STCKC$")>;
1183 def : InstRW<[WLat30, MCD], (instregex "STPT$")>;
1185 //===----------------------------------------------------------------------===//
1186 // System: CPU-Related Instructions
1187 //===----------------------------------------------------------------------===//
1189 def : InstRW<[WLat30, MCD], (instregex "STAP$")>;
1190 def : InstRW<[WLat30, MCD], (instregex "STIDP$")>;
1191 def : InstRW<[WLat30, WLat30, MCD], (instregex "STSI$")>;
1192 def : InstRW<[WLat30, WLat30, MCD], (instregex "STFL(E)?$")>;
1193 def : InstRW<[WLat30, MCD], (instregex "ECAG$")>;
1194 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECTG$")>;
1195 def : InstRW<[WLat30, MCD], (instregex "PTF$")>;
1196 def : InstRW<[WLat30, MCD], (instregex "PCKMO$")>;
1198 //===----------------------------------------------------------------------===//
1199 // System: Miscellaneous Instructions
1200 //===----------------------------------------------------------------------===//
1202 def : InstRW<[WLat30, MCD], (instregex "SVC$")>;
1203 def : InstRW<[WLat1, FXU, GroupAlone], (instregex "MC$")>;
1204 def : InstRW<[WLat30, MCD], (instregex "DIAG$")>;
1205 def : InstRW<[WLat30, MCD], (instregex "TRAC(E|G)$")>;
1206 def : InstRW<[WLat30, MCD], (instregex "TRAP(2|4)$")>;
1207 def : InstRW<[WLat30, MCD], (instregex "SIG(P|A)$")>;
1208 def : InstRW<[WLat30, MCD], (instregex "SIE$")>;
1210 //===----------------------------------------------------------------------===//
1211 // System: CPU-Measurement Facility Instructions
1212 //===----------------------------------------------------------------------===//
1214 def : InstRW<[WLat1, FXU, NormalGr], (instregex "LPP$")>;
1215 def : InstRW<[WLat30, WLat30, MCD], (instregex "ECPGA$")>;
1216 def : InstRW<[WLat30, WLat30, MCD], (instregex "E(C|P)CTR$")>;
1217 def : InstRW<[WLat30, MCD], (instregex "LCCTL$")>;
1218 def : InstRW<[WLat30, MCD], (instregex "L(P|S)CTL$")>;
1219 def : InstRW<[WLat30, MCD], (instregex "Q(S|CTR)I$")>;
1220 def : InstRW<[WLat30, MCD], (instregex "S(C|P)CTR$")>;
1222 //===----------------------------------------------------------------------===//
1223 // System: I/O Instructions
1224 //===----------------------------------------------------------------------===//
1226 def : InstRW<[WLat30, MCD], (instregex "(C|H|R|X)SCH$")>;
1227 def : InstRW<[WLat30, MCD], (instregex "(M|S|ST|T)SCH$")>;
1228 def : InstRW<[WLat30, MCD], (instregex "RCHP$")>;
1229 def : InstRW<[WLat30, MCD], (instregex "SCHM$")>;
1230 def : InstRW<[WLat30, MCD], (instregex "STC(PS|RW)$")>;
1231 def : InstRW<[WLat30, MCD], (instregex "TPI$")>;
1232 def : InstRW<[WLat30, MCD], (instregex "SAL$")>;