1 //===-- SystemZShortenInst.cpp - Instruction-shortening pass --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass tries to replace instructions with shorter forms. For example,
11 // IILF can be replaced with LLILL or LLILH if the constant fits and if the
12 // other 32 bits of the GR64 destination are not live.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "systemz-shorten-inst"
18 #include "SystemZTargetMachine.h"
19 #include "llvm/CodeGen/MachineFunctionPass.h"
24 class SystemZShortenInst : public MachineFunctionPass {
27 SystemZShortenInst(const SystemZTargetMachine &tm);
29 virtual const char *getPassName() const {
30 return "SystemZ Instruction Shortening";
33 bool processBlock(MachineBasicBlock *MBB);
34 bool runOnMachineFunction(MachineFunction &F);
37 bool shortenIIF(MachineInstr &MI, unsigned *GPRMap, unsigned LiveOther,
38 unsigned LLIxL, unsigned LLIxH);
40 const SystemZInstrInfo *TII;
42 // LowGPRs[I] has bit N set if LLVM register I includes the low
43 // word of GPR N. HighGPRs is the same for the high word.
44 unsigned LowGPRs[SystemZ::NUM_TARGET_REGS];
45 unsigned HighGPRs[SystemZ::NUM_TARGET_REGS];
48 char SystemZShortenInst::ID = 0;
49 } // end of anonymous namespace
51 FunctionPass *llvm::createSystemZShortenInstPass(SystemZTargetMachine &TM) {
52 return new SystemZShortenInst(TM);
55 SystemZShortenInst::SystemZShortenInst(const SystemZTargetMachine &tm)
56 : MachineFunctionPass(ID), TII(0), LowGPRs(), HighGPRs() {
57 // Set up LowGPRs and HighGPRs.
58 for (unsigned I = 0; I < 16; ++I) {
59 LowGPRs[SystemZMC::GR32Regs[I]] |= 1 << I;
60 LowGPRs[SystemZMC::GR64Regs[I]] |= 1 << I;
61 HighGPRs[SystemZMC::GRH32Regs[I]] |= 1 << I;
62 HighGPRs[SystemZMC::GR64Regs[I]] |= 1 << I;
63 if (unsigned GR128 = SystemZMC::GR128Regs[I]) {
64 LowGPRs[GR128] |= 3 << I;
65 HighGPRs[GR128] |= 3 << I;
70 // MI loads one word of a GPR using an IIxF instruction and LLIxL and LLIxH
71 // are the halfword immediate loads for the same word. Try to use one of them
72 // instead of IIxF. If MI loads the high word, GPRMap[X] is the set of high
73 // words referenced by LLVM register X while LiveOther is the mask of low
74 // words that are currently live, and vice versa.
75 bool SystemZShortenInst::shortenIIF(MachineInstr &MI, unsigned *GPRMap,
76 unsigned LiveOther, unsigned LLIxL,
78 unsigned Reg = MI.getOperand(0).getReg();
79 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
80 unsigned GPRs = GPRMap[Reg];
81 assert(GPRs != 0 && "Register must be a GPR");
85 uint64_t Imm = MI.getOperand(1).getImm();
86 if (SystemZ::isImmLL(Imm)) {
87 MI.setDesc(TII->get(LLIxL));
88 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
91 if (SystemZ::isImmLH(Imm)) {
92 MI.setDesc(TII->get(LLIxH));
93 MI.getOperand(0).setReg(SystemZMC::getRegAsGR64(Reg));
94 MI.getOperand(1).setImm(Imm >> 16);
100 // Process all instructions in MBB. Return true if something changed.
101 bool SystemZShortenInst::processBlock(MachineBasicBlock *MBB) {
102 bool Changed = false;
104 // Work out which words are live on exit from the block.
105 unsigned LiveLow = 0;
106 unsigned LiveHigh = 0;
107 for (MachineBasicBlock::succ_iterator SI = MBB->succ_begin(),
108 SE = MBB->succ_end(); SI != SE; ++SI) {
109 for (MachineBasicBlock::livein_iterator LI = (*SI)->livein_begin(),
110 LE = (*SI)->livein_end(); LI != LE; ++LI) {
112 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
113 LiveLow |= LowGPRs[Reg];
114 LiveHigh |= HighGPRs[Reg];
118 // Iterate backwards through the block looking for instructions to change.
119 for (MachineBasicBlock::reverse_iterator MBBI = MBB->rbegin(),
120 MBBE = MBB->rend(); MBBI != MBBE; ++MBBI) {
121 MachineInstr &MI = *MBBI;
122 unsigned Opcode = MI.getOpcode();
123 if (Opcode == SystemZ::IILF)
124 Changed |= shortenIIF(MI, LowGPRs, LiveHigh, SystemZ::LLILL,
126 else if (Opcode == SystemZ::IIHF)
127 Changed |= shortenIIF(MI, HighGPRs, LiveLow, SystemZ::LLIHL,
129 unsigned UsedLow = 0;
130 unsigned UsedHigh = 0;
131 for (MachineInstr::mop_iterator MOI = MI.operands_begin(),
132 MOE = MI.operands_end(); MOI != MOE; ++MOI) {
133 MachineOperand &MO = *MOI;
135 if (unsigned Reg = MO.getReg()) {
136 assert(Reg < SystemZ::NUM_TARGET_REGS && "Invalid register number");
138 LiveLow &= ~LowGPRs[Reg];
139 LiveHigh &= ~HighGPRs[Reg];
140 } else if (!MO.isUndef()) {
141 UsedLow |= LowGPRs[Reg];
142 UsedHigh |= HighGPRs[Reg];
148 LiveHigh |= UsedHigh;
154 bool SystemZShortenInst::runOnMachineFunction(MachineFunction &F) {
155 TII = static_cast<const SystemZInstrInfo *>(F.getTarget().getInstrInfo());
157 bool Changed = false;
158 for (MachineFunction::iterator MFI = F.begin(), MFE = F.end();
160 Changed |= processBlock(MFI);