1 //==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file provides WebAssembly-specific target descriptions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16 #define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
18 #include "llvm/BinaryFormat/Wasm.h"
19 #include "llvm/MC/MCInstrDesc.h"
20 #include "llvm/Support/DataTypes.h"
30 class MCSubtargetInfo;
34 class raw_pwrite_stream;
36 Target &getTheWebAssemblyTarget32();
37 Target &getTheWebAssemblyTarget64();
39 MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII);
41 MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
43 std::unique_ptr<MCObjectWriter>
44 createWebAssemblyELFObjectWriter(raw_pwrite_stream &OS,
45 bool Is64Bit, uint8_t OSABI);
47 std::unique_ptr<MCObjectWriter>
48 createWebAssemblyWasmObjectWriter(raw_pwrite_stream &OS,
51 namespace WebAssembly {
53 /// Basic block label in a branch construct.
54 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
59 /// 32-bit integer immediates.
61 /// 64-bit integer immediates.
63 /// 32-bit floating-point immediates.
65 /// 64-bit floating-point immediates.
67 /// 32-bit unsigned function indices.
69 /// 32-bit unsigned memory offsets.
71 /// p2align immediate for load and store address alignment.
73 /// signature immediate for block/loop.
75 /// type signature immediate for call_indirect.
78 } // end namespace WebAssembly
80 namespace WebAssemblyII {
82 // For variadic instructions, this flag indicates whether an operand
83 // in the variable_ops range is an immediate value.
84 VariableOpIsImmediate = (1 << 0),
85 // For immediate values in the variable_ops range, this flag indicates
86 // whether the value represents a control-flow label.
87 VariableOpImmediateIsLabel = (1 << 1)
89 } // end namespace WebAssemblyII
91 } // end namespace llvm
93 // Defines symbolic names for WebAssembly registers. This defines a mapping from
94 // register name to register number.
96 #define GET_REGINFO_ENUM
97 #include "WebAssemblyGenRegisterInfo.inc"
99 // Defines symbolic names for the WebAssembly instructions.
101 #define GET_INSTRINFO_ENUM
102 #include "WebAssemblyGenInstrInfo.inc"
104 #define GET_SUBTARGETINFO_ENUM
105 #include "WebAssemblyGenSubtargetInfo.inc"
108 namespace WebAssembly {
110 /// Return the default p2align value for a load or store with the given opcode.
111 inline unsigned GetDefaultP2Align(unsigned Opcode) {
113 case WebAssembly::LOAD8_S_I32:
114 case WebAssembly::LOAD8_U_I32:
115 case WebAssembly::LOAD8_S_I64:
116 case WebAssembly::LOAD8_U_I64:
117 case WebAssembly::ATOMIC_LOAD8_U_I32:
118 case WebAssembly::ATOMIC_LOAD8_U_I64:
119 case WebAssembly::STORE8_I32:
120 case WebAssembly::STORE8_I64:
122 case WebAssembly::LOAD16_S_I32:
123 case WebAssembly::LOAD16_U_I32:
124 case WebAssembly::LOAD16_S_I64:
125 case WebAssembly::LOAD16_U_I64:
126 case WebAssembly::ATOMIC_LOAD16_U_I32:
127 case WebAssembly::ATOMIC_LOAD16_U_I64:
128 case WebAssembly::STORE16_I32:
129 case WebAssembly::STORE16_I64:
131 case WebAssembly::LOAD_I32:
132 case WebAssembly::LOAD_F32:
133 case WebAssembly::STORE_I32:
134 case WebAssembly::STORE_F32:
135 case WebAssembly::LOAD32_S_I64:
136 case WebAssembly::LOAD32_U_I64:
137 case WebAssembly::STORE32_I64:
138 case WebAssembly::ATOMIC_LOAD_I32:
139 case WebAssembly::ATOMIC_LOAD32_U_I64:
141 case WebAssembly::LOAD_I64:
142 case WebAssembly::LOAD_F64:
143 case WebAssembly::STORE_I64:
144 case WebAssembly::STORE_F64:
145 case WebAssembly::ATOMIC_LOAD_I64:
148 llvm_unreachable("Only loads and stores have p2align values");
152 /// The operand number of the load or store address in load/store instructions.
153 static const unsigned LoadAddressOperandNo = 3;
154 static const unsigned StoreAddressOperandNo = 2;
156 /// The operand number of the load or store p2align in load/store instructions.
157 static const unsigned LoadP2AlignOperandNo = 1;
158 static const unsigned StoreP2AlignOperandNo = 0;
160 /// This is used to indicate block signatures.
161 enum class ExprType {
176 /// Instruction opcodes emitted via means other than CodeGen.
177 static const unsigned Nop = 0x01;
178 static const unsigned End = 0x0b;
180 wasm::ValType toValType(const MVT &Ty);
182 } // end namespace WebAssembly
183 } // end namespace llvm