1 //- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This is a target description file for the WebAssembly architecture,
12 /// which is also known as "wasm".
14 //===----------------------------------------------------------------------===//
16 //===----------------------------------------------------------------------===//
17 // Target-independent interfaces which we are implementing
18 //===----------------------------------------------------------------------===//
20 include "llvm/Target/Target.td"
22 //===----------------------------------------------------------------------===//
23 // WebAssembly Subtarget features.
24 //===----------------------------------------------------------------------===//
26 def FeatureSIMD128 : SubtargetFeature<"simd128", "HasSIMD128", "true",
27 "Enable 128-bit SIMD">;
28 def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
30 def FeatureNontrappingFPToInt :
31 SubtargetFeature<"nontrapping-fptoint",
32 "HasNontrappingFPToInt", "true",
33 "Enable non-trapping float-to-int conversion operators">;
35 //===----------------------------------------------------------------------===//
37 //===----------------------------------------------------------------------===//
39 //===----------------------------------------------------------------------===//
40 // Register File Description
41 //===----------------------------------------------------------------------===//
43 include "WebAssemblyRegisterInfo.td"
45 //===----------------------------------------------------------------------===//
46 // Instruction Descriptions
47 //===----------------------------------------------------------------------===//
49 include "WebAssemblyInstrInfo.td"
51 def WebAssemblyInstrInfo : InstrInfo;
53 //===----------------------------------------------------------------------===//
54 // WebAssembly Processors supported.
55 //===----------------------------------------------------------------------===//
57 // Minimal Viable Product.
58 def : ProcessorModel<"mvp", NoSchedModel, []>;
60 // Generic processor: latest stable version.
61 def : ProcessorModel<"generic", NoSchedModel, []>;
63 // Latest and greatest experimental version of WebAssembly. Bugs included!
64 def : ProcessorModel<"bleeding-edge", NoSchedModel,
65 [FeatureSIMD128, FeatureAtomics]>;
67 //===----------------------------------------------------------------------===//
69 //===----------------------------------------------------------------------===//
71 def WebAssembly : Target {
72 let InstructionSet = WebAssemblyInstrInfo;