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1 //- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 ///
10 /// \file
11 /// \brief This is a target description file for the WebAssembly architecture,
12 /// which is also known as "wasm".
13 ///
14 //===----------------------------------------------------------------------===//
15
16 //===----------------------------------------------------------------------===//
17 // Target-independent interfaces which we are implementing
18 //===----------------------------------------------------------------------===//
19
20 include "llvm/Target/Target.td"
21
22 //===----------------------------------------------------------------------===//
23 // WebAssembly Subtarget features.
24 //===----------------------------------------------------------------------===//
25
26 def FeatureSIMD128 : SubtargetFeature<"simd128", "HasSIMD128", "true",
27                                       "Enable 128-bit SIMD">;
28 def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
29                                       "Enable Atomics">;
30 def FeatureNontrappingFPToInt :
31       SubtargetFeature<"nontrapping-fptoint",
32                        "HasNontrappingFPToInt", "true",
33                        "Enable non-trapping float-to-int conversion operators">;
34
35 //===----------------------------------------------------------------------===//
36 // Architectures.
37 //===----------------------------------------------------------------------===//
38
39 //===----------------------------------------------------------------------===//
40 // Register File Description
41 //===----------------------------------------------------------------------===//
42
43 include "WebAssemblyRegisterInfo.td"
44
45 //===----------------------------------------------------------------------===//
46 // Instruction Descriptions
47 //===----------------------------------------------------------------------===//
48
49 include "WebAssemblyInstrInfo.td"
50
51 def WebAssemblyInstrInfo : InstrInfo;
52
53 //===----------------------------------------------------------------------===//
54 // WebAssembly Processors supported.
55 //===----------------------------------------------------------------------===//
56
57 // Minimal Viable Product.
58 def : ProcessorModel<"mvp", NoSchedModel, []>;
59
60 // Generic processor: latest stable version.
61 def : ProcessorModel<"generic", NoSchedModel, []>;
62
63 // Latest and greatest experimental version of WebAssembly. Bugs included!
64 def : ProcessorModel<"bleeding-edge", NoSchedModel,
65                       [FeatureSIMD128, FeatureAtomics]>;
66
67 //===----------------------------------------------------------------------===//
68 // Target Declaration
69 //===----------------------------------------------------------------------===//
70
71 def WebAssembly : Target {
72   let InstructionSet = WebAssemblyInstrInfo;
73 }