1 //- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file defines an instruction selector for the WebAssembly target.
13 //===----------------------------------------------------------------------===//
15 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16 #include "WebAssembly.h"
17 #include "WebAssemblyTargetMachine.h"
18 #include "llvm/CodeGen/SelectionDAGISel.h"
19 #include "llvm/IR/Function.h" // To access function attributes.
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/KnownBits.h"
22 #include "llvm/Support/MathExtras.h"
23 #include "llvm/Support/raw_ostream.h"
26 #define DEBUG_TYPE "wasm-isel"
28 //===--------------------------------------------------------------------===//
29 /// WebAssembly-specific code to select WebAssembly machine instructions for
30 /// SelectionDAG operations.
33 class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
34 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
35 /// right decision when generating code for different targets.
36 const WebAssemblySubtarget *Subtarget;
41 WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &tm,
42 CodeGenOpt::Level OptLevel)
43 : SelectionDAGISel(tm, OptLevel), Subtarget(nullptr), ForCodeSize(false) {
46 StringRef getPassName() const override {
47 return "WebAssembly Instruction Selection";
50 bool runOnMachineFunction(MachineFunction &MF) override {
52 MF.getFunction()->hasFnAttribute(Attribute::OptimizeForSize) ||
53 MF.getFunction()->hasFnAttribute(Attribute::MinSize);
54 Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
55 return SelectionDAGISel::runOnMachineFunction(MF);
58 void Select(SDNode *Node) override;
60 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
61 std::vector<SDValue> &OutOps) override;
63 // Include the pieces autogenerated from the target description.
64 #include "WebAssemblyGenDAGISel.inc"
67 // add select functions here...
69 } // end anonymous namespace
71 void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
72 // Dump information about the Node being selected.
73 DEBUG(errs() << "Selecting: ");
74 DEBUG(Node->dump(CurDAG));
75 DEBUG(errs() << "\n");
77 // If we have a custom node, we already have selected!
78 if (Node->isMachineOpcode()) {
79 DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
84 // Few custom selection stuff.
85 EVT VT = Node->getValueType(0);
87 switch (Node->getOpcode()) {
90 // If we need WebAssembly-specific selection, it would go here.
94 // Select the default instruction.
98 bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
99 const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
100 switch (ConstraintID) {
101 case InlineAsm::Constraint_i:
102 case InlineAsm::Constraint_m:
103 // We just support simple memory operands that just have a single address
104 // operand and need no special handling.
105 OutOps.push_back(Op);
114 /// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
115 /// for instruction scheduling.
116 FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
117 CodeGenOpt::Level OptLevel) {
118 return new WebAssemblyDAGToDAGISel(TM, OptLevel);