1 // WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief WebAssembly Instruction definitions.
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
16 // WebAssembly Instruction Predicate Definitions.
17 //===----------------------------------------------------------------------===//
19 def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
20 def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
21 def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
22 AssemblerPredicate<"FeatureSIMD128", "simd128">;
23 def HasAtomics : Predicate<"Subtarget->hasAtomics()">,
24 AssemblerPredicate<"FeatureAtomics", "atomics">;
25 def HasNontrappingFPToInt :
26 Predicate<"Subtarget->hasNontrappingFPToInt()">,
27 AssemblerPredicate<"FeatureNontrappingFPToInt",
28 "nontrapping-fptoint">;
29 def NotHasNontrappingFPToInt :
30 Predicate<"!Subtarget->hasNontrappingFPToInt()">,
31 AssemblerPredicate<"!FeatureNontrappingFPToInt",
32 "nontrapping-fptoint">;
34 //===----------------------------------------------------------------------===//
35 // WebAssembly-specific DAG Node Types.
36 //===----------------------------------------------------------------------===//
38 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
40 def SDT_WebAssemblyCallSeqEnd :
41 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
42 def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
43 def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
44 def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
45 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
46 def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
47 def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
50 //===----------------------------------------------------------------------===//
51 // WebAssembly-specific DAG Nodes.
52 //===----------------------------------------------------------------------===//
54 def WebAssemblycallseq_start :
55 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
56 [SDNPHasChain, SDNPOutGlue]>;
57 def WebAssemblycallseq_end :
58 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
59 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
60 def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
62 [SDNPHasChain, SDNPVariadic]>;
63 def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
65 [SDNPHasChain, SDNPVariadic]>;
66 def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE",
67 SDT_WebAssemblyBrTable,
68 [SDNPHasChain, SDNPVariadic]>;
69 def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
70 SDT_WebAssemblyArgument>;
71 def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN",
72 SDT_WebAssemblyReturn, [SDNPHasChain]>;
73 def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper",
74 SDT_WebAssemblyWrapper>;
76 //===----------------------------------------------------------------------===//
77 // WebAssembly-specific Operands.
78 //===----------------------------------------------------------------------===//
80 let OperandNamespace = "WebAssembly" in {
82 let OperandType = "OPERAND_BASIC_BLOCK" in
83 def bb_op : Operand<OtherVT>;
85 let OperandType = "OPERAND_LOCAL" in
86 def local_op : Operand<i32>;
88 let OperandType = "OPERAND_GLOBAL" in
89 def global_op : Operand<i32>;
91 let OperandType = "OPERAND_I32IMM" in
92 def i32imm_op : Operand<i32>;
94 let OperandType = "OPERAND_I64IMM" in
95 def i64imm_op : Operand<i64>;
97 let OperandType = "OPERAND_F32IMM" in
98 def f32imm_op : Operand<f32>;
100 let OperandType = "OPERAND_F64IMM" in
101 def f64imm_op : Operand<f64>;
103 let OperandType = "OPERAND_FUNCTION32" in
104 def function32_op : Operand<i32>;
106 let OperandType = "OPERAND_OFFSET32" in
107 def offset32_op : Operand<i32>;
109 let OperandType = "OPERAND_P2ALIGN" in {
110 def P2Align : Operand<i32> {
111 let PrintMethod = "printWebAssemblyP2AlignOperand";
113 } // OperandType = "OPERAND_P2ALIGN"
115 let OperandType = "OPERAND_SIGNATURE" in {
116 def Signature : Operand<i32> {
117 let PrintMethod = "printWebAssemblySignatureOperand";
119 } // OperandType = "OPERAND_SIGNATURE"
121 let OperandType = "OPERAND_TYPEINDEX" in
122 def TypeIndex : Operand<i32>;
124 } // OperandNamespace = "WebAssembly"
126 //===----------------------------------------------------------------------===//
127 // WebAssembly Instruction Format Definitions.
128 //===----------------------------------------------------------------------===//
130 include "WebAssemblyInstrFormats.td"
132 //===----------------------------------------------------------------------===//
133 // Additional instructions.
134 //===----------------------------------------------------------------------===//
136 multiclass ARGUMENT<WebAssemblyRegClass vt> {
137 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in
138 def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
139 [(set vt:$res, (WebAssemblyargument timm:$argno))]>;
141 multiclass SIMD_ARGUMENT<ValueType vt> {
142 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in
143 def ARGUMENT_#vt : SIMD_I<(outs V128:$res), (ins i32imm:$argno),
144 [(set (vt V128:$res),
145 (WebAssemblyargument timm:$argno))]>;
147 defm : ARGUMENT<I32>;
148 defm : ARGUMENT<I64>;
149 defm : ARGUMENT<F32>;
150 defm : ARGUMENT<F64>;
151 defm : SIMD_ARGUMENT<v16i8>;
152 defm : SIMD_ARGUMENT<v8i16>;
153 defm : SIMD_ARGUMENT<v4i32>;
154 defm : SIMD_ARGUMENT<v4f32>;
156 let Defs = [ARGUMENTS] in {
158 // get_local and set_local are not generated by instruction selection; they
159 // are implied by virtual register uses and defs.
160 multiclass LOCAL<WebAssemblyRegClass vt> {
161 let hasSideEffects = 0 in {
162 // COPY is not an actual instruction in wasm, but since we allow get_local and
163 // set_local to be implicit during most of codegen, we can have a COPY which
164 // is actually a no-op because all the work is done in the implied get_local
165 // and set_local. COPYs are eliminated (and replaced with
166 // get_local/set_local) in the ExplicitLocals pass.
167 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
168 def COPY_#vt : I<(outs vt:$res), (ins vt:$src), [], "copy_local\t$res, $src">;
170 // TEE is similar to COPY, but writes two copies of its result. Typically
171 // this would be used to stackify one result and write the other result to a
173 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
174 def TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), [],
175 "tee_local\t$res, $also, $src">;
177 // This is the actual get_local instruction in wasm. These are made explicit
178 // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm
179 // local, which is a side effect not otherwise modeled in LLVM.
180 let mayLoad = 1, isAsCheapAsAMove = 1 in
181 def GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local), [],
182 "get_local\t$res, $local", 0x20>;
184 // This is the actual set_local instruction in wasm. These are made explicit
185 // by the ExplicitLocals pass. It has mayStore because it writes to a wasm
186 // local, which is a side effect not otherwise modeled in LLVM.
187 let mayStore = 1, isAsCheapAsAMove = 1 in
188 def SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src), [],
189 "set_local\t$local, $src", 0x21>;
191 // This is the actual tee_local instruction in wasm. TEEs are turned into
192 // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason
194 let mayStore = 1, isAsCheapAsAMove = 1 in
195 def TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src), [],
196 "tee_local\t$res, $local, $src", 0x22>;
198 // Unused values must be dropped in some contexts.
199 def DROP_#vt : I<(outs), (ins vt:$src), [],
203 def GET_GLOBAL_#vt : I<(outs vt:$res), (ins global_op:$local), [],
204 "get_global\t$res, $local", 0x23>;
207 def SET_GLOBAL_#vt : I<(outs), (ins global_op:$local, vt:$src), [],
208 "set_global\t$local, $src", 0x24>;
210 } // hasSideEffects = 0
216 defm : LOCAL<V128>, Requires<[HasSIMD128]>;
218 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
219 def CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
220 [(set I32:$res, imm:$imm)],
221 "i32.const\t$res, $imm", 0x41>;
222 def CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm),
223 [(set I64:$res, imm:$imm)],
224 "i64.const\t$res, $imm", 0x42>;
225 def CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
226 [(set F32:$res, fpimm:$imm)],
227 "f32.const\t$res, $imm", 0x43>;
228 def CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
229 [(set F64:$res, fpimm:$imm)],
230 "f64.const\t$res, $imm", 0x44>;
231 } // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1
233 } // Defs = [ARGUMENTS]
235 def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)),
236 (CONST_I32 tglobaladdr:$addr)>;
237 def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
238 (CONST_I32 texternalsym:$addr)>;
240 //===----------------------------------------------------------------------===//
241 // Additional sets of instructions.
242 //===----------------------------------------------------------------------===//
244 include "WebAssemblyInstrMemory.td"
245 include "WebAssemblyInstrCall.td"
246 include "WebAssemblyInstrControl.td"
247 include "WebAssemblyInstrInteger.td"
248 include "WebAssemblyInstrConv.td"
249 include "WebAssemblyInstrFloat.td"
250 include "WebAssemblyInstrAtomics.td"
251 include "WebAssemblyInstrSIMD.td"