1 // WebAssemblyInstrInfo.td-Describe the WebAssembly Instructions-*- tablegen -*-
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief WebAssembly Instruction definitions.
13 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
16 // WebAssembly Instruction Predicate Definitions.
17 //===----------------------------------------------------------------------===//
19 def HasAddr32 : Predicate<"!Subtarget->hasAddr64()">;
20 def HasAddr64 : Predicate<"Subtarget->hasAddr64()">;
21 def HasSIMD128 : Predicate<"Subtarget->hasSIMD128()">,
22 AssemblerPredicate<"FeatureSIMD128", "simd128">;
24 //===----------------------------------------------------------------------===//
25 // WebAssembly-specific DAG Node Types.
26 //===----------------------------------------------------------------------===//
28 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
29 def SDT_WebAssemblyCallSeqEnd :
30 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
31 def SDT_WebAssemblyCall0 : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
32 def SDT_WebAssemblyCall1 : SDTypeProfile<1, -1, [SDTCisPtrTy<1>]>;
33 def SDT_WebAssemblyBrTable : SDTypeProfile<0, -1, [SDTCisPtrTy<0>]>;
34 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
35 def SDT_WebAssemblyReturn : SDTypeProfile<0, -1, []>;
36 def SDT_WebAssemblyWrapper : SDTypeProfile<1, 1, [SDTCisSameAs<0, 1>,
39 //===----------------------------------------------------------------------===//
40 // WebAssembly-specific DAG Nodes.
41 //===----------------------------------------------------------------------===//
43 def WebAssemblycallseq_start :
44 SDNode<"ISD::CALLSEQ_START", SDT_WebAssemblyCallSeqStart,
45 [SDNPHasChain, SDNPOutGlue]>;
46 def WebAssemblycallseq_end :
47 SDNode<"ISD::CALLSEQ_END", SDT_WebAssemblyCallSeqEnd,
48 [SDNPHasChain, SDNPOptInGlue, SDNPOutGlue]>;
49 def WebAssemblycall0 : SDNode<"WebAssemblyISD::CALL0",
51 [SDNPHasChain, SDNPVariadic]>;
52 def WebAssemblycall1 : SDNode<"WebAssemblyISD::CALL1",
54 [SDNPHasChain, SDNPVariadic]>;
55 def WebAssemblybr_table : SDNode<"WebAssemblyISD::BR_TABLE",
56 SDT_WebAssemblyBrTable,
57 [SDNPHasChain, SDNPVariadic]>;
58 def WebAssemblyargument : SDNode<"WebAssemblyISD::ARGUMENT",
59 SDT_WebAssemblyArgument>;
60 def WebAssemblyreturn : SDNode<"WebAssemblyISD::RETURN",
61 SDT_WebAssemblyReturn, [SDNPHasChain]>;
62 def WebAssemblywrapper : SDNode<"WebAssemblyISD::Wrapper",
63 SDT_WebAssemblyWrapper>;
65 //===----------------------------------------------------------------------===//
66 // WebAssembly-specific Operands.
67 //===----------------------------------------------------------------------===//
69 let OperandNamespace = "WebAssembly" in {
71 let OperandType = "OPERAND_BASIC_BLOCK" in
72 def bb_op : Operand<OtherVT>;
74 let OperandType = "OPERAND_LOCAL" in
75 def local_op : Operand<i32>;
77 let OperandType = "OPERAND_I32IMM" in
78 def i32imm_op : Operand<i32>;
80 let OperandType = "OPERAND_I64IMM" in
81 def i64imm_op : Operand<i64>;
83 let OperandType = "OPERAND_F32IMM" in
84 def f32imm_op : Operand<f32>;
86 let OperandType = "OPERAND_F64IMM" in
87 def f64imm_op : Operand<f64>;
89 let OperandType = "OPERAND_FUNCTION32" in
90 def function32_op : Operand<i32>;
92 let OperandType = "OPERAND_OFFSET32" in
93 def offset32_op : Operand<i32>;
95 let OperandType = "OPERAND_P2ALIGN" in {
96 def P2Align : Operand<i32> {
97 let PrintMethod = "printWebAssemblyP2AlignOperand";
99 } // OperandType = "OPERAND_P2ALIGN"
101 let OperandType = "OPERAND_SIGNATURE" in {
102 def Signature : Operand<i32> {
103 let PrintMethod = "printWebAssemblySignatureOperand";
105 } // OperandType = "OPERAND_SIGNATURE"
107 } // OperandNamespace = "WebAssembly"
109 //===----------------------------------------------------------------------===//
110 // WebAssembly Instruction Format Definitions.
111 //===----------------------------------------------------------------------===//
113 include "WebAssemblyInstrFormats.td"
115 //===----------------------------------------------------------------------===//
116 // Additional instructions.
117 //===----------------------------------------------------------------------===//
119 multiclass ARGUMENT<WebAssemblyRegClass vt> {
120 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in
121 def ARGUMENT_#vt : I<(outs vt:$res), (ins i32imm:$argno),
122 [(set vt:$res, (WebAssemblyargument timm:$argno))]>;
124 multiclass SIMD_ARGUMENT<ValueType vt> {
125 let hasSideEffects = 1, Uses = [ARGUMENTS], isCodeGenOnly = 1 in
126 def ARGUMENT_#vt : SIMD_I<(outs V128:$res), (ins i32imm:$argno),
127 [(set (vt V128:$res),
128 (WebAssemblyargument timm:$argno))]>;
130 defm : ARGUMENT<I32>;
131 defm : ARGUMENT<I64>;
132 defm : ARGUMENT<F32>;
133 defm : ARGUMENT<F64>;
134 defm : SIMD_ARGUMENT<v16i8>;
135 defm : SIMD_ARGUMENT<v8i16>;
136 defm : SIMD_ARGUMENT<v4i32>;
137 defm : SIMD_ARGUMENT<v4f32>;
139 let Defs = [ARGUMENTS] in {
141 // get_local and set_local are not generated by instruction selection; they
142 // are implied by virtual register uses and defs.
143 multiclass LOCAL<WebAssemblyRegClass vt> {
144 let hasSideEffects = 0 in {
145 // COPY is not an actual instruction in wasm, but since we allow get_local and
146 // set_local to be implicit during most of codegen, we can have a COPY which
147 // is actually a no-op because all the work is done in the implied get_local
148 // and set_local. COPYs are eliminated (and replaced with
149 // get_local/set_local) in the ExplicitLocals pass.
150 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
151 def COPY_#vt : I<(outs vt:$res), (ins vt:$src), [], "copy_local\t$res, $src">;
153 // TEE is similar to COPY, but writes two copies of its result. Typically
154 // this would be used to stackify one result and write the other result to a
156 let isAsCheapAsAMove = 1, isCodeGenOnly = 1 in
157 def TEE_#vt : I<(outs vt:$res, vt:$also), (ins vt:$src), [],
158 "tee_local\t$res, $also, $src">;
160 // This is the actual get_local instruction in wasm. These are made explicit
161 // by the ExplicitLocals pass. It has mayLoad because it reads from a wasm
162 // local, which is a side effect not otherwise modeled in LLVM.
163 let mayLoad = 1, isAsCheapAsAMove = 1 in
164 def GET_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local), [],
165 "get_local\t$res, $local", 0x20>;
167 // This is the actual set_local instruction in wasm. These are made explicit
168 // by the ExplicitLocals pass. It has mayStore because it writes to a wasm
169 // local, which is a side effect not otherwise modeled in LLVM.
170 let mayStore = 1, isAsCheapAsAMove = 1 in
171 def SET_LOCAL_#vt : I<(outs), (ins local_op:$local, vt:$src), [],
172 "set_local\t$local, $src", 0x21>;
174 // This is the actual tee_local instruction in wasm. TEEs are turned into
175 // TEE_LOCALs by the ExplicitLocals pass. It has mayStore for the same reason
177 let mayStore = 1, isAsCheapAsAMove = 1 in
178 def TEE_LOCAL_#vt : I<(outs vt:$res), (ins local_op:$local, vt:$src), [],
179 "tee_local\t$res, $local, $src", 0x22>;
181 } // hasSideEffects = 0
187 defm : LOCAL<V128>, Requires<[HasSIMD128]>;
189 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1 in {
190 def CONST_I32 : I<(outs I32:$res), (ins i32imm_op:$imm),
191 [(set I32:$res, imm:$imm)],
192 "i32.const\t$res, $imm", 0x41>;
193 def CONST_I64 : I<(outs I64:$res), (ins i64imm_op:$imm),
194 [(set I64:$res, imm:$imm)],
195 "i64.const\t$res, $imm", 0x42>;
196 def CONST_F32 : I<(outs F32:$res), (ins f32imm_op:$imm),
197 [(set F32:$res, fpimm:$imm)],
198 "f32.const\t$res, $imm", 0x43>;
199 def CONST_F64 : I<(outs F64:$res), (ins f64imm_op:$imm),
200 [(set F64:$res, fpimm:$imm)],
201 "f64.const\t$res, $imm", 0x44>;
202 } // isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1
204 } // Defs = [ARGUMENTS]
206 def : Pat<(i32 (WebAssemblywrapper tglobaladdr:$addr)),
207 (CONST_I32 tglobaladdr:$addr)>;
208 def : Pat<(i32 (WebAssemblywrapper texternalsym:$addr)),
209 (CONST_I32 texternalsym:$addr)>;
211 //===----------------------------------------------------------------------===//
212 // Additional sets of instructions.
213 //===----------------------------------------------------------------------===//
215 include "WebAssemblyInstrMemory.td"
216 include "WebAssemblyInstrCall.td"
217 include "WebAssemblyInstrControl.td"
218 include "WebAssemblyInstrInteger.td"
219 include "WebAssemblyInstrConv.td"
220 include "WebAssemblyInstrFloat.td"
221 include "WebAssemblyInstrAtomics.td"
222 include "WebAssemblyInstrSIMD.td"