1 // WebAssemblyMachineFunctionInfo.h-WebAssembly machine function info-*- C++ -*-
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// \brief This file declares WebAssembly-specific per-machine-function
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
17 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYMACHINEFUNCTIONINFO_H
19 #include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 /// This class is derived from MachineFunctionInfo and contains private
25 /// WebAssembly-specific information for each MachineFunction.
26 class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
29 std::vector<MVT> Params;
30 std::vector<MVT> Results;
31 std::vector<MVT> Locals;
33 /// A mapping from CodeGen vreg index to WebAssembly register number.
34 std::vector<unsigned> WARegs;
36 /// A mapping from CodeGen vreg index to a boolean value indicating whether
37 /// the given register is considered to be "stackified", meaning it has been
38 /// determined or made to meet the stack requirements:
39 /// - single use (per path)
40 /// - single def (per path)
41 /// - defined and used in LIFO order with other stack registers
42 BitVector VRegStackified;
44 // A virtual register holding the pointer to the vararg buffer for vararg
45 // functions. It is created and set in TLI::LowerFormalArguments and read by
47 unsigned VarargVreg = -1U;
49 // A virtual register holding the base pointer for functions that have
50 // overaligned values on the user stack.
51 unsigned BasePtrVreg = -1U;
54 explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
55 ~WebAssemblyFunctionInfo() override;
57 void addParam(MVT VT) { Params.push_back(VT); }
58 const std::vector<MVT> &getParams() const { return Params; }
60 void addResult(MVT VT) { Results.push_back(VT); }
61 const std::vector<MVT> &getResults() const { return Results; }
63 void addLocal(MVT VT) { Locals.push_back(VT); }
64 const std::vector<MVT> &getLocals() const { return Locals; }
66 unsigned getVarargBufferVreg() const {
67 assert(VarargVreg != -1U && "Vararg vreg hasn't been set");
70 void setVarargBufferVreg(unsigned Reg) { VarargVreg = Reg; }
72 unsigned getBasePointerVreg() const {
73 assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set");
76 void setBasePointerVreg(unsigned Reg) { BasePtrVreg = Reg; }
78 static const unsigned UnusedReg = -1u;
80 void stackifyVReg(unsigned VReg) {
81 assert(MF.getRegInfo().getUniqueVRegDef(VReg));
82 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
83 VRegStackified.resize(TargetRegisterInfo::virtReg2Index(VReg) + 1);
84 VRegStackified.set(TargetRegisterInfo::virtReg2Index(VReg));
86 bool isVRegStackified(unsigned VReg) const {
87 if (TargetRegisterInfo::virtReg2Index(VReg) >= VRegStackified.size())
89 return VRegStackified.test(TargetRegisterInfo::virtReg2Index(VReg));
93 void setWAReg(unsigned VReg, unsigned WAReg) {
94 assert(WAReg != UnusedReg);
95 assert(TargetRegisterInfo::virtReg2Index(VReg) < WARegs.size());
96 WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
98 unsigned getWAReg(unsigned Reg) const {
99 assert(TargetRegisterInfo::virtReg2Index(Reg) < WARegs.size());
100 return WARegs[TargetRegisterInfo::virtReg2Index(Reg)];
103 // For a given stackified WAReg, return the id number to print with push/pop.
104 static unsigned getWARegStackId(unsigned Reg) {
105 assert(Reg & INT32_MIN);
106 return Reg & INT32_MAX;
110 void ComputeLegalValueVTs(const Function &F, const TargetMachine &TM,
111 Type *Ty, SmallVectorImpl<MVT> &ValueVTs);
113 void ComputeSignatureVTs(const Function &F, const TargetMachine &TM,
114 SmallVectorImpl<MVT> &Params,
115 SmallVectorImpl<MVT> &Results);
117 } // end namespace llvm