1 //===-- X86AsmPrinter.cpp - Convert X86 LLVM code to AT&T assembly --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to X86 machine code.
13 //===----------------------------------------------------------------------===//
15 #include "X86AsmPrinter.h"
16 #include "InstPrinter/X86ATTInstPrinter.h"
17 #include "MCTargetDesc/X86BaseInfo.h"
18 #include "X86InstrInfo.h"
19 #include "X86MachineFunctionInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
22 #include "llvm/CodeGen/MachineValueType.h"
23 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
24 #include "llvm/IR/DebugInfo.h"
25 #include "llvm/IR/DerivedTypes.h"
26 #include "llvm/IR/Mangler.h"
27 #include "llvm/IR/Module.h"
28 #include "llvm/IR/Type.h"
29 #include "llvm/MC/MCAsmInfo.h"
30 #include "llvm/MC/MCCodeEmitter.h"
31 #include "llvm/MC/MCContext.h"
32 #include "llvm/MC/MCExpr.h"
33 #include "llvm/MC/MCSectionCOFF.h"
34 #include "llvm/MC/MCSectionMachO.h"
35 #include "llvm/MC/MCStreamer.h"
36 #include "llvm/MC/MCSymbol.h"
37 #include "llvm/Support/COFF.h"
38 #include "llvm/Support/Debug.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/TargetRegistry.h"
43 //===----------------------------------------------------------------------===//
44 // Primitive Helper Functions.
45 //===----------------------------------------------------------------------===//
47 /// runOnMachineFunction - Emit the function body.
49 bool X86AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
50 Subtarget = &MF.getSubtarget<X86Subtarget>();
52 SMShadowTracker.startFunction(MF);
53 CodeEmitter.reset(TM.getTarget().createMCCodeEmitter(
54 *MF.getSubtarget().getInstrInfo(), *MF.getSubtarget().getRegisterInfo(),
57 SetupMachineFunction(MF);
59 if (Subtarget->isTargetCOFF()) {
60 bool Local = MF.getFunction()->hasLocalLinkage();
61 OutStreamer->BeginCOFFSymbolDef(CurrentFnSym);
62 OutStreamer->EmitCOFFSymbolStorageClass(
63 Local ? COFF::IMAGE_SYM_CLASS_STATIC : COFF::IMAGE_SYM_CLASS_EXTERNAL);
64 OutStreamer->EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_FUNCTION
65 << COFF::SCT_COMPLEX_TYPE_SHIFT);
66 OutStreamer->EndCOFFSymbolDef();
69 // Emit the rest of the function body.
72 // Emit the XRay table for this function.
75 // We didn't modify anything.
79 /// printSymbolOperand - Print a raw symbol reference operand. This handles
80 /// jump tables, constant pools, global address and external symbols, all of
81 /// which print to a label with various suffixes for relocation types etc.
82 static void printSymbolOperand(X86AsmPrinter &P, const MachineOperand &MO,
84 switch (MO.getType()) {
85 default: llvm_unreachable("unknown symbol type!");
86 case MachineOperand::MO_ConstantPoolIndex:
87 P.GetCPISymbol(MO.getIndex())->print(O, P.MAI);
88 P.printOffset(MO.getOffset(), O);
90 case MachineOperand::MO_GlobalAddress: {
91 const GlobalValue *GV = MO.getGlobal();
94 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
95 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE)
96 GVSym = P.getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
98 GVSym = P.getSymbol(GV);
100 // Handle dllimport linkage.
101 if (MO.getTargetFlags() == X86II::MO_DLLIMPORT)
103 P.OutContext.getOrCreateSymbol(Twine("__imp_") + GVSym->getName());
105 if (MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY ||
106 MO.getTargetFlags() == X86II::MO_DARWIN_NONLAZY_PIC_BASE) {
107 MCSymbol *Sym = P.getSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
108 MachineModuleInfoImpl::StubValueTy &StubSym =
109 P.MMI->getObjFileInfo<MachineModuleInfoMachO>().getGVStubEntry(Sym);
110 if (!StubSym.getPointer())
111 StubSym = MachineModuleInfoImpl::
112 StubValueTy(P.getSymbol(GV), !GV->hasInternalLinkage());
115 // If the name begins with a dollar-sign, enclose it in parens. We do this
116 // to avoid having it look like an integer immediate to the assembler.
117 if (GVSym->getName()[0] != '$')
118 GVSym->print(O, P.MAI);
121 GVSym->print(O, P.MAI);
124 P.printOffset(MO.getOffset(), O);
129 switch (MO.getTargetFlags()) {
131 llvm_unreachable("Unknown target flag on GV operand");
132 case X86II::MO_NO_FLAG: // No flag.
134 case X86II::MO_DARWIN_NONLAZY:
135 case X86II::MO_DLLIMPORT:
136 // These affect the name of the symbol, not any suffix.
138 case X86II::MO_GOT_ABSOLUTE_ADDRESS:
140 P.MF->getPICBaseSymbol()->print(O, P.MAI);
143 case X86II::MO_PIC_BASE_OFFSET:
144 case X86II::MO_DARWIN_NONLAZY_PIC_BASE:
146 P.MF->getPICBaseSymbol()->print(O, P.MAI);
148 case X86II::MO_TLSGD: O << "@TLSGD"; break;
149 case X86II::MO_TLSLD: O << "@TLSLD"; break;
150 case X86II::MO_TLSLDM: O << "@TLSLDM"; break;
151 case X86II::MO_GOTTPOFF: O << "@GOTTPOFF"; break;
152 case X86II::MO_INDNTPOFF: O << "@INDNTPOFF"; break;
153 case X86II::MO_TPOFF: O << "@TPOFF"; break;
154 case X86II::MO_DTPOFF: O << "@DTPOFF"; break;
155 case X86II::MO_NTPOFF: O << "@NTPOFF"; break;
156 case X86II::MO_GOTNTPOFF: O << "@GOTNTPOFF"; break;
157 case X86II::MO_GOTPCREL: O << "@GOTPCREL"; break;
158 case X86II::MO_GOT: O << "@GOT"; break;
159 case X86II::MO_GOTOFF: O << "@GOTOFF"; break;
160 case X86II::MO_PLT: O << "@PLT"; break;
161 case X86II::MO_TLVP: O << "@TLVP"; break;
162 case X86II::MO_TLVP_PIC_BASE:
164 P.MF->getPICBaseSymbol()->print(O, P.MAI);
166 case X86II::MO_SECREL: O << "@SECREL32"; break;
170 static void printOperand(X86AsmPrinter &P, const MachineInstr *MI,
171 unsigned OpNo, raw_ostream &O,
172 const char *Modifier = nullptr, unsigned AsmVariant = 0);
174 /// printPCRelImm - This is used to print an immediate value that ends up
175 /// being encoded as a pc-relative value. These print slightly differently, for
176 /// example, a $ is not emitted.
177 static void printPCRelImm(X86AsmPrinter &P, const MachineInstr *MI,
178 unsigned OpNo, raw_ostream &O) {
179 const MachineOperand &MO = MI->getOperand(OpNo);
180 switch (MO.getType()) {
181 default: llvm_unreachable("Unknown pcrel immediate operand");
182 case MachineOperand::MO_Register:
183 // pc-relativeness was handled when computing the value in the reg.
184 printOperand(P, MI, OpNo, O);
186 case MachineOperand::MO_Immediate:
189 case MachineOperand::MO_GlobalAddress:
190 printSymbolOperand(P, MO, O);
195 static void printOperand(X86AsmPrinter &P, const MachineInstr *MI,
196 unsigned OpNo, raw_ostream &O, const char *Modifier,
197 unsigned AsmVariant) {
198 const MachineOperand &MO = MI->getOperand(OpNo);
199 switch (MO.getType()) {
200 default: llvm_unreachable("unknown operand type!");
201 case MachineOperand::MO_Register: {
202 // FIXME: Enumerating AsmVariant, so we can remove magic number.
203 if (AsmVariant == 0) O << '%';
204 unsigned Reg = MO.getReg();
205 if (Modifier && strncmp(Modifier, "subreg", strlen("subreg")) == 0) {
206 unsigned Size = (strcmp(Modifier+6,"64") == 0) ? 64 :
207 (strcmp(Modifier+6,"32") == 0) ? 32 :
208 (strcmp(Modifier+6,"16") == 0) ? 16 : 8;
209 Reg = getX86SubSuperRegister(Reg, Size);
211 O << X86ATTInstPrinter::getRegisterName(Reg);
215 case MachineOperand::MO_Immediate:
216 if (AsmVariant == 0) O << '$';
220 case MachineOperand::MO_GlobalAddress: {
221 if (AsmVariant == 0) O << '$';
222 printSymbolOperand(P, MO, O);
228 static void printLeaMemReference(X86AsmPrinter &P, const MachineInstr *MI,
229 unsigned Op, raw_ostream &O,
230 const char *Modifier = nullptr) {
231 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg);
232 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg);
233 const MachineOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp);
235 // If we really don't want to print out (rip), don't.
236 bool HasBaseReg = BaseReg.getReg() != 0;
237 if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
238 BaseReg.getReg() == X86::RIP)
241 // HasParenPart - True if we will print out the () part of the mem ref.
242 bool HasParenPart = IndexReg.getReg() || HasBaseReg;
244 switch (DispSpec.getType()) {
246 llvm_unreachable("unknown operand type!");
247 case MachineOperand::MO_Immediate: {
248 int DispVal = DispSpec.getImm();
249 if (DispVal || !HasParenPart)
253 case MachineOperand::MO_GlobalAddress:
254 case MachineOperand::MO_ConstantPoolIndex:
255 printSymbolOperand(P, DispSpec, O);
258 if (Modifier && strcmp(Modifier, "H") == 0)
262 assert(IndexReg.getReg() != X86::ESP &&
263 "X86 doesn't allow scaling by ESP");
267 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier);
269 if (IndexReg.getReg()) {
271 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier);
272 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm();
274 O << ',' << ScaleVal;
280 static void printMemReference(X86AsmPrinter &P, const MachineInstr *MI,
281 unsigned Op, raw_ostream &O,
282 const char *Modifier = nullptr) {
283 assert(isMem(*MI, Op) && "Invalid memory reference!");
284 const MachineOperand &Segment = MI->getOperand(Op+X86::AddrSegmentReg);
285 if (Segment.getReg()) {
286 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier);
289 printLeaMemReference(P, MI, Op, O, Modifier);
292 static void printIntelMemReference(X86AsmPrinter &P, const MachineInstr *MI,
293 unsigned Op, raw_ostream &O,
294 const char *Modifier = nullptr,
295 unsigned AsmVariant = 1) {
296 const MachineOperand &BaseReg = MI->getOperand(Op+X86::AddrBaseReg);
297 unsigned ScaleVal = MI->getOperand(Op+X86::AddrScaleAmt).getImm();
298 const MachineOperand &IndexReg = MI->getOperand(Op+X86::AddrIndexReg);
299 const MachineOperand &DispSpec = MI->getOperand(Op+X86::AddrDisp);
300 const MachineOperand &SegReg = MI->getOperand(Op+X86::AddrSegmentReg);
302 // If this has a segment register, print it.
303 if (SegReg.getReg()) {
304 printOperand(P, MI, Op+X86::AddrSegmentReg, O, Modifier, AsmVariant);
310 bool NeedPlus = false;
311 if (BaseReg.getReg()) {
312 printOperand(P, MI, Op+X86::AddrBaseReg, O, Modifier, AsmVariant);
316 if (IndexReg.getReg()) {
317 if (NeedPlus) O << " + ";
319 O << ScaleVal << '*';
320 printOperand(P, MI, Op+X86::AddrIndexReg, O, Modifier, AsmVariant);
324 if (!DispSpec.isImm()) {
325 if (NeedPlus) O << " + ";
326 printOperand(P, MI, Op+X86::AddrDisp, O, Modifier, AsmVariant);
328 int64_t DispVal = DispSpec.getImm();
329 if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
344 static bool printAsmMRegister(X86AsmPrinter &P, const MachineOperand &MO,
345 char Mode, raw_ostream &O) {
346 unsigned Reg = MO.getReg();
348 default: return true; // Unknown mode.
349 case 'b': // Print QImode register
350 Reg = getX86SubSuperRegister(Reg, 8);
352 case 'h': // Print QImode high register
353 Reg = getX86SubSuperRegister(Reg, 8, true);
355 case 'w': // Print HImode register
356 Reg = getX86SubSuperRegister(Reg, 16);
358 case 'k': // Print SImode register
359 Reg = getX86SubSuperRegister(Reg, 32);
362 // Print 64-bit register names if 64-bit integer registers are available.
363 // Otherwise, print 32-bit register names.
364 Reg = getX86SubSuperRegister(Reg, P.getSubtarget().is64Bit() ? 64 : 32);
368 O << '%' << X86ATTInstPrinter::getRegisterName(Reg);
372 /// PrintAsmOperand - Print out an operand for an inline asm expression.
374 bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
376 const char *ExtraCode, raw_ostream &O) {
377 // Does this asm operand have a single letter operand modifier?
378 if (ExtraCode && ExtraCode[0]) {
379 if (ExtraCode[1] != 0) return true; // Unknown modifier.
381 const MachineOperand &MO = MI->getOperand(OpNo);
383 switch (ExtraCode[0]) {
385 // See if this is a generic print operand
386 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, O);
387 case 'a': // This is an address. Currently only 'i' and 'r' are expected.
388 switch (MO.getType()) {
391 case MachineOperand::MO_Immediate:
394 case MachineOperand::MO_ConstantPoolIndex:
395 case MachineOperand::MO_JumpTableIndex:
396 case MachineOperand::MO_ExternalSymbol:
397 llvm_unreachable("unexpected operand type!");
398 case MachineOperand::MO_GlobalAddress:
399 printSymbolOperand(*this, MO, O);
400 if (Subtarget->isPICStyleRIPRel())
403 case MachineOperand::MO_Register:
405 printOperand(*this, MI, OpNo, O);
410 case 'c': // Don't print "$" before a global var name or constant.
411 switch (MO.getType()) {
413 printOperand(*this, MI, OpNo, O);
415 case MachineOperand::MO_Immediate:
418 case MachineOperand::MO_ConstantPoolIndex:
419 case MachineOperand::MO_JumpTableIndex:
420 case MachineOperand::MO_ExternalSymbol:
421 llvm_unreachable("unexpected operand type!");
422 case MachineOperand::MO_GlobalAddress:
423 printSymbolOperand(*this, MO, O);
428 case 'A': // Print '*' before a register (it must be a register)
431 printOperand(*this, MI, OpNo, O);
436 case 'b': // Print QImode register
437 case 'h': // Print QImode high register
438 case 'w': // Print HImode register
439 case 'k': // Print SImode register
440 case 'q': // Print DImode register
442 return printAsmMRegister(*this, MO, ExtraCode[0], O);
443 printOperand(*this, MI, OpNo, O);
446 case 'P': // This is the operand of a call, treat specially.
447 printPCRelImm(*this, MI, OpNo, O);
450 case 'n': // Negate the immediate or print a '-' before the operand.
451 // Note: this is a temporary solution. It should be handled target
452 // independently as part of the 'MC' work.
461 printOperand(*this, MI, OpNo, O, /*Modifier*/ nullptr, AsmVariant);
465 bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
466 unsigned OpNo, unsigned AsmVariant,
467 const char *ExtraCode,
470 printIntelMemReference(*this, MI, OpNo, O);
474 if (ExtraCode && ExtraCode[0]) {
475 if (ExtraCode[1] != 0) return true; // Unknown modifier.
477 switch (ExtraCode[0]) {
478 default: return true; // Unknown modifier.
479 case 'b': // Print QImode register
480 case 'h': // Print QImode high register
481 case 'w': // Print HImode register
482 case 'k': // Print SImode register
483 case 'q': // Print SImode register
484 // These only apply to registers, ignore on mem.
487 printMemReference(*this, MI, OpNo, O, "H");
489 case 'P': // Don't print @PLT, but do print as memory.
490 printMemReference(*this, MI, OpNo, O, "no-rip");
494 printMemReference(*this, MI, OpNo, O);
498 void X86AsmPrinter::EmitStartOfAsmFile(Module &M) {
499 const Triple &TT = TM.getTargetTriple();
501 if (TT.isOSBinFormatMachO())
502 OutStreamer->SwitchSection(getObjFileLowering().getTextSection());
504 if (TT.isOSBinFormatCOFF()) {
505 // Emit an absolute @feat.00 symbol. This appears to be some kind of
506 // compiler features bitfield read by link.exe.
507 if (TT.getArch() == Triple::x86) {
508 MCSymbol *S = MMI->getContext().getOrCreateSymbol(StringRef("@feat.00"));
509 OutStreamer->BeginCOFFSymbolDef(S);
510 OutStreamer->EmitCOFFSymbolStorageClass(COFF::IMAGE_SYM_CLASS_STATIC);
511 OutStreamer->EmitCOFFSymbolType(COFF::IMAGE_SYM_DTYPE_NULL);
512 OutStreamer->EndCOFFSymbolDef();
513 // According to the PE-COFF spec, the LSB of this value marks the object
514 // for "registered SEH". This means that all SEH handler entry points
515 // must be registered in .sxdata. Use of any unregistered handlers will
516 // cause the process to terminate immediately. LLVM does not know how to
517 // register any SEH handlers, so its object files should be safe.
518 OutStreamer->EmitSymbolAttribute(S, MCSA_Global);
519 OutStreamer->EmitAssignment(
520 S, MCConstantExpr::create(int64_t(1), MMI->getContext()));
523 OutStreamer->EmitSyntaxDirective();
525 // If this is not inline asm and we're in 16-bit
526 // mode prefix assembly with .code16.
527 bool is16 = TT.getEnvironment() == Triple::CODE16;
528 if (M.getModuleInlineAsm().empty() && is16)
529 OutStreamer->EmitAssemblerFlag(MCAF_Code16);
533 emitNonLazySymbolPointer(MCStreamer &OutStreamer, MCSymbol *StubLabel,
534 MachineModuleInfoImpl::StubValueTy &MCSym) {
536 OutStreamer.EmitLabel(StubLabel);
537 // .indirect_symbol _foo
538 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(), MCSA_IndirectSymbol);
541 // External to current translation unit.
542 OutStreamer.EmitIntValue(0, 4/*size*/);
544 // Internal to current translation unit.
546 // When we place the LSDA into the TEXT section, the type info
547 // pointers need to be indirect and pc-rel. We accomplish this by
548 // using NLPs; however, sometimes the types are local to the file.
549 // We need to fill in the value for the NLP in those cases.
550 OutStreamer.EmitValue(
551 MCSymbolRefExpr::create(MCSym.getPointer(), OutStreamer.getContext()),
555 MCSymbol *X86AsmPrinter::GetCPISymbol(unsigned CPID) const {
556 if (Subtarget->isTargetKnownWindowsMSVC()) {
557 const MachineConstantPoolEntry &CPE =
558 MF->getConstantPool()->getConstants()[CPID];
559 if (!CPE.isMachineConstantPoolEntry()) {
560 const DataLayout &DL = MF->getDataLayout();
561 SectionKind Kind = CPE.getSectionKind(&DL);
562 const Constant *C = CPE.Val.ConstVal;
563 unsigned Align = CPE.Alignment;
564 if (const MCSectionCOFF *S = dyn_cast<MCSectionCOFF>(
565 getObjFileLowering().getSectionForConstant(DL, Kind, C, Align))) {
566 if (MCSymbol *Sym = S->getCOMDATSymbol()) {
567 if (Sym->isUndefined())
568 OutStreamer->EmitSymbolAttribute(Sym, MCSA_Global);
575 return AsmPrinter::GetCPISymbol(CPID);
578 void X86AsmPrinter::EmitEndOfAsmFile(Module &M) {
579 const Triple &TT = TM.getTargetTriple();
581 if (TT.isOSBinFormatMachO()) {
582 // All darwin targets use mach-o.
583 MachineModuleInfoMachO &MMIMacho =
584 MMI->getObjFileInfo<MachineModuleInfoMachO>();
586 // Output stubs for dynamically-linked functions.
587 MachineModuleInfoMachO::SymbolListTy Stubs;
589 // Output stubs for external and common global variables.
590 Stubs = MMIMacho.GetGVStubList();
591 if (!Stubs.empty()) {
592 MCSection *TheSection = OutContext.getMachOSection(
593 "__IMPORT", "__pointers", MachO::S_NON_LAZY_SYMBOL_POINTERS,
594 SectionKind::getMetadata());
595 OutStreamer->SwitchSection(TheSection);
597 for (auto &Stub : Stubs)
598 emitNonLazySymbolPointer(*OutStreamer, Stub.first, Stub.second);
601 OutStreamer->AddBlankLine();
604 SM.serializeToStackMapSection();
605 FM.serializeToFaultMapSection();
607 // Funny Darwin hack: This flag tells the linker that no global symbols
608 // contain code that falls through to other global symbols (e.g. the obvious
609 // implementation of multiple entry points). If this doesn't occur, the
610 // linker can safely perform dead code stripping. Since LLVM never
611 // generates code that does this, it is always safe to set.
612 OutStreamer->EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
615 if (TT.isKnownWindowsMSVCEnvironment() && MMI->usesVAFloatArgument()) {
616 StringRef SymbolName =
617 (TT.getArch() == Triple::x86_64) ? "_fltused" : "__fltused";
618 MCSymbol *S = MMI->getContext().getOrCreateSymbol(SymbolName);
619 OutStreamer->EmitSymbolAttribute(S, MCSA_Global);
622 if (TT.isOSBinFormatCOFF()) {
623 const TargetLoweringObjectFileCOFF &TLOFCOFF =
624 static_cast<const TargetLoweringObjectFileCOFF&>(getObjFileLowering());
627 raw_string_ostream FlagsOS(Flags);
629 for (const auto &Function : M)
630 TLOFCOFF.emitLinkerFlagsForGlobal(FlagsOS, &Function);
631 for (const auto &Global : M.globals())
632 TLOFCOFF.emitLinkerFlagsForGlobal(FlagsOS, &Global);
633 for (const auto &Alias : M.aliases())
634 TLOFCOFF.emitLinkerFlagsForGlobal(FlagsOS, &Alias);
638 // Output collected flags.
639 if (!Flags.empty()) {
640 OutStreamer->SwitchSection(TLOFCOFF.getDrectveSection());
641 OutStreamer->EmitBytes(Flags);
644 SM.serializeToStackMapSection();
647 if (TT.isOSBinFormatELF()) {
648 SM.serializeToStackMapSection();
649 FM.serializeToFaultMapSection();
653 //===----------------------------------------------------------------------===//
654 // Target Registry Stuff
655 //===----------------------------------------------------------------------===//
657 // Force static initialization.
658 extern "C" void LLVMInitializeX86AsmPrinter() {
659 RegisterAsmPrinter<X86AsmPrinter> X(getTheX86_32Target());
660 RegisterAsmPrinter<X86AsmPrinter> Y(getTheX86_64Target());