1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
21 #include "llvm/Analysis/EHPersonalities.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/WinEHFuncInfo.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/Support/Debug.h"
38 X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
39 unsigned StackAlignOverride)
40 : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41 STI.is64Bit() ? -8 : -4),
42 STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43 // Cache a bunch of frame-related predicates for this subtarget.
44 SlotSize = TRI->getSlotSize();
45 Is64Bit = STI.is64Bit();
46 IsLP64 = STI.isTarget64BitLP64();
47 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
48 Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();
49 StackPtr = TRI->getStackRegister();
52 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
53 return !MF.getFrameInfo().hasVarSizedObjects() &&
54 !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
62 X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
63 return hasReservedCallFrame(MF) ||
64 (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65 TRI->hasBasePointer(MF);
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
76 X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const {
77 return MF.getFrameInfo().hasStackObjects() ||
78 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
84 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
85 const MachineFrameInfo &MFI = MF.getFrameInfo();
86 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87 TRI->needsStackRealignment(MF) ||
88 MFI.hasVarSizedObjects() ||
89 MFI.isFrameAddressTaken() || MFI.hasOpaqueSPAdjustment() ||
90 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91 MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92 MFI.hasStackMap() || MFI.hasPatchPoint() ||
93 MFI.hasCopyImplyingStackAdjustment());
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
100 return X86::SUB64ri32;
103 return X86::SUB32ri8;
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
111 return X86::ADD64ri8;
112 return X86::ADD64ri32;
115 return X86::ADD32ri8;
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121 return isLP64 ? X86::SUB64rr : X86::SUB32rr;
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125 return isLP64 ? X86::ADD64rr : X86::ADD32rr;
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
131 return X86::AND64ri8;
132 return X86::AND64ri32;
135 return X86::AND32ri8;
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140 return IsLP64 ? X86::LEA64r : X86::LEA32r;
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
146 static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB,
147 MachineBasicBlock::iterator &MBBI,
148 const X86RegisterInfo *TRI,
150 const MachineFunction *MF = MBB.getParent();
151 const Function *F = MF->getFunction();
152 if (!F || MF->callsEHReturn())
155 const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
157 if (MBBI == MBB.end())
160 switch (MBBI->getOpcode()) {
162 case TargetOpcode::PATCHABLE_RET:
168 case X86::TCRETURNdi:
169 case X86::TCRETURNri:
170 case X86::TCRETURNmi:
171 case X86::TCRETURNdi64:
172 case X86::TCRETURNri64:
173 case X86::TCRETURNmi64:
175 case X86::EH_RETURN64: {
176 SmallSet<uint16_t, 8> Uses;
177 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
178 MachineOperand &MO = MBBI->getOperand(i);
179 if (!MO.isReg() || MO.isDef())
181 unsigned Reg = MO.getReg();
184 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
188 for (auto CS : AvailableRegs)
189 if (!Uses.count(CS) && CS != X86::RIP)
197 static bool isEAXLiveIn(MachineBasicBlock &MBB) {
198 for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
199 unsigned Reg = RegMask.PhysReg;
201 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
202 Reg == X86::AH || Reg == X86::AL)
209 /// Check if the flags need to be preserved before the terminators.
210 /// This would be the case, if the eflags is live-in of the region
211 /// composed by the terminators or live-out of that region, without
212 /// being defined by a terminator.
214 flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB) {
215 for (const MachineInstr &MI : MBB.terminators()) {
216 bool BreakNext = false;
217 for (const MachineOperand &MO : MI.operands()) {
220 unsigned Reg = MO.getReg();
221 if (Reg != X86::EFLAGS)
224 // This terminator needs an eflags that is not defined
225 // by a previous another terminator:
226 // EFLAGS is live-in of the region composed by the terminators.
229 // This terminator defines the eflags, i.e., we don't need to preserve it.
230 // However, we still need to check this specific terminator does not
231 // read a live-in value.
234 // We found a definition of the eflags, no need to preserve them.
239 // None of the terminators use or define the eflags.
240 // Check if they are live-out, that would imply we need to preserve them.
241 for (const MachineBasicBlock *Succ : MBB.successors())
242 if (Succ->isLiveIn(X86::EFLAGS))
248 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
249 /// stack pointer by a constant value.
250 void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
251 MachineBasicBlock::iterator &MBBI,
252 int64_t NumBytes, bool InEpilogue) const {
253 bool isSub = NumBytes < 0;
254 uint64_t Offset = isSub ? -NumBytes : NumBytes;
255 MachineInstr::MIFlag Flag =
256 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy;
258 uint64_t Chunk = (1LL << 31) - 1;
259 DebugLoc DL = MBB.findDebugLoc(MBBI);
261 if (Offset > Chunk) {
262 // Rather than emit a long series of instructions for large offsets,
263 // load the offset into a register and do one sub/add
265 unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
267 if (isSub && !isEAXLiveIn(MBB))
270 Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
272 unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
273 unsigned AddSubRROpc =
274 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit);
276 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
279 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
282 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
284 } else if (Offset > 8 * Chunk) {
285 // If we would need more than 8 add or sub instructions (a >16GB stack
286 // frame), it's worth spilling RAX to materialize this immediate.
288 // movabsq +-$Offset+-SlotSize, %rax
292 assert(Is64Bit && "can't have 32-bit 16GB stack frame");
293 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
294 .addReg(Rax, RegState::Kill)
296 // Subtract is not commutative, so negate the offset and always use add.
297 // Subtract 8 less and add 8 more to account for the PUSH we just did.
299 Offset = -(Offset - SlotSize);
301 Offset = Offset + SlotSize;
302 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
305 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
308 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
309 // Exchange the new SP in RAX with the top of the stack.
311 BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
313 // Load new SP from the top of the stack into RSP.
314 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
321 uint64_t ThisVal = std::min(Offset, Chunk);
322 if (ThisVal == SlotSize) {
323 // Use push / pop for slot sized adjustments as a size optimization. We
324 // need to find a dead register when using pop.
326 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
327 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
330 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
331 : (Is64Bit ? X86::POP64r : X86::POP32r);
332 BuildMI(MBB, MBBI, DL, TII.get(Opc))
333 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
340 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
347 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
348 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
349 const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
350 assert(Offset != 0 && "zero offset stack adjustment requested");
352 // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
356 // Check if inserting the prologue at the beginning
357 // of MBB would require to use LEA operations.
358 // We need to use LEA operations if EFLAGS is live in, because
359 // it means an instruction will read it before it gets defined.
360 UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
362 // If we can use LEA for SP but we shouldn't, check that none
363 // of the terminators uses the eflags. Otherwise we will insert
364 // a ADD that will redefine the eflags and break the condition.
365 // Alternatively, we could move the ADD, but this may not be possible
366 // and is an optimization anyway.
367 UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
368 if (UseLEA && !STI.useLeaForSP())
369 UseLEA = flagsNeedToBePreservedBeforeTheTerminators(MBB);
370 // If that assert breaks, that means we do not do the right thing
371 // in canUseAsEpilogue.
372 assert((UseLEA || !flagsNeedToBePreservedBeforeTheTerminators(MBB)) &&
373 "We shouldn't have allowed this insertion point");
376 MachineInstrBuilder MI;
378 MI = addRegOffset(BuildMI(MBB, MBBI, DL,
379 TII.get(getLEArOpcode(Uses64BitFramePtr)),
381 StackPtr, false, Offset);
383 bool IsSub = Offset < 0;
384 uint64_t AbsOffset = IsSub ? -Offset : Offset;
385 unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
386 : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
387 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
390 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
395 int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
396 MachineBasicBlock::iterator &MBBI,
397 bool doMergeWithPrevious) const {
398 if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
399 (!doMergeWithPrevious && MBBI == MBB.end()))
402 MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
403 MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
405 PI = skipDebugInstructionsBackward(PI, MBB.begin());
407 NI = skipDebugInstructionsForward(NI, MBB.end());
409 unsigned Opc = PI->getOpcode();
412 if (!doMergeWithPrevious && NI != MBB.end() &&
413 NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
414 // Don't merge with the next instruction if it has CFI.
418 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
419 Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
420 PI->getOperand(0).getReg() == StackPtr){
421 assert(PI->getOperand(1).getReg() == StackPtr);
422 Offset += PI->getOperand(2).getImm();
424 if (!doMergeWithPrevious) MBBI = NI;
425 } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
426 PI->getOperand(0).getReg() == StackPtr &&
427 PI->getOperand(1).getReg() == StackPtr &&
428 PI->getOperand(2).getImm() == 1 &&
429 PI->getOperand(3).getReg() == X86::NoRegister &&
430 PI->getOperand(5).getReg() == X86::NoRegister) {
431 // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
432 Offset += PI->getOperand(4).getImm();
434 if (!doMergeWithPrevious) MBBI = NI;
435 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
436 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
437 PI->getOperand(0).getReg() == StackPtr) {
438 assert(PI->getOperand(1).getReg() == StackPtr);
439 Offset -= PI->getOperand(2).getImm();
441 if (!doMergeWithPrevious) MBBI = NI;
447 void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB,
448 MachineBasicBlock::iterator MBBI,
450 const MCCFIInstruction &CFIInst) const {
451 MachineFunction &MF = *MBB.getParent();
452 unsigned CFIIndex = MF.addFrameInst(CFIInst);
453 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
454 .addCFIIndex(CFIIndex);
457 void X86FrameLowering::emitCalleeSavedFrameMoves(
458 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
459 const DebugLoc &DL) const {
460 MachineFunction &MF = *MBB.getParent();
461 MachineFrameInfo &MFI = MF.getFrameInfo();
462 MachineModuleInfo &MMI = MF.getMMI();
463 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
465 // Add callee saved registers to move list.
466 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
467 if (CSI.empty()) return;
469 // Calculate offsets.
470 for (std::vector<CalleeSavedInfo>::const_iterator
471 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
472 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
473 unsigned Reg = I->getReg();
475 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
476 BuildCFI(MBB, MBBI, DL,
477 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
481 void X86FrameLowering::emitStackProbe(MachineFunction &MF,
482 MachineBasicBlock &MBB,
483 MachineBasicBlock::iterator MBBI,
484 const DebugLoc &DL, bool InProlog) const {
485 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
486 if (STI.isTargetWindowsCoreCLR()) {
488 emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
490 emitStackProbeInline(MF, MBB, MBBI, DL, false);
493 emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
497 void X86FrameLowering::inlineStackProbe(MachineFunction &MF,
498 MachineBasicBlock &PrologMBB) const {
499 const StringRef ChkStkStubSymbol = "__chkstk_stub";
500 MachineInstr *ChkStkStub = nullptr;
502 for (MachineInstr &MI : PrologMBB) {
503 if (MI.isCall() && MI.getOperand(0).isSymbol() &&
504 ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
510 if (ChkStkStub != nullptr) {
511 assert(!ChkStkStub->isBundled() &&
512 "Not expecting bundled instructions here");
513 MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
514 assert(std::prev(MBBI) == ChkStkStub &&
515 "MBBI expected after __chkstk_stub.");
516 DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
517 emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
518 ChkStkStub->eraseFromParent();
522 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
523 MachineBasicBlock &MBB,
524 MachineBasicBlock::iterator MBBI,
526 bool InProlog) const {
527 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
528 assert(STI.is64Bit() && "different expansion needed for 32 bit");
529 assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
530 const TargetInstrInfo &TII = *STI.getInstrInfo();
531 const BasicBlock *LLVM_BB = MBB.getBasicBlock();
533 // RAX contains the number of bytes of desired stack adjustment.
534 // The handling here assumes this value has already been updated so as to
535 // maintain stack alignment.
537 // We need to exit with RSP modified by this amount and execute suitable
538 // page touches to notify the OS that we're growing the stack responsibly.
539 // All stack probing must be done without modifying RSP.
545 // Flags, TestReg = CopyReg - SizeReg
546 // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
547 // LimitReg = gs magic thread env access
548 // if FinalReg >= LimitReg goto ContinueMBB
550 // RoundReg = page address of FinalReg
552 // LoopReg = PHI(LimitReg,ProbeReg)
553 // ProbeReg = LoopReg - PageSize
555 // if (ProbeReg > RoundReg) goto LoopMBB
558 // [rest of original MBB]
560 // Set up the new basic blocks
561 MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
562 MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
563 MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
565 MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
566 MF.insert(MBBIter, RoundMBB);
567 MF.insert(MBBIter, LoopMBB);
568 MF.insert(MBBIter, ContinueMBB);
570 // Split MBB and move the tail portion down to ContinueMBB.
571 MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
572 ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
573 ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
575 // Some useful constants
576 const int64_t ThreadEnvironmentStackLimit = 0x10;
577 const int64_t PageSize = 0x1000;
578 const int64_t PageMask = ~(PageSize - 1);
580 // Registers we need. For the normal case we use virtual
581 // registers. For the prolog expansion we use RAX, RCX and RDX.
582 MachineRegisterInfo &MRI = MF.getRegInfo();
583 const TargetRegisterClass *RegClass = &X86::GR64RegClass;
584 const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
585 : MRI.createVirtualRegister(RegClass),
586 ZeroReg = InProlog ? (unsigned)X86::RCX
587 : MRI.createVirtualRegister(RegClass),
588 CopyReg = InProlog ? (unsigned)X86::RDX
589 : MRI.createVirtualRegister(RegClass),
590 TestReg = InProlog ? (unsigned)X86::RDX
591 : MRI.createVirtualRegister(RegClass),
592 FinalReg = InProlog ? (unsigned)X86::RDX
593 : MRI.createVirtualRegister(RegClass),
594 RoundedReg = InProlog ? (unsigned)X86::RDX
595 : MRI.createVirtualRegister(RegClass),
596 LimitReg = InProlog ? (unsigned)X86::RCX
597 : MRI.createVirtualRegister(RegClass),
598 JoinReg = InProlog ? (unsigned)X86::RCX
599 : MRI.createVirtualRegister(RegClass),
600 ProbeReg = InProlog ? (unsigned)X86::RCX
601 : MRI.createVirtualRegister(RegClass);
603 // SP-relative offsets where we can save RCX and RDX.
604 int64_t RCXShadowSlot = 0;
605 int64_t RDXShadowSlot = 0;
607 // If inlining in the prolog, save RCX and RDX.
608 // Future optimization: don't save or restore if not live in.
610 // Compute the offsets. We need to account for things already
611 // pushed onto the stack at this point: return address, frame
612 // pointer (if used), and callee saves.
613 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
614 const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
615 const bool HasFP = hasFP(MF);
616 RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
617 RDXShadowSlot = RCXShadowSlot + 8;
619 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
622 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
626 // Not in the prolog. Copy RAX to a virtual reg.
627 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
630 // Add code to MBB to check for overflow and set the new target stack pointer
632 BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
633 .addReg(ZeroReg, RegState::Undef)
634 .addReg(ZeroReg, RegState::Undef);
635 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
636 BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
639 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
643 // FinalReg now holds final stack pointer value, or zero if
644 // allocation would overflow. Compare against the current stack
645 // limit from the thread environment block. Note this limit is the
646 // lowest touched page on the stack, not the point at which the OS
647 // will cause an overflow exception, so this is just an optimization
648 // to avoid unnecessarily touching pages that are below the current
649 // SP but already committed to the stack by the OS.
650 BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
654 .addImm(ThreadEnvironmentStackLimit)
656 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
657 // Jump if the desired stack pointer is at or above the stack limit.
658 BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
660 // Add code to roundMBB to round the final stack pointer to a page boundary.
661 BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
664 BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
666 // LimitReg now holds the current stack limit, RoundedReg page-rounded
667 // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
668 // and probe until we reach RoundedReg.
670 BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
677 addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
680 // Probe by storing a byte onto the stack.
681 BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
688 BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
691 BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
693 MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
695 // If in prolog, restore RDX and RCX.
697 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
699 X86::RSP, false, RCXShadowSlot);
700 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
702 X86::RSP, false, RDXShadowSlot);
705 // Now that the probing is done, add code to continueMBB to update
706 // the stack pointer for real.
707 BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
711 // Add the control flow edges we need.
712 MBB.addSuccessor(ContinueMBB);
713 MBB.addSuccessor(RoundMBB);
714 RoundMBB->addSuccessor(LoopMBB);
715 LoopMBB->addSuccessor(ContinueMBB);
716 LoopMBB->addSuccessor(LoopMBB);
718 // Mark all the instructions added to the prolog as frame setup.
720 for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
721 BeforeMBBI->setFlag(MachineInstr::FrameSetup);
723 for (MachineInstr &MI : *RoundMBB) {
724 MI.setFlag(MachineInstr::FrameSetup);
726 for (MachineInstr &MI : *LoopMBB) {
727 MI.setFlag(MachineInstr::FrameSetup);
729 for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
730 CMBBI != ContinueMBBI; ++CMBBI) {
731 CMBBI->setFlag(MachineInstr::FrameSetup);
735 // Possible TODO: physreg liveness for InProlog case.
738 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
739 MachineBasicBlock &MBB,
740 MachineBasicBlock::iterator MBBI,
742 bool InProlog) const {
743 bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
747 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
749 CallOp = X86::CALLpcrel32;
753 if (STI.isTargetCygMing()) {
754 Symbol = "___chkstk_ms";
758 } else if (STI.isTargetCygMing())
763 MachineInstrBuilder CI;
764 MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
766 // All current stack probes take AX and SP as input, clobber flags, and
767 // preserve all registers. x86_64 probes leave RSP unmodified.
768 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
769 // For the large code model, we have to call through a register. Use R11,
770 // as it is scratch in all supported calling conventions.
771 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
772 .addExternalSymbol(Symbol);
773 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
775 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol);
778 unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
779 unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
780 CI.addReg(AX, RegState::Implicit)
781 .addReg(SP, RegState::Implicit)
782 .addReg(AX, RegState::Define | RegState::Implicit)
783 .addReg(SP, RegState::Define | RegState::Implicit)
784 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
787 // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
788 // themselves. It also does not clobber %rax so we can reuse it when
790 BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
796 // Apply the frame setup flag to all inserted instrs.
797 for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
798 ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
802 void X86FrameLowering::emitStackProbeInlineStub(
803 MachineFunction &MF, MachineBasicBlock &MBB,
804 MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
806 assert(InProlog && "ChkStkStub called outside prolog!");
808 BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
809 .addExternalSymbol("__chkstk_stub");
812 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
813 // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
814 // and might require smaller successive adjustments.
815 const uint64_t Win64MaxSEHOffset = 128;
816 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
817 // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
818 return SEHFrameOffset & -16;
821 // If we're forcing a stack realignment we can't rely on just the frame
822 // info, we need to know the ABI stack alignment as well in case we
823 // have a call out. Otherwise just make sure we have some alignment - we'll
824 // go with the minimum SlotSize.
825 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
826 const MachineFrameInfo &MFI = MF.getFrameInfo();
827 uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
828 unsigned StackAlign = getStackAlignment();
829 if (MF.getFunction()->hasFnAttribute("stackrealign")) {
831 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
832 else if (MaxAlign < SlotSize)
838 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
839 MachineBasicBlock::iterator MBBI,
840 const DebugLoc &DL, unsigned Reg,
841 uint64_t MaxAlign) const {
842 uint64_t Val = -MaxAlign;
843 unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
844 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
847 .setMIFlag(MachineInstr::FrameSetup);
849 // The EFLAGS implicit def is dead.
850 MI->getOperand(3).setIsDead();
853 /// emitPrologue - Push callee-saved registers onto the stack, which
854 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
855 /// space for local variables. Also emit labels used by the exception handler to
856 /// generate the exception handling frames.
859 Here's a gist of what gets emitted:
861 ; Establish frame pointer, if needed
864 .cfi_def_cfa_offset 16
865 .cfi_offset %rbp, -16
868 .cfi_def_cfa_register %rbp
870 ; Spill general-purpose registers
871 [for all callee-saved GPRs]
874 .cfi_def_cfa_offset (offset from RETADDR)
877 ; If the required stack alignment > default stack alignment
878 ; rsp needs to be re-aligned. This creates a "re-alignment gap"
879 ; of unknown size in the stack frame.
880 [if stack needs re-alignment]
883 ; Allocate space for locals
884 [if target is Windows and allocated space > 4096 bytes]
885 ; Windows needs special care for allocations larger
888 call ___chkstk_ms/___chkstk
894 .seh_stackalloc (size of XMM spill slots)
895 .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
900 ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
901 ; they may get spilled on any platform, if the current function
902 ; calls @llvm.eh.unwind.init
904 [for all callee-saved XMM registers]
905 movaps %<xmm reg>, -MMM(%rbp)
906 [for all callee-saved XMM registers]
907 .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
908 ; i.e. the offset relative to (%rbp - SEHFrameOffset)
910 [for all callee-saved XMM registers]
911 movaps %<xmm reg>, KKK(%rsp)
912 [for all callee-saved XMM registers]
913 .seh_savexmm %<xmm reg>, KKK
917 [if needs base pointer]
919 [if needs to restore base pointer]
924 [for all callee-saved registers]
925 .cfi_offset %<reg>, (offset from %rbp)
927 .cfi_def_cfa_offset (offset from RETADDR)
928 [for all callee-saved registers]
929 .cfi_offset %<reg>, (offset from %rsp)
932 - .seh directives are emitted only for Windows 64 ABI
933 - .cfi directives are emitted for all other ABIs
934 - for 32-bit code, substitute %e?? registers for %r??
937 void X86FrameLowering::emitPrologue(MachineFunction &MF,
938 MachineBasicBlock &MBB) const {
939 assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
940 "MF used frame lowering for wrong subtarget");
941 MachineBasicBlock::iterator MBBI = MBB.begin();
942 MachineFrameInfo &MFI = MF.getFrameInfo();
943 const Function *Fn = MF.getFunction();
944 MachineModuleInfo &MMI = MF.getMMI();
945 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
946 uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
947 uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
948 bool IsFunclet = MBB.isEHFuncletEntry();
949 EHPersonality Personality = EHPersonality::Unknown;
950 if (Fn->hasPersonalityFn())
951 Personality = classifyEHPersonality(Fn->getPersonalityFn());
952 bool FnHasClrFunclet =
953 MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
954 bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
955 bool HasFP = hasFP(MF);
956 bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
957 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
958 bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
960 !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
961 unsigned FramePtr = TRI->getFrameRegister(MF);
962 const unsigned MachineFramePtr =
963 STI.isTarget64BitILP32()
964 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
965 unsigned BasePtr = TRI->getBaseRegister();
966 bool HasWinCFI = false;
968 // Debug location must be unknown since the first debug location is used
969 // to determine the end of the prologue.
972 // Add RETADDR move area to callee saved frame size.
973 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
974 if (TailCallReturnAddrDelta && IsWin64Prologue)
975 report_fatal_error("Can't handle guaranteed tail call under win64 yet");
977 if (TailCallReturnAddrDelta < 0)
978 X86FI->setCalleeSavedFrameSize(
979 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
981 bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO());
983 // The default stack probe size is 4096 if the function has no stackprobesize
985 unsigned StackProbeSize = 4096;
986 if (Fn->hasFnAttribute("stack-probe-size"))
987 Fn->getFnAttribute("stack-probe-size")
989 .getAsInteger(0, StackProbeSize);
991 // Re-align the stack on 64-bit if the x86-interrupt calling convention is
992 // used and an error code was pushed, since the x86-64 ABI requires a 16-byte
994 if (Fn->getCallingConv() == CallingConv::X86_INTR && Is64Bit &&
995 Fn->arg_size() == 2) {
997 MFI.setStackSize(StackSize);
998 emitSPUpdate(MBB, MBBI, -8, /*InEpilogue=*/false);
1001 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
1002 // function, and use up to 128 bytes of stack space, don't have a frame
1003 // pointer, calls, or dynamic alloca then we do not need to adjust the
1004 // stack pointer (we fit in the Red Zone). We also check that we don't
1005 // push and pop from the stack.
1006 if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
1007 !TRI->needsStackRealignment(MF) &&
1008 !MFI.hasVarSizedObjects() && // No dynamic alloca.
1009 !MFI.adjustsStack() && // No calls.
1010 !IsWin64CC && // Win64 has no Red Zone
1011 !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
1012 !MF.shouldSplitStack()) { // Regular stack
1013 uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
1014 if (HasFP) MinSize += SlotSize;
1015 X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
1016 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1017 MFI.setStackSize(StackSize);
1020 // Insert stack pointer adjustment for later moving of return addr. Only
1021 // applies to tail call optimized functions where the callee argument stack
1022 // size is bigger than the callers.
1023 if (TailCallReturnAddrDelta < 0) {
1024 BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
1025 /*InEpilogue=*/false)
1026 .setMIFlag(MachineInstr::FrameSetup);
1029 // Mapping for machine moves:
1031 // DST: VirtualFP AND
1032 // SRC: VirtualFP => DW_CFA_def_cfa_offset
1033 // ELSE => DW_CFA_def_cfa
1035 // SRC: VirtualFP AND
1036 // DST: Register => DW_CFA_def_cfa_register
1039 // OFFSET < 0 => DW_CFA_offset_extended_sf
1040 // REG < 64 => DW_CFA_offset + Reg
1041 // ELSE => DW_CFA_offset_extended
1043 uint64_t NumBytes = 0;
1044 int stackGrowth = -SlotSize;
1046 // Find the funclet establisher parameter
1047 unsigned Establisher = X86::NoRegister;
1049 Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1051 Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1053 if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1054 // Immediately spill establisher into the home slot.
1055 // The runtime cares about this.
1056 // MOV64mr %rdx, 16(%rsp)
1057 unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1058 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1059 .addReg(Establisher)
1060 .setMIFlag(MachineInstr::FrameSetup);
1061 MBB.addLiveIn(Establisher);
1065 assert(MF.getRegInfo().isReserved(MachineFramePtr) && "FP reserved");
1067 // Calculate required stack adjustment.
1068 uint64_t FrameSize = StackSize - SlotSize;
1069 // If required, include space for extra hidden slot for stashing base pointer.
1070 if (X86FI->getRestoreBasePointer())
1071 FrameSize += SlotSize;
1073 NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1075 // Callee-saved registers are pushed on stack before the stack is realigned.
1076 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1077 NumBytes = alignTo(NumBytes, MaxAlign);
1079 // Get the offset of the stack slot for the EBP register, which is
1080 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1081 // Update the frame offset adjustment.
1083 MFI.setOffsetAdjustment(-NumBytes);
1085 assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1086 "should calculate same local variable offset for funclets");
1088 // Save EBP/RBP into the appropriate stack slot.
1089 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1090 .addReg(MachineFramePtr, RegState::Kill)
1091 .setMIFlag(MachineInstr::FrameSetup);
1093 if (NeedsDwarfCFI) {
1094 // Mark the place where EBP/RBP was saved.
1095 // Define the current CFA rule to use the provided offset.
1097 BuildCFI(MBB, MBBI, DL,
1098 MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1100 // Change the rule for the FramePtr to be an "offset" rule.
1101 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1102 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset(
1103 nullptr, DwarfFramePtr, 2 * stackGrowth));
1108 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1110 .setMIFlag(MachineInstr::FrameSetup);
1113 if (!IsWin64Prologue && !IsFunclet) {
1114 // Update EBP with the new base value.
1115 BuildMI(MBB, MBBI, DL,
1116 TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1119 .setMIFlag(MachineInstr::FrameSetup);
1121 if (NeedsDwarfCFI) {
1122 // Mark effective beginning of when frame pointer becomes valid.
1123 // Define the current CFA to use the EBP/RBP register.
1124 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1125 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaRegister(
1126 nullptr, DwarfFramePtr));
1130 assert(!IsFunclet && "funclets without FPs not yet implemented");
1131 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1134 // For EH funclets, only allocate enough space for outgoing calls. Save the
1135 // NumBytes value that we would've used for the parent frame.
1136 unsigned ParentFrameNumBytes = NumBytes;
1138 NumBytes = getWinEHFuncletFrameSize(MF);
1140 // Skip the callee-saved push instructions.
1141 bool PushedRegs = false;
1142 int StackOffset = 2 * stackGrowth;
1144 while (MBBI != MBB.end() &&
1145 MBBI->getFlag(MachineInstr::FrameSetup) &&
1146 (MBBI->getOpcode() == X86::PUSH32r ||
1147 MBBI->getOpcode() == X86::PUSH64r)) {
1149 unsigned Reg = MBBI->getOperand(0).getReg();
1152 if (!HasFP && NeedsDwarfCFI) {
1153 // Mark callee-saved push instruction.
1154 // Define the current CFA rule to use the provided offset.
1156 BuildCFI(MBB, MBBI, DL,
1157 MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1158 StackOffset += stackGrowth;
1163 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag(
1164 MachineInstr::FrameSetup);
1168 // Realign stack after we pushed callee-saved registers (so that we'll be
1169 // able to calculate their offsets from the frame pointer).
1170 // Don't do this for Win64, it needs to realign the stack after the prologue.
1171 if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1172 assert(HasFP && "There should be a frame pointer if stack is realigned.");
1173 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1176 // If there is an SUB32ri of ESP immediately before this instruction, merge
1177 // the two. This can be the case when tail call elimination is enabled and
1178 // the callee has more arguments then the caller.
1179 NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1181 // Adjust stack pointer: ESP -= numbytes.
1183 // Windows and cygwin/mingw require a prologue helper routine when allocating
1184 // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1185 // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1186 // stack and adjust the stack pointer in one go. The 64-bit version of
1187 // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1188 // responsible for adjusting the stack pointer. Touching the stack at 4K
1189 // increments is necessary to ensure that the guard pages used by the OS
1190 // virtual memory manager are allocated in correct sequence.
1191 uint64_t AlignedNumBytes = NumBytes;
1192 if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1193 AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1194 if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1195 // Check whether EAX is livein for this block.
1196 bool isEAXAlive = isEAXLiveIn(MBB);
1199 // Sanity check that EAX is not livein for this function.
1200 // It should not be, so throw an assert.
1201 assert(!Is64Bit && "EAX is livein in x64 case!");
1204 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1205 .addReg(X86::EAX, RegState::Kill)
1206 .setMIFlag(MachineInstr::FrameSetup);
1210 // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1211 // Function prologue is responsible for adjusting the stack pointer.
1212 if (isUInt<32>(NumBytes)) {
1213 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1215 .setMIFlag(MachineInstr::FrameSetup);
1216 } else if (isInt<32>(NumBytes)) {
1217 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1219 .setMIFlag(MachineInstr::FrameSetup);
1221 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1223 .setMIFlag(MachineInstr::FrameSetup);
1226 // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1227 // We'll also use 4 already allocated bytes for EAX.
1228 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1229 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1230 .setMIFlag(MachineInstr::FrameSetup);
1233 // Call __chkstk, __chkstk_ms, or __alloca.
1234 emitStackProbe(MF, MBB, MBBI, DL, true);
1239 addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1240 StackPtr, false, NumBytes - 4);
1241 MI->setFlag(MachineInstr::FrameSetup);
1242 MBB.insert(MBBI, MI);
1244 } else if (NumBytes) {
1245 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
1248 if (NeedsWinCFI && NumBytes) {
1250 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1252 .setMIFlag(MachineInstr::FrameSetup);
1255 int SEHFrameOffset = 0;
1256 unsigned SPOrEstablisher;
1259 // The establisher parameter passed to a CLR funclet is actually a pointer
1260 // to the (mostly empty) frame of its nearest enclosing funclet; we have
1261 // to find the root function establisher frame by loading the PSPSym from
1262 // the intermediate frame.
1263 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1264 MachinePointerInfo NoInfo;
1265 MBB.addLiveIn(Establisher);
1266 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1267 Establisher, false, PSPSlotOffset)
1268 .addMemOperand(MF.getMachineMemOperand(
1269 NoInfo, MachineMemOperand::MOLoad, SlotSize, SlotSize));
1271 // Save the root establisher back into the current funclet's (mostly
1272 // empty) frame, in case a sub-funclet or the GC needs it.
1273 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1274 false, PSPSlotOffset)
1275 .addReg(Establisher)
1277 MF.getMachineMemOperand(NoInfo, MachineMemOperand::MOStore |
1278 MachineMemOperand::MOVolatile,
1279 SlotSize, SlotSize));
1281 SPOrEstablisher = Establisher;
1283 SPOrEstablisher = StackPtr;
1286 if (IsWin64Prologue && HasFP) {
1287 // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1288 // this calculation on the incoming establisher, which holds the value of
1289 // RSP from the parent frame at the end of the prologue.
1290 SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1292 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1293 SPOrEstablisher, false, SEHFrameOffset);
1295 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1296 .addReg(SPOrEstablisher);
1298 // If this is not a funclet, emit the CFI describing our frame pointer.
1299 if (NeedsWinCFI && !IsFunclet) {
1301 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1303 .addImm(SEHFrameOffset)
1304 .setMIFlag(MachineInstr::FrameSetup);
1305 if (isAsynchronousEHPersonality(Personality))
1306 MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1308 } else if (IsFunclet && STI.is32Bit()) {
1309 // Reset EBP / ESI to something good for funclets.
1310 MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1311 // If we're a catch funclet, we can be returned to via catchret. Save ESP
1312 // into the registration node so that the runtime will restore it for us.
1313 if (!MBB.isCleanupFuncletEntry()) {
1314 assert(Personality == EHPersonality::MSVC_CXX);
1316 int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1317 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1318 // ESP is the first field, so no extra displacement is needed.
1319 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1325 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1326 const MachineInstr &FrameInstr = *MBBI;
1331 if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1332 if (X86::FR64RegClass.contains(Reg)) {
1333 unsigned IgnoredFrameReg;
1334 int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1335 Offset += SEHFrameOffset;
1338 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1341 .setMIFlag(MachineInstr::FrameSetup);
1347 if (NeedsWinCFI && HasWinCFI)
1348 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1349 .setMIFlag(MachineInstr::FrameSetup);
1351 if (FnHasClrFunclet && !IsFunclet) {
1352 // Save the so-called Initial-SP (i.e. the value of the stack pointer
1353 // immediately after the prolog) into the PSPSlot so that funclets
1354 // and the GC can recover it.
1355 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1356 auto PSPInfo = MachinePointerInfo::getFixedStack(
1357 MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1358 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1361 .addMemOperand(MF.getMachineMemOperand(
1362 PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile,
1363 SlotSize, SlotSize));
1366 // Realign stack after we spilled callee-saved registers (so that we'll be
1367 // able to calculate their offsets from the frame pointer).
1368 // Win64 requires aligning the stack after the prologue.
1369 if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1370 assert(HasFP && "There should be a frame pointer if stack is realigned.");
1371 BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1374 // We already dealt with stack realignment and funclets above.
1375 if (IsFunclet && STI.is32Bit())
1378 // If we need a base pointer, set it up here. It's whatever the value
1379 // of the stack pointer is at this point. Any variable size objects
1380 // will be allocated after this, so we can still use the base pointer
1381 // to reference locals.
1382 if (TRI->hasBasePointer(MF)) {
1383 // Update the base pointer with the current stack pointer.
1384 unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1385 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1386 .addReg(SPOrEstablisher)
1387 .setMIFlag(MachineInstr::FrameSetup);
1388 if (X86FI->getRestoreBasePointer()) {
1389 // Stash value of base pointer. Saving RSP instead of EBP shortens
1390 // dependence chain. Used by SjLj EH.
1391 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1392 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1393 FramePtr, true, X86FI->getRestoreBasePointerOffset())
1394 .addReg(SPOrEstablisher)
1395 .setMIFlag(MachineInstr::FrameSetup);
1398 if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1399 // Stash the value of the frame pointer relative to the base pointer for
1400 // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1401 // it recovers the frame pointer from the base pointer rather than the
1402 // other way around.
1403 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1406 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1407 assert(UsedReg == BasePtr);
1408 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1410 .setMIFlag(MachineInstr::FrameSetup);
1414 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1415 // Mark end of stack pointer adjustment.
1416 if (!HasFP && NumBytes) {
1417 // Define the current CFA rule to use the provided offset.
1419 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaOffset(
1420 nullptr, -StackSize + stackGrowth));
1423 // Emit DWARF info specifying the offsets of the callee-saved registers.
1425 emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1428 // X86 Interrupt handling function cannot assume anything about the direction
1429 // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1430 // in each prologue of interrupt handler function.
1432 // FIXME: Create "cld" instruction only in these cases:
1433 // 1. The interrupt handling function uses any of the "rep" instructions.
1434 // 2. Interrupt handling function calls another function.
1436 if (Fn->getCallingConv() == CallingConv::X86_INTR)
1437 BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1438 .setMIFlag(MachineInstr::FrameSetup);
1440 // At this point we know if the function has WinCFI or not.
1441 MF.setHasWinCFI(HasWinCFI);
1444 bool X86FrameLowering::canUseLEAForSPInEpilogue(
1445 const MachineFunction &MF) const {
1446 // We can't use LEA instructions for adjusting the stack pointer if we don't
1447 // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1448 // to deallocate the stack.
1449 // This means that we can use LEA for SP in two situations:
1450 // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1451 // 2. We *have* a frame pointer which means we are permitted to use LEA.
1452 return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1455 static bool isFuncletReturnInstr(MachineInstr &MI) {
1456 switch (MI.getOpcode()) {
1458 case X86::CLEANUPRET:
1463 llvm_unreachable("impossible");
1466 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1467 // stack. It holds a pointer to the bottom of the root function frame. The
1468 // establisher frame pointer passed to a nested funclet may point to the
1469 // (mostly empty) frame of its parent funclet, but it will need to find
1470 // the frame of the root function to access locals. To facilitate this,
1471 // every funclet copies the pointer to the bottom of the root function
1472 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1473 // same offset for the PSPSym in the root function frame that's used in the
1474 // funclets' frames allows each funclet to dynamically accept any ancestor
1475 // frame as its establisher argument (the runtime doesn't guarantee the
1476 // immediate parent for some reason lost to history), and also allows the GC,
1477 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1478 // frame with only a single offset reported for the entire method.
1480 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1481 const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1483 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg,
1484 /*IgnoreSPUpdates*/ true);
1485 assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1486 return static_cast<unsigned>(Offset);
1490 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1491 // This is the size of the pushed CSRs.
1493 MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1494 // This is the amount of stack a funclet needs to allocate.
1496 EHPersonality Personality =
1497 classifyEHPersonality(MF.getFunction()->getPersonalityFn());
1498 if (Personality == EHPersonality::CoreCLR) {
1499 // CLR funclets need to hold enough space to include the PSPSym, at the
1500 // same offset from the stack pointer (immediately after the prolog) as it
1501 // resides at in the main function.
1502 UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1504 // Other funclets just need enough stack for outgoing call arguments.
1505 UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1507 // RBP is not included in the callee saved register block. After pushing RBP,
1508 // everything is 16 byte aligned. Everything we allocate before an outgoing
1509 // call must also be 16 byte aligned.
1510 unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1511 // Subtract out the size of the callee saved registers. This is how much stack
1512 // each funclet will allocate.
1513 return FrameSizeMinusRBP - CSSize;
1516 static bool isTailCallOpcode(unsigned Opc) {
1517 return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1518 Opc == X86::TCRETURNmi ||
1519 Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1520 Opc == X86::TCRETURNmi64;
1523 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
1524 MachineBasicBlock &MBB) const {
1525 const MachineFrameInfo &MFI = MF.getFrameInfo();
1526 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1527 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
1528 Optional<unsigned> RetOpcode;
1529 if (MBBI != MBB.end())
1530 RetOpcode = MBBI->getOpcode();
1532 if (MBBI != MBB.end())
1533 DL = MBBI->getDebugLoc();
1534 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1535 const bool Is64BitILP32 = STI.isTarget64BitILP32();
1536 unsigned FramePtr = TRI->getFrameRegister(MF);
1537 unsigned MachineFramePtr =
1538 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1540 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1542 IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
1543 bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1544 MachineBasicBlock *TargetMBB = nullptr;
1546 // Get the number of bytes to allocate from the FrameInfo.
1547 uint64_t StackSize = MFI.getStackSize();
1548 uint64_t MaxAlign = calculateMaxStackAlign(MF);
1549 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1550 uint64_t NumBytes = 0;
1552 if (RetOpcode && *RetOpcode == X86::CATCHRET) {
1553 // SEH shouldn't use catchret.
1554 assert(!isAsynchronousEHPersonality(
1555 classifyEHPersonality(MF.getFunction()->getPersonalityFn())) &&
1556 "SEH should not use CATCHRET");
1558 NumBytes = getWinEHFuncletFrameSize(MF);
1559 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1560 TargetMBB = MBBI->getOperand(0).getMBB();
1563 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1565 .setMIFlag(MachineInstr::FrameDestroy);
1566 } else if (RetOpcode && *RetOpcode == X86::CLEANUPRET) {
1567 NumBytes = getWinEHFuncletFrameSize(MF);
1568 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1569 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1571 .setMIFlag(MachineInstr::FrameDestroy);
1572 } else if (hasFP(MF)) {
1573 // Calculate required stack adjustment.
1574 uint64_t FrameSize = StackSize - SlotSize;
1575 NumBytes = FrameSize - CSSize;
1577 // Callee-saved registers were pushed on stack before the stack was
1579 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1580 NumBytes = alignTo(FrameSize, MaxAlign);
1583 BuildMI(MBB, MBBI, DL,
1584 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
1585 .setMIFlag(MachineInstr::FrameDestroy);
1587 NumBytes = StackSize - CSSize;
1589 uint64_t SEHStackAllocAmt = NumBytes;
1591 MachineBasicBlock::iterator FirstCSPop = MBBI;
1592 // Skip the callee-saved pop instructions.
1593 while (MBBI != MBB.begin()) {
1594 MachineBasicBlock::iterator PI = std::prev(MBBI);
1595 unsigned Opc = PI->getOpcode();
1597 if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1598 if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1599 (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1609 // Fill EAX/RAX with the address of the target block.
1610 unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX;
1611 if (STI.is64Bit()) {
1612 // LEA64r TargetMBB(%rip), %rax
1613 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg)
1620 // MOV32ri $TargetMBB, %eax
1621 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg)
1624 // Record that we've taken the address of TargetMBB and no longer just
1625 // reference it in a terminator.
1626 TargetMBB->setHasAddressTaken();
1629 if (MBBI != MBB.end())
1630 DL = MBBI->getDebugLoc();
1632 // If there is an ADD32ri or SUB32ri of ESP immediately before this
1633 // instruction, merge the two instructions.
1634 if (NumBytes || MFI.hasVarSizedObjects())
1635 NumBytes += mergeSPUpdates(MBB, MBBI, true);
1637 // If dynamic alloca is used, then reset esp to point to the last callee-saved
1638 // slot before popping them off! Same applies for the case, when stack was
1639 // realigned. Don't do this if this was a funclet epilogue, since the funclets
1640 // will not do realignment or dynamic stack allocation.
1641 if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1643 if (TRI->needsStackRealignment(MF))
1645 unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1646 uint64_t LEAAmount =
1647 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1649 // There are only two legal forms of epilogue:
1650 // - add SEHAllocationSize, %rsp
1651 // - lea SEHAllocationSize(%FramePtr), %rsp
1653 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1654 // However, we may use this sequence if we have a frame pointer because the
1655 // effects of the prologue can safely be undone.
1656 if (LEAAmount != 0) {
1657 unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1658 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1659 FramePtr, false, LEAAmount);
1662 unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1663 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1667 } else if (NumBytes) {
1668 // Adjust stack pointer back: ESP += numbytes.
1669 emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1673 // Windows unwinder will not invoke function's exception handler if IP is
1674 // either in prologue or in epilogue. This behavior causes a problem when a
1675 // call immediately precedes an epilogue, because the return address points
1676 // into the epilogue. To cope with that, we insert an epilogue marker here,
1677 // then replace it with a 'nop' if it ends up immediately after a CALL in the
1678 // final emitted code.
1679 if (NeedsWinCFI && MF.hasWinCFI())
1680 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1682 if (!RetOpcode || !isTailCallOpcode(*RetOpcode)) {
1683 // Add the return addr area delta back since we are not tail calling.
1684 int Offset = -1 * X86FI->getTCReturnAddrDelta();
1685 assert(Offset >= 0 && "TCDelta should never be positive");
1687 MBBI = MBB.getFirstTerminator();
1689 // Check for possible merge with preceding ADD instruction.
1690 Offset += mergeSPUpdates(MBB, MBBI, true);
1691 emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true);
1696 int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
1697 unsigned &FrameReg) const {
1698 const MachineFrameInfo &MFI = MF.getFrameInfo();
1700 bool IsFixed = MFI.isFixedObjectIndex(FI);
1701 // We can't calculate offset from frame pointer if the stack is realigned,
1702 // so enforce usage of stack/base pointer. The base pointer is used when we
1703 // have dynamic allocas in addition to dynamic realignment.
1704 if (TRI->hasBasePointer(MF))
1705 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
1706 else if (TRI->needsStackRealignment(MF))
1707 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
1709 FrameReg = TRI->getFrameRegister(MF);
1711 // Offset will hold the offset from the stack pointer at function entry to the
1713 // We need to factor in additional offsets applied during the prologue to the
1714 // frame, base, and stack pointer depending on which is used.
1715 int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1716 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1717 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1718 uint64_t StackSize = MFI.getStackSize();
1719 bool HasFP = hasFP(MF);
1720 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1721 int64_t FPDelta = 0;
1723 if (IsWin64Prologue) {
1724 assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1726 // Calculate required stack adjustment.
1727 uint64_t FrameSize = StackSize - SlotSize;
1728 // If required, include space for extra hidden slot for stashing base pointer.
1729 if (X86FI->getRestoreBasePointer())
1730 FrameSize += SlotSize;
1731 uint64_t NumBytes = FrameSize - CSSize;
1733 uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1734 if (FI && FI == X86FI->getFAIndex())
1735 return -SEHFrameOffset;
1737 // FPDelta is the offset from the "traditional" FP location of the old base
1738 // pointer followed by return address and the location required by the
1739 // restricted Win64 prologue.
1740 // Add FPDelta to all offsets below that go through the frame pointer.
1741 FPDelta = FrameSize - SEHFrameOffset;
1742 assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1743 "FPDelta isn't aligned per the Win64 ABI!");
1747 if (TRI->hasBasePointer(MF)) {
1748 assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1750 // Skip the saved EBP.
1751 return Offset + SlotSize + FPDelta;
1753 assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1754 return Offset + StackSize;
1756 } else if (TRI->needsStackRealignment(MF)) {
1758 // Skip the saved EBP.
1759 return Offset + SlotSize + FPDelta;
1761 assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1762 return Offset + StackSize;
1764 // FIXME: Support tail calls
1767 return Offset + StackSize;
1769 // Skip the saved EBP.
1772 // Skip the RETADDR move area
1773 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1774 if (TailCallReturnAddrDelta < 0)
1775 Offset -= TailCallReturnAddrDelta;
1778 return Offset + FPDelta;
1781 int X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF,
1782 int FI, unsigned &FrameReg,
1783 int Adjustment) const {
1784 const MachineFrameInfo &MFI = MF.getFrameInfo();
1785 FrameReg = TRI->getStackRegister();
1786 return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
1790 X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF,
1791 int FI, unsigned &FrameReg,
1792 bool IgnoreSPUpdates) const {
1794 const MachineFrameInfo &MFI = MF.getFrameInfo();
1795 // Does not include any dynamic realign.
1796 const uint64_t StackSize = MFI.getStackSize();
1797 // LLVM arranges the stack as follows:
1802 // PUSH RBP <-- RBP points here
1804 // ~~~~~~~ <-- possible stack realignment (non-win64)
1807 // ... <-- RSP after prologue points here
1808 // ~~~~~~~ <-- possible stack realignment (win64)
1810 // if (hasVarSizedObjects()):
1811 // ... <-- "base pointer" (ESI/RBX) points here
1813 // ... <-- RSP points here
1815 // Case 1: In the simple case of no stack realignment and no dynamic
1816 // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1817 // with fixed offsets from RSP.
1819 // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1820 // stack objects are addressed with RBP and regular stack objects with RSP.
1822 // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1823 // to address stack arguments for outgoing calls and nothing else. The "base
1824 // pointer" points to local variables, and RBP points to fixed objects.
1826 // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1827 // answer we give is relative to the SP after the prologue, and not the
1828 // SP in the middle of the function.
1830 if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1831 !STI.isTargetWin64())
1832 return getFrameIndexReference(MF, FI, FrameReg);
1834 // If !hasReservedCallFrame the function might have SP adjustement in the
1835 // body. So, even though the offset is statically known, it depends on where
1836 // we are in the function.
1837 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
1838 if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1839 return getFrameIndexReference(MF, FI, FrameReg);
1841 // We don't handle tail calls, and shouldn't be seeing them either.
1842 assert(MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta() >= 0 &&
1843 "we don't handle this case!");
1845 // This is how the math works out:
1847 // %rsp grows (i.e. gets lower) left to right. Each box below is
1848 // one word (eight bytes). Obj0 is the stack slot we're trying to
1851 // ----------------------------------
1852 // | BP | Obj0 | Obj1 | ... | ObjN |
1853 // ----------------------------------
1857 // A is the incoming stack pointer.
1858 // (B - A) is the local area offset (-8 for x86-64) [1]
1859 // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1861 // |(E - B)| is the StackSize (absolute value, positive). For a
1862 // stack that grown down, this works out to be (B - E). [3]
1864 // E is also the value of %rsp after stack has been set up, and we
1865 // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1866 // (C - E) == (C - A) - (B - A) + (B - E)
1867 // { Using [1], [2] and [3] above }
1868 // == getObjectOffset - LocalAreaOffset + StackSize
1870 return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
1873 bool X86FrameLowering::assignCalleeSavedSpillSlots(
1874 MachineFunction &MF, const TargetRegisterInfo *TRI,
1875 std::vector<CalleeSavedInfo> &CSI) const {
1876 MachineFrameInfo &MFI = MF.getFrameInfo();
1877 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1879 unsigned CalleeSavedFrameSize = 0;
1880 int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1883 // emitPrologue always spills frame register the first thing.
1884 SpillSlotOffset -= SlotSize;
1885 MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1887 // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1888 // the frame register, we can delete it from CSI list and not have to worry
1889 // about avoiding it later.
1890 unsigned FPReg = TRI->getFrameRegister(MF);
1891 for (unsigned i = 0; i < CSI.size(); ++i) {
1892 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1893 CSI.erase(CSI.begin() + i);
1899 // Assign slots for GPRs. It increases frame size.
1900 for (unsigned i = CSI.size(); i != 0; --i) {
1901 unsigned Reg = CSI[i - 1].getReg();
1903 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1906 SpillSlotOffset -= SlotSize;
1907 CalleeSavedFrameSize += SlotSize;
1909 int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1910 CSI[i - 1].setFrameIdx(SlotIndex);
1913 X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1915 // Assign slots for XMMs.
1916 for (unsigned i = CSI.size(); i != 0; --i) {
1917 unsigned Reg = CSI[i - 1].getReg();
1918 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1921 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1922 unsigned Size = TRI->getSpillSize(*RC);
1923 unsigned Align = TRI->getSpillAlignment(*RC);
1925 SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
1927 SpillSlotOffset -= Size;
1928 int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
1929 CSI[i - 1].setFrameIdx(SlotIndex);
1930 MFI.ensureMaxAlignment(Align);
1936 bool X86FrameLowering::spillCalleeSavedRegisters(
1937 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
1938 const std::vector<CalleeSavedInfo> &CSI,
1939 const TargetRegisterInfo *TRI) const {
1940 DebugLoc DL = MBB.findDebugLoc(MI);
1942 // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1943 // for us, and there are no XMM CSRs on Win32.
1944 if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1947 // Push GPRs. It increases frame size.
1948 const MachineFunction &MF = *MBB.getParent();
1949 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1950 for (unsigned i = CSI.size(); i != 0; --i) {
1951 unsigned Reg = CSI[i - 1].getReg();
1953 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1956 const MachineRegisterInfo &MRI = MF.getRegInfo();
1957 bool isLiveIn = MRI.isLiveIn(Reg);
1961 // Decide whether we can add a kill flag to the use.
1962 bool CanKill = !isLiveIn;
1963 // Check if any subregister is live-in
1965 for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
1966 if (MRI.isLiveIn(*AReg)) {
1973 // Do not set a kill flag on values that are also marked as live-in. This
1974 // happens with the @llvm-returnaddress intrinsic and with arguments
1975 // passed in callee saved registers.
1976 // Omitting the kill flags is conservatively correct even if the live-in
1977 // is not used after all.
1978 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
1979 .setMIFlag(MachineInstr::FrameSetup);
1982 // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1983 // It can be done by spilling XMMs to stack frame.
1984 for (unsigned i = CSI.size(); i != 0; --i) {
1985 unsigned Reg = CSI[i-1].getReg();
1986 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1988 // Add the callee-saved register as live-in. It's killed at the spill.
1990 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1992 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
1995 MI->setFlag(MachineInstr::FrameSetup);
2002 bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
2003 MachineBasicBlock::iterator MI,
2004 const std::vector<CalleeSavedInfo> &CSI,
2005 const TargetRegisterInfo *TRI) const {
2009 if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
2010 // Don't restore CSRs in 32-bit EH funclets. Matches
2011 // spillCalleeSavedRegisters.
2014 // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
2015 // funclets. emitEpilogue transforms these to normal jumps.
2016 if (MI->getOpcode() == X86::CATCHRET) {
2017 const Function *Func = MBB.getParent()->getFunction();
2018 bool IsSEH = isAsynchronousEHPersonality(
2019 classifyEHPersonality(Func->getPersonalityFn()));
2025 DebugLoc DL = MBB.findDebugLoc(MI);
2027 // Reload XMMs from stack frame.
2028 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2029 unsigned Reg = CSI[i].getReg();
2030 if (X86::GR64RegClass.contains(Reg) ||
2031 X86::GR32RegClass.contains(Reg))
2034 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
2035 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2039 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2040 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2041 unsigned Reg = CSI[i].getReg();
2042 if (!X86::GR64RegClass.contains(Reg) &&
2043 !X86::GR32RegClass.contains(Reg))
2046 BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2047 .setMIFlag(MachineInstr::FrameDestroy);
2052 void X86FrameLowering::determineCalleeSaves(MachineFunction &MF,
2053 BitVector &SavedRegs,
2054 RegScavenger *RS) const {
2055 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2057 MachineFrameInfo &MFI = MF.getFrameInfo();
2059 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2060 int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
2062 if (TailCallReturnAddrDelta < 0) {
2063 // create RETURNADDR area
2072 MFI.CreateFixedObject(-TailCallReturnAddrDelta,
2073 TailCallReturnAddrDelta - SlotSize, true);
2076 // Spill the BasePtr if it's used.
2077 if (TRI->hasBasePointer(MF)) {
2078 SavedRegs.set(TRI->getBaseRegister());
2080 // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
2081 if (MF.hasEHFunclets()) {
2082 int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
2083 X86FI->setHasSEHFramePtrSave(true);
2084 X86FI->setSEHFramePtrSaveIndex(FI);
2090 HasNestArgument(const MachineFunction *MF) {
2091 const Function *F = MF->getFunction();
2092 for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
2094 if (I->hasNestAttr())
2100 /// GetScratchRegister - Get a temp register for performing work in the
2101 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2102 /// and the properties of the function either one or two registers will be
2103 /// needed. Set primary to true for the first register, false for the second.
2105 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2106 CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv();
2109 if (CallingConvention == CallingConv::HiPE) {
2111 return Primary ? X86::R14 : X86::R13;
2113 return Primary ? X86::EBX : X86::EDI;
2118 return Primary ? X86::R11 : X86::R12;
2120 return Primary ? X86::R11D : X86::R12D;
2123 bool IsNested = HasNestArgument(&MF);
2125 if (CallingConvention == CallingConv::X86_FastCall ||
2126 CallingConvention == CallingConv::Fast) {
2128 report_fatal_error("Segmented stacks does not support fastcall with "
2129 "nested function.");
2130 return Primary ? X86::EAX : X86::ECX;
2133 return Primary ? X86::EDX : X86::EAX;
2134 return Primary ? X86::ECX : X86::EAX;
2137 // The stack limit in the TCB is set to this many bytes above the actual stack
2139 static const uint64_t kSplitStackAvailable = 256;
2141 void X86FrameLowering::adjustForSegmentedStacks(
2142 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2143 MachineFrameInfo &MFI = MF.getFrameInfo();
2145 unsigned TlsReg, TlsOffset;
2148 // To support shrink-wrapping we would need to insert the new blocks
2149 // at the right place and update the branches to PrologueMBB.
2150 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2152 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2153 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2154 "Scratch register is live-in");
2156 if (MF.getFunction()->isVarArg())
2157 report_fatal_error("Segmented stacks do not support vararg functions.");
2158 if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2159 !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2160 !STI.isTargetDragonFly())
2161 report_fatal_error("Segmented stacks not supported on this platform.");
2163 // Eventually StackSize will be calculated by a link-time pass; which will
2164 // also decide whether checking code needs to be injected into this particular
2166 StackSize = MFI.getStackSize();
2168 // Do not generate a prologue for functions with a stack of size zero
2172 MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2173 MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2174 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2175 bool IsNested = false;
2177 // We need to know if the function has a nest argument only in 64 bit mode.
2179 IsNested = HasNestArgument(&MF);
2181 // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2182 // allocMBB needs to be last (terminating) instruction.
2184 for (const auto &LI : PrologueMBB.liveins()) {
2185 allocMBB->addLiveIn(LI);
2186 checkMBB->addLiveIn(LI);
2190 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2192 MF.push_front(allocMBB);
2193 MF.push_front(checkMBB);
2195 // When the frame size is less than 256 we just compare the stack
2196 // boundary directly to the value of the stack pointer, per gcc.
2197 bool CompareStackPointer = StackSize < kSplitStackAvailable;
2199 // Read the limit off the current stacklet off the stack_guard location.
2201 if (STI.isTargetLinux()) {
2203 TlsOffset = IsLP64 ? 0x70 : 0x40;
2204 } else if (STI.isTargetDarwin()) {
2206 TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2207 } else if (STI.isTargetWin64()) {
2209 TlsOffset = 0x28; // pvArbitrary, reserved for application use
2210 } else if (STI.isTargetFreeBSD()) {
2213 } else if (STI.isTargetDragonFly()) {
2215 TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2217 report_fatal_error("Segmented stacks not supported on this platform.");
2220 if (CompareStackPointer)
2221 ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2223 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2224 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2226 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2227 .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2229 if (STI.isTargetLinux()) {
2232 } else if (STI.isTargetDarwin()) {
2234 TlsOffset = 0x48 + 90*4;
2235 } else if (STI.isTargetWin32()) {
2237 TlsOffset = 0x14; // pvArbitrary, reserved for application use
2238 } else if (STI.isTargetDragonFly()) {
2240 TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2241 } else if (STI.isTargetFreeBSD()) {
2242 report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2244 report_fatal_error("Segmented stacks not supported on this platform.");
2247 if (CompareStackPointer)
2248 ScratchReg = X86::ESP;
2250 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2251 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2253 if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2254 STI.isTargetDragonFly()) {
2255 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2256 .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2257 } else if (STI.isTargetDarwin()) {
2259 // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2260 unsigned ScratchReg2;
2262 if (CompareStackPointer) {
2263 // The primary scratch register is available for holding the TLS offset.
2264 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2265 SaveScratch2 = false;
2267 // Need to use a second register to hold the TLS offset
2268 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2270 // Unfortunately, with fastcc the second scratch register may hold an
2272 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2275 // If Scratch2 is live-in then it needs to be saved.
2276 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2277 "Scratch register is live-in and not saved");
2280 BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2281 .addReg(ScratchReg2, RegState::Kill);
2283 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2285 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2287 .addReg(ScratchReg2).addImm(1).addReg(0)
2292 BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2296 // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2297 // It jumps to normal execution of the function body.
2298 BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2300 // On 32 bit we first push the arguments size and then the frame size. On 64
2301 // bit, we pass the stack frame size in r10 and the argument size in r11.
2303 // Functions with nested arguments use R10, so it needs to be saved across
2304 // the call to _morestack
2306 const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2307 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2308 const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2309 const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2310 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2313 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2315 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2317 BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2318 .addImm(X86FI->getArgumentStackSize());
2320 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2321 .addImm(X86FI->getArgumentStackSize());
2322 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2326 // __morestack is in libgcc
2327 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2328 // Under the large code model, we cannot assume that __morestack lives
2329 // within 2^31 bytes of the call site, so we cannot use pc-relative
2330 // addressing. We cannot perform the call via a temporary register,
2331 // as the rax register may be used to store the static chain, and all
2332 // other suitable registers may be either callee-save or used for
2333 // parameter passing. We cannot use the stack at this point either
2334 // because __morestack manipulates the stack directly.
2336 // To avoid these issues, perform an indirect call via a read-only memory
2337 // location containing the address.
2339 // This solution is not perfect, as it assumes that the .rodata section
2340 // is laid out within 2^31 bytes of each function body, but this seems
2341 // to be sufficient for JIT.
2342 BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2346 .addExternalSymbol("__morestack_addr")
2348 MF.getMMI().setUsesMorestackAddr(true);
2351 BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2352 .addExternalSymbol("__morestack");
2354 BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2355 .addExternalSymbol("__morestack");
2359 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2361 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2363 allocMBB->addSuccessor(&PrologueMBB);
2365 checkMBB->addSuccessor(allocMBB);
2366 checkMBB->addSuccessor(&PrologueMBB);
2368 #ifdef EXPENSIVE_CHECKS
2373 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2374 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2375 /// to fields it needs, through a named metadata node "hipe.literals" containing
2376 /// name-value pairs.
2377 static unsigned getHiPELiteral(
2378 NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2379 for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2380 MDNode *Node = HiPELiteralsMD->getOperand(i);
2381 if (Node->getNumOperands() != 2) continue;
2382 MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2383 ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2384 if (!NodeName || !NodeVal) continue;
2385 ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2386 if (ValConst && NodeName->getString() == LiteralName) {
2387 return ValConst->getZExtValue();
2391 report_fatal_error("HiPE literal " + LiteralName
2392 + " required but not provided");
2395 /// Erlang programs may need a special prologue to handle the stack size they
2396 /// might need at runtime. That is because Erlang/OTP does not implement a C
2397 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2398 /// (for more information see Eric Stenman's Ph.D. thesis:
2399 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2402 /// temp0 = sp - MaxStack
2403 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2407 /// call inc_stack # doubles the stack space
2408 /// temp0 = sp - MaxStack
2409 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2410 void X86FrameLowering::adjustForHiPEPrologue(
2411 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2412 MachineFrameInfo &MFI = MF.getFrameInfo();
2415 // To support shrink-wrapping we would need to insert the new blocks
2416 // at the right place and update the branches to PrologueMBB.
2417 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2419 // HiPE-specific values
2420 NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2421 ->getNamedMetadata("hipe.literals");
2422 if (!HiPELiteralsMD)
2424 "Can't generate HiPE prologue without runtime parameters");
2425 const unsigned HipeLeafWords
2426 = getHiPELiteral(HiPELiteralsMD,
2427 Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2428 const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2429 const unsigned Guaranteed = HipeLeafWords * SlotSize;
2430 unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
2431 MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
2432 unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2434 assert(STI.isTargetLinux() &&
2435 "HiPE prologue is only supported on Linux operating systems.");
2437 // Compute the largest caller's frame that is needed to fit the callees'
2438 // frames. This 'MaxStack' is computed from:
2440 // a) the fixed frame size, which is the space needed for all spilled temps,
2441 // b) outgoing on-stack parameter areas, and
2442 // c) the minimum stack space this function needs to make available for the
2443 // functions it calls (a tunable ABI property).
2444 if (MFI.hasCalls()) {
2445 unsigned MoreStackForCalls = 0;
2447 for (auto &MBB : MF) {
2448 for (auto &MI : MBB) {
2452 // Get callee operand.
2453 const MachineOperand &MO = MI.getOperand(0);
2455 // Only take account of global function calls (no closures etc.).
2459 const Function *F = dyn_cast<Function>(MO.getGlobal());
2463 // Do not update 'MaxStack' for primitive and built-in functions
2464 // (encoded with names either starting with "erlang."/"bif_" or not
2465 // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2466 // "_", such as the BIF "suspend_0") as they are executed on another
2468 if (F->getName().find("erlang.") != StringRef::npos ||
2469 F->getName().find("bif_") != StringRef::npos ||
2470 F->getName().find_first_of("._") == StringRef::npos)
2473 unsigned CalleeStkArity =
2474 F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2475 if (HipeLeafWords - 1 > CalleeStkArity)
2476 MoreStackForCalls = std::max(MoreStackForCalls,
2477 (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2480 MaxStack += MoreStackForCalls;
2483 // If the stack frame needed is larger than the guaranteed then runtime checks
2484 // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2485 if (MaxStack > Guaranteed) {
2486 MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2487 MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2489 for (const auto &LI : PrologueMBB.liveins()) {
2490 stackCheckMBB->addLiveIn(LI);
2491 incStackMBB->addLiveIn(LI);
2494 MF.push_front(incStackMBB);
2495 MF.push_front(stackCheckMBB);
2497 unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2498 unsigned LEAop, CMPop, CALLop;
2499 SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2503 LEAop = X86::LEA64r;
2504 CMPop = X86::CMP64rm;
2505 CALLop = X86::CALL64pcrel32;
2509 LEAop = X86::LEA32r;
2510 CMPop = X86::CMP32rm;
2511 CALLop = X86::CALLpcrel32;
2514 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2515 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2516 "HiPE prologue scratch register is live-in");
2518 // Create new MBB for StackCheck:
2519 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2520 SPReg, false, -MaxStack);
2521 // SPLimitOffset is in a fixed heap location (pointed by BP).
2522 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2523 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2524 BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2526 // Create new MBB for IncStack:
2527 BuildMI(incStackMBB, DL, TII.get(CALLop)).
2528 addExternalSymbol("inc_stack_0");
2529 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2530 SPReg, false, -MaxStack);
2531 addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2532 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2533 BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2535 stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2536 stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2537 incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2538 incStackMBB->addSuccessor(incStackMBB, {1, 100});
2540 #ifdef EXPENSIVE_CHECKS
2545 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2546 MachineBasicBlock::iterator MBBI,
2553 if (Offset % SlotSize)
2556 int NumPops = Offset / SlotSize;
2557 // This is only worth it if we have at most 2 pops.
2558 if (NumPops != 1 && NumPops != 2)
2561 // Handle only the trivial case where the adjustment directly follows
2562 // a call. This is the most common one, anyway.
2563 if (MBBI == MBB.begin())
2565 MachineBasicBlock::iterator Prev = std::prev(MBBI);
2566 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2570 unsigned FoundRegs = 0;
2572 auto RegMask = Prev->getOperand(1);
2575 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2576 // Try to find up to NumPops free registers.
2577 for (auto Candidate : RegClass) {
2579 // Poor man's liveness:
2580 // Since we're immediately after a call, any register that is clobbered
2581 // by the call and not defined by it can be considered dead.
2582 if (!RegMask.clobbersPhysReg(Candidate))
2586 for (const MachineOperand &MO : Prev->implicit_operands()) {
2587 if (MO.isReg() && MO.isDef() &&
2588 TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2597 Regs[FoundRegs++] = Candidate;
2598 if (FoundRegs == (unsigned)NumPops)
2605 // If we found only one free register, but need two, reuse the same one twice.
2606 while (FoundRegs < (unsigned)NumPops)
2607 Regs[FoundRegs++] = Regs[0];
2609 for (int i = 0; i < NumPops; ++i)
2610 BuildMI(MBB, MBBI, DL,
2611 TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2616 MachineBasicBlock::iterator X86FrameLowering::
2617 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
2618 MachineBasicBlock::iterator I) const {
2619 bool reserveCallFrame = hasReservedCallFrame(MF);
2620 unsigned Opcode = I->getOpcode();
2621 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2622 DebugLoc DL = I->getDebugLoc();
2623 uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
2624 uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
2626 auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2628 if (!reserveCallFrame) {
2629 // If the stack pointer can be changed after prologue, turn the
2630 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2631 // adjcallstackdown instruction into 'add ESP, <amt>'
2633 // We need to keep the stack aligned properly. To do this, we round the
2634 // amount of space needed for the outgoing arguments up to the next
2635 // alignment boundary.
2636 unsigned StackAlign = getStackAlignment();
2637 Amount = alignTo(Amount, StackAlign);
2639 MachineModuleInfo &MMI = MF.getMMI();
2640 const Function *Fn = MF.getFunction();
2641 bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2642 bool DwarfCFI = !WindowsCFI &&
2643 (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
2645 // If we have any exception handlers in this function, and we adjust
2646 // the SP before calls, we may need to indicate this to the unwinder
2647 // using GNU_ARGS_SIZE. Note that this may be necessary even when
2648 // Amount == 0, because the preceding function may have set a non-0
2650 // TODO: We don't need to reset this between subsequent functions,
2651 // if it didn't change.
2652 bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2654 if (HasDwarfEHHandlers && !isDestroy &&
2655 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences())
2656 BuildCFI(MBB, InsertPos, DL,
2657 MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2662 // Factor out the amount that gets handled inside the sequence
2663 // (Pushes of argument for frame setup, callee pops for frame destroy)
2664 Amount -= InternalAmt;
2666 // TODO: This is needed only if we require precise CFA.
2667 // If this is a callee-pop calling convention, emit a CFA adjust for
2668 // the amount the callee popped.
2669 if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2670 BuildCFI(MBB, InsertPos, DL,
2671 MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2673 // Add Amount to SP to destroy a frame, or subtract to setup.
2674 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2675 int64_t CfaAdjustment = -StackAdjustment;
2677 if (StackAdjustment) {
2678 // Merge with any previous or following adjustment instruction. Note: the
2679 // instructions merged with here do not have CFI, so their stack
2680 // adjustments do not feed into CfaAdjustment.
2681 StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2682 StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2684 if (StackAdjustment) {
2685 if (!(Fn->optForMinSize() &&
2686 adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2687 BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2688 /*InEpilogue=*/false);
2692 if (DwarfCFI && !hasFP(MF)) {
2693 // If we don't have FP, but need to generate unwind information,
2694 // we need to set the correct CFA offset after the stack adjustment.
2695 // How much we adjust the CFA offset depends on whether we're emitting
2696 // CFI only for EH purposes or for debugging. EH only requires the CFA
2697 // offset to be correct at each call site, while for debugging we want
2698 // it to be more precise.
2700 // TODO: When not using precise CFA, we also need to adjust for the
2701 // InternalAmt here.
2702 if (CfaAdjustment) {
2703 BuildCFI(MBB, InsertPos, DL,
2704 MCCFIInstruction::createAdjustCfaOffset(nullptr,
2712 if (isDestroy && InternalAmt) {
2713 // If we are performing frame pointer elimination and if the callee pops
2714 // something off the stack pointer, add it back. We do this until we have
2715 // more advanced stack pointer tracking ability.
2716 // We are not tracking the stack pointer adjustment by the callee, so make
2717 // sure we restore the stack pointer immediately after the call, there may
2718 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2719 MachineBasicBlock::iterator CI = I;
2720 MachineBasicBlock::iterator B = MBB.begin();
2721 while (CI != B && !std::prev(CI)->isCall())
2723 BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2729 bool X86FrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
2730 assert(MBB.getParent() && "Block is not attached to a function!");
2731 const MachineFunction &MF = *MBB.getParent();
2732 return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2735 bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
2736 assert(MBB.getParent() && "Block is not attached to a function!");
2738 // Win64 has strict requirements in terms of epilogue and we are
2739 // not taking a chance at messing with them.
2740 // I.e., unless this block is already an exit block, we can't use
2741 // it as an epilogue.
2742 if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2745 if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2748 // If we cannot use LEA to adjust SP, we may need to use ADD, which
2749 // clobbers the EFLAGS. Check that we do not need to preserve it,
2750 // otherwise, conservatively assume this is not
2751 // safe to insert the epilogue here.
2752 return !flagsNeedToBePreservedBeforeTheTerminators(MBB);
2755 bool X86FrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
2756 // If we may need to emit frameless compact unwind information, give
2757 // up as this is currently broken: PR25614.
2758 return (MF.getFunction()->hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2759 // The lowering of segmented stack and HiPE only support entry blocks
2760 // as prologue blocks: PR26107.
2761 // This limitation may be lifted if we fix:
2762 // - adjustForSegmentedStacks
2763 // - adjustForHiPEPrologue
2764 MF.getFunction()->getCallingConv() != CallingConv::HiPE &&
2765 !MF.shouldSplitStack();
2768 MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
2769 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
2770 const DebugLoc &DL, bool RestoreSP) const {
2771 assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2772 assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2773 assert(STI.is32Bit() && !Uses64BitFramePtr &&
2774 "restoring EBP/ESI on non-32-bit target");
2776 MachineFunction &MF = *MBB.getParent();
2777 unsigned FramePtr = TRI->getFrameRegister(MF);
2778 unsigned BasePtr = TRI->getBaseRegister();
2779 WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2780 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2781 MachineFrameInfo &MFI = MF.getFrameInfo();
2783 // FIXME: Don't set FrameSetup flag in catchret case.
2785 int FI = FuncInfo.EHRegNodeFrameIndex;
2786 int EHRegSize = MFI.getObjectSize(FI);
2789 // MOV32rm -EHRegSize(%ebp), %esp
2790 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2791 X86::EBP, true, -EHRegSize)
2792 .setMIFlag(MachineInstr::FrameSetup);
2796 int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2797 int EndOffset = -EHRegOffset - EHRegSize;
2798 FuncInfo.EHRegNodeEndOffset = EndOffset;
2800 if (UsedReg == FramePtr) {
2801 // ADD $offset, %ebp
2802 unsigned ADDri = getADDriOpcode(false, EndOffset);
2803 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2806 .setMIFlag(MachineInstr::FrameSetup)
2809 assert(EndOffset >= 0 &&
2810 "end of registration object above normal EBP position!");
2811 } else if (UsedReg == BasePtr) {
2812 // LEA offset(%ebp), %esi
2813 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2814 FramePtr, false, EndOffset)
2815 .setMIFlag(MachineInstr::FrameSetup);
2816 // MOV32rm SavedEBPOffset(%esi), %ebp
2817 assert(X86FI->getHasSEHFramePtrSave());
2819 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2820 assert(UsedReg == BasePtr);
2821 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2822 UsedReg, true, Offset)
2823 .setMIFlag(MachineInstr::FrameSetup);
2825 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2831 // Struct used by orderFrameObjects to help sort the stack objects.
2832 struct X86FrameSortingObject {
2833 bool IsValid = false; // true if we care about this Object.
2834 unsigned ObjectIndex = 0; // Index of Object into MFI list.
2835 unsigned ObjectSize = 0; // Size of Object in bytes.
2836 unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2837 unsigned ObjectNumUses = 0; // Object static number of uses.
2840 // The comparison function we use for std::sort to order our local
2841 // stack symbols. The current algorithm is to use an estimated
2842 // "density". This takes into consideration the size and number of
2843 // uses each object has in order to roughly minimize code size.
2844 // So, for example, an object of size 16B that is referenced 5 times
2845 // will get higher priority than 4 4B objects referenced 1 time each.
2846 // It's not perfect and we may be able to squeeze a few more bytes out of
2847 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2848 // fringe end can have special consideration, given their size is less
2849 // important, etc.), but the algorithmic complexity grows too much to be
2850 // worth the extra gains we get. This gets us pretty close.
2851 // The final order leaves us with objects with highest priority going
2852 // at the end of our list.
2853 struct X86FrameSortingComparator {
2854 inline bool operator()(const X86FrameSortingObject &A,
2855 const X86FrameSortingObject &B) {
2856 uint64_t DensityAScaled, DensityBScaled;
2858 // For consistency in our comparison, all invalid objects are placed
2859 // at the end. This also allows us to stop walking when we hit the
2860 // first invalid item after it's all sorted.
2866 // The density is calculated by doing :
2867 // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2868 // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2869 // Since this approach may cause inconsistencies in
2870 // the floating point <, >, == comparisons, depending on the floating
2871 // point model with which the compiler was built, we're going
2872 // to scale both sides by multiplying with
2873 // A.ObjectSize * B.ObjectSize. This ends up factoring away
2874 // the division and, with it, the need for any floating point
2876 DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2877 static_cast<uint64_t>(B.ObjectSize);
2878 DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2879 static_cast<uint64_t>(A.ObjectSize);
2881 // If the two densities are equal, prioritize highest alignment
2882 // objects. This allows for similar alignment objects
2883 // to be packed together (given the same density).
2884 // There's room for improvement here, also, since we can pack
2885 // similar alignment (different density) objects next to each
2886 // other to save padding. This will also require further
2887 // complexity/iterations, and the overall gain isn't worth it,
2888 // in general. Something to keep in mind, though.
2889 if (DensityAScaled == DensityBScaled)
2890 return A.ObjectAlignment < B.ObjectAlignment;
2892 return DensityAScaled < DensityBScaled;
2897 // Order the symbols in the local stack.
2898 // We want to place the local stack objects in some sort of sensible order.
2899 // The heuristic we use is to try and pack them according to static number
2900 // of uses and size of object in order to minimize code size.
2901 void X86FrameLowering::orderFrameObjects(
2902 const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2903 const MachineFrameInfo &MFI = MF.getFrameInfo();
2905 // Don't waste time if there's nothing to do.
2906 if (ObjectsToAllocate.empty())
2909 // Create an array of all MFI objects. We won't need all of these
2910 // objects, but we're going to create a full array of them to make
2911 // it easier to index into when we're counting "uses" down below.
2912 // We want to be able to easily/cheaply access an object by simply
2913 // indexing into it, instead of having to search for it every time.
2914 std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
2916 // Walk the objects we care about and mark them as such in our working
2918 for (auto &Obj : ObjectsToAllocate) {
2919 SortingObjects[Obj].IsValid = true;
2920 SortingObjects[Obj].ObjectIndex = Obj;
2921 SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
2923 int ObjectSize = MFI.getObjectSize(Obj);
2924 if (ObjectSize == 0)
2925 // Variable size. Just use 4.
2926 SortingObjects[Obj].ObjectSize = 4;
2928 SortingObjects[Obj].ObjectSize = ObjectSize;
2931 // Count the number of uses for each object.
2932 for (auto &MBB : MF) {
2933 for (auto &MI : MBB) {
2934 if (MI.isDebugValue())
2936 for (const MachineOperand &MO : MI.operands()) {
2937 // Check to see if it's a local stack symbol.
2940 int Index = MO.getIndex();
2941 // Check to see if it falls within our range, and is tagged
2942 // to require ordering.
2943 if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
2944 SortingObjects[Index].IsValid)
2945 SortingObjects[Index].ObjectNumUses++;
2950 // Sort the objects using X86FrameSortingAlgorithm (see its comment for
2952 std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
2953 X86FrameSortingComparator());
2955 // Now modify the original list to represent the final order that
2956 // we want. The order will depend on whether we're going to access them
2957 // from the stack pointer or the frame pointer. For SP, the list should
2958 // end up with the END containing objects that we want with smaller offsets.
2959 // For FP, it should be flipped.
2961 for (auto &Obj : SortingObjects) {
2962 // All invalid items are sorted at the end, so it's safe to stop.
2965 ObjectsToAllocate[i++] = Obj.ObjectIndex;
2968 // Flip it if we're accessing off of the FP.
2969 if (!TRI->needsStackRealignment(MF) && hasFP(MF))
2970 std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
2974 unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const {
2975 // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2976 unsigned Offset = 16;
2977 // RBP is immediately pushed.
2979 // All callee-saved registers are then pushed.
2980 Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2981 // Every funclet allocates enough stack space for the largest outgoing call.
2982 Offset += getWinEHFuncletFrameSize(MF);
2986 void X86FrameLowering::processFunctionBeforeFrameFinalized(
2987 MachineFunction &MF, RegScavenger *RS) const {
2988 // Mark the function as not having WinCFI. We will set it back to true in
2989 // emitPrologue if it gets called and emits CFI.
2990 MF.setHasWinCFI(false);
2992 // If this function isn't doing Win64-style C++ EH, we don't need to do
2994 const Function *Fn = MF.getFunction();
2995 if (!STI.is64Bit() || !MF.hasEHFunclets() ||
2996 classifyEHPersonality(Fn->getPersonalityFn()) != EHPersonality::MSVC_CXX)
2999 // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
3000 // relative to RSP after the prologue. Find the offset of the last fixed
3001 // object, so that we can allocate a slot immediately following it. If there
3002 // were no fixed objects, use offset -SlotSize, which is immediately after the
3003 // return address. Fixed objects have negative frame indices.
3004 MachineFrameInfo &MFI = MF.getFrameInfo();
3005 WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
3006 int64_t MinFixedObjOffset = -SlotSize;
3007 for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
3008 MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
3010 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
3011 for (WinEHHandlerType &H : TBME.HandlerArray) {
3012 int FrameIndex = H.CatchObj.FrameIndex;
3013 if (FrameIndex != INT_MAX) {
3014 // Ensure alignment.
3015 unsigned Align = MFI.getObjectAlignment(FrameIndex);
3016 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
3017 MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
3018 MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
3023 // Ensure alignment.
3024 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
3025 int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
3027 MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
3028 EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
3030 // Store -2 into UnwindHelp on function entry. We have to scan forwards past
3031 // other frame setup instructions.
3032 MachineBasicBlock &MBB = MF.front();
3033 auto MBBI = MBB.begin();
3034 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
3037 DebugLoc DL = MBB.findDebugLoc(MBBI);
3038 addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),