1 //===-- X86FrameLowering.cpp - X86 Frame Information ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the X86 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "X86FrameLowering.h"
15 #include "X86InstrBuilder.h"
16 #include "X86InstrInfo.h"
17 #include "X86MachineFunctionInfo.h"
18 #include "X86Subtarget.h"
19 #include "X86TargetMachine.h"
20 #include "llvm/ADT/SmallSet.h"
21 #include "llvm/Analysis/EHPersonalities.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/CodeGen/MachineFunction.h"
24 #include "llvm/CodeGen/MachineInstrBuilder.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/CodeGen/WinEHFuncInfo.h"
28 #include "llvm/IR/DataLayout.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/Support/Debug.h"
38 X86FrameLowering::X86FrameLowering(const X86Subtarget &STI,
39 unsigned StackAlignOverride)
40 : TargetFrameLowering(StackGrowsDown, StackAlignOverride,
41 STI.is64Bit() ? -8 : -4),
42 STI(STI), TII(*STI.getInstrInfo()), TRI(STI.getRegisterInfo()) {
43 // Cache a bunch of frame-related predicates for this subtarget.
44 SlotSize = TRI->getSlotSize();
45 Is64Bit = STI.is64Bit();
46 IsLP64 = STI.isTarget64BitLP64();
47 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
48 Uses64BitFramePtr = STI.isTarget64BitLP64() || STI.isTargetNaCl64();
49 StackPtr = TRI->getStackRegister();
52 bool X86FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
53 return !MF.getFrameInfo().hasVarSizedObjects() &&
54 !MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
57 /// canSimplifyCallFramePseudos - If there is a reserved call frame, the
58 /// call frame pseudos can be simplified. Having a FP, as in the default
59 /// implementation, is not sufficient here since we can't always use it.
60 /// Use a more nuanced condition.
62 X86FrameLowering::canSimplifyCallFramePseudos(const MachineFunction &MF) const {
63 return hasReservedCallFrame(MF) ||
64 (hasFP(MF) && !TRI->needsStackRealignment(MF)) ||
65 TRI->hasBasePointer(MF);
68 // needsFrameIndexResolution - Do we need to perform FI resolution for
69 // this function. Normally, this is required only when the function
70 // has any stack objects. However, FI resolution actually has another job,
71 // not apparent from the title - it resolves callframesetup/destroy
72 // that were not simplified earlier.
73 // So, this is required for x86 functions that have push sequences even
74 // when there are no stack objects.
76 X86FrameLowering::needsFrameIndexResolution(const MachineFunction &MF) const {
77 return MF.getFrameInfo().hasStackObjects() ||
78 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences();
81 /// hasFP - Return true if the specified function should have a dedicated frame
82 /// pointer register. This is true if the function has variable sized allocas
83 /// or if frame pointer elimination is disabled.
84 bool X86FrameLowering::hasFP(const MachineFunction &MF) const {
85 const MachineFrameInfo &MFI = MF.getFrameInfo();
86 return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
87 TRI->needsStackRealignment(MF) ||
88 MFI.hasVarSizedObjects() ||
89 MFI.isFrameAddressTaken() || MFI.hasOpaqueSPAdjustment() ||
90 MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
91 MF.callsUnwindInit() || MF.hasEHFunclets() || MF.callsEHReturn() ||
92 MFI.hasStackMap() || MFI.hasPatchPoint() ||
93 MFI.hasCopyImplyingStackAdjustment());
96 static unsigned getSUBriOpcode(unsigned IsLP64, int64_t Imm) {
100 return X86::SUB64ri32;
103 return X86::SUB32ri8;
108 static unsigned getADDriOpcode(unsigned IsLP64, int64_t Imm) {
111 return X86::ADD64ri8;
112 return X86::ADD64ri32;
115 return X86::ADD32ri8;
120 static unsigned getSUBrrOpcode(unsigned isLP64) {
121 return isLP64 ? X86::SUB64rr : X86::SUB32rr;
124 static unsigned getADDrrOpcode(unsigned isLP64) {
125 return isLP64 ? X86::ADD64rr : X86::ADD32rr;
128 static unsigned getANDriOpcode(bool IsLP64, int64_t Imm) {
131 return X86::AND64ri8;
132 return X86::AND64ri32;
135 return X86::AND32ri8;
139 static unsigned getLEArOpcode(unsigned IsLP64) {
140 return IsLP64 ? X86::LEA64r : X86::LEA32r;
143 /// findDeadCallerSavedReg - Return a caller-saved register that isn't live
144 /// when it reaches the "return" instruction. We can then pop a stack object
145 /// to this register without worry about clobbering it.
146 static unsigned findDeadCallerSavedReg(MachineBasicBlock &MBB,
147 MachineBasicBlock::iterator &MBBI,
148 const X86RegisterInfo *TRI,
150 const MachineFunction *MF = MBB.getParent();
151 const Function *F = MF->getFunction();
152 if (!F || MF->callsEHReturn())
155 const TargetRegisterClass &AvailableRegs = *TRI->getGPRsForTailCall(*MF);
157 if (MBBI == MBB.end())
160 switch (MBBI->getOpcode()) {
162 case TargetOpcode::PATCHABLE_RET:
168 case X86::TCRETURNdi:
169 case X86::TCRETURNri:
170 case X86::TCRETURNmi:
171 case X86::TCRETURNdi64:
172 case X86::TCRETURNri64:
173 case X86::TCRETURNmi64:
175 case X86::EH_RETURN64: {
176 SmallSet<uint16_t, 8> Uses;
177 for (unsigned i = 0, e = MBBI->getNumOperands(); i != e; ++i) {
178 MachineOperand &MO = MBBI->getOperand(i);
179 if (!MO.isReg() || MO.isDef())
181 unsigned Reg = MO.getReg();
184 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
188 for (auto CS : AvailableRegs)
189 if (!Uses.count(CS) && CS != X86::RIP)
197 static bool isEAXLiveIn(MachineBasicBlock &MBB) {
198 for (MachineBasicBlock::RegisterMaskPair RegMask : MBB.liveins()) {
199 unsigned Reg = RegMask.PhysReg;
201 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX ||
202 Reg == X86::AH || Reg == X86::AL)
209 /// Check if the flags need to be preserved before the terminators.
210 /// This would be the case, if the eflags is live-in of the region
211 /// composed by the terminators or live-out of that region, without
212 /// being defined by a terminator.
214 flagsNeedToBePreservedBeforeTheTerminators(const MachineBasicBlock &MBB) {
215 for (const MachineInstr &MI : MBB.terminators()) {
216 bool BreakNext = false;
217 for (const MachineOperand &MO : MI.operands()) {
220 unsigned Reg = MO.getReg();
221 if (Reg != X86::EFLAGS)
224 // This terminator needs an eflags that is not defined
225 // by a previous another terminator:
226 // EFLAGS is live-in of the region composed by the terminators.
229 // This terminator defines the eflags, i.e., we don't need to preserve it.
230 // However, we still need to check this specific terminator does not
231 // read a live-in value.
234 // We found a definition of the eflags, no need to preserve them.
239 // None of the terminators use or define the eflags.
240 // Check if they are live-out, that would imply we need to preserve them.
241 for (const MachineBasicBlock *Succ : MBB.successors())
242 if (Succ->isLiveIn(X86::EFLAGS))
248 /// emitSPUpdate - Emit a series of instructions to increment / decrement the
249 /// stack pointer by a constant value.
250 void X86FrameLowering::emitSPUpdate(MachineBasicBlock &MBB,
251 MachineBasicBlock::iterator &MBBI,
252 int64_t NumBytes, bool InEpilogue) const {
253 bool isSub = NumBytes < 0;
254 uint64_t Offset = isSub ? -NumBytes : NumBytes;
255 MachineInstr::MIFlag Flag =
256 isSub ? MachineInstr::FrameSetup : MachineInstr::FrameDestroy;
258 uint64_t Chunk = (1LL << 31) - 1;
259 DebugLoc DL = MBB.findDebugLoc(MBBI);
261 if (Offset > Chunk) {
262 // Rather than emit a long series of instructions for large offsets,
263 // load the offset into a register and do one sub/add
265 unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX);
267 if (isSub && !isEAXLiveIn(MBB))
270 Reg = findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
272 unsigned MovRIOpc = Is64Bit ? X86::MOV64ri : X86::MOV32ri;
273 unsigned AddSubRROpc =
274 isSub ? getSUBrrOpcode(Is64Bit) : getADDrrOpcode(Is64Bit);
276 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Reg)
279 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AddSubRROpc), StackPtr)
282 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
284 } else if (Offset > 8 * Chunk) {
285 // If we would need more than 8 add or sub instructions (a >16GB stack
286 // frame), it's worth spilling RAX to materialize this immediate.
288 // movabsq +-$Offset+-SlotSize, %rax
292 assert(Is64Bit && "can't have 32-bit 16GB stack frame");
293 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH64r))
294 .addReg(Rax, RegState::Kill)
296 // Subtract is not commutative, so negate the offset and always use add.
297 // Subtract 8 less and add 8 more to account for the PUSH we just did.
299 Offset = -(Offset - SlotSize);
301 Offset = Offset + SlotSize;
302 BuildMI(MBB, MBBI, DL, TII.get(MovRIOpc), Rax)
305 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(X86::ADD64rr), Rax)
308 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
309 // Exchange the new SP in RAX with the top of the stack.
311 BuildMI(MBB, MBBI, DL, TII.get(X86::XCHG64rm), Rax).addReg(Rax),
313 // Load new SP from the top of the stack into RSP.
314 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), StackPtr),
321 uint64_t ThisVal = std::min(Offset, Chunk);
322 if (ThisVal == SlotSize) {
323 // Use push / pop for slot sized adjustments as a size optimization. We
324 // need to find a dead register when using pop.
326 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX)
327 : findDeadCallerSavedReg(MBB, MBBI, TRI, Is64Bit);
330 ? (Is64Bit ? X86::PUSH64r : X86::PUSH32r)
331 : (Is64Bit ? X86::POP64r : X86::POP32r);
332 BuildMI(MBB, MBBI, DL, TII.get(Opc))
333 .addReg(Reg, getDefRegState(!isSub) | getUndefRegState(isSub))
340 BuildStackAdjustment(MBB, MBBI, DL, isSub ? -ThisVal : ThisVal, InEpilogue)
347 MachineInstrBuilder X86FrameLowering::BuildStackAdjustment(
348 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
349 const DebugLoc &DL, int64_t Offset, bool InEpilogue) const {
350 assert(Offset != 0 && "zero offset stack adjustment requested");
352 // On Atom, using LEA to adjust SP is preferred, but using it in the epilogue
356 // Check if inserting the prologue at the beginning
357 // of MBB would require to use LEA operations.
358 // We need to use LEA operations if EFLAGS is live in, because
359 // it means an instruction will read it before it gets defined.
360 UseLEA = STI.useLeaForSP() || MBB.isLiveIn(X86::EFLAGS);
362 // If we can use LEA for SP but we shouldn't, check that none
363 // of the terminators uses the eflags. Otherwise we will insert
364 // a ADD that will redefine the eflags and break the condition.
365 // Alternatively, we could move the ADD, but this may not be possible
366 // and is an optimization anyway.
367 UseLEA = canUseLEAForSPInEpilogue(*MBB.getParent());
368 if (UseLEA && !STI.useLeaForSP())
369 UseLEA = flagsNeedToBePreservedBeforeTheTerminators(MBB);
370 // If that assert breaks, that means we do not do the right thing
371 // in canUseAsEpilogue.
372 assert((UseLEA || !flagsNeedToBePreservedBeforeTheTerminators(MBB)) &&
373 "We shouldn't have allowed this insertion point");
376 MachineInstrBuilder MI;
378 MI = addRegOffset(BuildMI(MBB, MBBI, DL,
379 TII.get(getLEArOpcode(Uses64BitFramePtr)),
381 StackPtr, false, Offset);
383 bool IsSub = Offset < 0;
384 uint64_t AbsOffset = IsSub ? -Offset : Offset;
385 unsigned Opc = IsSub ? getSUBriOpcode(Uses64BitFramePtr, AbsOffset)
386 : getADDriOpcode(Uses64BitFramePtr, AbsOffset);
387 MI = BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
390 MI->getOperand(3).setIsDead(); // The EFLAGS implicit def is dead.
395 int X86FrameLowering::mergeSPUpdates(MachineBasicBlock &MBB,
396 MachineBasicBlock::iterator &MBBI,
397 bool doMergeWithPrevious) const {
398 if ((doMergeWithPrevious && MBBI == MBB.begin()) ||
399 (!doMergeWithPrevious && MBBI == MBB.end()))
402 MachineBasicBlock::iterator PI = doMergeWithPrevious ? std::prev(MBBI) : MBBI;
403 MachineBasicBlock::iterator NI = doMergeWithPrevious ? nullptr
405 PI = skipDebugInstructionsBackward(PI, MBB.begin());
407 NI = skipDebugInstructionsForward(NI, MBB.end());
409 unsigned Opc = PI->getOpcode();
412 if (!doMergeWithPrevious && NI != MBB.end() &&
413 NI->getOpcode() == TargetOpcode::CFI_INSTRUCTION) {
414 // Don't merge with the next instruction if it has CFI.
418 if ((Opc == X86::ADD64ri32 || Opc == X86::ADD64ri8 ||
419 Opc == X86::ADD32ri || Opc == X86::ADD32ri8) &&
420 PI->getOperand(0).getReg() == StackPtr){
421 assert(PI->getOperand(1).getReg() == StackPtr);
422 Offset += PI->getOperand(2).getImm();
424 if (!doMergeWithPrevious) MBBI = NI;
425 } else if ((Opc == X86::LEA32r || Opc == X86::LEA64_32r) &&
426 PI->getOperand(0).getReg() == StackPtr &&
427 PI->getOperand(1).getReg() == StackPtr &&
428 PI->getOperand(2).getImm() == 1 &&
429 PI->getOperand(3).getReg() == X86::NoRegister &&
430 PI->getOperand(5).getReg() == X86::NoRegister) {
431 // For LEAs we have: def = lea SP, FI, noreg, Offset, noreg.
432 Offset += PI->getOperand(4).getImm();
434 if (!doMergeWithPrevious) MBBI = NI;
435 } else if ((Opc == X86::SUB64ri32 || Opc == X86::SUB64ri8 ||
436 Opc == X86::SUB32ri || Opc == X86::SUB32ri8) &&
437 PI->getOperand(0).getReg() == StackPtr) {
438 assert(PI->getOperand(1).getReg() == StackPtr);
439 Offset -= PI->getOperand(2).getImm();
441 if (!doMergeWithPrevious) MBBI = NI;
447 void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB,
448 MachineBasicBlock::iterator MBBI,
450 const MCCFIInstruction &CFIInst) const {
451 MachineFunction &MF = *MBB.getParent();
452 unsigned CFIIndex = MF.addFrameInst(CFIInst);
453 BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
454 .addCFIIndex(CFIIndex);
457 void X86FrameLowering::emitCalleeSavedFrameMoves(
458 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
459 const DebugLoc &DL) const {
460 MachineFunction &MF = *MBB.getParent();
461 MachineFrameInfo &MFI = MF.getFrameInfo();
462 MachineModuleInfo &MMI = MF.getMMI();
463 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
465 // Add callee saved registers to move list.
466 const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
467 if (CSI.empty()) return;
469 // Calculate offsets.
470 for (std::vector<CalleeSavedInfo>::const_iterator
471 I = CSI.begin(), E = CSI.end(); I != E; ++I) {
472 int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
473 unsigned Reg = I->getReg();
475 unsigned DwarfReg = MRI->getDwarfRegNum(Reg, true);
476 BuildCFI(MBB, MBBI, DL,
477 MCCFIInstruction::createOffset(nullptr, DwarfReg, Offset));
481 void X86FrameLowering::emitStackProbe(MachineFunction &MF,
482 MachineBasicBlock &MBB,
483 MachineBasicBlock::iterator MBBI,
484 const DebugLoc &DL, bool InProlog) const {
485 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
486 if (STI.isTargetWindowsCoreCLR()) {
488 emitStackProbeInlineStub(MF, MBB, MBBI, DL, true);
490 emitStackProbeInline(MF, MBB, MBBI, DL, false);
493 emitStackProbeCall(MF, MBB, MBBI, DL, InProlog);
497 void X86FrameLowering::inlineStackProbe(MachineFunction &MF,
498 MachineBasicBlock &PrologMBB) const {
499 const StringRef ChkStkStubSymbol = "__chkstk_stub";
500 MachineInstr *ChkStkStub = nullptr;
502 for (MachineInstr &MI : PrologMBB) {
503 if (MI.isCall() && MI.getOperand(0).isSymbol() &&
504 ChkStkStubSymbol == MI.getOperand(0).getSymbolName()) {
510 if (ChkStkStub != nullptr) {
511 assert(!ChkStkStub->isBundled() &&
512 "Not expecting bundled instructions here");
513 MachineBasicBlock::iterator MBBI = std::next(ChkStkStub->getIterator());
514 assert(std::prev(MBBI) == ChkStkStub &&
515 "MBBI expected after __chkstk_stub.");
516 DebugLoc DL = PrologMBB.findDebugLoc(MBBI);
517 emitStackProbeInline(MF, PrologMBB, MBBI, DL, true);
518 ChkStkStub->eraseFromParent();
522 void X86FrameLowering::emitStackProbeInline(MachineFunction &MF,
523 MachineBasicBlock &MBB,
524 MachineBasicBlock::iterator MBBI,
526 bool InProlog) const {
527 const X86Subtarget &STI = MF.getSubtarget<X86Subtarget>();
528 assert(STI.is64Bit() && "different expansion needed for 32 bit");
529 assert(STI.isTargetWindowsCoreCLR() && "custom expansion expects CoreCLR");
530 const TargetInstrInfo &TII = *STI.getInstrInfo();
531 const BasicBlock *LLVM_BB = MBB.getBasicBlock();
533 // RAX contains the number of bytes of desired stack adjustment.
534 // The handling here assumes this value has already been updated so as to
535 // maintain stack alignment.
537 // We need to exit with RSP modified by this amount and execute suitable
538 // page touches to notify the OS that we're growing the stack responsibly.
539 // All stack probing must be done without modifying RSP.
545 // Flags, TestReg = CopyReg - SizeReg
546 // FinalReg = !Flags.Ovf ? TestReg : ZeroReg
547 // LimitReg = gs magic thread env access
548 // if FinalReg >= LimitReg goto ContinueMBB
550 // RoundReg = page address of FinalReg
552 // LoopReg = PHI(LimitReg,ProbeReg)
553 // ProbeReg = LoopReg - PageSize
555 // if (ProbeReg > RoundReg) goto LoopMBB
558 // [rest of original MBB]
560 // Set up the new basic blocks
561 MachineBasicBlock *RoundMBB = MF.CreateMachineBasicBlock(LLVM_BB);
562 MachineBasicBlock *LoopMBB = MF.CreateMachineBasicBlock(LLVM_BB);
563 MachineBasicBlock *ContinueMBB = MF.CreateMachineBasicBlock(LLVM_BB);
565 MachineFunction::iterator MBBIter = std::next(MBB.getIterator());
566 MF.insert(MBBIter, RoundMBB);
567 MF.insert(MBBIter, LoopMBB);
568 MF.insert(MBBIter, ContinueMBB);
570 // Split MBB and move the tail portion down to ContinueMBB.
571 MachineBasicBlock::iterator BeforeMBBI = std::prev(MBBI);
572 ContinueMBB->splice(ContinueMBB->begin(), &MBB, MBBI, MBB.end());
573 ContinueMBB->transferSuccessorsAndUpdatePHIs(&MBB);
575 // Some useful constants
576 const int64_t ThreadEnvironmentStackLimit = 0x10;
577 const int64_t PageSize = 0x1000;
578 const int64_t PageMask = ~(PageSize - 1);
580 // Registers we need. For the normal case we use virtual
581 // registers. For the prolog expansion we use RAX, RCX and RDX.
582 MachineRegisterInfo &MRI = MF.getRegInfo();
583 const TargetRegisterClass *RegClass = &X86::GR64RegClass;
584 const unsigned SizeReg = InProlog ? (unsigned)X86::RAX
585 : MRI.createVirtualRegister(RegClass),
586 ZeroReg = InProlog ? (unsigned)X86::RCX
587 : MRI.createVirtualRegister(RegClass),
588 CopyReg = InProlog ? (unsigned)X86::RDX
589 : MRI.createVirtualRegister(RegClass),
590 TestReg = InProlog ? (unsigned)X86::RDX
591 : MRI.createVirtualRegister(RegClass),
592 FinalReg = InProlog ? (unsigned)X86::RDX
593 : MRI.createVirtualRegister(RegClass),
594 RoundedReg = InProlog ? (unsigned)X86::RDX
595 : MRI.createVirtualRegister(RegClass),
596 LimitReg = InProlog ? (unsigned)X86::RCX
597 : MRI.createVirtualRegister(RegClass),
598 JoinReg = InProlog ? (unsigned)X86::RCX
599 : MRI.createVirtualRegister(RegClass),
600 ProbeReg = InProlog ? (unsigned)X86::RCX
601 : MRI.createVirtualRegister(RegClass);
603 // SP-relative offsets where we can save RCX and RDX.
604 int64_t RCXShadowSlot = 0;
605 int64_t RDXShadowSlot = 0;
607 // If inlining in the prolog, save RCX and RDX.
608 // Future optimization: don't save or restore if not live in.
610 // Compute the offsets. We need to account for things already
611 // pushed onto the stack at this point: return address, frame
612 // pointer (if used), and callee saves.
613 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
614 const int64_t CalleeSaveSize = X86FI->getCalleeSavedFrameSize();
615 const bool HasFP = hasFP(MF);
616 RCXShadowSlot = 8 + CalleeSaveSize + (HasFP ? 8 : 0);
617 RDXShadowSlot = RCXShadowSlot + 8;
619 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
622 addRegOffset(BuildMI(&MBB, DL, TII.get(X86::MOV64mr)), X86::RSP, false,
626 // Not in the prolog. Copy RAX to a virtual reg.
627 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX);
630 // Add code to MBB to check for overflow and set the new target stack pointer
632 BuildMI(&MBB, DL, TII.get(X86::XOR64rr), ZeroReg)
633 .addReg(ZeroReg, RegState::Undef)
634 .addReg(ZeroReg, RegState::Undef);
635 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), CopyReg).addReg(X86::RSP);
636 BuildMI(&MBB, DL, TII.get(X86::SUB64rr), TestReg)
639 BuildMI(&MBB, DL, TII.get(X86::CMOVB64rr), FinalReg)
643 // FinalReg now holds final stack pointer value, or zero if
644 // allocation would overflow. Compare against the current stack
645 // limit from the thread environment block. Note this limit is the
646 // lowest touched page on the stack, not the point at which the OS
647 // will cause an overflow exception, so this is just an optimization
648 // to avoid unnecessarily touching pages that are below the current
649 // SP but already committed to the stack by the OS.
650 BuildMI(&MBB, DL, TII.get(X86::MOV64rm), LimitReg)
654 .addImm(ThreadEnvironmentStackLimit)
656 BuildMI(&MBB, DL, TII.get(X86::CMP64rr)).addReg(FinalReg).addReg(LimitReg);
657 // Jump if the desired stack pointer is at or above the stack limit.
658 BuildMI(&MBB, DL, TII.get(X86::JAE_1)).addMBB(ContinueMBB);
660 // Add code to roundMBB to round the final stack pointer to a page boundary.
661 BuildMI(RoundMBB, DL, TII.get(X86::AND64ri32), RoundedReg)
664 BuildMI(RoundMBB, DL, TII.get(X86::JMP_1)).addMBB(LoopMBB);
666 // LimitReg now holds the current stack limit, RoundedReg page-rounded
667 // final RSP value. Add code to loopMBB to decrement LimitReg page-by-page
668 // and probe until we reach RoundedReg.
670 BuildMI(LoopMBB, DL, TII.get(X86::PHI), JoinReg)
677 addRegOffset(BuildMI(LoopMBB, DL, TII.get(X86::LEA64r), ProbeReg), JoinReg,
680 // Probe by storing a byte onto the stack.
681 BuildMI(LoopMBB, DL, TII.get(X86::MOV8mi))
688 BuildMI(LoopMBB, DL, TII.get(X86::CMP64rr))
691 BuildMI(LoopMBB, DL, TII.get(X86::JNE_1)).addMBB(LoopMBB);
693 MachineBasicBlock::iterator ContinueMBBI = ContinueMBB->getFirstNonPHI();
695 // If in prolog, restore RDX and RCX.
697 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
699 X86::RSP, false, RCXShadowSlot);
700 addRegOffset(BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::MOV64rm),
702 X86::RSP, false, RDXShadowSlot);
705 // Now that the probing is done, add code to continueMBB to update
706 // the stack pointer for real.
707 BuildMI(*ContinueMBB, ContinueMBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
711 // Add the control flow edges we need.
712 MBB.addSuccessor(ContinueMBB);
713 MBB.addSuccessor(RoundMBB);
714 RoundMBB->addSuccessor(LoopMBB);
715 LoopMBB->addSuccessor(ContinueMBB);
716 LoopMBB->addSuccessor(LoopMBB);
718 // Mark all the instructions added to the prolog as frame setup.
720 for (++BeforeMBBI; BeforeMBBI != MBB.end(); ++BeforeMBBI) {
721 BeforeMBBI->setFlag(MachineInstr::FrameSetup);
723 for (MachineInstr &MI : *RoundMBB) {
724 MI.setFlag(MachineInstr::FrameSetup);
726 for (MachineInstr &MI : *LoopMBB) {
727 MI.setFlag(MachineInstr::FrameSetup);
729 for (MachineBasicBlock::iterator CMBBI = ContinueMBB->begin();
730 CMBBI != ContinueMBBI; ++CMBBI) {
731 CMBBI->setFlag(MachineInstr::FrameSetup);
735 // Possible TODO: physreg liveness for InProlog case.
738 void X86FrameLowering::emitStackProbeCall(MachineFunction &MF,
739 MachineBasicBlock &MBB,
740 MachineBasicBlock::iterator MBBI,
742 bool InProlog) const {
743 bool IsLargeCodeModel = MF.getTarget().getCodeModel() == CodeModel::Large;
747 CallOp = IsLargeCodeModel ? X86::CALL64r : X86::CALL64pcrel32;
749 CallOp = X86::CALLpcrel32;
753 if (STI.isTargetCygMing()) {
754 Symbol = "___chkstk_ms";
758 } else if (STI.isTargetCygMing())
763 MachineInstrBuilder CI;
764 MachineBasicBlock::iterator ExpansionMBBI = std::prev(MBBI);
766 // All current stack probes take AX and SP as input, clobber flags, and
767 // preserve all registers. x86_64 probes leave RSP unmodified.
768 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
769 // For the large code model, we have to call through a register. Use R11,
770 // as it is scratch in all supported calling conventions.
771 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::R11)
772 .addExternalSymbol(Symbol);
773 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addReg(X86::R11);
775 CI = BuildMI(MBB, MBBI, DL, TII.get(CallOp)).addExternalSymbol(Symbol);
778 unsigned AX = Is64Bit ? X86::RAX : X86::EAX;
779 unsigned SP = Is64Bit ? X86::RSP : X86::ESP;
780 CI.addReg(AX, RegState::Implicit)
781 .addReg(SP, RegState::Implicit)
782 .addReg(AX, RegState::Define | RegState::Implicit)
783 .addReg(SP, RegState::Define | RegState::Implicit)
784 .addReg(X86::EFLAGS, RegState::Define | RegState::Implicit);
787 // MSVC x64's __chkstk and cygwin/mingw's ___chkstk_ms do not adjust %rsp
788 // themselves. It also does not clobber %rax so we can reuse it when
790 BuildMI(MBB, MBBI, DL, TII.get(X86::SUB64rr), X86::RSP)
796 // Apply the frame setup flag to all inserted instrs.
797 for (++ExpansionMBBI; ExpansionMBBI != MBBI; ++ExpansionMBBI)
798 ExpansionMBBI->setFlag(MachineInstr::FrameSetup);
802 void X86FrameLowering::emitStackProbeInlineStub(
803 MachineFunction &MF, MachineBasicBlock &MBB,
804 MachineBasicBlock::iterator MBBI, const DebugLoc &DL, bool InProlog) const {
806 assert(InProlog && "ChkStkStub called outside prolog!");
808 BuildMI(MBB, MBBI, DL, TII.get(X86::CALLpcrel32))
809 .addExternalSymbol("__chkstk_stub");
812 static unsigned calculateSetFPREG(uint64_t SPAdjust) {
813 // Win64 ABI has a less restrictive limitation of 240; 128 works equally well
814 // and might require smaller successive adjustments.
815 const uint64_t Win64MaxSEHOffset = 128;
816 uint64_t SEHFrameOffset = std::min(SPAdjust, Win64MaxSEHOffset);
817 // Win64 ABI requires 16-byte alignment for the UWOP_SET_FPREG opcode.
818 return SEHFrameOffset & -16;
821 // If we're forcing a stack realignment we can't rely on just the frame
822 // info, we need to know the ABI stack alignment as well in case we
823 // have a call out. Otherwise just make sure we have some alignment - we'll
824 // go with the minimum SlotSize.
825 uint64_t X86FrameLowering::calculateMaxStackAlign(const MachineFunction &MF) const {
826 const MachineFrameInfo &MFI = MF.getFrameInfo();
827 uint64_t MaxAlign = MFI.getMaxAlignment(); // Desired stack alignment.
828 unsigned StackAlign = getStackAlignment();
829 if (MF.getFunction()->hasFnAttribute("stackrealign")) {
831 MaxAlign = (StackAlign > MaxAlign) ? StackAlign : MaxAlign;
832 else if (MaxAlign < SlotSize)
838 void X86FrameLowering::BuildStackAlignAND(MachineBasicBlock &MBB,
839 MachineBasicBlock::iterator MBBI,
840 const DebugLoc &DL, unsigned Reg,
841 uint64_t MaxAlign) const {
842 uint64_t Val = -MaxAlign;
843 unsigned AndOp = getANDriOpcode(Uses64BitFramePtr, Val);
844 MachineInstr *MI = BuildMI(MBB, MBBI, DL, TII.get(AndOp), Reg)
847 .setMIFlag(MachineInstr::FrameSetup);
849 // The EFLAGS implicit def is dead.
850 MI->getOperand(3).setIsDead();
853 /// emitPrologue - Push callee-saved registers onto the stack, which
854 /// automatically adjust the stack pointer. Adjust the stack pointer to allocate
855 /// space for local variables. Also emit labels used by the exception handler to
856 /// generate the exception handling frames.
859 Here's a gist of what gets emitted:
861 ; Establish frame pointer, if needed
864 .cfi_def_cfa_offset 16
865 .cfi_offset %rbp, -16
868 .cfi_def_cfa_register %rbp
870 ; Spill general-purpose registers
871 [for all callee-saved GPRs]
874 .cfi_def_cfa_offset (offset from RETADDR)
877 ; If the required stack alignment > default stack alignment
878 ; rsp needs to be re-aligned. This creates a "re-alignment gap"
879 ; of unknown size in the stack frame.
880 [if stack needs re-alignment]
883 ; Allocate space for locals
884 [if target is Windows and allocated space > 4096 bytes]
885 ; Windows needs special care for allocations larger
888 call ___chkstk_ms/___chkstk
894 .seh_stackalloc (size of XMM spill slots)
895 .seh_setframe %rbp, SEHFrameOffset ; = size of all spill slots
900 ; Note, that while only Windows 64 ABI specifies XMMs as callee-preserved,
901 ; they may get spilled on any platform, if the current function
902 ; calls @llvm.eh.unwind.init
904 [for all callee-saved XMM registers]
905 movaps %<xmm reg>, -MMM(%rbp)
906 [for all callee-saved XMM registers]
907 .seh_savexmm %<xmm reg>, (-MMM + SEHFrameOffset)
908 ; i.e. the offset relative to (%rbp - SEHFrameOffset)
910 [for all callee-saved XMM registers]
911 movaps %<xmm reg>, KKK(%rsp)
912 [for all callee-saved XMM registers]
913 .seh_savexmm %<xmm reg>, KKK
917 [if needs base pointer]
919 [if needs to restore base pointer]
924 [for all callee-saved registers]
925 .cfi_offset %<reg>, (offset from %rbp)
927 .cfi_def_cfa_offset (offset from RETADDR)
928 [for all callee-saved registers]
929 .cfi_offset %<reg>, (offset from %rsp)
932 - .seh directives are emitted only for Windows 64 ABI
933 - .cfi directives are emitted for all other ABIs
934 - for 32-bit code, substitute %e?? registers for %r??
937 void X86FrameLowering::emitPrologue(MachineFunction &MF,
938 MachineBasicBlock &MBB) const {
939 assert(&STI == &MF.getSubtarget<X86Subtarget>() &&
940 "MF used frame lowering for wrong subtarget");
941 MachineBasicBlock::iterator MBBI = MBB.begin();
942 MachineFrameInfo &MFI = MF.getFrameInfo();
943 const Function *Fn = MF.getFunction();
944 MachineModuleInfo &MMI = MF.getMMI();
945 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
946 uint64_t MaxAlign = calculateMaxStackAlign(MF); // Desired stack alignment.
947 uint64_t StackSize = MFI.getStackSize(); // Number of bytes to allocate.
948 bool IsFunclet = MBB.isEHFuncletEntry();
949 EHPersonality Personality = EHPersonality::Unknown;
950 if (Fn->hasPersonalityFn())
951 Personality = classifyEHPersonality(Fn->getPersonalityFn());
952 bool FnHasClrFunclet =
953 MF.hasEHFunclets() && Personality == EHPersonality::CoreCLR;
954 bool IsClrFunclet = IsFunclet && FnHasClrFunclet;
955 bool HasFP = hasFP(MF);
956 bool IsWin64CC = STI.isCallingConvWin64(Fn->getCallingConv());
957 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
958 bool NeedsWinCFI = IsWin64Prologue && Fn->needsUnwindTableEntry();
960 !IsWin64Prologue && (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
961 unsigned FramePtr = TRI->getFrameRegister(MF);
962 const unsigned MachineFramePtr =
963 STI.isTarget64BitILP32()
964 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
965 unsigned BasePtr = TRI->getBaseRegister();
966 bool HasWinCFI = false;
968 // Debug location must be unknown since the first debug location is used
969 // to determine the end of the prologue.
972 // Add RETADDR move area to callee saved frame size.
973 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
974 if (TailCallReturnAddrDelta && IsWin64Prologue)
975 report_fatal_error("Can't handle guaranteed tail call under win64 yet");
977 if (TailCallReturnAddrDelta < 0)
978 X86FI->setCalleeSavedFrameSize(
979 X86FI->getCalleeSavedFrameSize() - TailCallReturnAddrDelta);
981 bool UseStackProbe = (STI.isOSWindows() && !STI.isTargetMachO());
983 // The default stack probe size is 4096 if the function has no stackprobesize
985 unsigned StackProbeSize = 4096;
986 if (Fn->hasFnAttribute("stack-probe-size"))
987 Fn->getFnAttribute("stack-probe-size")
989 .getAsInteger(0, StackProbeSize);
991 // Re-align the stack on 64-bit if the x86-interrupt calling convention is
992 // used and an error code was pushed, since the x86-64 ABI requires a 16-byte
994 if (Fn->getCallingConv() == CallingConv::X86_INTR && Is64Bit &&
995 Fn->arg_size() == 2) {
997 MFI.setStackSize(StackSize);
998 emitSPUpdate(MBB, MBBI, -8, /*InEpilogue=*/false);
1001 // If this is x86-64 and the Red Zone is not disabled, if we are a leaf
1002 // function, and use up to 128 bytes of stack space, don't have a frame
1003 // pointer, calls, or dynamic alloca then we do not need to adjust the
1004 // stack pointer (we fit in the Red Zone). We also check that we don't
1005 // push and pop from the stack.
1006 if (Is64Bit && !Fn->hasFnAttribute(Attribute::NoRedZone) &&
1007 !TRI->needsStackRealignment(MF) &&
1008 !MFI.hasVarSizedObjects() && // No dynamic alloca.
1009 !MFI.adjustsStack() && // No calls.
1010 !IsWin64CC && // Win64 has no Red Zone
1011 !MFI.hasCopyImplyingStackAdjustment() && // Don't push and pop.
1012 !MF.shouldSplitStack()) { // Regular stack
1013 uint64_t MinSize = X86FI->getCalleeSavedFrameSize();
1014 if (HasFP) MinSize += SlotSize;
1015 X86FI->setUsesRedZone(MinSize > 0 || StackSize > 0);
1016 StackSize = std::max(MinSize, StackSize > 128 ? StackSize - 128 : 0);
1017 MFI.setStackSize(StackSize);
1020 // Insert stack pointer adjustment for later moving of return addr. Only
1021 // applies to tail call optimized functions where the callee argument stack
1022 // size is bigger than the callers.
1023 if (TailCallReturnAddrDelta < 0) {
1024 BuildStackAdjustment(MBB, MBBI, DL, TailCallReturnAddrDelta,
1025 /*InEpilogue=*/false)
1026 .setMIFlag(MachineInstr::FrameSetup);
1029 // Mapping for machine moves:
1031 // DST: VirtualFP AND
1032 // SRC: VirtualFP => DW_CFA_def_cfa_offset
1033 // ELSE => DW_CFA_def_cfa
1035 // SRC: VirtualFP AND
1036 // DST: Register => DW_CFA_def_cfa_register
1039 // OFFSET < 0 => DW_CFA_offset_extended_sf
1040 // REG < 64 => DW_CFA_offset + Reg
1041 // ELSE => DW_CFA_offset_extended
1043 uint64_t NumBytes = 0;
1044 int stackGrowth = -SlotSize;
1046 // Find the funclet establisher parameter
1047 unsigned Establisher = X86::NoRegister;
1049 Establisher = Uses64BitFramePtr ? X86::RCX : X86::ECX;
1051 Establisher = Uses64BitFramePtr ? X86::RDX : X86::EDX;
1053 if (IsWin64Prologue && IsFunclet && !IsClrFunclet) {
1054 // Immediately spill establisher into the home slot.
1055 // The runtime cares about this.
1056 // MOV64mr %rdx, 16(%rsp)
1057 unsigned MOVmr = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1058 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(MOVmr)), StackPtr, true, 16)
1059 .addReg(Establisher)
1060 .setMIFlag(MachineInstr::FrameSetup);
1061 MBB.addLiveIn(Establisher);
1065 // Calculate required stack adjustment.
1066 uint64_t FrameSize = StackSize - SlotSize;
1067 // If required, include space for extra hidden slot for stashing base pointer.
1068 if (X86FI->getRestoreBasePointer())
1069 FrameSize += SlotSize;
1071 NumBytes = FrameSize - X86FI->getCalleeSavedFrameSize();
1073 // Callee-saved registers are pushed on stack before the stack is realigned.
1074 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1075 NumBytes = alignTo(NumBytes, MaxAlign);
1077 // Get the offset of the stack slot for the EBP register, which is
1078 // guaranteed to be the last slot by processFunctionBeforeFrameFinalized.
1079 // Update the frame offset adjustment.
1081 MFI.setOffsetAdjustment(-NumBytes);
1083 assert(MFI.getOffsetAdjustment() == -(int)NumBytes &&
1084 "should calculate same local variable offset for funclets");
1086 // Save EBP/RBP into the appropriate stack slot.
1087 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
1088 .addReg(MachineFramePtr, RegState::Kill)
1089 .setMIFlag(MachineInstr::FrameSetup);
1091 if (NeedsDwarfCFI) {
1092 // Mark the place where EBP/RBP was saved.
1093 // Define the current CFA rule to use the provided offset.
1095 BuildCFI(MBB, MBBI, DL,
1096 MCCFIInstruction::createDefCfaOffset(nullptr, 2 * stackGrowth));
1098 // Change the rule for the FramePtr to be an "offset" rule.
1099 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1100 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset(
1101 nullptr, DwarfFramePtr, 2 * stackGrowth));
1106 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
1108 .setMIFlag(MachineInstr::FrameSetup);
1111 if (!IsWin64Prologue && !IsFunclet) {
1112 // Update EBP with the new base value.
1113 BuildMI(MBB, MBBI, DL,
1114 TII.get(Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr),
1117 .setMIFlag(MachineInstr::FrameSetup);
1119 if (NeedsDwarfCFI) {
1120 // Mark effective beginning of when frame pointer becomes valid.
1121 // Define the current CFA to use the EBP/RBP register.
1122 unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
1123 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaRegister(
1124 nullptr, DwarfFramePtr));
1128 // Mark the FramePtr as live-in in every block. Don't do this again for
1129 // funclet prologues.
1131 for (MachineBasicBlock &EveryMBB : MF)
1132 EveryMBB.addLiveIn(MachineFramePtr);
1135 assert(!IsFunclet && "funclets without FPs not yet implemented");
1136 NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
1139 // For EH funclets, only allocate enough space for outgoing calls. Save the
1140 // NumBytes value that we would've used for the parent frame.
1141 unsigned ParentFrameNumBytes = NumBytes;
1143 NumBytes = getWinEHFuncletFrameSize(MF);
1145 // Skip the callee-saved push instructions.
1146 bool PushedRegs = false;
1147 int StackOffset = 2 * stackGrowth;
1149 while (MBBI != MBB.end() &&
1150 MBBI->getFlag(MachineInstr::FrameSetup) &&
1151 (MBBI->getOpcode() == X86::PUSH32r ||
1152 MBBI->getOpcode() == X86::PUSH64r)) {
1154 unsigned Reg = MBBI->getOperand(0).getReg();
1157 if (!HasFP && NeedsDwarfCFI) {
1158 // Mark callee-saved push instruction.
1159 // Define the current CFA rule to use the provided offset.
1161 BuildCFI(MBB, MBBI, DL,
1162 MCCFIInstruction::createDefCfaOffset(nullptr, StackOffset));
1163 StackOffset += stackGrowth;
1168 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg)).addImm(Reg).setMIFlag(
1169 MachineInstr::FrameSetup);
1173 // Realign stack after we pushed callee-saved registers (so that we'll be
1174 // able to calculate their offsets from the frame pointer).
1175 // Don't do this for Win64, it needs to realign the stack after the prologue.
1176 if (!IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF)) {
1177 assert(HasFP && "There should be a frame pointer if stack is realigned.");
1178 BuildStackAlignAND(MBB, MBBI, DL, StackPtr, MaxAlign);
1181 // If there is an SUB32ri of ESP immediately before this instruction, merge
1182 // the two. This can be the case when tail call elimination is enabled and
1183 // the callee has more arguments then the caller.
1184 NumBytes -= mergeSPUpdates(MBB, MBBI, true);
1186 // Adjust stack pointer: ESP -= numbytes.
1188 // Windows and cygwin/mingw require a prologue helper routine when allocating
1189 // more than 4K bytes on the stack. Windows uses __chkstk and cygwin/mingw
1190 // uses __alloca. __alloca and the 32-bit version of __chkstk will probe the
1191 // stack and adjust the stack pointer in one go. The 64-bit version of
1192 // __chkstk is only responsible for probing the stack. The 64-bit prologue is
1193 // responsible for adjusting the stack pointer. Touching the stack at 4K
1194 // increments is necessary to ensure that the guard pages used by the OS
1195 // virtual memory manager are allocated in correct sequence.
1196 uint64_t AlignedNumBytes = NumBytes;
1197 if (IsWin64Prologue && !IsFunclet && TRI->needsStackRealignment(MF))
1198 AlignedNumBytes = alignTo(AlignedNumBytes, MaxAlign);
1199 if (AlignedNumBytes >= StackProbeSize && UseStackProbe) {
1200 // Check whether EAX is livein for this block.
1201 bool isEAXAlive = isEAXLiveIn(MBB);
1204 // Sanity check that EAX is not livein for this function.
1205 // It should not be, so throw an assert.
1206 assert(!Is64Bit && "EAX is livein in x64 case!");
1209 BuildMI(MBB, MBBI, DL, TII.get(X86::PUSH32r))
1210 .addReg(X86::EAX, RegState::Kill)
1211 .setMIFlag(MachineInstr::FrameSetup);
1215 // Handle the 64-bit Windows ABI case where we need to call __chkstk.
1216 // Function prologue is responsible for adjusting the stack pointer.
1217 if (isUInt<32>(NumBytes)) {
1218 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1220 .setMIFlag(MachineInstr::FrameSetup);
1221 } else if (isInt<32>(NumBytes)) {
1222 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX)
1224 .setMIFlag(MachineInstr::FrameSetup);
1226 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX)
1228 .setMIFlag(MachineInstr::FrameSetup);
1231 // Allocate NumBytes-4 bytes on stack in case of isEAXAlive.
1232 // We'll also use 4 already allocated bytes for EAX.
1233 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32ri), X86::EAX)
1234 .addImm(isEAXAlive ? NumBytes - 4 : NumBytes)
1235 .setMIFlag(MachineInstr::FrameSetup);
1238 // Call __chkstk, __chkstk_ms, or __alloca.
1239 emitStackProbe(MF, MBB, MBBI, DL, true);
1244 addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV32rm), X86::EAX),
1245 StackPtr, false, NumBytes - 4);
1246 MI->setFlag(MachineInstr::FrameSetup);
1247 MBB.insert(MBBI, MI);
1249 } else if (NumBytes) {
1250 emitSPUpdate(MBB, MBBI, -(int64_t)NumBytes, /*InEpilogue=*/false);
1253 if (NeedsWinCFI && NumBytes) {
1255 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_StackAlloc))
1257 .setMIFlag(MachineInstr::FrameSetup);
1260 int SEHFrameOffset = 0;
1261 unsigned SPOrEstablisher;
1264 // The establisher parameter passed to a CLR funclet is actually a pointer
1265 // to the (mostly empty) frame of its nearest enclosing funclet; we have
1266 // to find the root function establisher frame by loading the PSPSym from
1267 // the intermediate frame.
1268 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1269 MachinePointerInfo NoInfo;
1270 MBB.addLiveIn(Establisher);
1271 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rm), Establisher),
1272 Establisher, false, PSPSlotOffset)
1273 .addMemOperand(MF.getMachineMemOperand(
1274 NoInfo, MachineMemOperand::MOLoad, SlotSize, SlotSize));
1276 // Save the root establisher back into the current funclet's (mostly
1277 // empty) frame, in case a sub-funclet or the GC needs it.
1278 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr,
1279 false, PSPSlotOffset)
1280 .addReg(Establisher)
1282 MF.getMachineMemOperand(NoInfo, MachineMemOperand::MOStore |
1283 MachineMemOperand::MOVolatile,
1284 SlotSize, SlotSize));
1286 SPOrEstablisher = Establisher;
1288 SPOrEstablisher = StackPtr;
1291 if (IsWin64Prologue && HasFP) {
1292 // Set RBP to a small fixed offset from RSP. In the funclet case, we base
1293 // this calculation on the incoming establisher, which holds the value of
1294 // RSP from the parent frame at the end of the prologue.
1295 SEHFrameOffset = calculateSetFPREG(ParentFrameNumBytes);
1297 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA64r), FramePtr),
1298 SPOrEstablisher, false, SEHFrameOffset);
1300 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64rr), FramePtr)
1301 .addReg(SPOrEstablisher);
1303 // If this is not a funclet, emit the CFI describing our frame pointer.
1304 if (NeedsWinCFI && !IsFunclet) {
1306 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
1308 .addImm(SEHFrameOffset)
1309 .setMIFlag(MachineInstr::FrameSetup);
1310 if (isAsynchronousEHPersonality(Personality))
1311 MF.getWinEHFuncInfo()->SEHSetFrameOffset = SEHFrameOffset;
1313 } else if (IsFunclet && STI.is32Bit()) {
1314 // Reset EBP / ESI to something good for funclets.
1315 MBBI = restoreWin32EHStackPointers(MBB, MBBI, DL);
1316 // If we're a catch funclet, we can be returned to via catchret. Save ESP
1317 // into the registration node so that the runtime will restore it for us.
1318 if (!MBB.isCleanupFuncletEntry()) {
1319 assert(Personality == EHPersonality::MSVC_CXX);
1321 int FI = MF.getWinEHFuncInfo()->EHRegNodeFrameIndex;
1322 int64_t EHRegOffset = getFrameIndexReference(MF, FI, FrameReg);
1323 // ESP is the first field, so no extra displacement is needed.
1324 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32mr)), FrameReg,
1330 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup)) {
1331 const MachineInstr &FrameInstr = *MBBI;
1336 if (unsigned Reg = TII.isStoreToStackSlot(FrameInstr, FI)) {
1337 if (X86::FR64RegClass.contains(Reg)) {
1338 unsigned IgnoredFrameReg;
1339 int Offset = getFrameIndexReference(MF, FI, IgnoredFrameReg);
1340 Offset += SEHFrameOffset;
1343 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SaveXMM))
1346 .setMIFlag(MachineInstr::FrameSetup);
1352 if (NeedsWinCFI && HasWinCFI)
1353 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_EndPrologue))
1354 .setMIFlag(MachineInstr::FrameSetup);
1356 if (FnHasClrFunclet && !IsFunclet) {
1357 // Save the so-called Initial-SP (i.e. the value of the stack pointer
1358 // immediately after the prolog) into the PSPSlot so that funclets
1359 // and the GC can recover it.
1360 unsigned PSPSlotOffset = getPSPSlotOffsetFromSP(MF);
1361 auto PSPInfo = MachinePointerInfo::getFixedStack(
1362 MF, MF.getWinEHFuncInfo()->PSPSymFrameIdx);
1363 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mr)), StackPtr, false,
1366 .addMemOperand(MF.getMachineMemOperand(
1367 PSPInfo, MachineMemOperand::MOStore | MachineMemOperand::MOVolatile,
1368 SlotSize, SlotSize));
1371 // Realign stack after we spilled callee-saved registers (so that we'll be
1372 // able to calculate their offsets from the frame pointer).
1373 // Win64 requires aligning the stack after the prologue.
1374 if (IsWin64Prologue && TRI->needsStackRealignment(MF)) {
1375 assert(HasFP && "There should be a frame pointer if stack is realigned.");
1376 BuildStackAlignAND(MBB, MBBI, DL, SPOrEstablisher, MaxAlign);
1379 // We already dealt with stack realignment and funclets above.
1380 if (IsFunclet && STI.is32Bit())
1383 // If we need a base pointer, set it up here. It's whatever the value
1384 // of the stack pointer is at this point. Any variable size objects
1385 // will be allocated after this, so we can still use the base pointer
1386 // to reference locals.
1387 if (TRI->hasBasePointer(MF)) {
1388 // Update the base pointer with the current stack pointer.
1389 unsigned Opc = Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr;
1390 BuildMI(MBB, MBBI, DL, TII.get(Opc), BasePtr)
1391 .addReg(SPOrEstablisher)
1392 .setMIFlag(MachineInstr::FrameSetup);
1393 if (X86FI->getRestoreBasePointer()) {
1394 // Stash value of base pointer. Saving RSP instead of EBP shortens
1395 // dependence chain. Used by SjLj EH.
1396 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1397 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)),
1398 FramePtr, true, X86FI->getRestoreBasePointerOffset())
1399 .addReg(SPOrEstablisher)
1400 .setMIFlag(MachineInstr::FrameSetup);
1403 if (X86FI->getHasSEHFramePtrSave() && !IsFunclet) {
1404 // Stash the value of the frame pointer relative to the base pointer for
1405 // Win32 EH. This supports Win32 EH, which does the inverse of the above:
1406 // it recovers the frame pointer from the base pointer rather than the
1407 // other way around.
1408 unsigned Opm = Uses64BitFramePtr ? X86::MOV64mr : X86::MOV32mr;
1411 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
1412 assert(UsedReg == BasePtr);
1413 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opm)), UsedReg, true, Offset)
1415 .setMIFlag(MachineInstr::FrameSetup);
1419 if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
1420 // Mark end of stack pointer adjustment.
1421 if (!HasFP && NumBytes) {
1422 // Define the current CFA rule to use the provided offset.
1424 BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createDefCfaOffset(
1425 nullptr, -StackSize + stackGrowth));
1428 // Emit DWARF info specifying the offsets of the callee-saved registers.
1430 emitCalleeSavedFrameMoves(MBB, MBBI, DL);
1433 // X86 Interrupt handling function cannot assume anything about the direction
1434 // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
1435 // in each prologue of interrupt handler function.
1437 // FIXME: Create "cld" instruction only in these cases:
1438 // 1. The interrupt handling function uses any of the "rep" instructions.
1439 // 2. Interrupt handling function calls another function.
1441 if (Fn->getCallingConv() == CallingConv::X86_INTR)
1442 BuildMI(MBB, MBBI, DL, TII.get(X86::CLD))
1443 .setMIFlag(MachineInstr::FrameSetup);
1445 // At this point we know if the function has WinCFI or not.
1446 MF.setHasWinCFI(HasWinCFI);
1449 bool X86FrameLowering::canUseLEAForSPInEpilogue(
1450 const MachineFunction &MF) const {
1451 // We can't use LEA instructions for adjusting the stack pointer if we don't
1452 // have a frame pointer in the Win64 ABI. Only ADD instructions may be used
1453 // to deallocate the stack.
1454 // This means that we can use LEA for SP in two situations:
1455 // 1. We *aren't* using the Win64 ABI which means we are free to use LEA.
1456 // 2. We *have* a frame pointer which means we are permitted to use LEA.
1457 return !MF.getTarget().getMCAsmInfo()->usesWindowsCFI() || hasFP(MF);
1460 static bool isFuncletReturnInstr(MachineInstr &MI) {
1461 switch (MI.getOpcode()) {
1463 case X86::CLEANUPRET:
1468 llvm_unreachable("impossible");
1471 // CLR funclets use a special "Previous Stack Pointer Symbol" slot on the
1472 // stack. It holds a pointer to the bottom of the root function frame. The
1473 // establisher frame pointer passed to a nested funclet may point to the
1474 // (mostly empty) frame of its parent funclet, but it will need to find
1475 // the frame of the root function to access locals. To facilitate this,
1476 // every funclet copies the pointer to the bottom of the root function
1477 // frame into a PSPSym slot in its own (mostly empty) stack frame. Using the
1478 // same offset for the PSPSym in the root function frame that's used in the
1479 // funclets' frames allows each funclet to dynamically accept any ancestor
1480 // frame as its establisher argument (the runtime doesn't guarantee the
1481 // immediate parent for some reason lost to history), and also allows the GC,
1482 // which uses the PSPSym for some bookkeeping, to find it in any funclet's
1483 // frame with only a single offset reported for the entire method.
1485 X86FrameLowering::getPSPSlotOffsetFromSP(const MachineFunction &MF) const {
1486 const WinEHFuncInfo &Info = *MF.getWinEHFuncInfo();
1488 int Offset = getFrameIndexReferencePreferSP(MF, Info.PSPSymFrameIdx, SPReg,
1489 /*IgnoreSPUpdates*/ true);
1490 assert(Offset >= 0 && SPReg == TRI->getStackRegister());
1491 return static_cast<unsigned>(Offset);
1495 X86FrameLowering::getWinEHFuncletFrameSize(const MachineFunction &MF) const {
1496 // This is the size of the pushed CSRs.
1498 MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
1499 // This is the amount of stack a funclet needs to allocate.
1501 EHPersonality Personality =
1502 classifyEHPersonality(MF.getFunction()->getPersonalityFn());
1503 if (Personality == EHPersonality::CoreCLR) {
1504 // CLR funclets need to hold enough space to include the PSPSym, at the
1505 // same offset from the stack pointer (immediately after the prolog) as it
1506 // resides at in the main function.
1507 UsedSize = getPSPSlotOffsetFromSP(MF) + SlotSize;
1509 // Other funclets just need enough stack for outgoing call arguments.
1510 UsedSize = MF.getFrameInfo().getMaxCallFrameSize();
1512 // RBP is not included in the callee saved register block. After pushing RBP,
1513 // everything is 16 byte aligned. Everything we allocate before an outgoing
1514 // call must also be 16 byte aligned.
1515 unsigned FrameSizeMinusRBP = alignTo(CSSize + UsedSize, getStackAlignment());
1516 // Subtract out the size of the callee saved registers. This is how much stack
1517 // each funclet will allocate.
1518 return FrameSizeMinusRBP - CSSize;
1521 static bool isTailCallOpcode(unsigned Opc) {
1522 return Opc == X86::TCRETURNri || Opc == X86::TCRETURNdi ||
1523 Opc == X86::TCRETURNmi ||
1524 Opc == X86::TCRETURNri64 || Opc == X86::TCRETURNdi64 ||
1525 Opc == X86::TCRETURNmi64;
1528 void X86FrameLowering::emitEpilogue(MachineFunction &MF,
1529 MachineBasicBlock &MBB) const {
1530 const MachineFrameInfo &MFI = MF.getFrameInfo();
1531 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1532 MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
1533 Optional<unsigned> RetOpcode;
1534 if (MBBI != MBB.end())
1535 RetOpcode = MBBI->getOpcode();
1537 if (MBBI != MBB.end())
1538 DL = MBBI->getDebugLoc();
1539 // standard x86_64 and NaCl use 64-bit frame/stack pointers, x32 - 32-bit.
1540 const bool Is64BitILP32 = STI.isTarget64BitILP32();
1541 unsigned FramePtr = TRI->getFrameRegister(MF);
1542 unsigned MachineFramePtr =
1543 Is64BitILP32 ? getX86SubSuperRegister(FramePtr, 64) : FramePtr;
1545 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1547 IsWin64Prologue && MF.getFunction()->needsUnwindTableEntry();
1548 bool IsFunclet = MBBI == MBB.end() ? false : isFuncletReturnInstr(*MBBI);
1549 MachineBasicBlock *TargetMBB = nullptr;
1551 // Get the number of bytes to allocate from the FrameInfo.
1552 uint64_t StackSize = MFI.getStackSize();
1553 uint64_t MaxAlign = calculateMaxStackAlign(MF);
1554 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1555 uint64_t NumBytes = 0;
1557 if (RetOpcode && *RetOpcode == X86::CATCHRET) {
1558 // SEH shouldn't use catchret.
1559 assert(!isAsynchronousEHPersonality(
1560 classifyEHPersonality(MF.getFunction()->getPersonalityFn())) &&
1561 "SEH should not use CATCHRET");
1563 NumBytes = getWinEHFuncletFrameSize(MF);
1564 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1565 TargetMBB = MBBI->getOperand(0).getMBB();
1568 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1570 .setMIFlag(MachineInstr::FrameDestroy);
1571 } else if (RetOpcode && *RetOpcode == X86::CLEANUPRET) {
1572 NumBytes = getWinEHFuncletFrameSize(MF);
1573 assert(hasFP(MF) && "EH funclets without FP not yet implemented");
1574 BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::POP64r : X86::POP32r),
1576 .setMIFlag(MachineInstr::FrameDestroy);
1577 } else if (hasFP(MF)) {
1578 // Calculate required stack adjustment.
1579 uint64_t FrameSize = StackSize - SlotSize;
1580 NumBytes = FrameSize - CSSize;
1582 // Callee-saved registers were pushed on stack before the stack was
1584 if (TRI->needsStackRealignment(MF) && !IsWin64Prologue)
1585 NumBytes = alignTo(FrameSize, MaxAlign);
1588 BuildMI(MBB, MBBI, DL,
1589 TII.get(Is64Bit ? X86::POP64r : X86::POP32r), MachineFramePtr)
1590 .setMIFlag(MachineInstr::FrameDestroy);
1592 NumBytes = StackSize - CSSize;
1594 uint64_t SEHStackAllocAmt = NumBytes;
1596 MachineBasicBlock::iterator FirstCSPop = MBBI;
1597 // Skip the callee-saved pop instructions.
1598 while (MBBI != MBB.begin()) {
1599 MachineBasicBlock::iterator PI = std::prev(MBBI);
1600 unsigned Opc = PI->getOpcode();
1602 if (Opc != X86::DBG_VALUE && !PI->isTerminator()) {
1603 if ((Opc != X86::POP32r || !PI->getFlag(MachineInstr::FrameDestroy)) &&
1604 (Opc != X86::POP64r || !PI->getFlag(MachineInstr::FrameDestroy)))
1614 // Fill EAX/RAX with the address of the target block.
1615 unsigned ReturnReg = STI.is64Bit() ? X86::RAX : X86::EAX;
1616 if (STI.is64Bit()) {
1617 // LEA64r TargetMBB(%rip), %rax
1618 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::LEA64r), ReturnReg)
1625 // MOV32ri $TargetMBB, %eax
1626 BuildMI(MBB, FirstCSPop, DL, TII.get(X86::MOV32ri), ReturnReg)
1629 // Record that we've taken the address of TargetMBB and no longer just
1630 // reference it in a terminator.
1631 TargetMBB->setHasAddressTaken();
1634 if (MBBI != MBB.end())
1635 DL = MBBI->getDebugLoc();
1637 // If there is an ADD32ri or SUB32ri of ESP immediately before this
1638 // instruction, merge the two instructions.
1639 if (NumBytes || MFI.hasVarSizedObjects())
1640 NumBytes += mergeSPUpdates(MBB, MBBI, true);
1642 // If dynamic alloca is used, then reset esp to point to the last callee-saved
1643 // slot before popping them off! Same applies for the case, when stack was
1644 // realigned. Don't do this if this was a funclet epilogue, since the funclets
1645 // will not do realignment or dynamic stack allocation.
1646 if ((TRI->needsStackRealignment(MF) || MFI.hasVarSizedObjects()) &&
1648 if (TRI->needsStackRealignment(MF))
1650 unsigned SEHFrameOffset = calculateSetFPREG(SEHStackAllocAmt);
1651 uint64_t LEAAmount =
1652 IsWin64Prologue ? SEHStackAllocAmt - SEHFrameOffset : -CSSize;
1654 // There are only two legal forms of epilogue:
1655 // - add SEHAllocationSize, %rsp
1656 // - lea SEHAllocationSize(%FramePtr), %rsp
1658 // 'mov %FramePtr, %rsp' will not be recognized as an epilogue sequence.
1659 // However, we may use this sequence if we have a frame pointer because the
1660 // effects of the prologue can safely be undone.
1661 if (LEAAmount != 0) {
1662 unsigned Opc = getLEArOpcode(Uses64BitFramePtr);
1663 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr),
1664 FramePtr, false, LEAAmount);
1667 unsigned Opc = (Uses64BitFramePtr ? X86::MOV64rr : X86::MOV32rr);
1668 BuildMI(MBB, MBBI, DL, TII.get(Opc), StackPtr)
1672 } else if (NumBytes) {
1673 // Adjust stack pointer back: ESP += numbytes.
1674 emitSPUpdate(MBB, MBBI, NumBytes, /*InEpilogue=*/true);
1678 // Windows unwinder will not invoke function's exception handler if IP is
1679 // either in prologue or in epilogue. This behavior causes a problem when a
1680 // call immediately precedes an epilogue, because the return address points
1681 // into the epilogue. To cope with that, we insert an epilogue marker here,
1682 // then replace it with a 'nop' if it ends up immediately after a CALL in the
1683 // final emitted code.
1684 if (NeedsWinCFI && MF.hasWinCFI())
1685 BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_Epilogue));
1687 if (!RetOpcode || !isTailCallOpcode(*RetOpcode)) {
1688 // Add the return addr area delta back since we are not tail calling.
1689 int Offset = -1 * X86FI->getTCReturnAddrDelta();
1690 assert(Offset >= 0 && "TCDelta should never be positive");
1692 MBBI = MBB.getFirstTerminator();
1694 // Check for possible merge with preceding ADD instruction.
1695 Offset += mergeSPUpdates(MBB, MBBI, true);
1696 emitSPUpdate(MBB, MBBI, Offset, /*InEpilogue=*/true);
1701 int X86FrameLowering::getFrameIndexReference(const MachineFunction &MF, int FI,
1702 unsigned &FrameReg) const {
1703 const MachineFrameInfo &MFI = MF.getFrameInfo();
1705 bool IsFixed = MFI.isFixedObjectIndex(FI);
1706 // We can't calculate offset from frame pointer if the stack is realigned,
1707 // so enforce usage of stack/base pointer. The base pointer is used when we
1708 // have dynamic allocas in addition to dynamic realignment.
1709 if (TRI->hasBasePointer(MF))
1710 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getBaseRegister();
1711 else if (TRI->needsStackRealignment(MF))
1712 FrameReg = IsFixed ? TRI->getFramePtr() : TRI->getStackRegister();
1714 FrameReg = TRI->getFrameRegister(MF);
1716 // Offset will hold the offset from the stack pointer at function entry to the
1718 // We need to factor in additional offsets applied during the prologue to the
1719 // frame, base, and stack pointer depending on which is used.
1720 int Offset = MFI.getObjectOffset(FI) - getOffsetOfLocalArea();
1721 const X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1722 unsigned CSSize = X86FI->getCalleeSavedFrameSize();
1723 uint64_t StackSize = MFI.getStackSize();
1724 bool HasFP = hasFP(MF);
1725 bool IsWin64Prologue = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
1726 int64_t FPDelta = 0;
1728 if (IsWin64Prologue) {
1729 assert(!MFI.hasCalls() || (StackSize % 16) == 8);
1731 // Calculate required stack adjustment.
1732 uint64_t FrameSize = StackSize - SlotSize;
1733 // If required, include space for extra hidden slot for stashing base pointer.
1734 if (X86FI->getRestoreBasePointer())
1735 FrameSize += SlotSize;
1736 uint64_t NumBytes = FrameSize - CSSize;
1738 uint64_t SEHFrameOffset = calculateSetFPREG(NumBytes);
1739 if (FI && FI == X86FI->getFAIndex())
1740 return -SEHFrameOffset;
1742 // FPDelta is the offset from the "traditional" FP location of the old base
1743 // pointer followed by return address and the location required by the
1744 // restricted Win64 prologue.
1745 // Add FPDelta to all offsets below that go through the frame pointer.
1746 FPDelta = FrameSize - SEHFrameOffset;
1747 assert((!MFI.hasCalls() || (FPDelta % 16) == 0) &&
1748 "FPDelta isn't aligned per the Win64 ABI!");
1752 if (TRI->hasBasePointer(MF)) {
1753 assert(HasFP && "VLAs and dynamic stack realign, but no FP?!");
1755 // Skip the saved EBP.
1756 return Offset + SlotSize + FPDelta;
1758 assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1759 return Offset + StackSize;
1761 } else if (TRI->needsStackRealignment(MF)) {
1763 // Skip the saved EBP.
1764 return Offset + SlotSize + FPDelta;
1766 assert((-(Offset + StackSize)) % MFI.getObjectAlignment(FI) == 0);
1767 return Offset + StackSize;
1769 // FIXME: Support tail calls
1772 return Offset + StackSize;
1774 // Skip the saved EBP.
1777 // Skip the RETADDR move area
1778 int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
1779 if (TailCallReturnAddrDelta < 0)
1780 Offset -= TailCallReturnAddrDelta;
1783 return Offset + FPDelta;
1786 int X86FrameLowering::getFrameIndexReferenceSP(const MachineFunction &MF,
1787 int FI, unsigned &FrameReg,
1788 int Adjustment) const {
1789 const MachineFrameInfo &MFI = MF.getFrameInfo();
1790 FrameReg = TRI->getStackRegister();
1791 return MFI.getObjectOffset(FI) - getOffsetOfLocalArea() + Adjustment;
1795 X86FrameLowering::getFrameIndexReferencePreferSP(const MachineFunction &MF,
1796 int FI, unsigned &FrameReg,
1797 bool IgnoreSPUpdates) const {
1799 const MachineFrameInfo &MFI = MF.getFrameInfo();
1800 // Does not include any dynamic realign.
1801 const uint64_t StackSize = MFI.getStackSize();
1802 // LLVM arranges the stack as follows:
1807 // PUSH RBP <-- RBP points here
1809 // ~~~~~~~ <-- possible stack realignment (non-win64)
1812 // ... <-- RSP after prologue points here
1813 // ~~~~~~~ <-- possible stack realignment (win64)
1815 // if (hasVarSizedObjects()):
1816 // ... <-- "base pointer" (ESI/RBX) points here
1818 // ... <-- RSP points here
1820 // Case 1: In the simple case of no stack realignment and no dynamic
1821 // allocas, both "fixed" stack objects (arguments and CSRs) are addressable
1822 // with fixed offsets from RSP.
1824 // Case 2: In the case of stack realignment with no dynamic allocas, fixed
1825 // stack objects are addressed with RBP and regular stack objects with RSP.
1827 // Case 3: In the case of dynamic allocas and stack realignment, RSP is used
1828 // to address stack arguments for outgoing calls and nothing else. The "base
1829 // pointer" points to local variables, and RBP points to fixed objects.
1831 // In cases 2 and 3, we can only answer for non-fixed stack objects, and the
1832 // answer we give is relative to the SP after the prologue, and not the
1833 // SP in the middle of the function.
1835 if (MFI.isFixedObjectIndex(FI) && TRI->needsStackRealignment(MF) &&
1836 !STI.isTargetWin64())
1837 return getFrameIndexReference(MF, FI, FrameReg);
1839 // If !hasReservedCallFrame the function might have SP adjustement in the
1840 // body. So, even though the offset is statically known, it depends on where
1841 // we are in the function.
1842 const TargetFrameLowering *TFI = MF.getSubtarget().getFrameLowering();
1843 if (!IgnoreSPUpdates && !TFI->hasReservedCallFrame(MF))
1844 return getFrameIndexReference(MF, FI, FrameReg);
1846 // We don't handle tail calls, and shouldn't be seeing them either.
1847 assert(MF.getInfo<X86MachineFunctionInfo>()->getTCReturnAddrDelta() >= 0 &&
1848 "we don't handle this case!");
1850 // This is how the math works out:
1852 // %rsp grows (i.e. gets lower) left to right. Each box below is
1853 // one word (eight bytes). Obj0 is the stack slot we're trying to
1856 // ----------------------------------
1857 // | BP | Obj0 | Obj1 | ... | ObjN |
1858 // ----------------------------------
1862 // A is the incoming stack pointer.
1863 // (B - A) is the local area offset (-8 for x86-64) [1]
1864 // (C - A) is the Offset returned by MFI.getObjectOffset for Obj0 [2]
1866 // |(E - B)| is the StackSize (absolute value, positive). For a
1867 // stack that grown down, this works out to be (B - E). [3]
1869 // E is also the value of %rsp after stack has been set up, and we
1870 // want (C - E) -- the value we can add to %rsp to get to Obj0. Now
1871 // (C - E) == (C - A) - (B - A) + (B - E)
1872 // { Using [1], [2] and [3] above }
1873 // == getObjectOffset - LocalAreaOffset + StackSize
1875 return getFrameIndexReferenceSP(MF, FI, FrameReg, StackSize);
1878 bool X86FrameLowering::assignCalleeSavedSpillSlots(
1879 MachineFunction &MF, const TargetRegisterInfo *TRI,
1880 std::vector<CalleeSavedInfo> &CSI) const {
1881 MachineFrameInfo &MFI = MF.getFrameInfo();
1882 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
1884 unsigned CalleeSavedFrameSize = 0;
1885 int SpillSlotOffset = getOffsetOfLocalArea() + X86FI->getTCReturnAddrDelta();
1888 // emitPrologue always spills frame register the first thing.
1889 SpillSlotOffset -= SlotSize;
1890 MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1892 // Since emitPrologue and emitEpilogue will handle spilling and restoring of
1893 // the frame register, we can delete it from CSI list and not have to worry
1894 // about avoiding it later.
1895 unsigned FPReg = TRI->getFrameRegister(MF);
1896 for (unsigned i = 0; i < CSI.size(); ++i) {
1897 if (TRI->regsOverlap(CSI[i].getReg(),FPReg)) {
1898 CSI.erase(CSI.begin() + i);
1904 // Assign slots for GPRs. It increases frame size.
1905 for (unsigned i = CSI.size(); i != 0; --i) {
1906 unsigned Reg = CSI[i - 1].getReg();
1908 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1911 SpillSlotOffset -= SlotSize;
1912 CalleeSavedFrameSize += SlotSize;
1914 int SlotIndex = MFI.CreateFixedSpillStackObject(SlotSize, SpillSlotOffset);
1915 CSI[i - 1].setFrameIdx(SlotIndex);
1918 X86FI->setCalleeSavedFrameSize(CalleeSavedFrameSize);
1920 // Assign slots for XMMs.
1921 for (unsigned i = CSI.size(); i != 0; --i) {
1922 unsigned Reg = CSI[i - 1].getReg();
1923 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1926 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1927 unsigned Size = TRI->getSpillSize(*RC);
1928 unsigned Align = TRI->getSpillAlignment(*RC);
1930 SpillSlotOffset -= std::abs(SpillSlotOffset) % Align;
1932 SpillSlotOffset -= Size;
1933 int SlotIndex = MFI.CreateFixedSpillStackObject(Size, SpillSlotOffset);
1934 CSI[i - 1].setFrameIdx(SlotIndex);
1935 MFI.ensureMaxAlignment(Align);
1941 bool X86FrameLowering::spillCalleeSavedRegisters(
1942 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
1943 const std::vector<CalleeSavedInfo> &CSI,
1944 const TargetRegisterInfo *TRI) const {
1945 DebugLoc DL = MBB.findDebugLoc(MI);
1947 // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI
1948 // for us, and there are no XMM CSRs on Win32.
1949 if (MBB.isEHFuncletEntry() && STI.is32Bit() && STI.isOSWindows())
1952 // Push GPRs. It increases frame size.
1953 const MachineFunction &MF = *MBB.getParent();
1954 unsigned Opc = STI.is64Bit() ? X86::PUSH64r : X86::PUSH32r;
1955 for (unsigned i = CSI.size(); i != 0; --i) {
1956 unsigned Reg = CSI[i - 1].getReg();
1958 if (!X86::GR64RegClass.contains(Reg) && !X86::GR32RegClass.contains(Reg))
1961 const MachineRegisterInfo &MRI = MF.getRegInfo();
1962 bool isLiveIn = MRI.isLiveIn(Reg);
1966 // Decide whether we can add a kill flag to the use.
1967 bool CanKill = !isLiveIn;
1968 // Check if any subregister is live-in
1970 for (MCRegAliasIterator AReg(Reg, TRI, false); AReg.isValid(); ++AReg) {
1971 if (MRI.isLiveIn(*AReg)) {
1978 // Do not set a kill flag on values that are also marked as live-in. This
1979 // happens with the @llvm-returnaddress intrinsic and with arguments
1980 // passed in callee saved registers.
1981 // Omitting the kill flags is conservatively correct even if the live-in
1982 // is not used after all.
1983 BuildMI(MBB, MI, DL, TII.get(Opc)).addReg(Reg, getKillRegState(CanKill))
1984 .setMIFlag(MachineInstr::FrameSetup);
1987 // Make XMM regs spilled. X86 does not have ability of push/pop XMM.
1988 // It can be done by spilling XMMs to stack frame.
1989 for (unsigned i = CSI.size(); i != 0; --i) {
1990 unsigned Reg = CSI[i-1].getReg();
1991 if (X86::GR64RegClass.contains(Reg) || X86::GR32RegClass.contains(Reg))
1993 // Add the callee-saved register as live-in. It's killed at the spill.
1995 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
1997 TII.storeRegToStackSlot(MBB, MI, Reg, true, CSI[i - 1].getFrameIdx(), RC,
2000 MI->setFlag(MachineInstr::FrameSetup);
2007 bool X86FrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
2008 MachineBasicBlock::iterator MI,
2009 const std::vector<CalleeSavedInfo> &CSI,
2010 const TargetRegisterInfo *TRI) const {
2014 if (MI != MBB.end() && isFuncletReturnInstr(*MI) && STI.isOSWindows()) {
2015 // Don't restore CSRs in 32-bit EH funclets. Matches
2016 // spillCalleeSavedRegisters.
2019 // Don't restore CSRs before an SEH catchret. SEH except blocks do not form
2020 // funclets. emitEpilogue transforms these to normal jumps.
2021 if (MI->getOpcode() == X86::CATCHRET) {
2022 const Function *Func = MBB.getParent()->getFunction();
2023 bool IsSEH = isAsynchronousEHPersonality(
2024 classifyEHPersonality(Func->getPersonalityFn()));
2030 DebugLoc DL = MBB.findDebugLoc(MI);
2032 // Reload XMMs from stack frame.
2033 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2034 unsigned Reg = CSI[i].getReg();
2035 if (X86::GR64RegClass.contains(Reg) ||
2036 X86::GR32RegClass.contains(Reg))
2039 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg);
2040 TII.loadRegFromStackSlot(MBB, MI, Reg, CSI[i].getFrameIdx(), RC, TRI);
2044 unsigned Opc = STI.is64Bit() ? X86::POP64r : X86::POP32r;
2045 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
2046 unsigned Reg = CSI[i].getReg();
2047 if (!X86::GR64RegClass.contains(Reg) &&
2048 !X86::GR32RegClass.contains(Reg))
2051 BuildMI(MBB, MI, DL, TII.get(Opc), Reg)
2052 .setMIFlag(MachineInstr::FrameDestroy);
2057 void X86FrameLowering::determineCalleeSaves(MachineFunction &MF,
2058 BitVector &SavedRegs,
2059 RegScavenger *RS) const {
2060 TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
2062 MachineFrameInfo &MFI = MF.getFrameInfo();
2064 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2065 int64_t TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
2067 if (TailCallReturnAddrDelta < 0) {
2068 // create RETURNADDR area
2077 MFI.CreateFixedObject(-TailCallReturnAddrDelta,
2078 TailCallReturnAddrDelta - SlotSize, true);
2081 // Spill the BasePtr if it's used.
2082 if (TRI->hasBasePointer(MF)) {
2083 SavedRegs.set(TRI->getBaseRegister());
2085 // Allocate a spill slot for EBP if we have a base pointer and EH funclets.
2086 if (MF.hasEHFunclets()) {
2087 int FI = MFI.CreateSpillStackObject(SlotSize, SlotSize);
2088 X86FI->setHasSEHFramePtrSave(true);
2089 X86FI->setSEHFramePtrSaveIndex(FI);
2095 HasNestArgument(const MachineFunction *MF) {
2096 const Function *F = MF->getFunction();
2097 for (Function::const_arg_iterator I = F->arg_begin(), E = F->arg_end();
2099 if (I->hasNestAttr())
2105 /// GetScratchRegister - Get a temp register for performing work in the
2106 /// segmented stack and the Erlang/HiPE stack prologue. Depending on platform
2107 /// and the properties of the function either one or two registers will be
2108 /// needed. Set primary to true for the first register, false for the second.
2110 GetScratchRegister(bool Is64Bit, bool IsLP64, const MachineFunction &MF, bool Primary) {
2111 CallingConv::ID CallingConvention = MF.getFunction()->getCallingConv();
2114 if (CallingConvention == CallingConv::HiPE) {
2116 return Primary ? X86::R14 : X86::R13;
2118 return Primary ? X86::EBX : X86::EDI;
2123 return Primary ? X86::R11 : X86::R12;
2125 return Primary ? X86::R11D : X86::R12D;
2128 bool IsNested = HasNestArgument(&MF);
2130 if (CallingConvention == CallingConv::X86_FastCall ||
2131 CallingConvention == CallingConv::Fast) {
2133 report_fatal_error("Segmented stacks does not support fastcall with "
2134 "nested function.");
2135 return Primary ? X86::EAX : X86::ECX;
2138 return Primary ? X86::EDX : X86::EAX;
2139 return Primary ? X86::ECX : X86::EAX;
2142 // The stack limit in the TCB is set to this many bytes above the actual stack
2144 static const uint64_t kSplitStackAvailable = 256;
2146 void X86FrameLowering::adjustForSegmentedStacks(
2147 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2148 MachineFrameInfo &MFI = MF.getFrameInfo();
2150 unsigned TlsReg, TlsOffset;
2153 // To support shrink-wrapping we would need to insert the new blocks
2154 // at the right place and update the branches to PrologueMBB.
2155 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2157 unsigned ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2158 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2159 "Scratch register is live-in");
2161 if (MF.getFunction()->isVarArg())
2162 report_fatal_error("Segmented stacks do not support vararg functions.");
2163 if (!STI.isTargetLinux() && !STI.isTargetDarwin() && !STI.isTargetWin32() &&
2164 !STI.isTargetWin64() && !STI.isTargetFreeBSD() &&
2165 !STI.isTargetDragonFly())
2166 report_fatal_error("Segmented stacks not supported on this platform.");
2168 // Eventually StackSize will be calculated by a link-time pass; which will
2169 // also decide whether checking code needs to be injected into this particular
2171 StackSize = MFI.getStackSize();
2173 // Do not generate a prologue for functions with a stack of size zero
2177 MachineBasicBlock *allocMBB = MF.CreateMachineBasicBlock();
2178 MachineBasicBlock *checkMBB = MF.CreateMachineBasicBlock();
2179 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2180 bool IsNested = false;
2182 // We need to know if the function has a nest argument only in 64 bit mode.
2184 IsNested = HasNestArgument(&MF);
2186 // The MOV R10, RAX needs to be in a different block, since the RET we emit in
2187 // allocMBB needs to be last (terminating) instruction.
2189 for (const auto &LI : PrologueMBB.liveins()) {
2190 allocMBB->addLiveIn(LI);
2191 checkMBB->addLiveIn(LI);
2195 allocMBB->addLiveIn(IsLP64 ? X86::R10 : X86::R10D);
2197 MF.push_front(allocMBB);
2198 MF.push_front(checkMBB);
2200 // When the frame size is less than 256 we just compare the stack
2201 // boundary directly to the value of the stack pointer, per gcc.
2202 bool CompareStackPointer = StackSize < kSplitStackAvailable;
2204 // Read the limit off the current stacklet off the stack_guard location.
2206 if (STI.isTargetLinux()) {
2208 TlsOffset = IsLP64 ? 0x70 : 0x40;
2209 } else if (STI.isTargetDarwin()) {
2211 TlsOffset = 0x60 + 90*8; // See pthread_machdep.h. Steal TLS slot 90.
2212 } else if (STI.isTargetWin64()) {
2214 TlsOffset = 0x28; // pvArbitrary, reserved for application use
2215 } else if (STI.isTargetFreeBSD()) {
2218 } else if (STI.isTargetDragonFly()) {
2220 TlsOffset = 0x20; // use tls_tcb.tcb_segstack
2222 report_fatal_error("Segmented stacks not supported on this platform.");
2225 if (CompareStackPointer)
2226 ScratchReg = IsLP64 ? X86::RSP : X86::ESP;
2228 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::LEA64r : X86::LEA64_32r), ScratchReg).addReg(X86::RSP)
2229 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2231 BuildMI(checkMBB, DL, TII.get(IsLP64 ? X86::CMP64rm : X86::CMP32rm)).addReg(ScratchReg)
2232 .addReg(0).addImm(1).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2234 if (STI.isTargetLinux()) {
2237 } else if (STI.isTargetDarwin()) {
2239 TlsOffset = 0x48 + 90*4;
2240 } else if (STI.isTargetWin32()) {
2242 TlsOffset = 0x14; // pvArbitrary, reserved for application use
2243 } else if (STI.isTargetDragonFly()) {
2245 TlsOffset = 0x10; // use tls_tcb.tcb_segstack
2246 } else if (STI.isTargetFreeBSD()) {
2247 report_fatal_error("Segmented stacks not supported on FreeBSD i386.");
2249 report_fatal_error("Segmented stacks not supported on this platform.");
2252 if (CompareStackPointer)
2253 ScratchReg = X86::ESP;
2255 BuildMI(checkMBB, DL, TII.get(X86::LEA32r), ScratchReg).addReg(X86::ESP)
2256 .addImm(1).addReg(0).addImm(-StackSize).addReg(0);
2258 if (STI.isTargetLinux() || STI.isTargetWin32() || STI.isTargetWin64() ||
2259 STI.isTargetDragonFly()) {
2260 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm)).addReg(ScratchReg)
2261 .addReg(0).addImm(0).addReg(0).addImm(TlsOffset).addReg(TlsReg);
2262 } else if (STI.isTargetDarwin()) {
2264 // TlsOffset doesn't fit into a mod r/m byte so we need an extra register.
2265 unsigned ScratchReg2;
2267 if (CompareStackPointer) {
2268 // The primary scratch register is available for holding the TLS offset.
2269 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2270 SaveScratch2 = false;
2272 // Need to use a second register to hold the TLS offset
2273 ScratchReg2 = GetScratchRegister(Is64Bit, IsLP64, MF, false);
2275 // Unfortunately, with fastcc the second scratch register may hold an
2277 SaveScratch2 = MF.getRegInfo().isLiveIn(ScratchReg2);
2280 // If Scratch2 is live-in then it needs to be saved.
2281 assert((!MF.getRegInfo().isLiveIn(ScratchReg2) || SaveScratch2) &&
2282 "Scratch register is live-in and not saved");
2285 BuildMI(checkMBB, DL, TII.get(X86::PUSH32r))
2286 .addReg(ScratchReg2, RegState::Kill);
2288 BuildMI(checkMBB, DL, TII.get(X86::MOV32ri), ScratchReg2)
2290 BuildMI(checkMBB, DL, TII.get(X86::CMP32rm))
2292 .addReg(ScratchReg2).addImm(1).addReg(0)
2297 BuildMI(checkMBB, DL, TII.get(X86::POP32r), ScratchReg2);
2301 // This jump is taken if SP >= (Stacklet Limit + Stack Space required).
2302 // It jumps to normal execution of the function body.
2303 BuildMI(checkMBB, DL, TII.get(X86::JA_1)).addMBB(&PrologueMBB);
2305 // On 32 bit we first push the arguments size and then the frame size. On 64
2306 // bit, we pass the stack frame size in r10 and the argument size in r11.
2308 // Functions with nested arguments use R10, so it needs to be saved across
2309 // the call to _morestack
2311 const unsigned RegAX = IsLP64 ? X86::RAX : X86::EAX;
2312 const unsigned Reg10 = IsLP64 ? X86::R10 : X86::R10D;
2313 const unsigned Reg11 = IsLP64 ? X86::R11 : X86::R11D;
2314 const unsigned MOVrr = IsLP64 ? X86::MOV64rr : X86::MOV32rr;
2315 const unsigned MOVri = IsLP64 ? X86::MOV64ri : X86::MOV32ri;
2318 BuildMI(allocMBB, DL, TII.get(MOVrr), RegAX).addReg(Reg10);
2320 BuildMI(allocMBB, DL, TII.get(MOVri), Reg10)
2322 BuildMI(allocMBB, DL, TII.get(MOVri), Reg11)
2323 .addImm(X86FI->getArgumentStackSize());
2325 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2326 .addImm(X86FI->getArgumentStackSize());
2327 BuildMI(allocMBB, DL, TII.get(X86::PUSHi32))
2331 // __morestack is in libgcc
2332 if (Is64Bit && MF.getTarget().getCodeModel() == CodeModel::Large) {
2333 // Under the large code model, we cannot assume that __morestack lives
2334 // within 2^31 bytes of the call site, so we cannot use pc-relative
2335 // addressing. We cannot perform the call via a temporary register,
2336 // as the rax register may be used to store the static chain, and all
2337 // other suitable registers may be either callee-save or used for
2338 // parameter passing. We cannot use the stack at this point either
2339 // because __morestack manipulates the stack directly.
2341 // To avoid these issues, perform an indirect call via a read-only memory
2342 // location containing the address.
2344 // This solution is not perfect, as it assumes that the .rodata section
2345 // is laid out within 2^31 bytes of each function body, but this seems
2346 // to be sufficient for JIT.
2347 BuildMI(allocMBB, DL, TII.get(X86::CALL64m))
2351 .addExternalSymbol("__morestack_addr")
2353 MF.getMMI().setUsesMorestackAddr(true);
2356 BuildMI(allocMBB, DL, TII.get(X86::CALL64pcrel32))
2357 .addExternalSymbol("__morestack");
2359 BuildMI(allocMBB, DL, TII.get(X86::CALLpcrel32))
2360 .addExternalSymbol("__morestack");
2364 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET_RESTORE_R10));
2366 BuildMI(allocMBB, DL, TII.get(X86::MORESTACK_RET));
2368 allocMBB->addSuccessor(&PrologueMBB);
2370 checkMBB->addSuccessor(allocMBB);
2371 checkMBB->addSuccessor(&PrologueMBB);
2373 #ifdef EXPENSIVE_CHECKS
2378 /// Lookup an ERTS parameter in the !hipe.literals named metadata node.
2379 /// HiPE provides Erlang Runtime System-internal parameters, such as PCB offsets
2380 /// to fields it needs, through a named metadata node "hipe.literals" containing
2381 /// name-value pairs.
2382 static unsigned getHiPELiteral(
2383 NamedMDNode *HiPELiteralsMD, const StringRef LiteralName) {
2384 for (int i = 0, e = HiPELiteralsMD->getNumOperands(); i != e; ++i) {
2385 MDNode *Node = HiPELiteralsMD->getOperand(i);
2386 if (Node->getNumOperands() != 2) continue;
2387 MDString *NodeName = dyn_cast<MDString>(Node->getOperand(0));
2388 ValueAsMetadata *NodeVal = dyn_cast<ValueAsMetadata>(Node->getOperand(1));
2389 if (!NodeName || !NodeVal) continue;
2390 ConstantInt *ValConst = dyn_cast_or_null<ConstantInt>(NodeVal->getValue());
2391 if (ValConst && NodeName->getString() == LiteralName) {
2392 return ValConst->getZExtValue();
2396 report_fatal_error("HiPE literal " + LiteralName
2397 + " required but not provided");
2400 /// Erlang programs may need a special prologue to handle the stack size they
2401 /// might need at runtime. That is because Erlang/OTP does not implement a C
2402 /// stack but uses a custom implementation of hybrid stack/heap architecture.
2403 /// (for more information see Eric Stenman's Ph.D. thesis:
2404 /// http://publications.uu.se/uu/fulltext/nbn_se_uu_diva-2688.pdf)
2407 /// temp0 = sp - MaxStack
2408 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2412 /// call inc_stack # doubles the stack space
2413 /// temp0 = sp - MaxStack
2414 /// if( temp0 < SP_LIMIT(P) ) goto IncStack else goto OldStart
2415 void X86FrameLowering::adjustForHiPEPrologue(
2416 MachineFunction &MF, MachineBasicBlock &PrologueMBB) const {
2417 MachineFrameInfo &MFI = MF.getFrameInfo();
2420 // To support shrink-wrapping we would need to insert the new blocks
2421 // at the right place and update the branches to PrologueMBB.
2422 assert(&(*MF.begin()) == &PrologueMBB && "Shrink-wrapping not supported yet");
2424 // HiPE-specific values
2425 NamedMDNode *HiPELiteralsMD = MF.getMMI().getModule()
2426 ->getNamedMetadata("hipe.literals");
2427 if (!HiPELiteralsMD)
2429 "Can't generate HiPE prologue without runtime parameters");
2430 const unsigned HipeLeafWords
2431 = getHiPELiteral(HiPELiteralsMD,
2432 Is64Bit ? "AMD64_LEAF_WORDS" : "X86_LEAF_WORDS");
2433 const unsigned CCRegisteredArgs = Is64Bit ? 6 : 5;
2434 const unsigned Guaranteed = HipeLeafWords * SlotSize;
2435 unsigned CallerStkArity = MF.getFunction()->arg_size() > CCRegisteredArgs ?
2436 MF.getFunction()->arg_size() - CCRegisteredArgs : 0;
2437 unsigned MaxStack = MFI.getStackSize() + CallerStkArity*SlotSize + SlotSize;
2439 assert(STI.isTargetLinux() &&
2440 "HiPE prologue is only supported on Linux operating systems.");
2442 // Compute the largest caller's frame that is needed to fit the callees'
2443 // frames. This 'MaxStack' is computed from:
2445 // a) the fixed frame size, which is the space needed for all spilled temps,
2446 // b) outgoing on-stack parameter areas, and
2447 // c) the minimum stack space this function needs to make available for the
2448 // functions it calls (a tunable ABI property).
2449 if (MFI.hasCalls()) {
2450 unsigned MoreStackForCalls = 0;
2452 for (auto &MBB : MF) {
2453 for (auto &MI : MBB) {
2457 // Get callee operand.
2458 const MachineOperand &MO = MI.getOperand(0);
2460 // Only take account of global function calls (no closures etc.).
2464 const Function *F = dyn_cast<Function>(MO.getGlobal());
2468 // Do not update 'MaxStack' for primitive and built-in functions
2469 // (encoded with names either starting with "erlang."/"bif_" or not
2470 // having a ".", such as a simple <Module>.<Function>.<Arity>, or an
2471 // "_", such as the BIF "suspend_0") as they are executed on another
2473 if (F->getName().find("erlang.") != StringRef::npos ||
2474 F->getName().find("bif_") != StringRef::npos ||
2475 F->getName().find_first_of("._") == StringRef::npos)
2478 unsigned CalleeStkArity =
2479 F->arg_size() > CCRegisteredArgs ? F->arg_size()-CCRegisteredArgs : 0;
2480 if (HipeLeafWords - 1 > CalleeStkArity)
2481 MoreStackForCalls = std::max(MoreStackForCalls,
2482 (HipeLeafWords - 1 - CalleeStkArity) * SlotSize);
2485 MaxStack += MoreStackForCalls;
2488 // If the stack frame needed is larger than the guaranteed then runtime checks
2489 // and calls to "inc_stack_0" BIF should be inserted in the assembly prologue.
2490 if (MaxStack > Guaranteed) {
2491 MachineBasicBlock *stackCheckMBB = MF.CreateMachineBasicBlock();
2492 MachineBasicBlock *incStackMBB = MF.CreateMachineBasicBlock();
2494 for (const auto &LI : PrologueMBB.liveins()) {
2495 stackCheckMBB->addLiveIn(LI);
2496 incStackMBB->addLiveIn(LI);
2499 MF.push_front(incStackMBB);
2500 MF.push_front(stackCheckMBB);
2502 unsigned ScratchReg, SPReg, PReg, SPLimitOffset;
2503 unsigned LEAop, CMPop, CALLop;
2504 SPLimitOffset = getHiPELiteral(HiPELiteralsMD, "P_NSP_LIMIT");
2508 LEAop = X86::LEA64r;
2509 CMPop = X86::CMP64rm;
2510 CALLop = X86::CALL64pcrel32;
2514 LEAop = X86::LEA32r;
2515 CMPop = X86::CMP32rm;
2516 CALLop = X86::CALLpcrel32;
2519 ScratchReg = GetScratchRegister(Is64Bit, IsLP64, MF, true);
2520 assert(!MF.getRegInfo().isLiveIn(ScratchReg) &&
2521 "HiPE prologue scratch register is live-in");
2523 // Create new MBB for StackCheck:
2524 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(LEAop), ScratchReg),
2525 SPReg, false, -MaxStack);
2526 // SPLimitOffset is in a fixed heap location (pointed by BP).
2527 addRegOffset(BuildMI(stackCheckMBB, DL, TII.get(CMPop))
2528 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2529 BuildMI(stackCheckMBB, DL, TII.get(X86::JAE_1)).addMBB(&PrologueMBB);
2531 // Create new MBB for IncStack:
2532 BuildMI(incStackMBB, DL, TII.get(CALLop)).
2533 addExternalSymbol("inc_stack_0");
2534 addRegOffset(BuildMI(incStackMBB, DL, TII.get(LEAop), ScratchReg),
2535 SPReg, false, -MaxStack);
2536 addRegOffset(BuildMI(incStackMBB, DL, TII.get(CMPop))
2537 .addReg(ScratchReg), PReg, false, SPLimitOffset);
2538 BuildMI(incStackMBB, DL, TII.get(X86::JLE_1)).addMBB(incStackMBB);
2540 stackCheckMBB->addSuccessor(&PrologueMBB, {99, 100});
2541 stackCheckMBB->addSuccessor(incStackMBB, {1, 100});
2542 incStackMBB->addSuccessor(&PrologueMBB, {99, 100});
2543 incStackMBB->addSuccessor(incStackMBB, {1, 100});
2545 #ifdef EXPENSIVE_CHECKS
2550 bool X86FrameLowering::adjustStackWithPops(MachineBasicBlock &MBB,
2551 MachineBasicBlock::iterator MBBI,
2558 if (Offset % SlotSize)
2561 int NumPops = Offset / SlotSize;
2562 // This is only worth it if we have at most 2 pops.
2563 if (NumPops != 1 && NumPops != 2)
2566 // Handle only the trivial case where the adjustment directly follows
2567 // a call. This is the most common one, anyway.
2568 if (MBBI == MBB.begin())
2570 MachineBasicBlock::iterator Prev = std::prev(MBBI);
2571 if (!Prev->isCall() || !Prev->getOperand(1).isRegMask())
2575 unsigned FoundRegs = 0;
2577 auto RegMask = Prev->getOperand(1);
2580 Is64Bit ? X86::GR64_NOREX_NOSPRegClass : X86::GR32_NOREX_NOSPRegClass;
2581 // Try to find up to NumPops free registers.
2582 for (auto Candidate : RegClass) {
2584 // Poor man's liveness:
2585 // Since we're immediately after a call, any register that is clobbered
2586 // by the call and not defined by it can be considered dead.
2587 if (!RegMask.clobbersPhysReg(Candidate))
2591 for (const MachineOperand &MO : Prev->implicit_operands()) {
2592 if (MO.isReg() && MO.isDef() &&
2593 TRI->isSuperOrSubRegisterEq(MO.getReg(), Candidate)) {
2602 Regs[FoundRegs++] = Candidate;
2603 if (FoundRegs == (unsigned)NumPops)
2610 // If we found only one free register, but need two, reuse the same one twice.
2611 while (FoundRegs < (unsigned)NumPops)
2612 Regs[FoundRegs++] = Regs[0];
2614 for (int i = 0; i < NumPops; ++i)
2615 BuildMI(MBB, MBBI, DL,
2616 TII.get(STI.is64Bit() ? X86::POP64r : X86::POP32r), Regs[i]);
2621 MachineBasicBlock::iterator X86FrameLowering::
2622 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
2623 MachineBasicBlock::iterator I) const {
2624 bool reserveCallFrame = hasReservedCallFrame(MF);
2625 unsigned Opcode = I->getOpcode();
2626 bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
2627 DebugLoc DL = I->getDebugLoc();
2628 uint64_t Amount = !reserveCallFrame ? TII.getFrameSize(*I) : 0;
2629 uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
2631 auto InsertPos = skipDebugInstructionsForward(I, MBB.end());
2633 if (!reserveCallFrame) {
2634 // If the stack pointer can be changed after prologue, turn the
2635 // adjcallstackup instruction into a 'sub ESP, <amt>' and the
2636 // adjcallstackdown instruction into 'add ESP, <amt>'
2638 // We need to keep the stack aligned properly. To do this, we round the
2639 // amount of space needed for the outgoing arguments up to the next
2640 // alignment boundary.
2641 unsigned StackAlign = getStackAlignment();
2642 Amount = alignTo(Amount, StackAlign);
2644 MachineModuleInfo &MMI = MF.getMMI();
2645 const Function *Fn = MF.getFunction();
2646 bool WindowsCFI = MF.getTarget().getMCAsmInfo()->usesWindowsCFI();
2647 bool DwarfCFI = !WindowsCFI &&
2648 (MMI.hasDebugInfo() || Fn->needsUnwindTableEntry());
2650 // If we have any exception handlers in this function, and we adjust
2651 // the SP before calls, we may need to indicate this to the unwinder
2652 // using GNU_ARGS_SIZE. Note that this may be necessary even when
2653 // Amount == 0, because the preceding function may have set a non-0
2655 // TODO: We don't need to reset this between subsequent functions,
2656 // if it didn't change.
2657 bool HasDwarfEHHandlers = !WindowsCFI && !MF.getLandingPads().empty();
2659 if (HasDwarfEHHandlers && !isDestroy &&
2660 MF.getInfo<X86MachineFunctionInfo>()->getHasPushSequences())
2661 BuildCFI(MBB, InsertPos, DL,
2662 MCCFIInstruction::createGnuArgsSize(nullptr, Amount));
2667 // Factor out the amount that gets handled inside the sequence
2668 // (Pushes of argument for frame setup, callee pops for frame destroy)
2669 Amount -= InternalAmt;
2671 // TODO: This is needed only if we require precise CFA.
2672 // If this is a callee-pop calling convention, emit a CFA adjust for
2673 // the amount the callee popped.
2674 if (isDestroy && InternalAmt && DwarfCFI && !hasFP(MF))
2675 BuildCFI(MBB, InsertPos, DL,
2676 MCCFIInstruction::createAdjustCfaOffset(nullptr, -InternalAmt));
2678 // Add Amount to SP to destroy a frame, or subtract to setup.
2679 int64_t StackAdjustment = isDestroy ? Amount : -Amount;
2680 int64_t CfaAdjustment = -StackAdjustment;
2682 if (StackAdjustment) {
2683 // Merge with any previous or following adjustment instruction. Note: the
2684 // instructions merged with here do not have CFI, so their stack
2685 // adjustments do not feed into CfaAdjustment.
2686 StackAdjustment += mergeSPUpdates(MBB, InsertPos, true);
2687 StackAdjustment += mergeSPUpdates(MBB, InsertPos, false);
2689 if (StackAdjustment) {
2690 if (!(Fn->optForMinSize() &&
2691 adjustStackWithPops(MBB, InsertPos, DL, StackAdjustment)))
2692 BuildStackAdjustment(MBB, InsertPos, DL, StackAdjustment,
2693 /*InEpilogue=*/false);
2697 if (DwarfCFI && !hasFP(MF)) {
2698 // If we don't have FP, but need to generate unwind information,
2699 // we need to set the correct CFA offset after the stack adjustment.
2700 // How much we adjust the CFA offset depends on whether we're emitting
2701 // CFI only for EH purposes or for debugging. EH only requires the CFA
2702 // offset to be correct at each call site, while for debugging we want
2703 // it to be more precise.
2705 // TODO: When not using precise CFA, we also need to adjust for the
2706 // InternalAmt here.
2707 if (CfaAdjustment) {
2708 BuildCFI(MBB, InsertPos, DL,
2709 MCCFIInstruction::createAdjustCfaOffset(nullptr,
2717 if (isDestroy && InternalAmt) {
2718 // If we are performing frame pointer elimination and if the callee pops
2719 // something off the stack pointer, add it back. We do this until we have
2720 // more advanced stack pointer tracking ability.
2721 // We are not tracking the stack pointer adjustment by the callee, so make
2722 // sure we restore the stack pointer immediately after the call, there may
2723 // be spill code inserted between the CALL and ADJCALLSTACKUP instructions.
2724 MachineBasicBlock::iterator CI = I;
2725 MachineBasicBlock::iterator B = MBB.begin();
2726 while (CI != B && !std::prev(CI)->isCall())
2728 BuildStackAdjustment(MBB, CI, DL, -InternalAmt, /*InEpilogue=*/false);
2734 bool X86FrameLowering::canUseAsPrologue(const MachineBasicBlock &MBB) const {
2735 assert(MBB.getParent() && "Block is not attached to a function!");
2736 const MachineFunction &MF = *MBB.getParent();
2737 return !TRI->needsStackRealignment(MF) || !MBB.isLiveIn(X86::EFLAGS);
2740 bool X86FrameLowering::canUseAsEpilogue(const MachineBasicBlock &MBB) const {
2741 assert(MBB.getParent() && "Block is not attached to a function!");
2743 // Win64 has strict requirements in terms of epilogue and we are
2744 // not taking a chance at messing with them.
2745 // I.e., unless this block is already an exit block, we can't use
2746 // it as an epilogue.
2747 if (STI.isTargetWin64() && !MBB.succ_empty() && !MBB.isReturnBlock())
2750 if (canUseLEAForSPInEpilogue(*MBB.getParent()))
2753 // If we cannot use LEA to adjust SP, we may need to use ADD, which
2754 // clobbers the EFLAGS. Check that we do not need to preserve it,
2755 // otherwise, conservatively assume this is not
2756 // safe to insert the epilogue here.
2757 return !flagsNeedToBePreservedBeforeTheTerminators(MBB);
2760 bool X86FrameLowering::enableShrinkWrapping(const MachineFunction &MF) const {
2761 // If we may need to emit frameless compact unwind information, give
2762 // up as this is currently broken: PR25614.
2763 return (MF.getFunction()->hasFnAttribute(Attribute::NoUnwind) || hasFP(MF)) &&
2764 // The lowering of segmented stack and HiPE only support entry blocks
2765 // as prologue blocks: PR26107.
2766 // This limitation may be lifted if we fix:
2767 // - adjustForSegmentedStacks
2768 // - adjustForHiPEPrologue
2769 MF.getFunction()->getCallingConv() != CallingConv::HiPE &&
2770 !MF.shouldSplitStack();
2773 MachineBasicBlock::iterator X86FrameLowering::restoreWin32EHStackPointers(
2774 MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
2775 const DebugLoc &DL, bool RestoreSP) const {
2776 assert(STI.isTargetWindowsMSVC() && "funclets only supported in MSVC env");
2777 assert(STI.isTargetWin32() && "EBP/ESI restoration only required on win32");
2778 assert(STI.is32Bit() && !Uses64BitFramePtr &&
2779 "restoring EBP/ESI on non-32-bit target");
2781 MachineFunction &MF = *MBB.getParent();
2782 unsigned FramePtr = TRI->getFrameRegister(MF);
2783 unsigned BasePtr = TRI->getBaseRegister();
2784 WinEHFuncInfo &FuncInfo = *MF.getWinEHFuncInfo();
2785 X86MachineFunctionInfo *X86FI = MF.getInfo<X86MachineFunctionInfo>();
2786 MachineFrameInfo &MFI = MF.getFrameInfo();
2788 // FIXME: Don't set FrameSetup flag in catchret case.
2790 int FI = FuncInfo.EHRegNodeFrameIndex;
2791 int EHRegSize = MFI.getObjectSize(FI);
2794 // MOV32rm -EHRegSize(%ebp), %esp
2795 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), X86::ESP),
2796 X86::EBP, true, -EHRegSize)
2797 .setMIFlag(MachineInstr::FrameSetup);
2801 int EHRegOffset = getFrameIndexReference(MF, FI, UsedReg);
2802 int EndOffset = -EHRegOffset - EHRegSize;
2803 FuncInfo.EHRegNodeEndOffset = EndOffset;
2805 if (UsedReg == FramePtr) {
2806 // ADD $offset, %ebp
2807 unsigned ADDri = getADDriOpcode(false, EndOffset);
2808 BuildMI(MBB, MBBI, DL, TII.get(ADDri), FramePtr)
2811 .setMIFlag(MachineInstr::FrameSetup)
2814 assert(EndOffset >= 0 &&
2815 "end of registration object above normal EBP position!");
2816 } else if (UsedReg == BasePtr) {
2817 // LEA offset(%ebp), %esi
2818 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::LEA32r), BasePtr),
2819 FramePtr, false, EndOffset)
2820 .setMIFlag(MachineInstr::FrameSetup);
2821 // MOV32rm SavedEBPOffset(%esi), %ebp
2822 assert(X86FI->getHasSEHFramePtrSave());
2824 getFrameIndexReference(MF, X86FI->getSEHFramePtrSaveIndex(), UsedReg);
2825 assert(UsedReg == BasePtr);
2826 addRegOffset(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV32rm), FramePtr),
2827 UsedReg, true, Offset)
2828 .setMIFlag(MachineInstr::FrameSetup);
2830 llvm_unreachable("32-bit frames with WinEH must use FramePtr or BasePtr");
2836 // Struct used by orderFrameObjects to help sort the stack objects.
2837 struct X86FrameSortingObject {
2838 bool IsValid = false; // true if we care about this Object.
2839 unsigned ObjectIndex = 0; // Index of Object into MFI list.
2840 unsigned ObjectSize = 0; // Size of Object in bytes.
2841 unsigned ObjectAlignment = 1; // Alignment of Object in bytes.
2842 unsigned ObjectNumUses = 0; // Object static number of uses.
2845 // The comparison function we use for std::sort to order our local
2846 // stack symbols. The current algorithm is to use an estimated
2847 // "density". This takes into consideration the size and number of
2848 // uses each object has in order to roughly minimize code size.
2849 // So, for example, an object of size 16B that is referenced 5 times
2850 // will get higher priority than 4 4B objects referenced 1 time each.
2851 // It's not perfect and we may be able to squeeze a few more bytes out of
2852 // it (for example : 0(esp) requires fewer bytes, symbols allocated at the
2853 // fringe end can have special consideration, given their size is less
2854 // important, etc.), but the algorithmic complexity grows too much to be
2855 // worth the extra gains we get. This gets us pretty close.
2856 // The final order leaves us with objects with highest priority going
2857 // at the end of our list.
2858 struct X86FrameSortingComparator {
2859 inline bool operator()(const X86FrameSortingObject &A,
2860 const X86FrameSortingObject &B) {
2861 uint64_t DensityAScaled, DensityBScaled;
2863 // For consistency in our comparison, all invalid objects are placed
2864 // at the end. This also allows us to stop walking when we hit the
2865 // first invalid item after it's all sorted.
2871 // The density is calculated by doing :
2872 // (double)DensityA = A.ObjectNumUses / A.ObjectSize
2873 // (double)DensityB = B.ObjectNumUses / B.ObjectSize
2874 // Since this approach may cause inconsistencies in
2875 // the floating point <, >, == comparisons, depending on the floating
2876 // point model with which the compiler was built, we're going
2877 // to scale both sides by multiplying with
2878 // A.ObjectSize * B.ObjectSize. This ends up factoring away
2879 // the division and, with it, the need for any floating point
2881 DensityAScaled = static_cast<uint64_t>(A.ObjectNumUses) *
2882 static_cast<uint64_t>(B.ObjectSize);
2883 DensityBScaled = static_cast<uint64_t>(B.ObjectNumUses) *
2884 static_cast<uint64_t>(A.ObjectSize);
2886 // If the two densities are equal, prioritize highest alignment
2887 // objects. This allows for similar alignment objects
2888 // to be packed together (given the same density).
2889 // There's room for improvement here, also, since we can pack
2890 // similar alignment (different density) objects next to each
2891 // other to save padding. This will also require further
2892 // complexity/iterations, and the overall gain isn't worth it,
2893 // in general. Something to keep in mind, though.
2894 if (DensityAScaled == DensityBScaled)
2895 return A.ObjectAlignment < B.ObjectAlignment;
2897 return DensityAScaled < DensityBScaled;
2902 // Order the symbols in the local stack.
2903 // We want to place the local stack objects in some sort of sensible order.
2904 // The heuristic we use is to try and pack them according to static number
2905 // of uses and size of object in order to minimize code size.
2906 void X86FrameLowering::orderFrameObjects(
2907 const MachineFunction &MF, SmallVectorImpl<int> &ObjectsToAllocate) const {
2908 const MachineFrameInfo &MFI = MF.getFrameInfo();
2910 // Don't waste time if there's nothing to do.
2911 if (ObjectsToAllocate.empty())
2914 // Create an array of all MFI objects. We won't need all of these
2915 // objects, but we're going to create a full array of them to make
2916 // it easier to index into when we're counting "uses" down below.
2917 // We want to be able to easily/cheaply access an object by simply
2918 // indexing into it, instead of having to search for it every time.
2919 std::vector<X86FrameSortingObject> SortingObjects(MFI.getObjectIndexEnd());
2921 // Walk the objects we care about and mark them as such in our working
2923 for (auto &Obj : ObjectsToAllocate) {
2924 SortingObjects[Obj].IsValid = true;
2925 SortingObjects[Obj].ObjectIndex = Obj;
2926 SortingObjects[Obj].ObjectAlignment = MFI.getObjectAlignment(Obj);
2928 int ObjectSize = MFI.getObjectSize(Obj);
2929 if (ObjectSize == 0)
2930 // Variable size. Just use 4.
2931 SortingObjects[Obj].ObjectSize = 4;
2933 SortingObjects[Obj].ObjectSize = ObjectSize;
2936 // Count the number of uses for each object.
2937 for (auto &MBB : MF) {
2938 for (auto &MI : MBB) {
2939 if (MI.isDebugValue())
2941 for (const MachineOperand &MO : MI.operands()) {
2942 // Check to see if it's a local stack symbol.
2945 int Index = MO.getIndex();
2946 // Check to see if it falls within our range, and is tagged
2947 // to require ordering.
2948 if (Index >= 0 && Index < MFI.getObjectIndexEnd() &&
2949 SortingObjects[Index].IsValid)
2950 SortingObjects[Index].ObjectNumUses++;
2955 // Sort the objects using X86FrameSortingAlgorithm (see its comment for
2957 std::stable_sort(SortingObjects.begin(), SortingObjects.end(),
2958 X86FrameSortingComparator());
2960 // Now modify the original list to represent the final order that
2961 // we want. The order will depend on whether we're going to access them
2962 // from the stack pointer or the frame pointer. For SP, the list should
2963 // end up with the END containing objects that we want with smaller offsets.
2964 // For FP, it should be flipped.
2966 for (auto &Obj : SortingObjects) {
2967 // All invalid items are sorted at the end, so it's safe to stop.
2970 ObjectsToAllocate[i++] = Obj.ObjectIndex;
2973 // Flip it if we're accessing off of the FP.
2974 if (!TRI->needsStackRealignment(MF) && hasFP(MF))
2975 std::reverse(ObjectsToAllocate.begin(), ObjectsToAllocate.end());
2979 unsigned X86FrameLowering::getWinEHParentFrameOffset(const MachineFunction &MF) const {
2980 // RDX, the parent frame pointer, is homed into 16(%rsp) in the prologue.
2981 unsigned Offset = 16;
2982 // RBP is immediately pushed.
2984 // All callee-saved registers are then pushed.
2985 Offset += MF.getInfo<X86MachineFunctionInfo>()->getCalleeSavedFrameSize();
2986 // Every funclet allocates enough stack space for the largest outgoing call.
2987 Offset += getWinEHFuncletFrameSize(MF);
2991 void X86FrameLowering::processFunctionBeforeFrameFinalized(
2992 MachineFunction &MF, RegScavenger *RS) const {
2993 // Mark the function as not having WinCFI. We will set it back to true in
2994 // emitPrologue if it gets called and emits CFI.
2995 MF.setHasWinCFI(false);
2997 // If this function isn't doing Win64-style C++ EH, we don't need to do
2999 const Function *Fn = MF.getFunction();
3000 if (!STI.is64Bit() || !MF.hasEHFunclets() ||
3001 classifyEHPersonality(Fn->getPersonalityFn()) != EHPersonality::MSVC_CXX)
3004 // Win64 C++ EH needs to allocate the UnwindHelp object at some fixed offset
3005 // relative to RSP after the prologue. Find the offset of the last fixed
3006 // object, so that we can allocate a slot immediately following it. If there
3007 // were no fixed objects, use offset -SlotSize, which is immediately after the
3008 // return address. Fixed objects have negative frame indices.
3009 MachineFrameInfo &MFI = MF.getFrameInfo();
3010 WinEHFuncInfo &EHInfo = *MF.getWinEHFuncInfo();
3011 int64_t MinFixedObjOffset = -SlotSize;
3012 for (int I = MFI.getObjectIndexBegin(); I < 0; ++I)
3013 MinFixedObjOffset = std::min(MinFixedObjOffset, MFI.getObjectOffset(I));
3015 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
3016 for (WinEHHandlerType &H : TBME.HandlerArray) {
3017 int FrameIndex = H.CatchObj.FrameIndex;
3018 if (FrameIndex != INT_MAX) {
3019 // Ensure alignment.
3020 unsigned Align = MFI.getObjectAlignment(FrameIndex);
3021 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % Align;
3022 MinFixedObjOffset -= MFI.getObjectSize(FrameIndex);
3023 MFI.setObjectOffset(FrameIndex, MinFixedObjOffset);
3028 // Ensure alignment.
3029 MinFixedObjOffset -= std::abs(MinFixedObjOffset) % 8;
3030 int64_t UnwindHelpOffset = MinFixedObjOffset - SlotSize;
3032 MFI.CreateFixedObject(SlotSize, UnwindHelpOffset, /*Immutable=*/false);
3033 EHInfo.UnwindHelpFrameIdx = UnwindHelpFI;
3035 // Store -2 into UnwindHelp on function entry. We have to scan forwards past
3036 // other frame setup instructions.
3037 MachineBasicBlock &MBB = MF.front();
3038 auto MBBI = MBB.begin();
3039 while (MBBI != MBB.end() && MBBI->getFlag(MachineInstr::FrameSetup))
3042 DebugLoc DL = MBB.findDebugLoc(MBBI);
3043 addFrameReference(BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64mi32)),