1 //===- X86LegalizerInfo.cpp --------------------------------------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file implements the targeting of the Machinelegalizer class for X86.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
14 #include "X86LegalizerInfo.h"
15 #include "X86Subtarget.h"
16 #include "X86TargetMachine.h"
17 #include "llvm/CodeGen/ValueTypes.h"
18 #include "llvm/IR/DerivedTypes.h"
19 #include "llvm/IR/Type.h"
20 #include "llvm/Target/TargetOpcodes.h"
23 using namespace TargetOpcode;
25 #ifndef LLVM_BUILD_GLOBAL_ISEL
26 #error "You shouldn't build this"
29 X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
30 const X86TargetMachine &TM)
31 : Subtarget(STI), TM(TM) {
33 setLegalizerInfo32bit();
34 setLegalizerInfo64bit();
35 setLegalizerInfoSSE1();
36 setLegalizerInfoSSE2();
41 void X86LegalizerInfo::setLegalizerInfo32bit() {
43 if (Subtarget.is64Bit())
46 const LLT p0 = LLT::pointer(0, 32);
47 const LLT s1 = LLT::scalar(1);
48 const LLT s8 = LLT::scalar(8);
49 const LLT s16 = LLT::scalar(16);
50 const LLT s32 = LLT::scalar(32);
51 const LLT s64 = LLT::scalar(64);
53 for (unsigned BinOp : {G_ADD, G_SUB})
54 for (auto Ty : {s8, s16, s32})
55 setAction({BinOp, Ty}, Legal);
57 for (unsigned MemOp : {G_LOAD, G_STORE}) {
58 for (auto Ty : {s8, s16, s32, p0})
59 setAction({MemOp, Ty}, Legal);
61 // And everything's fine in addrspace 0.
62 setAction({MemOp, 1, p0}, Legal);
66 setAction({G_FRAME_INDEX, p0}, Legal);
69 for (auto Ty : {s8, s16, s32, p0})
70 setAction({TargetOpcode::G_CONSTANT, Ty}, Legal);
72 setAction({TargetOpcode::G_CONSTANT, s1}, WidenScalar);
73 setAction({TargetOpcode::G_CONSTANT, s64}, NarrowScalar);
76 setAction({G_ZEXT, s32}, Legal);
77 setAction({G_SEXT, s32}, Legal);
79 for (auto Ty : {s8, s16}) {
80 setAction({G_ZEXT, 1, Ty}, Legal);
81 setAction({G_SEXT, 1, Ty}, Legal);
85 void X86LegalizerInfo::setLegalizerInfo64bit() {
87 if (!Subtarget.is64Bit())
90 const LLT p0 = LLT::pointer(0, TM.getPointerSize() * 8);
91 const LLT s1 = LLT::scalar(1);
92 const LLT s8 = LLT::scalar(8);
93 const LLT s16 = LLT::scalar(16);
94 const LLT s32 = LLT::scalar(32);
95 const LLT s64 = LLT::scalar(64);
97 for (unsigned BinOp : {G_ADD, G_SUB})
98 for (auto Ty : {s8, s16, s32, s64})
99 setAction({BinOp, Ty}, Legal);
101 for (unsigned MemOp : {G_LOAD, G_STORE}) {
102 for (auto Ty : {s8, s16, s32, s64, p0})
103 setAction({MemOp, Ty}, Legal);
105 // And everything's fine in addrspace 0.
106 setAction({MemOp, 1, p0}, Legal);
110 setAction({G_FRAME_INDEX, p0}, Legal);
113 for (auto Ty : {s8, s16, s32, s64, p0})
114 setAction({TargetOpcode::G_CONSTANT, Ty}, Legal);
116 setAction({TargetOpcode::G_CONSTANT, s1}, WidenScalar);
119 for (auto Ty : {s32, s64}) {
120 setAction({G_ZEXT, Ty}, Legal);
121 setAction({G_SEXT, Ty}, Legal);
124 for (auto Ty : {s8, s16, s32}) {
125 setAction({G_ZEXT, 1, Ty}, Legal);
126 setAction({G_SEXT, 1, Ty}, Legal);
130 void X86LegalizerInfo::setLegalizerInfoSSE1() {
131 if (!Subtarget.hasSSE1())
134 const LLT s32 = LLT::scalar(32);
135 const LLT v4s32 = LLT::vector(4, 32);
136 const LLT v2s64 = LLT::vector(2, 64);
138 for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
139 for (auto Ty : {s32, v4s32})
140 setAction({BinOp, Ty}, Legal);
142 for (unsigned MemOp : {G_LOAD, G_STORE})
143 for (auto Ty : {v4s32, v2s64})
144 setAction({MemOp, Ty}, Legal);
147 void X86LegalizerInfo::setLegalizerInfoSSE2() {
148 if (!Subtarget.hasSSE2())
151 const LLT s64 = LLT::scalar(64);
152 const LLT v4s32 = LLT::vector(4, 32);
153 const LLT v2s64 = LLT::vector(2, 64);
155 for (unsigned BinOp : {G_FADD, G_FSUB, G_FMUL, G_FDIV})
156 for (auto Ty : {s64, v2s64})
157 setAction({BinOp, Ty}, Legal);
159 for (unsigned BinOp : {G_ADD, G_SUB})
160 for (auto Ty : {v4s32})
161 setAction({BinOp, Ty}, Legal);