1 //===- X86RegisterBankInfo ---------------------------------------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file declares the targeting of the RegisterBankInfo class for X86.
11 /// \todo This should be generated by TableGen.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
15 #define LLVM_LIB_TARGET_X86_X86REGISTERBANKINFO_H
17 #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
19 #define GET_REGBANK_DECLARATIONS
20 #include "X86GenRegisterBank.inc"
26 class X86GenRegisterBankInfo : public RegisterBankInfo {
28 #define GET_TARGET_REGBANK_CLASS
29 #include "X86GenRegisterBank.inc"
30 #define GET_TARGET_REGBANK_INFO_CLASS
31 #include "X86GenRegisterBankInfo.def"
33 static RegisterBankInfo::PartialMapping PartMappings[];
34 static RegisterBankInfo::ValueMapping ValMappings[];
36 static PartialMappingIdx getPartialMappingIdx(const LLT &Ty, bool isFP);
37 static const RegisterBankInfo::ValueMapping *
38 getValueMapping(PartialMappingIdx Idx, unsigned NumOperands);
41 class TargetRegisterInfo;
43 /// This class provides the information for the target register banks.
44 class X86RegisterBankInfo final : public X86GenRegisterBankInfo {
46 /// Get an instruction mapping.
47 /// \return An InstructionMappings with a statically allocated
49 const InstructionMapping &getSameOperandsMapping(const MachineInstr &MI,
52 /// Track the bank of each instruction operand(register)
54 getInstrPartialMappingIdxs(const MachineInstr &MI,
55 const MachineRegisterInfo &MRI, const bool isFP,
56 SmallVectorImpl<PartialMappingIdx> &OpRegBankIdx);
58 /// Construct the instruction ValueMapping from PartialMappingIdxs
59 /// \return true if mapping succeeded.
61 getInstrValueMapping(const MachineInstr &MI,
62 const SmallVectorImpl<PartialMappingIdx> &OpRegBankIdx,
63 SmallVectorImpl<const ValueMapping *> &OpdsMapping);
66 X86RegisterBankInfo(const TargetRegisterInfo &TRI);
69 getRegBankFromRegClass(const TargetRegisterClass &RC) const override;
72 getInstrAlternativeMappings(const MachineInstr &MI) const override;
74 /// See RegisterBankInfo::applyMapping.
75 void applyMappingImpl(const OperandsMapper &OpdMapper) const override;
77 const InstructionMapping &
78 getInstrMapping(const MachineInstr &MI) const override;