contrib/llvm/lib/Target/XCore/XCoreTargetMachine.cpp

   1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "XCoreTargetMachine.h"
  14 #include "MCTargetDesc/XCoreMCTargetDesc.h"
  15 #include "XCore.h"
  16 #include "XCoreTargetObjectFile.h"
  17 #include "XCoreTargetTransformInfo.h"
  18 #include "llvm/ADT/Optional.h"
  19 #include "llvm/ADT/STLExtras.h"
  20 #include "llvm/Analysis/TargetTransformInfo.h"
  21 #include "llvm/CodeGen/Passes.h"
  22 #include "llvm/CodeGen/TargetPassConfig.h"
  23 #include "llvm/Support/CodeGen.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25
  26 using namespace llvm;
  27
  28 static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
  29   if (!RM.hasValue())
  30     return Reloc::Static;
  31   return *RM;
  32 }
  33
  34 static CodeModel::Model getEffectiveCodeModel(Optional<CodeModel::Model> CM) {
  35   if (CM) {
  36     if (*CM != CodeModel::Small && *CM != CodeModel::Large)
  37       report_fatal_error("Target only supports CodeModel Small or Large");
  38     return *CM;
  39   }
  40   return CodeModel::Small;
  41 }
  42
  43 /// Create an ILP32 architecture model
  44 ///
  45 XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT,
  46                                        StringRef CPU, StringRef FS,
  47                                        const TargetOptions &Options,
  48                                        Optional<Reloc::Model> RM,
  49                                        Optional<CodeModel::Model> CM,
  50                                        CodeGenOpt::Level OL, bool JIT)
  51     : LLVMTargetMachine(
  52           T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
  53           TT, CPU, FS, Options, getEffectiveRelocModel(RM),
  54           getEffectiveCodeModel(CM), OL),
  55       TLOF(llvm::make_unique<XCoreTargetObjectFile>()),
  56       Subtarget(TT, CPU, FS, *this) {
  57   initAsmInfo();
  58 }
  59
  60 XCoreTargetMachine::~XCoreTargetMachine() = default;
  61
  62 namespace {
  63
  64 /// XCore Code Generator Pass Configuration Options.
  65 class XCorePassConfig : public TargetPassConfig {
  66 public:
  67   XCorePassConfig(XCoreTargetMachine &TM, PassManagerBase &PM)
  68     : TargetPassConfig(TM, PM) {}
  69
  70   XCoreTargetMachine &getXCoreTargetMachine() const {
  71     return getTM<XCoreTargetMachine>();
  72   }
  73
  74   void addIRPasses() override;
  75   bool addPreISel() override;
  76   bool addInstSelector() override;
  77   void addPreEmitPass() override;
  78 };
  79
  80 } // end anonymous namespace
  81
  82 TargetPassConfig *XCoreTargetMachine::createPassConfig(PassManagerBase &PM) {
  83   return new XCorePassConfig(*this, PM);
  84 }
  85
  86 void XCorePassConfig::addIRPasses() {
  87   addPass(createAtomicExpandPass());
  88
  89   TargetPassConfig::addIRPasses();
  90 }
  91
  92 bool XCorePassConfig::addPreISel() {
  93   addPass(createXCoreLowerThreadLocalPass());
  94   return false;
  95 }
  96
  97 bool XCorePassConfig::addInstSelector() {
  98   addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
  99   return false;
 100 }
 101
 102 void XCorePassConfig::addPreEmitPass() {
 103   addPass(createXCoreFrameToArgsOffsetEliminationPass(), false);
 104 }
 105
 106 // Force static initialization.
 107 extern "C" void LLVMInitializeXCoreTarget() {
 108   RegisterTargetMachine<XCoreTargetMachine> X(getTheXCoreTarget());
 109 }
 110
 111 TargetTransformInfo
 112 XCoreTargetMachine::getTargetTransformInfo(const Function &F) {
 113   return TargetTransformInfo(XCoreTTIImpl(this, F));
 114 }