1 //===- InstCombineCalls.cpp -----------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the visitCall and visitInvoke functions.
12 //===----------------------------------------------------------------------===//
14 #include "InstCombineInternal.h"
15 #include "llvm/ADT/APFloat.h"
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/None.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/SmallVector.h"
22 #include "llvm/ADT/Twine.h"
23 #include "llvm/Analysis/InstructionSimplify.h"
24 #include "llvm/Analysis/MemoryBuiltins.h"
25 #include "llvm/Analysis/ValueTracking.h"
26 #include "llvm/IR/BasicBlock.h"
27 #include "llvm/IR/CallSite.h"
28 #include "llvm/IR/Constant.h"
29 #include "llvm/IR/DataLayout.h"
30 #include "llvm/IR/DerivedTypes.h"
31 #include "llvm/IR/Function.h"
32 #include "llvm/IR/GlobalVariable.h"
33 #include "llvm/IR/InstrTypes.h"
34 #include "llvm/IR/Instruction.h"
35 #include "llvm/IR/Instructions.h"
36 #include "llvm/IR/IntrinsicInst.h"
37 #include "llvm/IR/Intrinsics.h"
38 #include "llvm/IR/LLVMContext.h"
39 #include "llvm/IR/Metadata.h"
40 #include "llvm/IR/PatternMatch.h"
41 #include "llvm/IR/Statepoint.h"
42 #include "llvm/IR/Type.h"
43 #include "llvm/IR/Value.h"
44 #include "llvm/IR/ValueHandle.h"
45 #include "llvm/Support/Casting.h"
46 #include "llvm/Support/Debug.h"
47 #include "llvm/Support/KnownBits.h"
48 #include "llvm/Support/MathExtras.h"
49 #include "llvm/Transforms/Utils/Local.h"
50 #include "llvm/Transforms/Utils/SimplifyLibCalls.h"
58 using namespace PatternMatch;
60 #define DEBUG_TYPE "instcombine"
62 STATISTIC(NumSimplified, "Number of library calls simplified");
64 static cl::opt<unsigned> UnfoldElementAtomicMemcpyMaxElements(
65 "unfold-element-atomic-memcpy-max-elements",
67 cl::desc("Maximum number of elements in atomic memcpy the optimizer is "
68 "allowed to unfold"));
70 /// Return the specified type promoted as it would be to pass though a va_arg
72 static Type *getPromotedType(Type *Ty) {
73 if (IntegerType* ITy = dyn_cast<IntegerType>(Ty)) {
74 if (ITy->getBitWidth() < 32)
75 return Type::getInt32Ty(Ty->getContext());
80 /// Return a constant boolean vector that has true elements in all positions
81 /// where the input constant data vector has an element with the sign bit set.
82 static Constant *getNegativeIsTrueBoolVec(ConstantDataVector *V) {
83 SmallVector<Constant *, 32> BoolVec;
84 IntegerType *BoolTy = Type::getInt1Ty(V->getContext());
85 for (unsigned I = 0, E = V->getNumElements(); I != E; ++I) {
86 Constant *Elt = V->getElementAsConstant(I);
87 assert((isa<ConstantInt>(Elt) || isa<ConstantFP>(Elt)) &&
88 "Unexpected constant data vector element type");
89 bool Sign = V->getElementType()->isIntegerTy()
90 ? cast<ConstantInt>(Elt)->isNegative()
91 : cast<ConstantFP>(Elt)->isNegative();
92 BoolVec.push_back(ConstantInt::get(BoolTy, Sign));
94 return ConstantVector::get(BoolVec);
98 InstCombiner::SimplifyElementAtomicMemCpy(ElementAtomicMemCpyInst *AMI) {
99 // Try to unfold this intrinsic into sequence of explicit atomic loads and
101 // First check that number of elements is compile time constant.
102 auto *NumElementsCI = dyn_cast<ConstantInt>(AMI->getNumElements());
106 // Check that there are not too many elements.
107 uint64_t NumElements = NumElementsCI->getZExtValue();
108 if (NumElements >= UnfoldElementAtomicMemcpyMaxElements)
111 // Don't unfold into illegal integers
112 uint64_t ElementSizeInBytes = AMI->getElementSizeInBytes() * 8;
113 if (!getDataLayout().isLegalInteger(ElementSizeInBytes))
116 // Cast source and destination to the correct type. Intrinsic input arguments
117 // are usually represented as i8*.
118 // Often operands will be explicitly casted to i8* and we can just strip
119 // those casts instead of inserting new ones. However it's easier to rely on
120 // other InstCombine rules which will cover trivial cases anyway.
121 Value *Src = AMI->getRawSource();
122 Value *Dst = AMI->getRawDest();
123 Type *ElementPointerType = Type::getIntNPtrTy(
124 AMI->getContext(), ElementSizeInBytes, Src->getType()->getPointerAddressSpace());
126 Value *SrcCasted = Builder->CreatePointerCast(Src, ElementPointerType,
127 "memcpy_unfold.src_casted");
128 Value *DstCasted = Builder->CreatePointerCast(Dst, ElementPointerType,
129 "memcpy_unfold.dst_casted");
131 for (uint64_t i = 0; i < NumElements; ++i) {
132 // Get current element addresses
133 ConstantInt *ElementIdxCI =
134 ConstantInt::get(AMI->getContext(), APInt(64, i));
135 Value *SrcElementAddr =
136 Builder->CreateGEP(SrcCasted, ElementIdxCI, "memcpy_unfold.src_addr");
137 Value *DstElementAddr =
138 Builder->CreateGEP(DstCasted, ElementIdxCI, "memcpy_unfold.dst_addr");
140 // Load from the source. Transfer alignment information and mark load as
142 LoadInst *Load = Builder->CreateLoad(SrcElementAddr, "memcpy_unfold.val");
143 Load->setOrdering(AtomicOrdering::Unordered);
144 // We know alignment of the first element. It is also guaranteed by the
145 // verifier that element size is less or equal than first element alignment
146 // and both of this values are powers of two.
147 // This means that all subsequent accesses are at least element size
149 // TODO: We can infer better alignment but there is no evidence that this
151 Load->setAlignment(i == 0 ? AMI->getSrcAlignment()
152 : AMI->getElementSizeInBytes());
153 Load->setDebugLoc(AMI->getDebugLoc());
155 // Store loaded value via unordered atomic store.
156 StoreInst *Store = Builder->CreateStore(Load, DstElementAddr);
157 Store->setOrdering(AtomicOrdering::Unordered);
158 Store->setAlignment(i == 0 ? AMI->getDstAlignment()
159 : AMI->getElementSizeInBytes());
160 Store->setDebugLoc(AMI->getDebugLoc());
163 // Set the number of elements of the copy to 0, it will be deleted on the
165 AMI->setNumElements(Constant::getNullValue(NumElementsCI->getType()));
169 Instruction *InstCombiner::SimplifyMemTransfer(MemIntrinsic *MI) {
170 unsigned DstAlign = getKnownAlignment(MI->getArgOperand(0), DL, MI, &AC, &DT);
171 unsigned SrcAlign = getKnownAlignment(MI->getArgOperand(1), DL, MI, &AC, &DT);
172 unsigned MinAlign = std::min(DstAlign, SrcAlign);
173 unsigned CopyAlign = MI->getAlignment();
175 if (CopyAlign < MinAlign) {
176 MI->setAlignment(ConstantInt::get(MI->getAlignmentType(), MinAlign, false));
180 // If MemCpyInst length is 1/2/4/8 bytes then replace memcpy with
182 ConstantInt *MemOpLength = dyn_cast<ConstantInt>(MI->getArgOperand(2));
183 if (!MemOpLength) return nullptr;
185 // Source and destination pointer types are always "i8*" for intrinsic. See
186 // if the size is something we can handle with a single primitive load/store.
187 // A single load+store correctly handles overlapping memory in the memmove
189 uint64_t Size = MemOpLength->getLimitedValue();
190 assert(Size && "0-sized memory transferring should be removed already.");
192 if (Size > 8 || (Size&(Size-1)))
193 return nullptr; // If not 1/2/4/8 bytes, exit.
195 // Use an integer load+store unless we can find something better.
197 cast<PointerType>(MI->getArgOperand(1)->getType())->getAddressSpace();
199 cast<PointerType>(MI->getArgOperand(0)->getType())->getAddressSpace();
201 IntegerType* IntType = IntegerType::get(MI->getContext(), Size<<3);
202 Type *NewSrcPtrTy = PointerType::get(IntType, SrcAddrSp);
203 Type *NewDstPtrTy = PointerType::get(IntType, DstAddrSp);
205 // If the memcpy has metadata describing the members, see if we can get the
206 // TBAA tag describing our copy.
207 MDNode *CopyMD = nullptr;
208 if (MDNode *M = MI->getMetadata(LLVMContext::MD_tbaa_struct)) {
209 if (M->getNumOperands() == 3 && M->getOperand(0) &&
210 mdconst::hasa<ConstantInt>(M->getOperand(0)) &&
211 mdconst::extract<ConstantInt>(M->getOperand(0))->isNullValue() &&
213 mdconst::hasa<ConstantInt>(M->getOperand(1)) &&
214 mdconst::extract<ConstantInt>(M->getOperand(1))->getValue() ==
216 M->getOperand(2) && isa<MDNode>(M->getOperand(2)))
217 CopyMD = cast<MDNode>(M->getOperand(2));
220 // If the memcpy/memmove provides better alignment info than we can
222 SrcAlign = std::max(SrcAlign, CopyAlign);
223 DstAlign = std::max(DstAlign, CopyAlign);
225 Value *Src = Builder->CreateBitCast(MI->getArgOperand(1), NewSrcPtrTy);
226 Value *Dest = Builder->CreateBitCast(MI->getArgOperand(0), NewDstPtrTy);
227 LoadInst *L = Builder->CreateLoad(Src, MI->isVolatile());
228 L->setAlignment(SrcAlign);
230 L->setMetadata(LLVMContext::MD_tbaa, CopyMD);
231 MDNode *LoopMemParallelMD =
232 MI->getMetadata(LLVMContext::MD_mem_parallel_loop_access);
233 if (LoopMemParallelMD)
234 L->setMetadata(LLVMContext::MD_mem_parallel_loop_access, LoopMemParallelMD);
236 StoreInst *S = Builder->CreateStore(L, Dest, MI->isVolatile());
237 S->setAlignment(DstAlign);
239 S->setMetadata(LLVMContext::MD_tbaa, CopyMD);
240 if (LoopMemParallelMD)
241 S->setMetadata(LLVMContext::MD_mem_parallel_loop_access, LoopMemParallelMD);
243 // Set the size of the copy to 0, it will be deleted on the next iteration.
244 MI->setArgOperand(2, Constant::getNullValue(MemOpLength->getType()));
248 Instruction *InstCombiner::SimplifyMemSet(MemSetInst *MI) {
249 unsigned Alignment = getKnownAlignment(MI->getDest(), DL, MI, &AC, &DT);
250 if (MI->getAlignment() < Alignment) {
251 MI->setAlignment(ConstantInt::get(MI->getAlignmentType(),
256 // Extract the length and alignment and fill if they are constant.
257 ConstantInt *LenC = dyn_cast<ConstantInt>(MI->getLength());
258 ConstantInt *FillC = dyn_cast<ConstantInt>(MI->getValue());
259 if (!LenC || !FillC || !FillC->getType()->isIntegerTy(8))
261 uint64_t Len = LenC->getLimitedValue();
262 Alignment = MI->getAlignment();
263 assert(Len && "0-sized memory setting should be removed already.");
265 // memset(s,c,n) -> store s, c (for n=1,2,4,8)
266 if (Len <= 8 && isPowerOf2_32((uint32_t)Len)) {
267 Type *ITy = IntegerType::get(MI->getContext(), Len*8); // n=1 -> i8.
269 Value *Dest = MI->getDest();
270 unsigned DstAddrSp = cast<PointerType>(Dest->getType())->getAddressSpace();
271 Type *NewDstPtrTy = PointerType::get(ITy, DstAddrSp);
272 Dest = Builder->CreateBitCast(Dest, NewDstPtrTy);
274 // Alignment 0 is identity for alignment 1 for memset, but not store.
275 if (Alignment == 0) Alignment = 1;
277 // Extract the fill value and store.
278 uint64_t Fill = FillC->getZExtValue()*0x0101010101010101ULL;
279 StoreInst *S = Builder->CreateStore(ConstantInt::get(ITy, Fill), Dest,
281 S->setAlignment(Alignment);
283 // Set the size of the copy to 0, it will be deleted on the next iteration.
284 MI->setLength(Constant::getNullValue(LenC->getType()));
291 static Value *simplifyX86immShift(const IntrinsicInst &II,
292 InstCombiner::BuilderTy &Builder) {
293 bool LogicalShift = false;
294 bool ShiftLeft = false;
296 switch (II.getIntrinsicID()) {
297 default: llvm_unreachable("Unexpected intrinsic!");
298 case Intrinsic::x86_sse2_psra_d:
299 case Intrinsic::x86_sse2_psra_w:
300 case Intrinsic::x86_sse2_psrai_d:
301 case Intrinsic::x86_sse2_psrai_w:
302 case Intrinsic::x86_avx2_psra_d:
303 case Intrinsic::x86_avx2_psra_w:
304 case Intrinsic::x86_avx2_psrai_d:
305 case Intrinsic::x86_avx2_psrai_w:
306 case Intrinsic::x86_avx512_psra_q_128:
307 case Intrinsic::x86_avx512_psrai_q_128:
308 case Intrinsic::x86_avx512_psra_q_256:
309 case Intrinsic::x86_avx512_psrai_q_256:
310 case Intrinsic::x86_avx512_psra_d_512:
311 case Intrinsic::x86_avx512_psra_q_512:
312 case Intrinsic::x86_avx512_psra_w_512:
313 case Intrinsic::x86_avx512_psrai_d_512:
314 case Intrinsic::x86_avx512_psrai_q_512:
315 case Intrinsic::x86_avx512_psrai_w_512:
316 LogicalShift = false; ShiftLeft = false;
318 case Intrinsic::x86_sse2_psrl_d:
319 case Intrinsic::x86_sse2_psrl_q:
320 case Intrinsic::x86_sse2_psrl_w:
321 case Intrinsic::x86_sse2_psrli_d:
322 case Intrinsic::x86_sse2_psrli_q:
323 case Intrinsic::x86_sse2_psrli_w:
324 case Intrinsic::x86_avx2_psrl_d:
325 case Intrinsic::x86_avx2_psrl_q:
326 case Intrinsic::x86_avx2_psrl_w:
327 case Intrinsic::x86_avx2_psrli_d:
328 case Intrinsic::x86_avx2_psrli_q:
329 case Intrinsic::x86_avx2_psrli_w:
330 case Intrinsic::x86_avx512_psrl_d_512:
331 case Intrinsic::x86_avx512_psrl_q_512:
332 case Intrinsic::x86_avx512_psrl_w_512:
333 case Intrinsic::x86_avx512_psrli_d_512:
334 case Intrinsic::x86_avx512_psrli_q_512:
335 case Intrinsic::x86_avx512_psrli_w_512:
336 LogicalShift = true; ShiftLeft = false;
338 case Intrinsic::x86_sse2_psll_d:
339 case Intrinsic::x86_sse2_psll_q:
340 case Intrinsic::x86_sse2_psll_w:
341 case Intrinsic::x86_sse2_pslli_d:
342 case Intrinsic::x86_sse2_pslli_q:
343 case Intrinsic::x86_sse2_pslli_w:
344 case Intrinsic::x86_avx2_psll_d:
345 case Intrinsic::x86_avx2_psll_q:
346 case Intrinsic::x86_avx2_psll_w:
347 case Intrinsic::x86_avx2_pslli_d:
348 case Intrinsic::x86_avx2_pslli_q:
349 case Intrinsic::x86_avx2_pslli_w:
350 case Intrinsic::x86_avx512_psll_d_512:
351 case Intrinsic::x86_avx512_psll_q_512:
352 case Intrinsic::x86_avx512_psll_w_512:
353 case Intrinsic::x86_avx512_pslli_d_512:
354 case Intrinsic::x86_avx512_pslli_q_512:
355 case Intrinsic::x86_avx512_pslli_w_512:
356 LogicalShift = true; ShiftLeft = true;
359 assert((LogicalShift || !ShiftLeft) && "Only logical shifts can shift left");
361 // Simplify if count is constant.
362 auto Arg1 = II.getArgOperand(1);
363 auto CAZ = dyn_cast<ConstantAggregateZero>(Arg1);
364 auto CDV = dyn_cast<ConstantDataVector>(Arg1);
365 auto CInt = dyn_cast<ConstantInt>(Arg1);
366 if (!CAZ && !CDV && !CInt)
371 // SSE2/AVX2 uses all the first 64-bits of the 128-bit vector
372 // operand to compute the shift amount.
373 auto VT = cast<VectorType>(CDV->getType());
374 unsigned BitWidth = VT->getElementType()->getPrimitiveSizeInBits();
375 assert((64 % BitWidth) == 0 && "Unexpected packed shift size");
376 unsigned NumSubElts = 64 / BitWidth;
378 // Concatenate the sub-elements to create the 64-bit value.
379 for (unsigned i = 0; i != NumSubElts; ++i) {
380 unsigned SubEltIdx = (NumSubElts - 1) - i;
381 auto SubElt = cast<ConstantInt>(CDV->getElementAsConstant(SubEltIdx));
382 Count = Count.shl(BitWidth);
383 Count |= SubElt->getValue().zextOrTrunc(64);
387 Count = CInt->getValue();
389 auto Vec = II.getArgOperand(0);
390 auto VT = cast<VectorType>(Vec->getType());
391 auto SVT = VT->getElementType();
392 unsigned VWidth = VT->getNumElements();
393 unsigned BitWidth = SVT->getPrimitiveSizeInBits();
395 // If shift-by-zero then just return the original value.
399 // Handle cases when Shift >= BitWidth.
400 if (Count.uge(BitWidth)) {
401 // If LogicalShift - just return zero.
403 return ConstantAggregateZero::get(VT);
405 // If ArithmeticShift - clamp Shift to (BitWidth - 1).
406 Count = APInt(64, BitWidth - 1);
409 // Get a constant vector of the same type as the first operand.
410 auto ShiftAmt = ConstantInt::get(SVT, Count.zextOrTrunc(BitWidth));
411 auto ShiftVec = Builder.CreateVectorSplat(VWidth, ShiftAmt);
414 return Builder.CreateShl(Vec, ShiftVec);
417 return Builder.CreateLShr(Vec, ShiftVec);
419 return Builder.CreateAShr(Vec, ShiftVec);
422 // Attempt to simplify AVX2 per-element shift intrinsics to a generic IR shift.
423 // Unlike the generic IR shifts, the intrinsics have defined behaviour for out
424 // of range shift amounts (logical - set to zero, arithmetic - splat sign bit).
425 static Value *simplifyX86varShift(const IntrinsicInst &II,
426 InstCombiner::BuilderTy &Builder) {
427 bool LogicalShift = false;
428 bool ShiftLeft = false;
430 switch (II.getIntrinsicID()) {
431 default: llvm_unreachable("Unexpected intrinsic!");
432 case Intrinsic::x86_avx2_psrav_d:
433 case Intrinsic::x86_avx2_psrav_d_256:
434 case Intrinsic::x86_avx512_psrav_q_128:
435 case Intrinsic::x86_avx512_psrav_q_256:
436 case Intrinsic::x86_avx512_psrav_d_512:
437 case Intrinsic::x86_avx512_psrav_q_512:
438 case Intrinsic::x86_avx512_psrav_w_128:
439 case Intrinsic::x86_avx512_psrav_w_256:
440 case Intrinsic::x86_avx512_psrav_w_512:
441 LogicalShift = false;
444 case Intrinsic::x86_avx2_psrlv_d:
445 case Intrinsic::x86_avx2_psrlv_d_256:
446 case Intrinsic::x86_avx2_psrlv_q:
447 case Intrinsic::x86_avx2_psrlv_q_256:
448 case Intrinsic::x86_avx512_psrlv_d_512:
449 case Intrinsic::x86_avx512_psrlv_q_512:
450 case Intrinsic::x86_avx512_psrlv_w_128:
451 case Intrinsic::x86_avx512_psrlv_w_256:
452 case Intrinsic::x86_avx512_psrlv_w_512:
456 case Intrinsic::x86_avx2_psllv_d:
457 case Intrinsic::x86_avx2_psllv_d_256:
458 case Intrinsic::x86_avx2_psllv_q:
459 case Intrinsic::x86_avx2_psllv_q_256:
460 case Intrinsic::x86_avx512_psllv_d_512:
461 case Intrinsic::x86_avx512_psllv_q_512:
462 case Intrinsic::x86_avx512_psllv_w_128:
463 case Intrinsic::x86_avx512_psllv_w_256:
464 case Intrinsic::x86_avx512_psllv_w_512:
469 assert((LogicalShift || !ShiftLeft) && "Only logical shifts can shift left");
471 // Simplify if all shift amounts are constant/undef.
472 auto *CShift = dyn_cast<Constant>(II.getArgOperand(1));
476 auto Vec = II.getArgOperand(0);
477 auto VT = cast<VectorType>(II.getType());
478 auto SVT = VT->getVectorElementType();
479 int NumElts = VT->getNumElements();
480 int BitWidth = SVT->getIntegerBitWidth();
482 // Collect each element's shift amount.
483 // We also collect special cases: UNDEF = -1, OUT-OF-RANGE = BitWidth.
484 bool AnyOutOfRange = false;
485 SmallVector<int, 8> ShiftAmts;
486 for (int I = 0; I < NumElts; ++I) {
487 auto *CElt = CShift->getAggregateElement(I);
488 if (CElt && isa<UndefValue>(CElt)) {
489 ShiftAmts.push_back(-1);
493 auto *COp = dyn_cast_or_null<ConstantInt>(CElt);
497 // Handle out of range shifts.
498 // If LogicalShift - set to BitWidth (special case).
499 // If ArithmeticShift - set to (BitWidth - 1) (sign splat).
500 APInt ShiftVal = COp->getValue();
501 if (ShiftVal.uge(BitWidth)) {
502 AnyOutOfRange = LogicalShift;
503 ShiftAmts.push_back(LogicalShift ? BitWidth : BitWidth - 1);
507 ShiftAmts.push_back((int)ShiftVal.getZExtValue());
510 // If all elements out of range or UNDEF, return vector of zeros/undefs.
511 // ArithmeticShift should only hit this if they are all UNDEF.
512 auto OutOfRange = [&](int Idx) { return (Idx < 0) || (BitWidth <= Idx); };
513 if (all_of(ShiftAmts, OutOfRange)) {
514 SmallVector<Constant *, 8> ConstantVec;
515 for (int Idx : ShiftAmts) {
517 ConstantVec.push_back(UndefValue::get(SVT));
519 assert(LogicalShift && "Logical shift expected");
520 ConstantVec.push_back(ConstantInt::getNullValue(SVT));
523 return ConstantVector::get(ConstantVec);
526 // We can't handle only some out of range values with generic logical shifts.
530 // Build the shift amount constant vector.
531 SmallVector<Constant *, 8> ShiftVecAmts;
532 for (int Idx : ShiftAmts) {
534 ShiftVecAmts.push_back(UndefValue::get(SVT));
536 ShiftVecAmts.push_back(ConstantInt::get(SVT, Idx));
538 auto ShiftVec = ConstantVector::get(ShiftVecAmts);
541 return Builder.CreateShl(Vec, ShiftVec);
544 return Builder.CreateLShr(Vec, ShiftVec);
546 return Builder.CreateAShr(Vec, ShiftVec);
549 static Value *simplifyX86muldq(const IntrinsicInst &II,
550 InstCombiner::BuilderTy &Builder) {
551 Value *Arg0 = II.getArgOperand(0);
552 Value *Arg1 = II.getArgOperand(1);
553 Type *ResTy = II.getType();
554 assert(Arg0->getType()->getScalarSizeInBits() == 32 &&
555 Arg1->getType()->getScalarSizeInBits() == 32 &&
556 ResTy->getScalarSizeInBits() == 64 && "Unexpected muldq/muludq types");
558 // muldq/muludq(undef, undef) -> zero (matches generic mul behavior)
559 if (isa<UndefValue>(Arg0) || isa<UndefValue>(Arg1))
560 return ConstantAggregateZero::get(ResTy);
563 // PMULDQ = (mul(vXi64 sext(shuffle<0,2,..>(Arg0)),
564 // vXi64 sext(shuffle<0,2,..>(Arg1))))
565 // PMULUDQ = (mul(vXi64 zext(shuffle<0,2,..>(Arg0)),
566 // vXi64 zext(shuffle<0,2,..>(Arg1))))
567 if (!isa<Constant>(Arg0) || !isa<Constant>(Arg1))
570 unsigned NumElts = ResTy->getVectorNumElements();
571 assert(Arg0->getType()->getVectorNumElements() == (2 * NumElts) &&
572 Arg1->getType()->getVectorNumElements() == (2 * NumElts) &&
573 "Unexpected muldq/muludq types");
575 unsigned IntrinsicID = II.getIntrinsicID();
576 bool IsSigned = (Intrinsic::x86_sse41_pmuldq == IntrinsicID ||
577 Intrinsic::x86_avx2_pmul_dq == IntrinsicID ||
578 Intrinsic::x86_avx512_pmul_dq_512 == IntrinsicID);
580 SmallVector<unsigned, 16> ShuffleMask;
581 for (unsigned i = 0; i != NumElts; ++i)
582 ShuffleMask.push_back(i * 2);
584 auto *LHS = Builder.CreateShuffleVector(Arg0, Arg0, ShuffleMask);
585 auto *RHS = Builder.CreateShuffleVector(Arg1, Arg1, ShuffleMask);
588 LHS = Builder.CreateSExt(LHS, ResTy);
589 RHS = Builder.CreateSExt(RHS, ResTy);
591 LHS = Builder.CreateZExt(LHS, ResTy);
592 RHS = Builder.CreateZExt(RHS, ResTy);
595 return Builder.CreateMul(LHS, RHS);
598 static Value *simplifyX86pack(IntrinsicInst &II, InstCombiner &IC,
599 InstCombiner::BuilderTy &Builder, bool IsSigned) {
600 Value *Arg0 = II.getArgOperand(0);
601 Value *Arg1 = II.getArgOperand(1);
602 Type *ResTy = II.getType();
604 // Fast all undef handling.
605 if (isa<UndefValue>(Arg0) && isa<UndefValue>(Arg1))
606 return UndefValue::get(ResTy);
608 Type *ArgTy = Arg0->getType();
609 unsigned NumLanes = ResTy->getPrimitiveSizeInBits() / 128;
610 unsigned NumDstElts = ResTy->getVectorNumElements();
611 unsigned NumSrcElts = ArgTy->getVectorNumElements();
612 assert(NumDstElts == (2 * NumSrcElts) && "Unexpected packing types");
614 unsigned NumDstEltsPerLane = NumDstElts / NumLanes;
615 unsigned NumSrcEltsPerLane = NumSrcElts / NumLanes;
616 unsigned DstScalarSizeInBits = ResTy->getScalarSizeInBits();
617 assert(ArgTy->getScalarSizeInBits() == (2 * DstScalarSizeInBits) &&
618 "Unexpected packing types");
621 auto *Cst0 = dyn_cast<Constant>(Arg0);
622 auto *Cst1 = dyn_cast<Constant>(Arg1);
626 SmallVector<Constant *, 32> Vals;
627 for (unsigned Lane = 0; Lane != NumLanes; ++Lane) {
628 for (unsigned Elt = 0; Elt != NumDstEltsPerLane; ++Elt) {
629 unsigned SrcIdx = Lane * NumSrcEltsPerLane + Elt % NumSrcEltsPerLane;
630 auto *Cst = (Elt >= NumSrcEltsPerLane) ? Cst1 : Cst0;
631 auto *COp = Cst->getAggregateElement(SrcIdx);
632 if (COp && isa<UndefValue>(COp)) {
633 Vals.push_back(UndefValue::get(ResTy->getScalarType()));
637 auto *CInt = dyn_cast_or_null<ConstantInt>(COp);
641 APInt Val = CInt->getValue();
642 assert(Val.getBitWidth() == ArgTy->getScalarSizeInBits() &&
643 "Unexpected constant bitwidth");
646 // PACKSS: Truncate signed value with signed saturation.
647 // Source values less than dst minint are saturated to minint.
648 // Source values greater than dst maxint are saturated to maxint.
649 if (Val.isSignedIntN(DstScalarSizeInBits))
650 Val = Val.trunc(DstScalarSizeInBits);
651 else if (Val.isNegative())
652 Val = APInt::getSignedMinValue(DstScalarSizeInBits);
654 Val = APInt::getSignedMaxValue(DstScalarSizeInBits);
656 // PACKUS: Truncate signed value with unsigned saturation.
657 // Source values less than zero are saturated to zero.
658 // Source values greater than dst maxuint are saturated to maxuint.
659 if (Val.isIntN(DstScalarSizeInBits))
660 Val = Val.trunc(DstScalarSizeInBits);
661 else if (Val.isNegative())
662 Val = APInt::getNullValue(DstScalarSizeInBits);
664 Val = APInt::getAllOnesValue(DstScalarSizeInBits);
667 Vals.push_back(ConstantInt::get(ResTy->getScalarType(), Val));
671 return ConstantVector::get(Vals);
674 static Value *simplifyX86movmsk(const IntrinsicInst &II,
675 InstCombiner::BuilderTy &Builder) {
676 Value *Arg = II.getArgOperand(0);
677 Type *ResTy = II.getType();
678 Type *ArgTy = Arg->getType();
680 // movmsk(undef) -> zero as we must ensure the upper bits are zero.
681 if (isa<UndefValue>(Arg))
682 return Constant::getNullValue(ResTy);
684 // We can't easily peek through x86_mmx types.
685 if (!ArgTy->isVectorTy())
688 auto *C = dyn_cast<Constant>(Arg);
692 // Extract signbits of the vector input and pack into integer result.
693 APInt Result(ResTy->getPrimitiveSizeInBits(), 0);
694 for (unsigned I = 0, E = ArgTy->getVectorNumElements(); I != E; ++I) {
695 auto *COp = C->getAggregateElement(I);
698 if (isa<UndefValue>(COp))
701 auto *CInt = dyn_cast<ConstantInt>(COp);
702 auto *CFp = dyn_cast<ConstantFP>(COp);
706 if ((CInt && CInt->isNegative()) || (CFp && CFp->isNegative()))
710 return Constant::getIntegerValue(ResTy, Result);
713 static Value *simplifyX86insertps(const IntrinsicInst &II,
714 InstCombiner::BuilderTy &Builder) {
715 auto *CInt = dyn_cast<ConstantInt>(II.getArgOperand(2));
719 VectorType *VecTy = cast<VectorType>(II.getType());
720 assert(VecTy->getNumElements() == 4 && "insertps with wrong vector type");
722 // The immediate permute control byte looks like this:
723 // [3:0] - zero mask for each 32-bit lane
724 // [5:4] - select one 32-bit destination lane
725 // [7:6] - select one 32-bit source lane
727 uint8_t Imm = CInt->getZExtValue();
728 uint8_t ZMask = Imm & 0xf;
729 uint8_t DestLane = (Imm >> 4) & 0x3;
730 uint8_t SourceLane = (Imm >> 6) & 0x3;
732 ConstantAggregateZero *ZeroVector = ConstantAggregateZero::get(VecTy);
734 // If all zero mask bits are set, this was just a weird way to
735 // generate a zero vector.
739 // Initialize by passing all of the first source bits through.
740 uint32_t ShuffleMask[4] = { 0, 1, 2, 3 };
742 // We may replace the second operand with the zero vector.
743 Value *V1 = II.getArgOperand(1);
746 // If the zero mask is being used with a single input or the zero mask
747 // overrides the destination lane, this is a shuffle with the zero vector.
748 if ((II.getArgOperand(0) == II.getArgOperand(1)) ||
749 (ZMask & (1 << DestLane))) {
751 // We may still move 32-bits of the first source vector from one lane
753 ShuffleMask[DestLane] = SourceLane;
754 // The zero mask may override the previous insert operation.
755 for (unsigned i = 0; i < 4; ++i)
756 if ((ZMask >> i) & 0x1)
757 ShuffleMask[i] = i + 4;
759 // TODO: Model this case as 2 shuffles or a 'logical and' plus shuffle?
763 // Replace the selected destination lane with the selected source lane.
764 ShuffleMask[DestLane] = SourceLane + 4;
767 return Builder.CreateShuffleVector(II.getArgOperand(0), V1, ShuffleMask);
770 /// Attempt to simplify SSE4A EXTRQ/EXTRQI instructions using constant folding
771 /// or conversion to a shuffle vector.
772 static Value *simplifyX86extrq(IntrinsicInst &II, Value *Op0,
773 ConstantInt *CILength, ConstantInt *CIIndex,
774 InstCombiner::BuilderTy &Builder) {
775 auto LowConstantHighUndef = [&](uint64_t Val) {
776 Type *IntTy64 = Type::getInt64Ty(II.getContext());
777 Constant *Args[] = {ConstantInt::get(IntTy64, Val),
778 UndefValue::get(IntTy64)};
779 return ConstantVector::get(Args);
782 // See if we're dealing with constant values.
783 Constant *C0 = dyn_cast<Constant>(Op0);
785 C0 ? dyn_cast_or_null<ConstantInt>(C0->getAggregateElement((unsigned)0))
788 // Attempt to constant fold.
789 if (CILength && CIIndex) {
790 // From AMD documentation: "The bit index and field length are each six
791 // bits in length other bits of the field are ignored."
792 APInt APIndex = CIIndex->getValue().zextOrTrunc(6);
793 APInt APLength = CILength->getValue().zextOrTrunc(6);
795 unsigned Index = APIndex.getZExtValue();
797 // From AMD documentation: "a value of zero in the field length is
798 // defined as length of 64".
799 unsigned Length = APLength == 0 ? 64 : APLength.getZExtValue();
801 // From AMD documentation: "If the sum of the bit index + length field
802 // is greater than 64, the results are undefined".
803 unsigned End = Index + Length;
805 // Note that both field index and field length are 8-bit quantities.
806 // Since variables 'Index' and 'Length' are unsigned values
807 // obtained from zero-extending field index and field length
808 // respectively, their sum should never wrap around.
810 return UndefValue::get(II.getType());
812 // If we are inserting whole bytes, we can convert this to a shuffle.
813 // Lowering can recognize EXTRQI shuffle masks.
814 if ((Length % 8) == 0 && (Index % 8) == 0) {
815 // Convert bit indices to byte indices.
819 Type *IntTy8 = Type::getInt8Ty(II.getContext());
820 Type *IntTy32 = Type::getInt32Ty(II.getContext());
821 VectorType *ShufTy = VectorType::get(IntTy8, 16);
823 SmallVector<Constant *, 16> ShuffleMask;
824 for (int i = 0; i != (int)Length; ++i)
825 ShuffleMask.push_back(
826 Constant::getIntegerValue(IntTy32, APInt(32, i + Index)));
827 for (int i = Length; i != 8; ++i)
828 ShuffleMask.push_back(
829 Constant::getIntegerValue(IntTy32, APInt(32, i + 16)));
830 for (int i = 8; i != 16; ++i)
831 ShuffleMask.push_back(UndefValue::get(IntTy32));
833 Value *SV = Builder.CreateShuffleVector(
834 Builder.CreateBitCast(Op0, ShufTy),
835 ConstantAggregateZero::get(ShufTy), ConstantVector::get(ShuffleMask));
836 return Builder.CreateBitCast(SV, II.getType());
839 // Constant Fold - shift Index'th bit to lowest position and mask off
842 APInt Elt = CI0->getValue();
843 Elt.lshrInPlace(Index);
844 Elt = Elt.zextOrTrunc(Length);
845 return LowConstantHighUndef(Elt.getZExtValue());
848 // If we were an EXTRQ call, we'll save registers if we convert to EXTRQI.
849 if (II.getIntrinsicID() == Intrinsic::x86_sse4a_extrq) {
850 Value *Args[] = {Op0, CILength, CIIndex};
851 Module *M = II.getModule();
852 Value *F = Intrinsic::getDeclaration(M, Intrinsic::x86_sse4a_extrqi);
853 return Builder.CreateCall(F, Args);
857 // Constant Fold - extraction from zero is always {zero, undef}.
858 if (CI0 && CI0->equalsInt(0))
859 return LowConstantHighUndef(0);
864 /// Attempt to simplify SSE4A INSERTQ/INSERTQI instructions using constant
865 /// folding or conversion to a shuffle vector.
866 static Value *simplifyX86insertq(IntrinsicInst &II, Value *Op0, Value *Op1,
867 APInt APLength, APInt APIndex,
868 InstCombiner::BuilderTy &Builder) {
869 // From AMD documentation: "The bit index and field length are each six bits
870 // in length other bits of the field are ignored."
871 APIndex = APIndex.zextOrTrunc(6);
872 APLength = APLength.zextOrTrunc(6);
874 // Attempt to constant fold.
875 unsigned Index = APIndex.getZExtValue();
877 // From AMD documentation: "a value of zero in the field length is
878 // defined as length of 64".
879 unsigned Length = APLength == 0 ? 64 : APLength.getZExtValue();
881 // From AMD documentation: "If the sum of the bit index + length field
882 // is greater than 64, the results are undefined".
883 unsigned End = Index + Length;
885 // Note that both field index and field length are 8-bit quantities.
886 // Since variables 'Index' and 'Length' are unsigned values
887 // obtained from zero-extending field index and field length
888 // respectively, their sum should never wrap around.
890 return UndefValue::get(II.getType());
892 // If we are inserting whole bytes, we can convert this to a shuffle.
893 // Lowering can recognize INSERTQI shuffle masks.
894 if ((Length % 8) == 0 && (Index % 8) == 0) {
895 // Convert bit indices to byte indices.
899 Type *IntTy8 = Type::getInt8Ty(II.getContext());
900 Type *IntTy32 = Type::getInt32Ty(II.getContext());
901 VectorType *ShufTy = VectorType::get(IntTy8, 16);
903 SmallVector<Constant *, 16> ShuffleMask;
904 for (int i = 0; i != (int)Index; ++i)
905 ShuffleMask.push_back(Constant::getIntegerValue(IntTy32, APInt(32, i)));
906 for (int i = 0; i != (int)Length; ++i)
907 ShuffleMask.push_back(
908 Constant::getIntegerValue(IntTy32, APInt(32, i + 16)));
909 for (int i = Index + Length; i != 8; ++i)
910 ShuffleMask.push_back(Constant::getIntegerValue(IntTy32, APInt(32, i)));
911 for (int i = 8; i != 16; ++i)
912 ShuffleMask.push_back(UndefValue::get(IntTy32));
914 Value *SV = Builder.CreateShuffleVector(Builder.CreateBitCast(Op0, ShufTy),
915 Builder.CreateBitCast(Op1, ShufTy),
916 ConstantVector::get(ShuffleMask));
917 return Builder.CreateBitCast(SV, II.getType());
920 // See if we're dealing with constant values.
921 Constant *C0 = dyn_cast<Constant>(Op0);
922 Constant *C1 = dyn_cast<Constant>(Op1);
924 C0 ? dyn_cast_or_null<ConstantInt>(C0->getAggregateElement((unsigned)0))
927 C1 ? dyn_cast_or_null<ConstantInt>(C1->getAggregateElement((unsigned)0))
930 // Constant Fold - insert bottom Length bits starting at the Index'th bit.
932 APInt V00 = CI00->getValue();
933 APInt V10 = CI10->getValue();
934 APInt Mask = APInt::getLowBitsSet(64, Length).shl(Index);
936 V10 = V10.zextOrTrunc(Length).zextOrTrunc(64).shl(Index);
937 APInt Val = V00 | V10;
938 Type *IntTy64 = Type::getInt64Ty(II.getContext());
939 Constant *Args[] = {ConstantInt::get(IntTy64, Val.getZExtValue()),
940 UndefValue::get(IntTy64)};
941 return ConstantVector::get(Args);
944 // If we were an INSERTQ call, we'll save demanded elements if we convert to
946 if (II.getIntrinsicID() == Intrinsic::x86_sse4a_insertq) {
947 Type *IntTy8 = Type::getInt8Ty(II.getContext());
948 Constant *CILength = ConstantInt::get(IntTy8, Length, false);
949 Constant *CIIndex = ConstantInt::get(IntTy8, Index, false);
951 Value *Args[] = {Op0, Op1, CILength, CIIndex};
952 Module *M = II.getModule();
953 Value *F = Intrinsic::getDeclaration(M, Intrinsic::x86_sse4a_insertqi);
954 return Builder.CreateCall(F, Args);
960 /// Attempt to convert pshufb* to shufflevector if the mask is constant.
961 static Value *simplifyX86pshufb(const IntrinsicInst &II,
962 InstCombiner::BuilderTy &Builder) {
963 Constant *V = dyn_cast<Constant>(II.getArgOperand(1));
967 auto *VecTy = cast<VectorType>(II.getType());
968 auto *MaskEltTy = Type::getInt32Ty(II.getContext());
969 unsigned NumElts = VecTy->getNumElements();
970 assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
971 "Unexpected number of elements in shuffle mask!");
973 // Construct a shuffle mask from constant integers or UNDEFs.
974 Constant *Indexes[64] = {nullptr};
976 // Each byte in the shuffle control mask forms an index to permute the
977 // corresponding byte in the destination operand.
978 for (unsigned I = 0; I < NumElts; ++I) {
979 Constant *COp = V->getAggregateElement(I);
980 if (!COp || (!isa<UndefValue>(COp) && !isa<ConstantInt>(COp)))
983 if (isa<UndefValue>(COp)) {
984 Indexes[I] = UndefValue::get(MaskEltTy);
988 int8_t Index = cast<ConstantInt>(COp)->getValue().getZExtValue();
990 // If the most significant bit (bit[7]) of each byte of the shuffle
991 // control mask is set, then zero is written in the result byte.
992 // The zero vector is in the right-hand side of the resulting
995 // The value of each index for the high 128-bit lane is the least
996 // significant 4 bits of the respective shuffle control byte.
997 Index = ((Index < 0) ? NumElts : Index & 0x0F) + (I & 0xF0);
998 Indexes[I] = ConstantInt::get(MaskEltTy, Index);
1001 auto ShuffleMask = ConstantVector::get(makeArrayRef(Indexes, NumElts));
1002 auto V1 = II.getArgOperand(0);
1003 auto V2 = Constant::getNullValue(VecTy);
1004 return Builder.CreateShuffleVector(V1, V2, ShuffleMask);
1007 /// Attempt to convert vpermilvar* to shufflevector if the mask is constant.
1008 static Value *simplifyX86vpermilvar(const IntrinsicInst &II,
1009 InstCombiner::BuilderTy &Builder) {
1010 Constant *V = dyn_cast<Constant>(II.getArgOperand(1));
1014 auto *VecTy = cast<VectorType>(II.getType());
1015 auto *MaskEltTy = Type::getInt32Ty(II.getContext());
1016 unsigned NumElts = VecTy->getVectorNumElements();
1017 bool IsPD = VecTy->getScalarType()->isDoubleTy();
1018 unsigned NumLaneElts = IsPD ? 2 : 4;
1019 assert(NumElts == 16 || NumElts == 8 || NumElts == 4 || NumElts == 2);
1021 // Construct a shuffle mask from constant integers or UNDEFs.
1022 Constant *Indexes[16] = {nullptr};
1024 // The intrinsics only read one or two bits, clear the rest.
1025 for (unsigned I = 0; I < NumElts; ++I) {
1026 Constant *COp = V->getAggregateElement(I);
1027 if (!COp || (!isa<UndefValue>(COp) && !isa<ConstantInt>(COp)))
1030 if (isa<UndefValue>(COp)) {
1031 Indexes[I] = UndefValue::get(MaskEltTy);
1035 APInt Index = cast<ConstantInt>(COp)->getValue();
1036 Index = Index.zextOrTrunc(32).getLoBits(2);
1038 // The PD variants uses bit 1 to select per-lane element index, so
1039 // shift down to convert to generic shuffle mask index.
1041 Index.lshrInPlace(1);
1043 // The _256 variants are a bit trickier since the mask bits always index
1044 // into the corresponding 128 half. In order to convert to a generic
1045 // shuffle, we have to make that explicit.
1046 Index += APInt(32, (I / NumLaneElts) * NumLaneElts);
1048 Indexes[I] = ConstantInt::get(MaskEltTy, Index);
1051 auto ShuffleMask = ConstantVector::get(makeArrayRef(Indexes, NumElts));
1052 auto V1 = II.getArgOperand(0);
1053 auto V2 = UndefValue::get(V1->getType());
1054 return Builder.CreateShuffleVector(V1, V2, ShuffleMask);
1057 /// Attempt to convert vpermd/vpermps to shufflevector if the mask is constant.
1058 static Value *simplifyX86vpermv(const IntrinsicInst &II,
1059 InstCombiner::BuilderTy &Builder) {
1060 auto *V = dyn_cast<Constant>(II.getArgOperand(1));
1064 auto *VecTy = cast<VectorType>(II.getType());
1065 auto *MaskEltTy = Type::getInt32Ty(II.getContext());
1066 unsigned Size = VecTy->getNumElements();
1067 assert((Size == 4 || Size == 8 || Size == 16 || Size == 32 || Size == 64) &&
1068 "Unexpected shuffle mask size");
1070 // Construct a shuffle mask from constant integers or UNDEFs.
1071 Constant *Indexes[64] = {nullptr};
1073 for (unsigned I = 0; I < Size; ++I) {
1074 Constant *COp = V->getAggregateElement(I);
1075 if (!COp || (!isa<UndefValue>(COp) && !isa<ConstantInt>(COp)))
1078 if (isa<UndefValue>(COp)) {
1079 Indexes[I] = UndefValue::get(MaskEltTy);
1083 uint32_t Index = cast<ConstantInt>(COp)->getZExtValue();
1085 Indexes[I] = ConstantInt::get(MaskEltTy, Index);
1088 auto ShuffleMask = ConstantVector::get(makeArrayRef(Indexes, Size));
1089 auto V1 = II.getArgOperand(0);
1090 auto V2 = UndefValue::get(VecTy);
1091 return Builder.CreateShuffleVector(V1, V2, ShuffleMask);
1094 /// The shuffle mask for a perm2*128 selects any two halves of two 256-bit
1095 /// source vectors, unless a zero bit is set. If a zero bit is set,
1096 /// then ignore that half of the mask and clear that half of the vector.
1097 static Value *simplifyX86vperm2(const IntrinsicInst &II,
1098 InstCombiner::BuilderTy &Builder) {
1099 auto *CInt = dyn_cast<ConstantInt>(II.getArgOperand(2));
1103 VectorType *VecTy = cast<VectorType>(II.getType());
1104 ConstantAggregateZero *ZeroVector = ConstantAggregateZero::get(VecTy);
1106 // The immediate permute control byte looks like this:
1107 // [1:0] - select 128 bits from sources for low half of destination
1109 // [3] - zero low half of destination
1110 // [5:4] - select 128 bits from sources for high half of destination
1112 // [7] - zero high half of destination
1114 uint8_t Imm = CInt->getZExtValue();
1116 bool LowHalfZero = Imm & 0x08;
1117 bool HighHalfZero = Imm & 0x80;
1119 // If both zero mask bits are set, this was just a weird way to
1120 // generate a zero vector.
1121 if (LowHalfZero && HighHalfZero)
1124 // If 0 or 1 zero mask bits are set, this is a simple shuffle.
1125 unsigned NumElts = VecTy->getNumElements();
1126 unsigned HalfSize = NumElts / 2;
1127 SmallVector<uint32_t, 8> ShuffleMask(NumElts);
1129 // The high bit of the selection field chooses the 1st or 2nd operand.
1130 bool LowInputSelect = Imm & 0x02;
1131 bool HighInputSelect = Imm & 0x20;
1133 // The low bit of the selection field chooses the low or high half
1134 // of the selected operand.
1135 bool LowHalfSelect = Imm & 0x01;
1136 bool HighHalfSelect = Imm & 0x10;
1138 // Determine which operand(s) are actually in use for this instruction.
1139 Value *V0 = LowInputSelect ? II.getArgOperand(1) : II.getArgOperand(0);
1140 Value *V1 = HighInputSelect ? II.getArgOperand(1) : II.getArgOperand(0);
1142 // If needed, replace operands based on zero mask.
1143 V0 = LowHalfZero ? ZeroVector : V0;
1144 V1 = HighHalfZero ? ZeroVector : V1;
1146 // Permute low half of result.
1147 unsigned StartIndex = LowHalfSelect ? HalfSize : 0;
1148 for (unsigned i = 0; i < HalfSize; ++i)
1149 ShuffleMask[i] = StartIndex + i;
1151 // Permute high half of result.
1152 StartIndex = HighHalfSelect ? HalfSize : 0;
1153 StartIndex += NumElts;
1154 for (unsigned i = 0; i < HalfSize; ++i)
1155 ShuffleMask[i + HalfSize] = StartIndex + i;
1157 return Builder.CreateShuffleVector(V0, V1, ShuffleMask);
1160 /// Decode XOP integer vector comparison intrinsics.
1161 static Value *simplifyX86vpcom(const IntrinsicInst &II,
1162 InstCombiner::BuilderTy &Builder,
1164 if (auto *CInt = dyn_cast<ConstantInt>(II.getArgOperand(2))) {
1165 uint64_t Imm = CInt->getZExtValue() & 0x7;
1166 VectorType *VecTy = cast<VectorType>(II.getType());
1167 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
1171 Pred = IsSigned ? ICmpInst::ICMP_SLT : ICmpInst::ICMP_ULT;
1174 Pred = IsSigned ? ICmpInst::ICMP_SLE : ICmpInst::ICMP_ULE;
1177 Pred = IsSigned ? ICmpInst::ICMP_SGT : ICmpInst::ICMP_UGT;
1180 Pred = IsSigned ? ICmpInst::ICMP_SGE : ICmpInst::ICMP_UGE;
1183 Pred = ICmpInst::ICMP_EQ; break;
1185 Pred = ICmpInst::ICMP_NE; break;
1187 return ConstantInt::getSigned(VecTy, 0); // FALSE
1189 return ConstantInt::getSigned(VecTy, -1); // TRUE
1192 if (Value *Cmp = Builder.CreateICmp(Pred, II.getArgOperand(0),
1193 II.getArgOperand(1)))
1194 return Builder.CreateSExtOrTrunc(Cmp, VecTy);
1199 // Emit a select instruction and appropriate bitcasts to help simplify
1200 // masked intrinsics.
1201 static Value *emitX86MaskSelect(Value *Mask, Value *Op0, Value *Op1,
1202 InstCombiner::BuilderTy &Builder) {
1203 unsigned VWidth = Op0->getType()->getVectorNumElements();
1205 // If the mask is all ones we don't need the select. But we need to check
1206 // only the bit thats will be used in case VWidth is less than 8.
1207 if (auto *C = dyn_cast<ConstantInt>(Mask))
1208 if (C->getValue().zextOrTrunc(VWidth).isAllOnesValue())
1211 auto *MaskTy = VectorType::get(Builder.getInt1Ty(),
1212 cast<IntegerType>(Mask->getType())->getBitWidth());
1213 Mask = Builder.CreateBitCast(Mask, MaskTy);
1215 // If we have less than 8 elements, then the starting mask was an i8 and
1216 // we need to extract down to the right number of elements.
1218 uint32_t Indices[4];
1219 for (unsigned i = 0; i != VWidth; ++i)
1221 Mask = Builder.CreateShuffleVector(Mask, Mask,
1222 makeArrayRef(Indices, VWidth),
1226 return Builder.CreateSelect(Mask, Op0, Op1);
1229 static Value *simplifyMinnumMaxnum(const IntrinsicInst &II) {
1230 Value *Arg0 = II.getArgOperand(0);
1231 Value *Arg1 = II.getArgOperand(1);
1237 const auto *C1 = dyn_cast<ConstantFP>(Arg1);
1239 // fmin(x, nan) -> x
1240 if (C1 && C1->isNaN())
1243 // This is the value because if undef were NaN, we would return the other
1244 // value and cannot return a NaN unless both operands are.
1246 // fmin(undef, x) -> x
1247 if (isa<UndefValue>(Arg0))
1250 // fmin(x, undef) -> x
1251 if (isa<UndefValue>(Arg1))
1256 if (II.getIntrinsicID() == Intrinsic::minnum) {
1257 // fmin(x, fmin(x, y)) -> fmin(x, y)
1258 // fmin(y, fmin(x, y)) -> fmin(x, y)
1259 if (match(Arg1, m_FMin(m_Value(X), m_Value(Y)))) {
1260 if (Arg0 == X || Arg0 == Y)
1264 // fmin(fmin(x, y), x) -> fmin(x, y)
1265 // fmin(fmin(x, y), y) -> fmin(x, y)
1266 if (match(Arg0, m_FMin(m_Value(X), m_Value(Y)))) {
1267 if (Arg1 == X || Arg1 == Y)
1271 // TODO: fmin(nnan x, inf) -> x
1272 // TODO: fmin(nnan ninf x, flt_max) -> x
1273 if (C1 && C1->isInfinity()) {
1274 // fmin(x, -inf) -> -inf
1275 if (C1->isNegative())
1279 assert(II.getIntrinsicID() == Intrinsic::maxnum);
1280 // fmax(x, fmax(x, y)) -> fmax(x, y)
1281 // fmax(y, fmax(x, y)) -> fmax(x, y)
1282 if (match(Arg1, m_FMax(m_Value(X), m_Value(Y)))) {
1283 if (Arg0 == X || Arg0 == Y)
1287 // fmax(fmax(x, y), x) -> fmax(x, y)
1288 // fmax(fmax(x, y), y) -> fmax(x, y)
1289 if (match(Arg0, m_FMax(m_Value(X), m_Value(Y)))) {
1290 if (Arg1 == X || Arg1 == Y)
1294 // TODO: fmax(nnan x, -inf) -> x
1295 // TODO: fmax(nnan ninf x, -flt_max) -> x
1296 if (C1 && C1->isInfinity()) {
1297 // fmax(x, inf) -> inf
1298 if (!C1->isNegative())
1305 static bool maskIsAllOneOrUndef(Value *Mask) {
1306 auto *ConstMask = dyn_cast<Constant>(Mask);
1309 if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))
1311 for (unsigned I = 0, E = ConstMask->getType()->getVectorNumElements(); I != E;
1313 if (auto *MaskElt = ConstMask->getAggregateElement(I))
1314 if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))
1321 static Value *simplifyMaskedLoad(const IntrinsicInst &II,
1322 InstCombiner::BuilderTy &Builder) {
1323 // If the mask is all ones or undefs, this is a plain vector load of the 1st
1325 if (maskIsAllOneOrUndef(II.getArgOperand(2))) {
1326 Value *LoadPtr = II.getArgOperand(0);
1327 unsigned Alignment = cast<ConstantInt>(II.getArgOperand(1))->getZExtValue();
1328 return Builder.CreateAlignedLoad(LoadPtr, Alignment, "unmaskedload");
1334 static Instruction *simplifyMaskedStore(IntrinsicInst &II, InstCombiner &IC) {
1335 auto *ConstMask = dyn_cast<Constant>(II.getArgOperand(3));
1339 // If the mask is all zeros, this instruction does nothing.
1340 if (ConstMask->isNullValue())
1341 return IC.eraseInstFromFunction(II);
1343 // If the mask is all ones, this is a plain vector store of the 1st argument.
1344 if (ConstMask->isAllOnesValue()) {
1345 Value *StorePtr = II.getArgOperand(1);
1346 unsigned Alignment = cast<ConstantInt>(II.getArgOperand(2))->getZExtValue();
1347 return new StoreInst(II.getArgOperand(0), StorePtr, false, Alignment);
1353 static Instruction *simplifyMaskedGather(IntrinsicInst &II, InstCombiner &IC) {
1354 // If the mask is all zeros, return the "passthru" argument of the gather.
1355 auto *ConstMask = dyn_cast<Constant>(II.getArgOperand(2));
1356 if (ConstMask && ConstMask->isNullValue())
1357 return IC.replaceInstUsesWith(II, II.getArgOperand(3));
1362 static Instruction *simplifyMaskedScatter(IntrinsicInst &II, InstCombiner &IC) {
1363 // If the mask is all zeros, a scatter does nothing.
1364 auto *ConstMask = dyn_cast<Constant>(II.getArgOperand(3));
1365 if (ConstMask && ConstMask->isNullValue())
1366 return IC.eraseInstFromFunction(II);
1371 static Instruction *foldCttzCtlz(IntrinsicInst &II, InstCombiner &IC) {
1372 assert((II.getIntrinsicID() == Intrinsic::cttz ||
1373 II.getIntrinsicID() == Intrinsic::ctlz) &&
1374 "Expected cttz or ctlz intrinsic");
1375 Value *Op0 = II.getArgOperand(0);
1376 // FIXME: Try to simplify vectors of integers.
1377 auto *IT = dyn_cast<IntegerType>(Op0->getType());
1381 unsigned BitWidth = IT->getBitWidth();
1382 KnownBits Known(BitWidth);
1383 IC.computeKnownBits(Op0, Known, 0, &II);
1385 // Create a mask for bits above (ctlz) or below (cttz) the first known one.
1386 bool IsTZ = II.getIntrinsicID() == Intrinsic::cttz;
1387 unsigned NumMaskBits = IsTZ ? Known.One.countTrailingZeros()
1388 : Known.One.countLeadingZeros();
1389 APInt Mask = IsTZ ? APInt::getLowBitsSet(BitWidth, NumMaskBits)
1390 : APInt::getHighBitsSet(BitWidth, NumMaskBits);
1392 // If all bits above (ctlz) or below (cttz) the first known one are known
1393 // zero, this value is constant.
1394 // FIXME: This should be in InstSimplify because we're replacing an
1395 // instruction with a constant.
1396 if (Mask.isSubsetOf(Known.Zero)) {
1397 auto *C = ConstantInt::get(IT, APInt(BitWidth, NumMaskBits));
1398 return IC.replaceInstUsesWith(II, C);
1401 // If the input to cttz/ctlz is known to be non-zero,
1402 // then change the 'ZeroIsUndef' parameter to 'true'
1403 // because we know the zero behavior can't affect the result.
1404 if (Known.One != 0 || isKnownNonZero(Op0, IC.getDataLayout())) {
1405 if (!match(II.getArgOperand(1), m_One())) {
1406 II.setOperand(1, IC.Builder->getTrue());
1414 // TODO: If the x86 backend knew how to convert a bool vector mask back to an
1415 // XMM register mask efficiently, we could transform all x86 masked intrinsics
1416 // to LLVM masked intrinsics and remove the x86 masked intrinsic defs.
1417 static Instruction *simplifyX86MaskedLoad(IntrinsicInst &II, InstCombiner &IC) {
1418 Value *Ptr = II.getOperand(0);
1419 Value *Mask = II.getOperand(1);
1420 Constant *ZeroVec = Constant::getNullValue(II.getType());
1422 // Special case a zero mask since that's not a ConstantDataVector.
1423 // This masked load instruction creates a zero vector.
1424 if (isa<ConstantAggregateZero>(Mask))
1425 return IC.replaceInstUsesWith(II, ZeroVec);
1427 auto *ConstMask = dyn_cast<ConstantDataVector>(Mask);
1431 // The mask is constant. Convert this x86 intrinsic to the LLVM instrinsic
1432 // to allow target-independent optimizations.
1434 // First, cast the x86 intrinsic scalar pointer to a vector pointer to match
1435 // the LLVM intrinsic definition for the pointer argument.
1436 unsigned AddrSpace = cast<PointerType>(Ptr->getType())->getAddressSpace();
1437 PointerType *VecPtrTy = PointerType::get(II.getType(), AddrSpace);
1438 Value *PtrCast = IC.Builder->CreateBitCast(Ptr, VecPtrTy, "castvec");
1440 // Second, convert the x86 XMM integer vector mask to a vector of bools based
1441 // on each element's most significant bit (the sign bit).
1442 Constant *BoolMask = getNegativeIsTrueBoolVec(ConstMask);
1444 // The pass-through vector for an x86 masked load is a zero vector.
1445 CallInst *NewMaskedLoad =
1446 IC.Builder->CreateMaskedLoad(PtrCast, 1, BoolMask, ZeroVec);
1447 return IC.replaceInstUsesWith(II, NewMaskedLoad);
1450 // TODO: If the x86 backend knew how to convert a bool vector mask back to an
1451 // XMM register mask efficiently, we could transform all x86 masked intrinsics
1452 // to LLVM masked intrinsics and remove the x86 masked intrinsic defs.
1453 static bool simplifyX86MaskedStore(IntrinsicInst &II, InstCombiner &IC) {
1454 Value *Ptr = II.getOperand(0);
1455 Value *Mask = II.getOperand(1);
1456 Value *Vec = II.getOperand(2);
1458 // Special case a zero mask since that's not a ConstantDataVector:
1459 // this masked store instruction does nothing.
1460 if (isa<ConstantAggregateZero>(Mask)) {
1461 IC.eraseInstFromFunction(II);
1465 // The SSE2 version is too weird (eg, unaligned but non-temporal) to do
1466 // anything else at this level.
1467 if (II.getIntrinsicID() == Intrinsic::x86_sse2_maskmov_dqu)
1470 auto *ConstMask = dyn_cast<ConstantDataVector>(Mask);
1474 // The mask is constant. Convert this x86 intrinsic to the LLVM instrinsic
1475 // to allow target-independent optimizations.
1477 // First, cast the x86 intrinsic scalar pointer to a vector pointer to match
1478 // the LLVM intrinsic definition for the pointer argument.
1479 unsigned AddrSpace = cast<PointerType>(Ptr->getType())->getAddressSpace();
1480 PointerType *VecPtrTy = PointerType::get(Vec->getType(), AddrSpace);
1481 Value *PtrCast = IC.Builder->CreateBitCast(Ptr, VecPtrTy, "castvec");
1483 // Second, convert the x86 XMM integer vector mask to a vector of bools based
1484 // on each element's most significant bit (the sign bit).
1485 Constant *BoolMask = getNegativeIsTrueBoolVec(ConstMask);
1487 IC.Builder->CreateMaskedStore(Vec, PtrCast, 1, BoolMask);
1489 // 'Replace uses' doesn't work for stores. Erase the original masked store.
1490 IC.eraseInstFromFunction(II);
1494 // Constant fold llvm.amdgcn.fmed3 intrinsics for standard inputs.
1496 // A single NaN input is folded to minnum, so we rely on that folding for
1498 static APFloat fmed3AMDGCN(const APFloat &Src0, const APFloat &Src1,
1499 const APFloat &Src2) {
1500 APFloat Max3 = maxnum(maxnum(Src0, Src1), Src2);
1502 APFloat::cmpResult Cmp0 = Max3.compare(Src0);
1503 assert(Cmp0 != APFloat::cmpUnordered && "nans handled separately");
1504 if (Cmp0 == APFloat::cmpEqual)
1505 return maxnum(Src1, Src2);
1507 APFloat::cmpResult Cmp1 = Max3.compare(Src1);
1508 assert(Cmp1 != APFloat::cmpUnordered && "nans handled separately");
1509 if (Cmp1 == APFloat::cmpEqual)
1510 return maxnum(Src0, Src2);
1512 return maxnum(Src0, Src1);
1515 // Returns true iff the 2 intrinsics have the same operands, limiting the
1516 // comparison to the first NumOperands.
1517 static bool haveSameOperands(const IntrinsicInst &I, const IntrinsicInst &E,
1518 unsigned NumOperands) {
1519 assert(I.getNumArgOperands() >= NumOperands && "Not enough operands");
1520 assert(E.getNumArgOperands() >= NumOperands && "Not enough operands");
1521 for (unsigned i = 0; i < NumOperands; i++)
1522 if (I.getArgOperand(i) != E.getArgOperand(i))
1527 // Remove trivially empty start/end intrinsic ranges, i.e. a start
1528 // immediately followed by an end (ignoring debuginfo or other
1529 // start/end intrinsics in between). As this handles only the most trivial
1530 // cases, tracking the nesting level is not needed:
1532 // call @llvm.foo.start(i1 0) ; &I
1533 // call @llvm.foo.start(i1 0)
1534 // call @llvm.foo.end(i1 0) ; This one will not be skipped: it will be removed
1535 // call @llvm.foo.end(i1 0)
1536 static bool removeTriviallyEmptyRange(IntrinsicInst &I, unsigned StartID,
1537 unsigned EndID, InstCombiner &IC) {
1538 assert(I.getIntrinsicID() == StartID &&
1539 "Start intrinsic does not have expected ID");
1540 BasicBlock::iterator BI(I), BE(I.getParent()->end());
1541 for (++BI; BI != BE; ++BI) {
1542 if (auto *E = dyn_cast<IntrinsicInst>(BI)) {
1543 if (isa<DbgInfoIntrinsic>(E) || E->getIntrinsicID() == StartID)
1545 if (E->getIntrinsicID() == EndID &&
1546 haveSameOperands(I, *E, E->getNumArgOperands())) {
1547 IC.eraseInstFromFunction(*E);
1548 IC.eraseInstFromFunction(I);
1558 // Convert NVVM intrinsics to target-generic LLVM code where possible.
1559 static Instruction *SimplifyNVVMIntrinsic(IntrinsicInst *II, InstCombiner &IC) {
1560 // Each NVVM intrinsic we can simplify can be replaced with one of:
1562 // * an LLVM intrinsic,
1563 // * an LLVM cast operation,
1564 // * an LLVM binary operation, or
1565 // * ad-hoc LLVM IR for the particular operation.
1567 // Some transformations are only valid when the module's
1568 // flush-denormals-to-zero (ftz) setting is true/false, whereas other
1569 // transformations are valid regardless of the module's ftz setting.
1570 enum FtzRequirementTy {
1571 FTZ_Any, // Any ftz setting is ok.
1572 FTZ_MustBeOn, // Transformation is valid only if ftz is on.
1573 FTZ_MustBeOff, // Transformation is valid only if ftz is off.
1575 // Classes of NVVM intrinsics that can't be replaced one-to-one with a
1576 // target-generic intrinsic, cast op, or binary op but that we can nonetheless
1582 // SimplifyAction is a poor-man's variant (plus an additional flag) that
1583 // represents how to replace an NVVM intrinsic with target-generic LLVM IR.
1584 struct SimplifyAction {
1585 // Invariant: At most one of these Optionals has a value.
1586 Optional<Intrinsic::ID> IID;
1587 Optional<Instruction::CastOps> CastOp;
1588 Optional<Instruction::BinaryOps> BinaryOp;
1589 Optional<SpecialCase> Special;
1591 FtzRequirementTy FtzRequirement = FTZ_Any;
1593 SimplifyAction() = default;
1595 SimplifyAction(Intrinsic::ID IID, FtzRequirementTy FtzReq)
1596 : IID(IID), FtzRequirement(FtzReq) {}
1598 // Cast operations don't have anything to do with FTZ, so we skip that
1600 SimplifyAction(Instruction::CastOps CastOp) : CastOp(CastOp) {}
1602 SimplifyAction(Instruction::BinaryOps BinaryOp, FtzRequirementTy FtzReq)
1603 : BinaryOp(BinaryOp), FtzRequirement(FtzReq) {}
1605 SimplifyAction(SpecialCase Special, FtzRequirementTy FtzReq)
1606 : Special(Special), FtzRequirement(FtzReq) {}
1609 // Try to generate a SimplifyAction describing how to replace our
1610 // IntrinsicInstr with target-generic LLVM IR.
1611 const SimplifyAction Action = [II]() -> SimplifyAction {
1612 switch (II->getIntrinsicID()) {
1614 // NVVM intrinsics that map directly to LLVM intrinsics.
1615 case Intrinsic::nvvm_ceil_d:
1616 return {Intrinsic::ceil, FTZ_Any};
1617 case Intrinsic::nvvm_ceil_f:
1618 return {Intrinsic::ceil, FTZ_MustBeOff};
1619 case Intrinsic::nvvm_ceil_ftz_f:
1620 return {Intrinsic::ceil, FTZ_MustBeOn};
1621 case Intrinsic::nvvm_fabs_d:
1622 return {Intrinsic::fabs, FTZ_Any};
1623 case Intrinsic::nvvm_fabs_f:
1624 return {Intrinsic::fabs, FTZ_MustBeOff};
1625 case Intrinsic::nvvm_fabs_ftz_f:
1626 return {Intrinsic::fabs, FTZ_MustBeOn};
1627 case Intrinsic::nvvm_floor_d:
1628 return {Intrinsic::floor, FTZ_Any};
1629 case Intrinsic::nvvm_floor_f:
1630 return {Intrinsic::floor, FTZ_MustBeOff};
1631 case Intrinsic::nvvm_floor_ftz_f:
1632 return {Intrinsic::floor, FTZ_MustBeOn};
1633 case Intrinsic::nvvm_fma_rn_d:
1634 return {Intrinsic::fma, FTZ_Any};
1635 case Intrinsic::nvvm_fma_rn_f:
1636 return {Intrinsic::fma, FTZ_MustBeOff};
1637 case Intrinsic::nvvm_fma_rn_ftz_f:
1638 return {Intrinsic::fma, FTZ_MustBeOn};
1639 case Intrinsic::nvvm_fmax_d:
1640 return {Intrinsic::maxnum, FTZ_Any};
1641 case Intrinsic::nvvm_fmax_f:
1642 return {Intrinsic::maxnum, FTZ_MustBeOff};
1643 case Intrinsic::nvvm_fmax_ftz_f:
1644 return {Intrinsic::maxnum, FTZ_MustBeOn};
1645 case Intrinsic::nvvm_fmin_d:
1646 return {Intrinsic::minnum, FTZ_Any};
1647 case Intrinsic::nvvm_fmin_f:
1648 return {Intrinsic::minnum, FTZ_MustBeOff};
1649 case Intrinsic::nvvm_fmin_ftz_f:
1650 return {Intrinsic::minnum, FTZ_MustBeOn};
1651 case Intrinsic::nvvm_round_d:
1652 return {Intrinsic::round, FTZ_Any};
1653 case Intrinsic::nvvm_round_f:
1654 return {Intrinsic::round, FTZ_MustBeOff};
1655 case Intrinsic::nvvm_round_ftz_f:
1656 return {Intrinsic::round, FTZ_MustBeOn};
1657 case Intrinsic::nvvm_sqrt_rn_d:
1658 return {Intrinsic::sqrt, FTZ_Any};
1659 case Intrinsic::nvvm_sqrt_f:
1660 // nvvm_sqrt_f is a special case. For most intrinsics, foo_ftz_f is the
1661 // ftz version, and foo_f is the non-ftz version. But nvvm_sqrt_f adopts
1662 // the ftz-ness of the surrounding code. sqrt_rn_f and sqrt_rn_ftz_f are
1663 // the versions with explicit ftz-ness.
1664 return {Intrinsic::sqrt, FTZ_Any};
1665 case Intrinsic::nvvm_sqrt_rn_f:
1666 return {Intrinsic::sqrt, FTZ_MustBeOff};
1667 case Intrinsic::nvvm_sqrt_rn_ftz_f:
1668 return {Intrinsic::sqrt, FTZ_MustBeOn};
1669 case Intrinsic::nvvm_trunc_d:
1670 return {Intrinsic::trunc, FTZ_Any};
1671 case Intrinsic::nvvm_trunc_f:
1672 return {Intrinsic::trunc, FTZ_MustBeOff};
1673 case Intrinsic::nvvm_trunc_ftz_f:
1674 return {Intrinsic::trunc, FTZ_MustBeOn};
1676 // NVVM intrinsics that map to LLVM cast operations.
1678 // Note that llvm's target-generic conversion operators correspond to the rz
1679 // (round to zero) versions of the nvvm conversion intrinsics, even though
1680 // most everything else here uses the rn (round to nearest even) nvvm ops.
1681 case Intrinsic::nvvm_d2i_rz:
1682 case Intrinsic::nvvm_f2i_rz:
1683 case Intrinsic::nvvm_d2ll_rz:
1684 case Intrinsic::nvvm_f2ll_rz:
1685 return {Instruction::FPToSI};
1686 case Intrinsic::nvvm_d2ui_rz:
1687 case Intrinsic::nvvm_f2ui_rz:
1688 case Intrinsic::nvvm_d2ull_rz:
1689 case Intrinsic::nvvm_f2ull_rz:
1690 return {Instruction::FPToUI};
1691 case Intrinsic::nvvm_i2d_rz:
1692 case Intrinsic::nvvm_i2f_rz:
1693 case Intrinsic::nvvm_ll2d_rz:
1694 case Intrinsic::nvvm_ll2f_rz:
1695 return {Instruction::SIToFP};
1696 case Intrinsic::nvvm_ui2d_rz:
1697 case Intrinsic::nvvm_ui2f_rz:
1698 case Intrinsic::nvvm_ull2d_rz:
1699 case Intrinsic::nvvm_ull2f_rz:
1700 return {Instruction::UIToFP};
1702 // NVVM intrinsics that map to LLVM binary ops.
1703 case Intrinsic::nvvm_add_rn_d:
1704 return {Instruction::FAdd, FTZ_Any};
1705 case Intrinsic::nvvm_add_rn_f:
1706 return {Instruction::FAdd, FTZ_MustBeOff};
1707 case Intrinsic::nvvm_add_rn_ftz_f:
1708 return {Instruction::FAdd, FTZ_MustBeOn};
1709 case Intrinsic::nvvm_mul_rn_d:
1710 return {Instruction::FMul, FTZ_Any};
1711 case Intrinsic::nvvm_mul_rn_f:
1712 return {Instruction::FMul, FTZ_MustBeOff};
1713 case Intrinsic::nvvm_mul_rn_ftz_f:
1714 return {Instruction::FMul, FTZ_MustBeOn};
1715 case Intrinsic::nvvm_div_rn_d:
1716 return {Instruction::FDiv, FTZ_Any};
1717 case Intrinsic::nvvm_div_rn_f:
1718 return {Instruction::FDiv, FTZ_MustBeOff};
1719 case Intrinsic::nvvm_div_rn_ftz_f:
1720 return {Instruction::FDiv, FTZ_MustBeOn};
1722 // The remainder of cases are NVVM intrinsics that map to LLVM idioms, but
1723 // need special handling.
1725 // We seem to be mising intrinsics for rcp.approx.{ftz.}f32, which is just
1727 case Intrinsic::nvvm_rcp_rn_d:
1728 return {SPC_Reciprocal, FTZ_Any};
1729 case Intrinsic::nvvm_rcp_rn_f:
1730 return {SPC_Reciprocal, FTZ_MustBeOff};
1731 case Intrinsic::nvvm_rcp_rn_ftz_f:
1732 return {SPC_Reciprocal, FTZ_MustBeOn};
1734 // We do not currently simplify intrinsics that give an approximate answer.
1737 // - nvvm_cos_approx_{f,ftz_f}
1738 // - nvvm_ex2_approx_{d,f,ftz_f}
1739 // - nvvm_lg2_approx_{d,f,ftz_f}
1740 // - nvvm_sin_approx_{f,ftz_f}
1741 // - nvvm_sqrt_approx_{f,ftz_f}
1742 // - nvvm_rsqrt_approx_{d,f,ftz_f}
1743 // - nvvm_div_approx_{ftz_d,ftz_f,f}
1744 // - nvvm_rcp_approx_ftz_d
1746 // Ideally we'd encode them as e.g. "fast call @llvm.cos", where "fast"
1747 // means that fastmath is enabled in the intrinsic. Unfortunately only
1748 // binary operators (currently) have a fastmath bit in SelectionDAG, so this
1749 // information gets lost and we can't select on it.
1751 // TODO: div and rcp are lowered to a binary op, so these we could in theory
1752 // lower them to "fast fdiv".
1759 // If Action.FtzRequirementTy is not satisfied by the module's ftz state, we
1760 // can bail out now. (Notice that in the case that IID is not an NVVM
1761 // intrinsic, we don't have to look up any module metadata, as
1762 // FtzRequirementTy will be FTZ_Any.)
1763 if (Action.FtzRequirement != FTZ_Any) {
1765 II->getFunction()->getFnAttribute("nvptx-f32ftz").getValueAsString() ==
1768 if (FtzEnabled != (Action.FtzRequirement == FTZ_MustBeOn))
1772 // Simplify to target-generic intrinsic.
1774 SmallVector<Value *, 4> Args(II->arg_operands());
1775 // All the target-generic intrinsics currently of interest to us have one
1776 // type argument, equal to that of the nvvm intrinsic's argument.
1777 Type *Tys[] = {II->getArgOperand(0)->getType()};
1778 return CallInst::Create(
1779 Intrinsic::getDeclaration(II->getModule(), *Action.IID, Tys), Args);
1782 // Simplify to target-generic binary op.
1783 if (Action.BinaryOp)
1784 return BinaryOperator::Create(*Action.BinaryOp, II->getArgOperand(0),
1785 II->getArgOperand(1), II->getName());
1787 // Simplify to target-generic cast op.
1789 return CastInst::Create(*Action.CastOp, II->getArgOperand(0), II->getType(),
1792 // All that's left are the special cases.
1793 if (!Action.Special)
1796 switch (*Action.Special) {
1797 case SPC_Reciprocal:
1798 // Simplify reciprocal.
1799 return BinaryOperator::Create(
1800 Instruction::FDiv, ConstantFP::get(II->getArgOperand(0)->getType(), 1),
1801 II->getArgOperand(0), II->getName());
1803 llvm_unreachable("All SpecialCase enumerators should be handled in switch.");
1806 Instruction *InstCombiner::visitVAStartInst(VAStartInst &I) {
1807 removeTriviallyEmptyRange(I, Intrinsic::vastart, Intrinsic::vaend, *this);
1811 Instruction *InstCombiner::visitVACopyInst(VACopyInst &I) {
1812 removeTriviallyEmptyRange(I, Intrinsic::vacopy, Intrinsic::vaend, *this);
1816 /// CallInst simplification. This mostly only handles folding of intrinsic
1817 /// instructions. For normal calls, it allows visitCallSite to do the heavy
1819 Instruction *InstCombiner::visitCallInst(CallInst &CI) {
1820 auto Args = CI.arg_operands();
1821 if (Value *V = SimplifyCall(CI.getCalledValue(), Args.begin(), Args.end(), DL,
1823 return replaceInstUsesWith(CI, V);
1825 if (isFreeCall(&CI, &TLI))
1826 return visitFree(CI);
1828 // If the caller function is nounwind, mark the call as nounwind, even if the
1830 if (CI.getFunction()->doesNotThrow() && !CI.doesNotThrow()) {
1831 CI.setDoesNotThrow();
1835 IntrinsicInst *II = dyn_cast<IntrinsicInst>(&CI);
1836 if (!II) return visitCallSite(&CI);
1838 // Intrinsics cannot occur in an invoke, so handle them here instead of in
1840 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(II)) {
1841 bool Changed = false;
1843 // memmove/cpy/set of zero bytes is a noop.
1844 if (Constant *NumBytes = dyn_cast<Constant>(MI->getLength())) {
1845 if (NumBytes->isNullValue())
1846 return eraseInstFromFunction(CI);
1848 if (ConstantInt *CI = dyn_cast<ConstantInt>(NumBytes))
1849 if (CI->getZExtValue() == 1) {
1850 // Replace the instruction with just byte operations. We would
1851 // transform other cases to loads/stores, but we don't know if
1852 // alignment is sufficient.
1856 // No other transformations apply to volatile transfers.
1857 if (MI->isVolatile())
1860 // If we have a memmove and the source operation is a constant global,
1861 // then the source and dest pointers can't alias, so we can change this
1862 // into a call to memcpy.
1863 if (MemMoveInst *MMI = dyn_cast<MemMoveInst>(MI)) {
1864 if (GlobalVariable *GVSrc = dyn_cast<GlobalVariable>(MMI->getSource()))
1865 if (GVSrc->isConstant()) {
1866 Module *M = CI.getModule();
1867 Intrinsic::ID MemCpyID = Intrinsic::memcpy;
1868 Type *Tys[3] = { CI.getArgOperand(0)->getType(),
1869 CI.getArgOperand(1)->getType(),
1870 CI.getArgOperand(2)->getType() };
1871 CI.setCalledFunction(Intrinsic::getDeclaration(M, MemCpyID, Tys));
1876 if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI)) {
1877 // memmove(x,x,size) -> noop.
1878 if (MTI->getSource() == MTI->getDest())
1879 return eraseInstFromFunction(CI);
1882 // If we can determine a pointer alignment that is bigger than currently
1883 // set, update the alignment.
1884 if (isa<MemTransferInst>(MI)) {
1885 if (Instruction *I = SimplifyMemTransfer(MI))
1887 } else if (MemSetInst *MSI = dyn_cast<MemSetInst>(MI)) {
1888 if (Instruction *I = SimplifyMemSet(MSI))
1892 if (Changed) return II;
1895 if (auto *AMI = dyn_cast<ElementAtomicMemCpyInst>(II)) {
1896 if (Constant *C = dyn_cast<Constant>(AMI->getNumElements()))
1897 if (C->isNullValue())
1898 return eraseInstFromFunction(*AMI);
1900 if (Instruction *I = SimplifyElementAtomicMemCpy(AMI))
1904 if (Instruction *I = SimplifyNVVMIntrinsic(II, *this))
1907 auto SimplifyDemandedVectorEltsLow = [this](Value *Op, unsigned Width,
1908 unsigned DemandedWidth) {
1909 APInt UndefElts(Width, 0);
1910 APInt DemandedElts = APInt::getLowBitsSet(Width, DemandedWidth);
1911 return SimplifyDemandedVectorElts(Op, DemandedElts, UndefElts);
1914 switch (II->getIntrinsicID()) {
1916 case Intrinsic::objectsize:
1917 if (ConstantInt *N =
1918 lowerObjectSizeCall(II, DL, &TLI, /*MustSucceed=*/false))
1919 return replaceInstUsesWith(CI, N);
1922 case Intrinsic::bswap: {
1923 Value *IIOperand = II->getArgOperand(0);
1926 // bswap(bswap(x)) -> x
1927 if (match(IIOperand, m_BSwap(m_Value(X))))
1928 return replaceInstUsesWith(CI, X);
1930 // bswap(trunc(bswap(x))) -> trunc(lshr(x, c))
1931 if (match(IIOperand, m_Trunc(m_BSwap(m_Value(X))))) {
1932 unsigned C = X->getType()->getPrimitiveSizeInBits() -
1933 IIOperand->getType()->getPrimitiveSizeInBits();
1934 Value *CV = ConstantInt::get(X->getType(), C);
1935 Value *V = Builder->CreateLShr(X, CV);
1936 return new TruncInst(V, IIOperand->getType());
1941 case Intrinsic::bitreverse: {
1942 Value *IIOperand = II->getArgOperand(0);
1945 // bitreverse(bitreverse(x)) -> x
1946 if (match(IIOperand, m_Intrinsic<Intrinsic::bitreverse>(m_Value(X))))
1947 return replaceInstUsesWith(CI, X);
1951 case Intrinsic::masked_load:
1952 if (Value *SimplifiedMaskedOp = simplifyMaskedLoad(*II, *Builder))
1953 return replaceInstUsesWith(CI, SimplifiedMaskedOp);
1955 case Intrinsic::masked_store:
1956 return simplifyMaskedStore(*II, *this);
1957 case Intrinsic::masked_gather:
1958 return simplifyMaskedGather(*II, *this);
1959 case Intrinsic::masked_scatter:
1960 return simplifyMaskedScatter(*II, *this);
1962 case Intrinsic::powi:
1963 if (ConstantInt *Power = dyn_cast<ConstantInt>(II->getArgOperand(1))) {
1964 // powi(x, 0) -> 1.0
1965 if (Power->isZero())
1966 return replaceInstUsesWith(CI, ConstantFP::get(CI.getType(), 1.0));
1969 return replaceInstUsesWith(CI, II->getArgOperand(0));
1970 // powi(x, -1) -> 1/x
1971 if (Power->isAllOnesValue())
1972 return BinaryOperator::CreateFDiv(ConstantFP::get(CI.getType(), 1.0),
1973 II->getArgOperand(0));
1977 case Intrinsic::cttz:
1978 case Intrinsic::ctlz:
1979 if (auto *I = foldCttzCtlz(*II, *this))
1983 case Intrinsic::uadd_with_overflow:
1984 case Intrinsic::sadd_with_overflow:
1985 case Intrinsic::umul_with_overflow:
1986 case Intrinsic::smul_with_overflow:
1987 if (isa<Constant>(II->getArgOperand(0)) &&
1988 !isa<Constant>(II->getArgOperand(1))) {
1989 // Canonicalize constants into the RHS.
1990 Value *LHS = II->getArgOperand(0);
1991 II->setArgOperand(0, II->getArgOperand(1));
1992 II->setArgOperand(1, LHS);
1997 case Intrinsic::usub_with_overflow:
1998 case Intrinsic::ssub_with_overflow: {
1999 OverflowCheckFlavor OCF =
2000 IntrinsicIDToOverflowCheckFlavor(II->getIntrinsicID());
2001 assert(OCF != OCF_INVALID && "unexpected!");
2003 Value *OperationResult = nullptr;
2004 Constant *OverflowResult = nullptr;
2005 if (OptimizeOverflowCheck(OCF, II->getArgOperand(0), II->getArgOperand(1),
2006 *II, OperationResult, OverflowResult))
2007 return CreateOverflowTuple(II, OperationResult, OverflowResult);
2012 case Intrinsic::minnum:
2013 case Intrinsic::maxnum: {
2014 Value *Arg0 = II->getArgOperand(0);
2015 Value *Arg1 = II->getArgOperand(1);
2016 // Canonicalize constants to the RHS.
2017 if (isa<ConstantFP>(Arg0) && !isa<ConstantFP>(Arg1)) {
2018 II->setArgOperand(0, Arg1);
2019 II->setArgOperand(1, Arg0);
2022 if (Value *V = simplifyMinnumMaxnum(*II))
2023 return replaceInstUsesWith(*II, V);
2026 case Intrinsic::fmuladd: {
2027 // Canonicalize fast fmuladd to the separate fmul + fadd.
2028 if (II->hasUnsafeAlgebra()) {
2029 BuilderTy::FastMathFlagGuard Guard(*Builder);
2030 Builder->setFastMathFlags(II->getFastMathFlags());
2031 Value *Mul = Builder->CreateFMul(II->getArgOperand(0),
2032 II->getArgOperand(1));
2033 Value *Add = Builder->CreateFAdd(Mul, II->getArgOperand(2));
2035 return replaceInstUsesWith(*II, Add);
2040 case Intrinsic::fma: {
2041 Value *Src0 = II->getArgOperand(0);
2042 Value *Src1 = II->getArgOperand(1);
2044 // Canonicalize constants into the RHS.
2045 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
2046 II->setArgOperand(0, Src1);
2047 II->setArgOperand(1, Src0);
2048 std::swap(Src0, Src1);
2051 Value *LHS = nullptr;
2052 Value *RHS = nullptr;
2054 // fma fneg(x), fneg(y), z -> fma x, y, z
2055 if (match(Src0, m_FNeg(m_Value(LHS))) &&
2056 match(Src1, m_FNeg(m_Value(RHS)))) {
2057 II->setArgOperand(0, LHS);
2058 II->setArgOperand(1, RHS);
2062 // fma fabs(x), fabs(x), z -> fma x, x, z
2063 if (match(Src0, m_Intrinsic<Intrinsic::fabs>(m_Value(LHS))) &&
2064 match(Src1, m_Intrinsic<Intrinsic::fabs>(m_Value(RHS))) && LHS == RHS) {
2065 II->setArgOperand(0, LHS);
2066 II->setArgOperand(1, RHS);
2070 // fma x, 1, z -> fadd x, z
2071 if (match(Src1, m_FPOne())) {
2072 Instruction *RI = BinaryOperator::CreateFAdd(Src0, II->getArgOperand(2));
2073 RI->copyFastMathFlags(II);
2079 case Intrinsic::fabs: {
2081 Constant *LHS, *RHS;
2082 if (match(II->getArgOperand(0),
2083 m_Select(m_Value(Cond), m_Constant(LHS), m_Constant(RHS)))) {
2084 CallInst *Call0 = Builder->CreateCall(II->getCalledFunction(), {LHS});
2085 CallInst *Call1 = Builder->CreateCall(II->getCalledFunction(), {RHS});
2086 return SelectInst::Create(Cond, Call0, Call1);
2091 case Intrinsic::ceil:
2092 case Intrinsic::floor:
2093 case Intrinsic::round:
2094 case Intrinsic::nearbyint:
2095 case Intrinsic::rint:
2096 case Intrinsic::trunc: {
2098 if (match(II->getArgOperand(0), m_FPExt(m_Value(ExtSrc))) &&
2099 II->getArgOperand(0)->hasOneUse()) {
2100 // fabs (fpext x) -> fpext (fabs x)
2101 Value *F = Intrinsic::getDeclaration(II->getModule(), II->getIntrinsicID(),
2102 { ExtSrc->getType() });
2103 CallInst *NewFabs = Builder->CreateCall(F, ExtSrc);
2104 NewFabs->copyFastMathFlags(II);
2105 NewFabs->takeName(II);
2106 return new FPExtInst(NewFabs, II->getType());
2111 case Intrinsic::cos:
2112 case Intrinsic::amdgcn_cos: {
2114 Value *Src = II->getArgOperand(0);
2115 if (match(Src, m_FNeg(m_Value(SrcSrc))) ||
2116 match(Src, m_Intrinsic<Intrinsic::fabs>(m_Value(SrcSrc)))) {
2117 // cos(-x) -> cos(x)
2118 // cos(fabs(x)) -> cos(x)
2119 II->setArgOperand(0, SrcSrc);
2125 case Intrinsic::ppc_altivec_lvx:
2126 case Intrinsic::ppc_altivec_lvxl:
2127 // Turn PPC lvx -> load if the pointer is known aligned.
2128 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, II, &AC,
2130 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
2131 PointerType::getUnqual(II->getType()));
2132 return new LoadInst(Ptr);
2135 case Intrinsic::ppc_vsx_lxvw4x:
2136 case Intrinsic::ppc_vsx_lxvd2x: {
2137 // Turn PPC VSX loads into normal loads.
2138 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
2139 PointerType::getUnqual(II->getType()));
2140 return new LoadInst(Ptr, Twine(""), false, 1);
2142 case Intrinsic::ppc_altivec_stvx:
2143 case Intrinsic::ppc_altivec_stvxl:
2144 // Turn stvx -> store if the pointer is known aligned.
2145 if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, DL, II, &AC,
2148 PointerType::getUnqual(II->getArgOperand(0)->getType());
2149 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
2150 return new StoreInst(II->getArgOperand(0), Ptr);
2153 case Intrinsic::ppc_vsx_stxvw4x:
2154 case Intrinsic::ppc_vsx_stxvd2x: {
2155 // Turn PPC VSX stores into normal stores.
2156 Type *OpPtrTy = PointerType::getUnqual(II->getArgOperand(0)->getType());
2157 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
2158 return new StoreInst(II->getArgOperand(0), Ptr, false, 1);
2160 case Intrinsic::ppc_qpx_qvlfs:
2161 // Turn PPC QPX qvlfs -> load if the pointer is known aligned.
2162 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 16, DL, II, &AC,
2164 Type *VTy = VectorType::get(Builder->getFloatTy(),
2165 II->getType()->getVectorNumElements());
2166 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
2167 PointerType::getUnqual(VTy));
2168 Value *Load = Builder->CreateLoad(Ptr);
2169 return new FPExtInst(Load, II->getType());
2172 case Intrinsic::ppc_qpx_qvlfd:
2173 // Turn PPC QPX qvlfd -> load if the pointer is known aligned.
2174 if (getOrEnforceKnownAlignment(II->getArgOperand(0), 32, DL, II, &AC,
2176 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(0),
2177 PointerType::getUnqual(II->getType()));
2178 return new LoadInst(Ptr);
2181 case Intrinsic::ppc_qpx_qvstfs:
2182 // Turn PPC QPX qvstfs -> store if the pointer is known aligned.
2183 if (getOrEnforceKnownAlignment(II->getArgOperand(1), 16, DL, II, &AC,
2185 Type *VTy = VectorType::get(Builder->getFloatTy(),
2186 II->getArgOperand(0)->getType()->getVectorNumElements());
2187 Value *TOp = Builder->CreateFPTrunc(II->getArgOperand(0), VTy);
2188 Type *OpPtrTy = PointerType::getUnqual(VTy);
2189 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
2190 return new StoreInst(TOp, Ptr);
2193 case Intrinsic::ppc_qpx_qvstfd:
2194 // Turn PPC QPX qvstfd -> store if the pointer is known aligned.
2195 if (getOrEnforceKnownAlignment(II->getArgOperand(1), 32, DL, II, &AC,
2198 PointerType::getUnqual(II->getArgOperand(0)->getType());
2199 Value *Ptr = Builder->CreateBitCast(II->getArgOperand(1), OpPtrTy);
2200 return new StoreInst(II->getArgOperand(0), Ptr);
2204 case Intrinsic::x86_vcvtph2ps_128:
2205 case Intrinsic::x86_vcvtph2ps_256: {
2206 auto Arg = II->getArgOperand(0);
2207 auto ArgType = cast<VectorType>(Arg->getType());
2208 auto RetType = cast<VectorType>(II->getType());
2209 unsigned ArgWidth = ArgType->getNumElements();
2210 unsigned RetWidth = RetType->getNumElements();
2211 assert(RetWidth <= ArgWidth && "Unexpected input/return vector widths");
2212 assert(ArgType->isIntOrIntVectorTy() &&
2213 ArgType->getScalarSizeInBits() == 16 &&
2214 "CVTPH2PS input type should be 16-bit integer vector");
2215 assert(RetType->getScalarType()->isFloatTy() &&
2216 "CVTPH2PS output type should be 32-bit float vector");
2218 // Constant folding: Convert to generic half to single conversion.
2219 if (isa<ConstantAggregateZero>(Arg))
2220 return replaceInstUsesWith(*II, ConstantAggregateZero::get(RetType));
2222 if (isa<ConstantDataVector>(Arg)) {
2223 auto VectorHalfAsShorts = Arg;
2224 if (RetWidth < ArgWidth) {
2225 SmallVector<uint32_t, 8> SubVecMask;
2226 for (unsigned i = 0; i != RetWidth; ++i)
2227 SubVecMask.push_back((int)i);
2228 VectorHalfAsShorts = Builder->CreateShuffleVector(
2229 Arg, UndefValue::get(ArgType), SubVecMask);
2232 auto VectorHalfType =
2233 VectorType::get(Type::getHalfTy(II->getContext()), RetWidth);
2235 Builder->CreateBitCast(VectorHalfAsShorts, VectorHalfType);
2236 auto VectorFloats = Builder->CreateFPExt(VectorHalfs, RetType);
2237 return replaceInstUsesWith(*II, VectorFloats);
2240 // We only use the lowest lanes of the argument.
2241 if (Value *V = SimplifyDemandedVectorEltsLow(Arg, ArgWidth, RetWidth)) {
2242 II->setArgOperand(0, V);
2248 case Intrinsic::x86_sse_cvtss2si:
2249 case Intrinsic::x86_sse_cvtss2si64:
2250 case Intrinsic::x86_sse_cvttss2si:
2251 case Intrinsic::x86_sse_cvttss2si64:
2252 case Intrinsic::x86_sse2_cvtsd2si:
2253 case Intrinsic::x86_sse2_cvtsd2si64:
2254 case Intrinsic::x86_sse2_cvttsd2si:
2255 case Intrinsic::x86_sse2_cvttsd2si64:
2256 case Intrinsic::x86_avx512_vcvtss2si32:
2257 case Intrinsic::x86_avx512_vcvtss2si64:
2258 case Intrinsic::x86_avx512_vcvtss2usi32:
2259 case Intrinsic::x86_avx512_vcvtss2usi64:
2260 case Intrinsic::x86_avx512_vcvtsd2si32:
2261 case Intrinsic::x86_avx512_vcvtsd2si64:
2262 case Intrinsic::x86_avx512_vcvtsd2usi32:
2263 case Intrinsic::x86_avx512_vcvtsd2usi64:
2264 case Intrinsic::x86_avx512_cvttss2si:
2265 case Intrinsic::x86_avx512_cvttss2si64:
2266 case Intrinsic::x86_avx512_cvttss2usi:
2267 case Intrinsic::x86_avx512_cvttss2usi64:
2268 case Intrinsic::x86_avx512_cvttsd2si:
2269 case Intrinsic::x86_avx512_cvttsd2si64:
2270 case Intrinsic::x86_avx512_cvttsd2usi:
2271 case Intrinsic::x86_avx512_cvttsd2usi64: {
2272 // These intrinsics only demand the 0th element of their input vectors. If
2273 // we can simplify the input based on that, do so now.
2274 Value *Arg = II->getArgOperand(0);
2275 unsigned VWidth = Arg->getType()->getVectorNumElements();
2276 if (Value *V = SimplifyDemandedVectorEltsLow(Arg, VWidth, 1)) {
2277 II->setArgOperand(0, V);
2283 case Intrinsic::x86_mmx_pmovmskb:
2284 case Intrinsic::x86_sse_movmsk_ps:
2285 case Intrinsic::x86_sse2_movmsk_pd:
2286 case Intrinsic::x86_sse2_pmovmskb_128:
2287 case Intrinsic::x86_avx_movmsk_pd_256:
2288 case Intrinsic::x86_avx_movmsk_ps_256:
2289 case Intrinsic::x86_avx2_pmovmskb: {
2290 if (Value *V = simplifyX86movmsk(*II, *Builder))
2291 return replaceInstUsesWith(*II, V);
2295 case Intrinsic::x86_sse_comieq_ss:
2296 case Intrinsic::x86_sse_comige_ss:
2297 case Intrinsic::x86_sse_comigt_ss:
2298 case Intrinsic::x86_sse_comile_ss:
2299 case Intrinsic::x86_sse_comilt_ss:
2300 case Intrinsic::x86_sse_comineq_ss:
2301 case Intrinsic::x86_sse_ucomieq_ss:
2302 case Intrinsic::x86_sse_ucomige_ss:
2303 case Intrinsic::x86_sse_ucomigt_ss:
2304 case Intrinsic::x86_sse_ucomile_ss:
2305 case Intrinsic::x86_sse_ucomilt_ss:
2306 case Intrinsic::x86_sse_ucomineq_ss:
2307 case Intrinsic::x86_sse2_comieq_sd:
2308 case Intrinsic::x86_sse2_comige_sd:
2309 case Intrinsic::x86_sse2_comigt_sd:
2310 case Intrinsic::x86_sse2_comile_sd:
2311 case Intrinsic::x86_sse2_comilt_sd:
2312 case Intrinsic::x86_sse2_comineq_sd:
2313 case Intrinsic::x86_sse2_ucomieq_sd:
2314 case Intrinsic::x86_sse2_ucomige_sd:
2315 case Intrinsic::x86_sse2_ucomigt_sd:
2316 case Intrinsic::x86_sse2_ucomile_sd:
2317 case Intrinsic::x86_sse2_ucomilt_sd:
2318 case Intrinsic::x86_sse2_ucomineq_sd:
2319 case Intrinsic::x86_avx512_vcomi_ss:
2320 case Intrinsic::x86_avx512_vcomi_sd:
2321 case Intrinsic::x86_avx512_mask_cmp_ss:
2322 case Intrinsic::x86_avx512_mask_cmp_sd: {
2323 // These intrinsics only demand the 0th element of their input vectors. If
2324 // we can simplify the input based on that, do so now.
2325 bool MadeChange = false;
2326 Value *Arg0 = II->getArgOperand(0);
2327 Value *Arg1 = II->getArgOperand(1);
2328 unsigned VWidth = Arg0->getType()->getVectorNumElements();
2329 if (Value *V = SimplifyDemandedVectorEltsLow(Arg0, VWidth, 1)) {
2330 II->setArgOperand(0, V);
2333 if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) {
2334 II->setArgOperand(1, V);
2341 case Intrinsic::x86_avx512_mask_cmp_pd_128:
2342 case Intrinsic::x86_avx512_mask_cmp_pd_256:
2343 case Intrinsic::x86_avx512_mask_cmp_pd_512:
2344 case Intrinsic::x86_avx512_mask_cmp_ps_128:
2345 case Intrinsic::x86_avx512_mask_cmp_ps_256:
2346 case Intrinsic::x86_avx512_mask_cmp_ps_512: {
2347 // Folding cmp(sub(a,b),0) -> cmp(a,b) and cmp(0,sub(a,b)) -> cmp(b,a)
2348 Value *Arg0 = II->getArgOperand(0);
2349 Value *Arg1 = II->getArgOperand(1);
2350 bool Arg0IsZero = match(Arg0, m_Zero());
2352 std::swap(Arg0, Arg1);
2354 // This fold requires only the NINF(not +/- inf) since inf minus
2356 // NSZ(No Signed Zeros) is not needed because zeros of any sign are
2357 // equal for both compares.
2358 // NNAN is not needed because nans compare the same for both compares.
2359 // The compare intrinsic uses the above assumptions and therefore
2360 // doesn't require additional flags.
2361 if ((match(Arg0, m_OneUse(m_FSub(m_Value(A), m_Value(B)))) &&
2362 match(Arg1, m_Zero()) &&
2363 cast<Instruction>(Arg0)->getFastMathFlags().noInfs())) {
2366 II->setArgOperand(0, A);
2367 II->setArgOperand(1, B);
2373 case Intrinsic::x86_avx512_mask_add_ps_512:
2374 case Intrinsic::x86_avx512_mask_div_ps_512:
2375 case Intrinsic::x86_avx512_mask_mul_ps_512:
2376 case Intrinsic::x86_avx512_mask_sub_ps_512:
2377 case Intrinsic::x86_avx512_mask_add_pd_512:
2378 case Intrinsic::x86_avx512_mask_div_pd_512:
2379 case Intrinsic::x86_avx512_mask_mul_pd_512:
2380 case Intrinsic::x86_avx512_mask_sub_pd_512:
2381 // If the rounding mode is CUR_DIRECTION(4) we can turn these into regular
2383 if (auto *R = dyn_cast<ConstantInt>(II->getArgOperand(4))) {
2384 if (R->getValue() == 4) {
2385 Value *Arg0 = II->getArgOperand(0);
2386 Value *Arg1 = II->getArgOperand(1);
2389 switch (II->getIntrinsicID()) {
2390 default: llvm_unreachable("Case stmts out of sync!");
2391 case Intrinsic::x86_avx512_mask_add_ps_512:
2392 case Intrinsic::x86_avx512_mask_add_pd_512:
2393 V = Builder->CreateFAdd(Arg0, Arg1);
2395 case Intrinsic::x86_avx512_mask_sub_ps_512:
2396 case Intrinsic::x86_avx512_mask_sub_pd_512:
2397 V = Builder->CreateFSub(Arg0, Arg1);
2399 case Intrinsic::x86_avx512_mask_mul_ps_512:
2400 case Intrinsic::x86_avx512_mask_mul_pd_512:
2401 V = Builder->CreateFMul(Arg0, Arg1);
2403 case Intrinsic::x86_avx512_mask_div_ps_512:
2404 case Intrinsic::x86_avx512_mask_div_pd_512:
2405 V = Builder->CreateFDiv(Arg0, Arg1);
2409 // Create a select for the masking.
2410 V = emitX86MaskSelect(II->getArgOperand(3), V, II->getArgOperand(2),
2412 return replaceInstUsesWith(*II, V);
2417 case Intrinsic::x86_avx512_mask_add_ss_round:
2418 case Intrinsic::x86_avx512_mask_div_ss_round:
2419 case Intrinsic::x86_avx512_mask_mul_ss_round:
2420 case Intrinsic::x86_avx512_mask_sub_ss_round:
2421 case Intrinsic::x86_avx512_mask_add_sd_round:
2422 case Intrinsic::x86_avx512_mask_div_sd_round:
2423 case Intrinsic::x86_avx512_mask_mul_sd_round:
2424 case Intrinsic::x86_avx512_mask_sub_sd_round:
2425 // If the rounding mode is CUR_DIRECTION(4) we can turn these into regular
2427 if (auto *R = dyn_cast<ConstantInt>(II->getArgOperand(4))) {
2428 if (R->getValue() == 4) {
2429 // Extract the element as scalars.
2430 Value *Arg0 = II->getArgOperand(0);
2431 Value *Arg1 = II->getArgOperand(1);
2432 Value *LHS = Builder->CreateExtractElement(Arg0, (uint64_t)0);
2433 Value *RHS = Builder->CreateExtractElement(Arg1, (uint64_t)0);
2436 switch (II->getIntrinsicID()) {
2437 default: llvm_unreachable("Case stmts out of sync!");
2438 case Intrinsic::x86_avx512_mask_add_ss_round:
2439 case Intrinsic::x86_avx512_mask_add_sd_round:
2440 V = Builder->CreateFAdd(LHS, RHS);
2442 case Intrinsic::x86_avx512_mask_sub_ss_round:
2443 case Intrinsic::x86_avx512_mask_sub_sd_round:
2444 V = Builder->CreateFSub(LHS, RHS);
2446 case Intrinsic::x86_avx512_mask_mul_ss_round:
2447 case Intrinsic::x86_avx512_mask_mul_sd_round:
2448 V = Builder->CreateFMul(LHS, RHS);
2450 case Intrinsic::x86_avx512_mask_div_ss_round:
2451 case Intrinsic::x86_avx512_mask_div_sd_round:
2452 V = Builder->CreateFDiv(LHS, RHS);
2456 // Handle the masking aspect of the intrinsic.
2457 Value *Mask = II->getArgOperand(3);
2458 auto *C = dyn_cast<ConstantInt>(Mask);
2459 // We don't need a select if we know the mask bit is a 1.
2460 if (!C || !C->getValue()[0]) {
2461 // Cast the mask to an i1 vector and then extract the lowest element.
2462 auto *MaskTy = VectorType::get(Builder->getInt1Ty(),
2463 cast<IntegerType>(Mask->getType())->getBitWidth());
2464 Mask = Builder->CreateBitCast(Mask, MaskTy);
2465 Mask = Builder->CreateExtractElement(Mask, (uint64_t)0);
2466 // Extract the lowest element from the passthru operand.
2467 Value *Passthru = Builder->CreateExtractElement(II->getArgOperand(2),
2469 V = Builder->CreateSelect(Mask, V, Passthru);
2472 // Insert the result back into the original argument 0.
2473 V = Builder->CreateInsertElement(Arg0, V, (uint64_t)0);
2475 return replaceInstUsesWith(*II, V);
2480 // X86 scalar intrinsics simplified with SimplifyDemandedVectorElts.
2481 case Intrinsic::x86_avx512_mask_max_ss_round:
2482 case Intrinsic::x86_avx512_mask_min_ss_round:
2483 case Intrinsic::x86_avx512_mask_max_sd_round:
2484 case Intrinsic::x86_avx512_mask_min_sd_round:
2485 case Intrinsic::x86_avx512_mask_vfmadd_ss:
2486 case Intrinsic::x86_avx512_mask_vfmadd_sd:
2487 case Intrinsic::x86_avx512_maskz_vfmadd_ss:
2488 case Intrinsic::x86_avx512_maskz_vfmadd_sd:
2489 case Intrinsic::x86_avx512_mask3_vfmadd_ss:
2490 case Intrinsic::x86_avx512_mask3_vfmadd_sd:
2491 case Intrinsic::x86_avx512_mask3_vfmsub_ss:
2492 case Intrinsic::x86_avx512_mask3_vfmsub_sd:
2493 case Intrinsic::x86_avx512_mask3_vfnmsub_ss:
2494 case Intrinsic::x86_avx512_mask3_vfnmsub_sd:
2495 case Intrinsic::x86_fma_vfmadd_ss:
2496 case Intrinsic::x86_fma_vfmsub_ss:
2497 case Intrinsic::x86_fma_vfnmadd_ss:
2498 case Intrinsic::x86_fma_vfnmsub_ss:
2499 case Intrinsic::x86_fma_vfmadd_sd:
2500 case Intrinsic::x86_fma_vfmsub_sd:
2501 case Intrinsic::x86_fma_vfnmadd_sd:
2502 case Intrinsic::x86_fma_vfnmsub_sd:
2503 case Intrinsic::x86_sse_cmp_ss:
2504 case Intrinsic::x86_sse_min_ss:
2505 case Intrinsic::x86_sse_max_ss:
2506 case Intrinsic::x86_sse2_cmp_sd:
2507 case Intrinsic::x86_sse2_min_sd:
2508 case Intrinsic::x86_sse2_max_sd:
2509 case Intrinsic::x86_sse41_round_ss:
2510 case Intrinsic::x86_sse41_round_sd:
2511 case Intrinsic::x86_xop_vfrcz_ss:
2512 case Intrinsic::x86_xop_vfrcz_sd: {
2513 unsigned VWidth = II->getType()->getVectorNumElements();
2514 APInt UndefElts(VWidth, 0);
2515 APInt AllOnesEltMask(APInt::getAllOnesValue(VWidth));
2516 if (Value *V = SimplifyDemandedVectorElts(II, AllOnesEltMask, UndefElts)) {
2518 return replaceInstUsesWith(*II, V);
2524 // Constant fold ashr( <A x Bi>, Ci ).
2525 // Constant fold lshr( <A x Bi>, Ci ).
2526 // Constant fold shl( <A x Bi>, Ci ).
2527 case Intrinsic::x86_sse2_psrai_d:
2528 case Intrinsic::x86_sse2_psrai_w:
2529 case Intrinsic::x86_avx2_psrai_d:
2530 case Intrinsic::x86_avx2_psrai_w:
2531 case Intrinsic::x86_avx512_psrai_q_128:
2532 case Intrinsic::x86_avx512_psrai_q_256:
2533 case Intrinsic::x86_avx512_psrai_d_512:
2534 case Intrinsic::x86_avx512_psrai_q_512:
2535 case Intrinsic::x86_avx512_psrai_w_512:
2536 case Intrinsic::x86_sse2_psrli_d:
2537 case Intrinsic::x86_sse2_psrli_q:
2538 case Intrinsic::x86_sse2_psrli_w:
2539 case Intrinsic::x86_avx2_psrli_d:
2540 case Intrinsic::x86_avx2_psrli_q:
2541 case Intrinsic::x86_avx2_psrli_w:
2542 case Intrinsic::x86_avx512_psrli_d_512:
2543 case Intrinsic::x86_avx512_psrli_q_512:
2544 case Intrinsic::x86_avx512_psrli_w_512:
2545 case Intrinsic::x86_sse2_pslli_d:
2546 case Intrinsic::x86_sse2_pslli_q:
2547 case Intrinsic::x86_sse2_pslli_w:
2548 case Intrinsic::x86_avx2_pslli_d:
2549 case Intrinsic::x86_avx2_pslli_q:
2550 case Intrinsic::x86_avx2_pslli_w:
2551 case Intrinsic::x86_avx512_pslli_d_512:
2552 case Intrinsic::x86_avx512_pslli_q_512:
2553 case Intrinsic::x86_avx512_pslli_w_512:
2554 if (Value *V = simplifyX86immShift(*II, *Builder))
2555 return replaceInstUsesWith(*II, V);
2558 case Intrinsic::x86_sse2_psra_d:
2559 case Intrinsic::x86_sse2_psra_w:
2560 case Intrinsic::x86_avx2_psra_d:
2561 case Intrinsic::x86_avx2_psra_w:
2562 case Intrinsic::x86_avx512_psra_q_128:
2563 case Intrinsic::x86_avx512_psra_q_256:
2564 case Intrinsic::x86_avx512_psra_d_512:
2565 case Intrinsic::x86_avx512_psra_q_512:
2566 case Intrinsic::x86_avx512_psra_w_512:
2567 case Intrinsic::x86_sse2_psrl_d:
2568 case Intrinsic::x86_sse2_psrl_q:
2569 case Intrinsic::x86_sse2_psrl_w:
2570 case Intrinsic::x86_avx2_psrl_d:
2571 case Intrinsic::x86_avx2_psrl_q:
2572 case Intrinsic::x86_avx2_psrl_w:
2573 case Intrinsic::x86_avx512_psrl_d_512:
2574 case Intrinsic::x86_avx512_psrl_q_512:
2575 case Intrinsic::x86_avx512_psrl_w_512:
2576 case Intrinsic::x86_sse2_psll_d:
2577 case Intrinsic::x86_sse2_psll_q:
2578 case Intrinsic::x86_sse2_psll_w:
2579 case Intrinsic::x86_avx2_psll_d:
2580 case Intrinsic::x86_avx2_psll_q:
2581 case Intrinsic::x86_avx2_psll_w:
2582 case Intrinsic::x86_avx512_psll_d_512:
2583 case Intrinsic::x86_avx512_psll_q_512:
2584 case Intrinsic::x86_avx512_psll_w_512: {
2585 if (Value *V = simplifyX86immShift(*II, *Builder))
2586 return replaceInstUsesWith(*II, V);
2588 // SSE2/AVX2 uses only the first 64-bits of the 128-bit vector
2589 // operand to compute the shift amount.
2590 Value *Arg1 = II->getArgOperand(1);
2591 assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&
2592 "Unexpected packed shift size");
2593 unsigned VWidth = Arg1->getType()->getVectorNumElements();
2595 if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {
2596 II->setArgOperand(1, V);
2602 case Intrinsic::x86_avx2_psllv_d:
2603 case Intrinsic::x86_avx2_psllv_d_256:
2604 case Intrinsic::x86_avx2_psllv_q:
2605 case Intrinsic::x86_avx2_psllv_q_256:
2606 case Intrinsic::x86_avx512_psllv_d_512:
2607 case Intrinsic::x86_avx512_psllv_q_512:
2608 case Intrinsic::x86_avx512_psllv_w_128:
2609 case Intrinsic::x86_avx512_psllv_w_256:
2610 case Intrinsic::x86_avx512_psllv_w_512:
2611 case Intrinsic::x86_avx2_psrav_d:
2612 case Intrinsic::x86_avx2_psrav_d_256:
2613 case Intrinsic::x86_avx512_psrav_q_128:
2614 case Intrinsic::x86_avx512_psrav_q_256:
2615 case Intrinsic::x86_avx512_psrav_d_512:
2616 case Intrinsic::x86_avx512_psrav_q_512:
2617 case Intrinsic::x86_avx512_psrav_w_128:
2618 case Intrinsic::x86_avx512_psrav_w_256:
2619 case Intrinsic::x86_avx512_psrav_w_512:
2620 case Intrinsic::x86_avx2_psrlv_d:
2621 case Intrinsic::x86_avx2_psrlv_d_256:
2622 case Intrinsic::x86_avx2_psrlv_q:
2623 case Intrinsic::x86_avx2_psrlv_q_256:
2624 case Intrinsic::x86_avx512_psrlv_d_512:
2625 case Intrinsic::x86_avx512_psrlv_q_512:
2626 case Intrinsic::x86_avx512_psrlv_w_128:
2627 case Intrinsic::x86_avx512_psrlv_w_256:
2628 case Intrinsic::x86_avx512_psrlv_w_512:
2629 if (Value *V = simplifyX86varShift(*II, *Builder))
2630 return replaceInstUsesWith(*II, V);
2633 case Intrinsic::x86_sse2_pmulu_dq:
2634 case Intrinsic::x86_sse41_pmuldq:
2635 case Intrinsic::x86_avx2_pmul_dq:
2636 case Intrinsic::x86_avx2_pmulu_dq:
2637 case Intrinsic::x86_avx512_pmul_dq_512:
2638 case Intrinsic::x86_avx512_pmulu_dq_512: {
2639 if (Value *V = simplifyX86muldq(*II, *Builder))
2640 return replaceInstUsesWith(*II, V);
2642 unsigned VWidth = II->getType()->getVectorNumElements();
2643 APInt UndefElts(VWidth, 0);
2644 APInt DemandedElts = APInt::getAllOnesValue(VWidth);
2645 if (Value *V = SimplifyDemandedVectorElts(II, DemandedElts, UndefElts)) {
2647 return replaceInstUsesWith(*II, V);
2653 case Intrinsic::x86_sse2_packssdw_128:
2654 case Intrinsic::x86_sse2_packsswb_128:
2655 case Intrinsic::x86_avx2_packssdw:
2656 case Intrinsic::x86_avx2_packsswb:
2657 case Intrinsic::x86_avx512_packssdw_512:
2658 case Intrinsic::x86_avx512_packsswb_512:
2659 if (Value *V = simplifyX86pack(*II, *this, *Builder, true))
2660 return replaceInstUsesWith(*II, V);
2663 case Intrinsic::x86_sse2_packuswb_128:
2664 case Intrinsic::x86_sse41_packusdw:
2665 case Intrinsic::x86_avx2_packusdw:
2666 case Intrinsic::x86_avx2_packuswb:
2667 case Intrinsic::x86_avx512_packusdw_512:
2668 case Intrinsic::x86_avx512_packuswb_512:
2669 if (Value *V = simplifyX86pack(*II, *this, *Builder, false))
2670 return replaceInstUsesWith(*II, V);
2673 case Intrinsic::x86_pclmulqdq: {
2674 if (auto *C = dyn_cast<ConstantInt>(II->getArgOperand(2))) {
2675 unsigned Imm = C->getZExtValue();
2677 bool MadeChange = false;
2678 Value *Arg0 = II->getArgOperand(0);
2679 Value *Arg1 = II->getArgOperand(1);
2680 unsigned VWidth = Arg0->getType()->getVectorNumElements();
2681 APInt DemandedElts(VWidth, 0);
2683 APInt UndefElts1(VWidth, 0);
2684 DemandedElts = (Imm & 0x01) ? 2 : 1;
2685 if (Value *V = SimplifyDemandedVectorElts(Arg0, DemandedElts,
2687 II->setArgOperand(0, V);
2691 APInt UndefElts2(VWidth, 0);
2692 DemandedElts = (Imm & 0x10) ? 2 : 1;
2693 if (Value *V = SimplifyDemandedVectorElts(Arg1, DemandedElts,
2695 II->setArgOperand(1, V);
2699 // If both input elements are undef, the result is undef.
2700 if (UndefElts1[(Imm & 0x01) ? 1 : 0] ||
2701 UndefElts2[(Imm & 0x10) ? 1 : 0])
2702 return replaceInstUsesWith(*II,
2703 ConstantAggregateZero::get(II->getType()));
2711 case Intrinsic::x86_sse41_insertps:
2712 if (Value *V = simplifyX86insertps(*II, *Builder))
2713 return replaceInstUsesWith(*II, V);
2716 case Intrinsic::x86_sse4a_extrq: {
2717 Value *Op0 = II->getArgOperand(0);
2718 Value *Op1 = II->getArgOperand(1);
2719 unsigned VWidth0 = Op0->getType()->getVectorNumElements();
2720 unsigned VWidth1 = Op1->getType()->getVectorNumElements();
2721 assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
2722 Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth0 == 2 &&
2723 VWidth1 == 16 && "Unexpected operand sizes");
2725 // See if we're dealing with constant values.
2726 Constant *C1 = dyn_cast<Constant>(Op1);
2727 ConstantInt *CILength =
2728 C1 ? dyn_cast_or_null<ConstantInt>(C1->getAggregateElement((unsigned)0))
2730 ConstantInt *CIIndex =
2731 C1 ? dyn_cast_or_null<ConstantInt>(C1->getAggregateElement((unsigned)1))
2734 // Attempt to simplify to a constant, shuffle vector or EXTRQI call.
2735 if (Value *V = simplifyX86extrq(*II, Op0, CILength, CIIndex, *Builder))
2736 return replaceInstUsesWith(*II, V);
2738 // EXTRQ only uses the lowest 64-bits of the first 128-bit vector
2739 // operands and the lowest 16-bits of the second.
2740 bool MadeChange = false;
2741 if (Value *V = SimplifyDemandedVectorEltsLow(Op0, VWidth0, 1)) {
2742 II->setArgOperand(0, V);
2745 if (Value *V = SimplifyDemandedVectorEltsLow(Op1, VWidth1, 2)) {
2746 II->setArgOperand(1, V);
2754 case Intrinsic::x86_sse4a_extrqi: {
2755 // EXTRQI: Extract Length bits starting from Index. Zero pad the remaining
2756 // bits of the lower 64-bits. The upper 64-bits are undefined.
2757 Value *Op0 = II->getArgOperand(0);
2758 unsigned VWidth = Op0->getType()->getVectorNumElements();
2759 assert(Op0->getType()->getPrimitiveSizeInBits() == 128 && VWidth == 2 &&
2760 "Unexpected operand size");
2762 // See if we're dealing with constant values.
2763 ConstantInt *CILength = dyn_cast<ConstantInt>(II->getArgOperand(1));
2764 ConstantInt *CIIndex = dyn_cast<ConstantInt>(II->getArgOperand(2));
2766 // Attempt to simplify to a constant or shuffle vector.
2767 if (Value *V = simplifyX86extrq(*II, Op0, CILength, CIIndex, *Builder))
2768 return replaceInstUsesWith(*II, V);
2770 // EXTRQI only uses the lowest 64-bits of the first 128-bit vector
2772 if (Value *V = SimplifyDemandedVectorEltsLow(Op0, VWidth, 1)) {
2773 II->setArgOperand(0, V);
2779 case Intrinsic::x86_sse4a_insertq: {
2780 Value *Op0 = II->getArgOperand(0);
2781 Value *Op1 = II->getArgOperand(1);
2782 unsigned VWidth = Op0->getType()->getVectorNumElements();
2783 assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
2784 Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth == 2 &&
2785 Op1->getType()->getVectorNumElements() == 2 &&
2786 "Unexpected operand size");
2788 // See if we're dealing with constant values.
2789 Constant *C1 = dyn_cast<Constant>(Op1);
2791 C1 ? dyn_cast_or_null<ConstantInt>(C1->getAggregateElement((unsigned)1))
2794 // Attempt to simplify to a constant, shuffle vector or INSERTQI call.
2796 const APInt &V11 = CI11->getValue();
2797 APInt Len = V11.zextOrTrunc(6);
2798 APInt Idx = V11.lshr(8).zextOrTrunc(6);
2799 if (Value *V = simplifyX86insertq(*II, Op0, Op1, Len, Idx, *Builder))
2800 return replaceInstUsesWith(*II, V);
2803 // INSERTQ only uses the lowest 64-bits of the first 128-bit vector
2805 if (Value *V = SimplifyDemandedVectorEltsLow(Op0, VWidth, 1)) {
2806 II->setArgOperand(0, V);
2812 case Intrinsic::x86_sse4a_insertqi: {
2813 // INSERTQI: Extract lowest Length bits from lower half of second source and
2814 // insert over first source starting at Index bit. The upper 64-bits are
2816 Value *Op0 = II->getArgOperand(0);
2817 Value *Op1 = II->getArgOperand(1);
2818 unsigned VWidth0 = Op0->getType()->getVectorNumElements();
2819 unsigned VWidth1 = Op1->getType()->getVectorNumElements();
2820 assert(Op0->getType()->getPrimitiveSizeInBits() == 128 &&
2821 Op1->getType()->getPrimitiveSizeInBits() == 128 && VWidth0 == 2 &&
2822 VWidth1 == 2 && "Unexpected operand sizes");
2824 // See if we're dealing with constant values.
2825 ConstantInt *CILength = dyn_cast<ConstantInt>(II->getArgOperand(2));
2826 ConstantInt *CIIndex = dyn_cast<ConstantInt>(II->getArgOperand(3));
2828 // Attempt to simplify to a constant or shuffle vector.
2829 if (CILength && CIIndex) {
2830 APInt Len = CILength->getValue().zextOrTrunc(6);
2831 APInt Idx = CIIndex->getValue().zextOrTrunc(6);
2832 if (Value *V = simplifyX86insertq(*II, Op0, Op1, Len, Idx, *Builder))
2833 return replaceInstUsesWith(*II, V);
2836 // INSERTQI only uses the lowest 64-bits of the first two 128-bit vector
2838 bool MadeChange = false;
2839 if (Value *V = SimplifyDemandedVectorEltsLow(Op0, VWidth0, 1)) {
2840 II->setArgOperand(0, V);
2843 if (Value *V = SimplifyDemandedVectorEltsLow(Op1, VWidth1, 1)) {
2844 II->setArgOperand(1, V);
2852 case Intrinsic::x86_sse41_pblendvb:
2853 case Intrinsic::x86_sse41_blendvps:
2854 case Intrinsic::x86_sse41_blendvpd:
2855 case Intrinsic::x86_avx_blendv_ps_256:
2856 case Intrinsic::x86_avx_blendv_pd_256:
2857 case Intrinsic::x86_avx2_pblendvb: {
2858 // Convert blendv* to vector selects if the mask is constant.
2859 // This optimization is convoluted because the intrinsic is defined as
2860 // getting a vector of floats or doubles for the ps and pd versions.
2861 // FIXME: That should be changed.
2863 Value *Op0 = II->getArgOperand(0);
2864 Value *Op1 = II->getArgOperand(1);
2865 Value *Mask = II->getArgOperand(2);
2867 // fold (blend A, A, Mask) -> A
2869 return replaceInstUsesWith(CI, Op0);
2871 // Zero Mask - select 1st argument.
2872 if (isa<ConstantAggregateZero>(Mask))
2873 return replaceInstUsesWith(CI, Op0);
2875 // Constant Mask - select 1st/2nd argument lane based on top bit of mask.
2876 if (auto *ConstantMask = dyn_cast<ConstantDataVector>(Mask)) {
2877 Constant *NewSelector = getNegativeIsTrueBoolVec(ConstantMask);
2878 return SelectInst::Create(NewSelector, Op1, Op0, "blendv");
2883 case Intrinsic::x86_ssse3_pshuf_b_128:
2884 case Intrinsic::x86_avx2_pshuf_b:
2885 case Intrinsic::x86_avx512_pshuf_b_512:
2886 if (Value *V = simplifyX86pshufb(*II, *Builder))
2887 return replaceInstUsesWith(*II, V);
2890 case Intrinsic::x86_avx_vpermilvar_ps:
2891 case Intrinsic::x86_avx_vpermilvar_ps_256:
2892 case Intrinsic::x86_avx512_vpermilvar_ps_512:
2893 case Intrinsic::x86_avx_vpermilvar_pd:
2894 case Intrinsic::x86_avx_vpermilvar_pd_256:
2895 case Intrinsic::x86_avx512_vpermilvar_pd_512:
2896 if (Value *V = simplifyX86vpermilvar(*II, *Builder))
2897 return replaceInstUsesWith(*II, V);
2900 case Intrinsic::x86_avx2_permd:
2901 case Intrinsic::x86_avx2_permps:
2902 if (Value *V = simplifyX86vpermv(*II, *Builder))
2903 return replaceInstUsesWith(*II, V);
2906 case Intrinsic::x86_avx512_mask_permvar_df_256:
2907 case Intrinsic::x86_avx512_mask_permvar_df_512:
2908 case Intrinsic::x86_avx512_mask_permvar_di_256:
2909 case Intrinsic::x86_avx512_mask_permvar_di_512:
2910 case Intrinsic::x86_avx512_mask_permvar_hi_128:
2911 case Intrinsic::x86_avx512_mask_permvar_hi_256:
2912 case Intrinsic::x86_avx512_mask_permvar_hi_512:
2913 case Intrinsic::x86_avx512_mask_permvar_qi_128:
2914 case Intrinsic::x86_avx512_mask_permvar_qi_256:
2915 case Intrinsic::x86_avx512_mask_permvar_qi_512:
2916 case Intrinsic::x86_avx512_mask_permvar_sf_256:
2917 case Intrinsic::x86_avx512_mask_permvar_sf_512:
2918 case Intrinsic::x86_avx512_mask_permvar_si_256:
2919 case Intrinsic::x86_avx512_mask_permvar_si_512:
2920 if (Value *V = simplifyX86vpermv(*II, *Builder)) {
2921 // We simplified the permuting, now create a select for the masking.
2922 V = emitX86MaskSelect(II->getArgOperand(3), V, II->getArgOperand(2),
2924 return replaceInstUsesWith(*II, V);
2928 case Intrinsic::x86_avx_vperm2f128_pd_256:
2929 case Intrinsic::x86_avx_vperm2f128_ps_256:
2930 case Intrinsic::x86_avx_vperm2f128_si_256:
2931 case Intrinsic::x86_avx2_vperm2i128:
2932 if (Value *V = simplifyX86vperm2(*II, *Builder))
2933 return replaceInstUsesWith(*II, V);
2936 case Intrinsic::x86_avx_maskload_ps:
2937 case Intrinsic::x86_avx_maskload_pd:
2938 case Intrinsic::x86_avx_maskload_ps_256:
2939 case Intrinsic::x86_avx_maskload_pd_256:
2940 case Intrinsic::x86_avx2_maskload_d:
2941 case Intrinsic::x86_avx2_maskload_q:
2942 case Intrinsic::x86_avx2_maskload_d_256:
2943 case Intrinsic::x86_avx2_maskload_q_256:
2944 if (Instruction *I = simplifyX86MaskedLoad(*II, *this))
2948 case Intrinsic::x86_sse2_maskmov_dqu:
2949 case Intrinsic::x86_avx_maskstore_ps:
2950 case Intrinsic::x86_avx_maskstore_pd:
2951 case Intrinsic::x86_avx_maskstore_ps_256:
2952 case Intrinsic::x86_avx_maskstore_pd_256:
2953 case Intrinsic::x86_avx2_maskstore_d:
2954 case Intrinsic::x86_avx2_maskstore_q:
2955 case Intrinsic::x86_avx2_maskstore_d_256:
2956 case Intrinsic::x86_avx2_maskstore_q_256:
2957 if (simplifyX86MaskedStore(*II, *this))
2961 case Intrinsic::x86_xop_vpcomb:
2962 case Intrinsic::x86_xop_vpcomd:
2963 case Intrinsic::x86_xop_vpcomq:
2964 case Intrinsic::x86_xop_vpcomw:
2965 if (Value *V = simplifyX86vpcom(*II, *Builder, true))
2966 return replaceInstUsesWith(*II, V);
2969 case Intrinsic::x86_xop_vpcomub:
2970 case Intrinsic::x86_xop_vpcomud:
2971 case Intrinsic::x86_xop_vpcomuq:
2972 case Intrinsic::x86_xop_vpcomuw:
2973 if (Value *V = simplifyX86vpcom(*II, *Builder, false))
2974 return replaceInstUsesWith(*II, V);
2977 case Intrinsic::ppc_altivec_vperm:
2978 // Turn vperm(V1,V2,mask) -> shuffle(V1,V2,mask) if mask is a constant.
2979 // Note that ppc_altivec_vperm has a big-endian bias, so when creating
2980 // a vectorshuffle for little endian, we must undo the transformation
2981 // performed on vec_perm in altivec.h. That is, we must complement
2982 // the permutation mask with respect to 31 and reverse the order of
2984 if (Constant *Mask = dyn_cast<Constant>(II->getArgOperand(2))) {
2985 assert(Mask->getType()->getVectorNumElements() == 16 &&
2986 "Bad type for intrinsic!");
2988 // Check that all of the elements are integer constants or undefs.
2989 bool AllEltsOk = true;
2990 for (unsigned i = 0; i != 16; ++i) {
2991 Constant *Elt = Mask->getAggregateElement(i);
2992 if (!Elt || !(isa<ConstantInt>(Elt) || isa<UndefValue>(Elt))) {
2999 // Cast the input vectors to byte vectors.
3000 Value *Op0 = Builder->CreateBitCast(II->getArgOperand(0),
3002 Value *Op1 = Builder->CreateBitCast(II->getArgOperand(1),
3004 Value *Result = UndefValue::get(Op0->getType());
3006 // Only extract each element once.
3007 Value *ExtractedElts[32];
3008 memset(ExtractedElts, 0, sizeof(ExtractedElts));
3010 for (unsigned i = 0; i != 16; ++i) {
3011 if (isa<UndefValue>(Mask->getAggregateElement(i)))
3014 cast<ConstantInt>(Mask->getAggregateElement(i))->getZExtValue();
3015 Idx &= 31; // Match the hardware behavior.
3016 if (DL.isLittleEndian())
3019 if (!ExtractedElts[Idx]) {
3020 Value *Op0ToUse = (DL.isLittleEndian()) ? Op1 : Op0;
3021 Value *Op1ToUse = (DL.isLittleEndian()) ? Op0 : Op1;
3022 ExtractedElts[Idx] =
3023 Builder->CreateExtractElement(Idx < 16 ? Op0ToUse : Op1ToUse,
3024 Builder->getInt32(Idx&15));
3027 // Insert this value into the result vector.
3028 Result = Builder->CreateInsertElement(Result, ExtractedElts[Idx],
3029 Builder->getInt32(i));
3031 return CastInst::Create(Instruction::BitCast, Result, CI.getType());
3036 case Intrinsic::arm_neon_vld1:
3037 case Intrinsic::arm_neon_vld2:
3038 case Intrinsic::arm_neon_vld3:
3039 case Intrinsic::arm_neon_vld4:
3040 case Intrinsic::arm_neon_vld2lane:
3041 case Intrinsic::arm_neon_vld3lane:
3042 case Intrinsic::arm_neon_vld4lane:
3043 case Intrinsic::arm_neon_vst1:
3044 case Intrinsic::arm_neon_vst2:
3045 case Intrinsic::arm_neon_vst3:
3046 case Intrinsic::arm_neon_vst4:
3047 case Intrinsic::arm_neon_vst2lane:
3048 case Intrinsic::arm_neon_vst3lane:
3049 case Intrinsic::arm_neon_vst4lane: {
3051 getKnownAlignment(II->getArgOperand(0), DL, II, &AC, &DT);
3052 unsigned AlignArg = II->getNumArgOperands() - 1;
3053 ConstantInt *IntrAlign = dyn_cast<ConstantInt>(II->getArgOperand(AlignArg));
3054 if (IntrAlign && IntrAlign->getZExtValue() < MemAlign) {
3055 II->setArgOperand(AlignArg,
3056 ConstantInt::get(Type::getInt32Ty(II->getContext()),
3063 case Intrinsic::arm_neon_vmulls:
3064 case Intrinsic::arm_neon_vmullu:
3065 case Intrinsic::aarch64_neon_smull:
3066 case Intrinsic::aarch64_neon_umull: {
3067 Value *Arg0 = II->getArgOperand(0);
3068 Value *Arg1 = II->getArgOperand(1);
3070 // Handle mul by zero first:
3071 if (isa<ConstantAggregateZero>(Arg0) || isa<ConstantAggregateZero>(Arg1)) {
3072 return replaceInstUsesWith(CI, ConstantAggregateZero::get(II->getType()));
3075 // Check for constant LHS & RHS - in this case we just simplify.
3076 bool Zext = (II->getIntrinsicID() == Intrinsic::arm_neon_vmullu ||
3077 II->getIntrinsicID() == Intrinsic::aarch64_neon_umull);
3078 VectorType *NewVT = cast<VectorType>(II->getType());
3079 if (Constant *CV0 = dyn_cast<Constant>(Arg0)) {
3080 if (Constant *CV1 = dyn_cast<Constant>(Arg1)) {
3081 CV0 = ConstantExpr::getIntegerCast(CV0, NewVT, /*isSigned=*/!Zext);
3082 CV1 = ConstantExpr::getIntegerCast(CV1, NewVT, /*isSigned=*/!Zext);
3084 return replaceInstUsesWith(CI, ConstantExpr::getMul(CV0, CV1));
3087 // Couldn't simplify - canonicalize constant to the RHS.
3088 std::swap(Arg0, Arg1);
3091 // Handle mul by one:
3092 if (Constant *CV1 = dyn_cast<Constant>(Arg1))
3093 if (ConstantInt *Splat =
3094 dyn_cast_or_null<ConstantInt>(CV1->getSplatValue()))
3096 return CastInst::CreateIntegerCast(Arg0, II->getType(),
3097 /*isSigned=*/!Zext);
3101 case Intrinsic::amdgcn_rcp: {
3102 Value *Src = II->getArgOperand(0);
3104 // TODO: Move to ConstantFolding/InstSimplify?
3105 if (isa<UndefValue>(Src))
3106 return replaceInstUsesWith(CI, Src);
3108 if (const ConstantFP *C = dyn_cast<ConstantFP>(Src)) {
3109 const APFloat &ArgVal = C->getValueAPF();
3110 APFloat Val(ArgVal.getSemantics(), 1.0);
3111 APFloat::opStatus Status = Val.divide(ArgVal,
3112 APFloat::rmNearestTiesToEven);
3113 // Only do this if it was exact and therefore not dependent on the
3115 if (Status == APFloat::opOK)
3116 return replaceInstUsesWith(CI, ConstantFP::get(II->getContext(), Val));
3121 case Intrinsic::amdgcn_rsq: {
3122 Value *Src = II->getArgOperand(0);
3124 // TODO: Move to ConstantFolding/InstSimplify?
3125 if (isa<UndefValue>(Src))
3126 return replaceInstUsesWith(CI, Src);
3129 case Intrinsic::amdgcn_frexp_mant:
3130 case Intrinsic::amdgcn_frexp_exp: {
3131 Value *Src = II->getArgOperand(0);
3132 if (const ConstantFP *C = dyn_cast<ConstantFP>(Src)) {
3134 APFloat Significand = frexp(C->getValueAPF(), Exp,
3135 APFloat::rmNearestTiesToEven);
3137 if (II->getIntrinsicID() == Intrinsic::amdgcn_frexp_mant) {
3138 return replaceInstUsesWith(CI, ConstantFP::get(II->getContext(),
3142 // Match instruction special case behavior.
3143 if (Exp == APFloat::IEK_NaN || Exp == APFloat::IEK_Inf)
3146 return replaceInstUsesWith(CI, ConstantInt::get(II->getType(), Exp));
3149 if (isa<UndefValue>(Src))
3150 return replaceInstUsesWith(CI, UndefValue::get(II->getType()));
3154 case Intrinsic::amdgcn_class: {
3156 S_NAN = 1 << 0, // Signaling NaN
3157 Q_NAN = 1 << 1, // Quiet NaN
3158 N_INFINITY = 1 << 2, // Negative infinity
3159 N_NORMAL = 1 << 3, // Negative normal
3160 N_SUBNORMAL = 1 << 4, // Negative subnormal
3161 N_ZERO = 1 << 5, // Negative zero
3162 P_ZERO = 1 << 6, // Positive zero
3163 P_SUBNORMAL = 1 << 7, // Positive subnormal
3164 P_NORMAL = 1 << 8, // Positive normal
3165 P_INFINITY = 1 << 9 // Positive infinity
3168 const uint32_t FullMask = S_NAN | Q_NAN | N_INFINITY | N_NORMAL |
3169 N_SUBNORMAL | N_ZERO | P_ZERO | P_SUBNORMAL | P_NORMAL | P_INFINITY;
3171 Value *Src0 = II->getArgOperand(0);
3172 Value *Src1 = II->getArgOperand(1);
3173 const ConstantInt *CMask = dyn_cast<ConstantInt>(Src1);
3175 if (isa<UndefValue>(Src0))
3176 return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
3178 if (isa<UndefValue>(Src1))
3179 return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), false));
3183 uint32_t Mask = CMask->getZExtValue();
3185 // If all tests are made, it doesn't matter what the value is.
3186 if ((Mask & FullMask) == FullMask)
3187 return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), true));
3189 if ((Mask & FullMask) == 0)
3190 return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), false));
3192 if (Mask == (S_NAN | Q_NAN)) {
3193 // Equivalent of isnan. Replace with standard fcmp.
3194 Value *FCmp = Builder->CreateFCmpUNO(Src0, Src0);
3196 return replaceInstUsesWith(*II, FCmp);
3199 const ConstantFP *CVal = dyn_cast<ConstantFP>(Src0);
3201 if (isa<UndefValue>(Src0))
3202 return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
3204 // Clamp mask to used bits
3205 if ((Mask & FullMask) != Mask) {
3206 CallInst *NewCall = Builder->CreateCall(II->getCalledFunction(),
3207 { Src0, ConstantInt::get(Src1->getType(), Mask & FullMask) }
3210 NewCall->takeName(II);
3211 return replaceInstUsesWith(*II, NewCall);
3217 const APFloat &Val = CVal->getValueAPF();
3220 ((Mask & S_NAN) && Val.isNaN() && Val.isSignaling()) ||
3221 ((Mask & Q_NAN) && Val.isNaN() && !Val.isSignaling()) ||
3222 ((Mask & N_INFINITY) && Val.isInfinity() && Val.isNegative()) ||
3223 ((Mask & N_NORMAL) && Val.isNormal() && Val.isNegative()) ||
3224 ((Mask & N_SUBNORMAL) && Val.isDenormal() && Val.isNegative()) ||
3225 ((Mask & N_ZERO) && Val.isZero() && Val.isNegative()) ||
3226 ((Mask & P_ZERO) && Val.isZero() && !Val.isNegative()) ||
3227 ((Mask & P_SUBNORMAL) && Val.isDenormal() && !Val.isNegative()) ||
3228 ((Mask & P_NORMAL) && Val.isNormal() && !Val.isNegative()) ||
3229 ((Mask & P_INFINITY) && Val.isInfinity() && !Val.isNegative());
3231 return replaceInstUsesWith(*II, ConstantInt::get(II->getType(), Result));
3233 case Intrinsic::amdgcn_cvt_pkrtz: {
3234 Value *Src0 = II->getArgOperand(0);
3235 Value *Src1 = II->getArgOperand(1);
3236 if (const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
3237 if (const ConstantFP *C1 = dyn_cast<ConstantFP>(Src1)) {
3238 const fltSemantics &HalfSem
3239 = II->getType()->getScalarType()->getFltSemantics();
3241 APFloat Val0 = C0->getValueAPF();
3242 APFloat Val1 = C1->getValueAPF();
3243 Val0.convert(HalfSem, APFloat::rmTowardZero, &LosesInfo);
3244 Val1.convert(HalfSem, APFloat::rmTowardZero, &LosesInfo);
3246 Constant *Folded = ConstantVector::get({
3247 ConstantFP::get(II->getContext(), Val0),
3248 ConstantFP::get(II->getContext(), Val1) });
3249 return replaceInstUsesWith(*II, Folded);
3253 if (isa<UndefValue>(Src0) && isa<UndefValue>(Src1))
3254 return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
3258 case Intrinsic::amdgcn_ubfe:
3259 case Intrinsic::amdgcn_sbfe: {
3260 // Decompose simple cases into standard shifts.
3261 Value *Src = II->getArgOperand(0);
3262 if (isa<UndefValue>(Src))
3263 return replaceInstUsesWith(*II, Src);
3266 Type *Ty = II->getType();
3267 unsigned IntSize = Ty->getIntegerBitWidth();
3269 ConstantInt *CWidth = dyn_cast<ConstantInt>(II->getArgOperand(2));
3271 Width = CWidth->getZExtValue();
3272 if ((Width & (IntSize - 1)) == 0)
3273 return replaceInstUsesWith(*II, ConstantInt::getNullValue(Ty));
3275 if (Width >= IntSize) {
3276 // Hardware ignores high bits, so remove those.
3277 II->setArgOperand(2, ConstantInt::get(CWidth->getType(),
3278 Width & (IntSize - 1)));
3284 ConstantInt *COffset = dyn_cast<ConstantInt>(II->getArgOperand(1));
3286 Offset = COffset->getZExtValue();
3287 if (Offset >= IntSize) {
3288 II->setArgOperand(1, ConstantInt::get(COffset->getType(),
3289 Offset & (IntSize - 1)));
3294 bool Signed = II->getIntrinsicID() == Intrinsic::amdgcn_sbfe;
3296 // TODO: Also emit sub if only width is constant.
3297 if (!CWidth && COffset && Offset == 0) {
3298 Constant *KSize = ConstantInt::get(COffset->getType(), IntSize);
3299 Value *ShiftVal = Builder->CreateSub(KSize, II->getArgOperand(2));
3300 ShiftVal = Builder->CreateZExt(ShiftVal, II->getType());
3302 Value *Shl = Builder->CreateShl(Src, ShiftVal);
3303 Value *RightShift = Signed ?
3304 Builder->CreateAShr(Shl, ShiftVal) :
3305 Builder->CreateLShr(Shl, ShiftVal);
3306 RightShift->takeName(II);
3307 return replaceInstUsesWith(*II, RightShift);
3310 if (!CWidth || !COffset)
3313 // TODO: This allows folding to undef when the hardware has specific
3315 if (Offset + Width < IntSize) {
3316 Value *Shl = Builder->CreateShl(Src, IntSize - Offset - Width);
3317 Value *RightShift = Signed ?
3318 Builder->CreateAShr(Shl, IntSize - Width) :
3319 Builder->CreateLShr(Shl, IntSize - Width);
3320 RightShift->takeName(II);
3321 return replaceInstUsesWith(*II, RightShift);
3324 Value *RightShift = Signed ?
3325 Builder->CreateAShr(Src, Offset) :
3326 Builder->CreateLShr(Src, Offset);
3328 RightShift->takeName(II);
3329 return replaceInstUsesWith(*II, RightShift);
3331 case Intrinsic::amdgcn_exp:
3332 case Intrinsic::amdgcn_exp_compr: {
3333 ConstantInt *En = dyn_cast<ConstantInt>(II->getArgOperand(1));
3334 if (!En) // Illegal.
3337 unsigned EnBits = En->getZExtValue();
3339 break; // All inputs enabled.
3341 bool IsCompr = II->getIntrinsicID() == Intrinsic::amdgcn_exp_compr;
3342 bool Changed = false;
3343 for (int I = 0; I < (IsCompr ? 2 : 4); ++I) {
3344 if ((!IsCompr && (EnBits & (1 << I)) == 0) ||
3345 (IsCompr && ((EnBits & (0x3 << (2 * I))) == 0))) {
3346 Value *Src = II->getArgOperand(I + 2);
3347 if (!isa<UndefValue>(Src)) {
3348 II->setArgOperand(I + 2, UndefValue::get(Src->getType()));
3360 case Intrinsic::amdgcn_fmed3: {
3361 // Note this does not preserve proper sNaN behavior if IEEE-mode is enabled
3364 Value *Src0 = II->getArgOperand(0);
3365 Value *Src1 = II->getArgOperand(1);
3366 Value *Src2 = II->getArgOperand(2);
3369 // Canonicalize constants to RHS operands.
3371 // fmed3(c0, x, c1) -> fmed3(x, c0, c1)
3372 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
3373 std::swap(Src0, Src1);
3377 if (isa<Constant>(Src1) && !isa<Constant>(Src2)) {
3378 std::swap(Src1, Src2);
3382 if (isa<Constant>(Src0) && !isa<Constant>(Src1)) {
3383 std::swap(Src0, Src1);
3388 II->setArgOperand(0, Src0);
3389 II->setArgOperand(1, Src1);
3390 II->setArgOperand(2, Src2);
3394 if (match(Src2, m_NaN()) || isa<UndefValue>(Src2)) {
3395 CallInst *NewCall = Builder->CreateMinNum(Src0, Src1);
3396 NewCall->copyFastMathFlags(II);
3397 NewCall->takeName(II);
3398 return replaceInstUsesWith(*II, NewCall);
3401 if (const ConstantFP *C0 = dyn_cast<ConstantFP>(Src0)) {
3402 if (const ConstantFP *C1 = dyn_cast<ConstantFP>(Src1)) {
3403 if (const ConstantFP *C2 = dyn_cast<ConstantFP>(Src2)) {
3404 APFloat Result = fmed3AMDGCN(C0->getValueAPF(), C1->getValueAPF(),
3406 return replaceInstUsesWith(*II,
3407 ConstantFP::get(Builder->getContext(), Result));
3414 case Intrinsic::amdgcn_icmp:
3415 case Intrinsic::amdgcn_fcmp: {
3416 const ConstantInt *CC = dyn_cast<ConstantInt>(II->getArgOperand(2));
3420 // Guard against invalid arguments.
3421 int64_t CCVal = CC->getZExtValue();
3422 bool IsInteger = II->getIntrinsicID() == Intrinsic::amdgcn_icmp;
3423 if ((IsInteger && (CCVal < CmpInst::FIRST_ICMP_PREDICATE ||
3424 CCVal > CmpInst::LAST_ICMP_PREDICATE)) ||
3425 (!IsInteger && (CCVal < CmpInst::FIRST_FCMP_PREDICATE ||
3426 CCVal > CmpInst::LAST_FCMP_PREDICATE)))
3429 Value *Src0 = II->getArgOperand(0);
3430 Value *Src1 = II->getArgOperand(1);
3432 if (auto *CSrc0 = dyn_cast<Constant>(Src0)) {
3433 if (auto *CSrc1 = dyn_cast<Constant>(Src1)) {
3434 Constant *CCmp = ConstantExpr::getCompare(CCVal, CSrc0, CSrc1);
3435 if (CCmp->isNullValue()) {
3436 return replaceInstUsesWith(
3437 *II, ConstantExpr::getSExt(CCmp, II->getType()));
3440 // The result of V_ICMP/V_FCMP assembly instructions (which this
3441 // intrinsic exposes) is one bit per thread, masked with the EXEC
3442 // register (which contains the bitmask of live threads). So a
3443 // comparison that always returns true is the same as a read of the
3445 Value *NewF = Intrinsic::getDeclaration(
3446 II->getModule(), Intrinsic::read_register, II->getType());
3447 Metadata *MDArgs[] = {MDString::get(II->getContext(), "exec")};
3448 MDNode *MD = MDNode::get(II->getContext(), MDArgs);
3449 Value *Args[] = {MetadataAsValue::get(II->getContext(), MD)};
3450 CallInst *NewCall = Builder->CreateCall(NewF, Args);
3451 NewCall->addAttribute(AttributeList::FunctionIndex,
3452 Attribute::Convergent);
3453 NewCall->takeName(II);
3454 return replaceInstUsesWith(*II, NewCall);
3457 // Canonicalize constants to RHS.
3458 CmpInst::Predicate SwapPred
3459 = CmpInst::getSwappedPredicate(static_cast<CmpInst::Predicate>(CCVal));
3460 II->setArgOperand(0, Src1);
3461 II->setArgOperand(1, Src0);
3462 II->setArgOperand(2, ConstantInt::get(CC->getType(),
3463 static_cast<int>(SwapPred)));
3467 if (CCVal != CmpInst::ICMP_EQ && CCVal != CmpInst::ICMP_NE)
3470 // Canonicalize compare eq with true value to compare != 0
3471 // llvm.amdgcn.icmp(zext (i1 x), 1, eq)
3472 // -> llvm.amdgcn.icmp(zext (i1 x), 0, ne)
3473 // llvm.amdgcn.icmp(sext (i1 x), -1, eq)
3474 // -> llvm.amdgcn.icmp(sext (i1 x), 0, ne)
3476 if (CCVal == CmpInst::ICMP_EQ &&
3477 ((match(Src1, m_One()) && match(Src0, m_ZExt(m_Value(ExtSrc)))) ||
3478 (match(Src1, m_AllOnes()) && match(Src0, m_SExt(m_Value(ExtSrc))))) &&
3479 ExtSrc->getType()->isIntegerTy(1)) {
3480 II->setArgOperand(1, ConstantInt::getNullValue(Src1->getType()));
3481 II->setArgOperand(2, ConstantInt::get(CC->getType(), CmpInst::ICMP_NE));
3485 CmpInst::Predicate SrcPred;
3489 // Fold compare eq/ne with 0 from a compare result as the predicate to the
3490 // intrinsic. The typical use is a wave vote function in the library, which
3491 // will be fed from a user code condition compared with 0. Fold in the
3492 // redundant compare.
3494 // llvm.amdgcn.icmp([sz]ext ([if]cmp pred a, b), 0, ne)
3495 // -> llvm.amdgcn.[if]cmp(a, b, pred)
3497 // llvm.amdgcn.icmp([sz]ext ([if]cmp pred a, b), 0, eq)
3498 // -> llvm.amdgcn.[if]cmp(a, b, inv pred)
3499 if (match(Src1, m_Zero()) &&
3501 m_ZExtOrSExt(m_Cmp(SrcPred, m_Value(SrcLHS), m_Value(SrcRHS))))) {
3502 if (CCVal == CmpInst::ICMP_EQ)
3503 SrcPred = CmpInst::getInversePredicate(SrcPred);
3505 Intrinsic::ID NewIID = CmpInst::isFPPredicate(SrcPred) ?
3506 Intrinsic::amdgcn_fcmp : Intrinsic::amdgcn_icmp;
3508 Value *NewF = Intrinsic::getDeclaration(II->getModule(), NewIID,
3510 Value *Args[] = { SrcLHS, SrcRHS,
3511 ConstantInt::get(CC->getType(), SrcPred) };
3512 CallInst *NewCall = Builder->CreateCall(NewF, Args);
3513 NewCall->takeName(II);
3514 return replaceInstUsesWith(*II, NewCall);
3519 case Intrinsic::stackrestore: {
3520 // If the save is right next to the restore, remove the restore. This can
3521 // happen when variable allocas are DCE'd.
3522 if (IntrinsicInst *SS = dyn_cast<IntrinsicInst>(II->getArgOperand(0))) {
3523 if (SS->getIntrinsicID() == Intrinsic::stacksave) {
3524 if (&*++SS->getIterator() == II)
3525 return eraseInstFromFunction(CI);
3529 // Scan down this block to see if there is another stack restore in the
3530 // same block without an intervening call/alloca.
3531 BasicBlock::iterator BI(II);
3532 TerminatorInst *TI = II->getParent()->getTerminator();
3533 bool CannotRemove = false;
3534 for (++BI; &*BI != TI; ++BI) {
3535 if (isa<AllocaInst>(BI)) {
3536 CannotRemove = true;
3539 if (CallInst *BCI = dyn_cast<CallInst>(BI)) {
3540 if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(BCI)) {
3541 // If there is a stackrestore below this one, remove this one.
3542 if (II->getIntrinsicID() == Intrinsic::stackrestore)
3543 return eraseInstFromFunction(CI);
3545 // Bail if we cross over an intrinsic with side effects, such as
3546 // llvm.stacksave, llvm.read_register, or llvm.setjmp.
3547 if (II->mayHaveSideEffects()) {
3548 CannotRemove = true;
3552 // If we found a non-intrinsic call, we can't remove the stack
3554 CannotRemove = true;
3560 // If the stack restore is in a return, resume, or unwind block and if there
3561 // are no allocas or calls between the restore and the return, nuke the
3563 if (!CannotRemove && (isa<ReturnInst>(TI) || isa<ResumeInst>(TI)))
3564 return eraseInstFromFunction(CI);
3567 case Intrinsic::lifetime_start:
3568 // Asan needs to poison memory to detect invalid access which is possible
3569 // even for empty lifetime range.
3570 if (II->getFunction()->hasFnAttribute(Attribute::SanitizeAddress))
3573 if (removeTriviallyEmptyRange(*II, Intrinsic::lifetime_start,
3574 Intrinsic::lifetime_end, *this))
3577 case Intrinsic::assume: {
3578 Value *IIOperand = II->getArgOperand(0);
3579 // Remove an assume if it is immediately followed by an identical assume.
3580 if (match(II->getNextNode(),
3581 m_Intrinsic<Intrinsic::assume>(m_Specific(IIOperand))))
3582 return eraseInstFromFunction(CI);
3584 // Canonicalize assume(a && b) -> assume(a); assume(b);
3585 // Note: New assumption intrinsics created here are registered by
3586 // the InstCombineIRInserter object.
3587 Value *AssumeIntrinsic = II->getCalledValue(), *A, *B;
3588 if (match(IIOperand, m_And(m_Value(A), m_Value(B)))) {
3589 Builder->CreateCall(AssumeIntrinsic, A, II->getName());
3590 Builder->CreateCall(AssumeIntrinsic, B, II->getName());
3591 return eraseInstFromFunction(*II);
3593 // assume(!(a || b)) -> assume(!a); assume(!b);
3594 if (match(IIOperand, m_Not(m_Or(m_Value(A), m_Value(B))))) {
3595 Builder->CreateCall(AssumeIntrinsic, Builder->CreateNot(A),
3597 Builder->CreateCall(AssumeIntrinsic, Builder->CreateNot(B),
3599 return eraseInstFromFunction(*II);
3602 // assume( (load addr) != null ) -> add 'nonnull' metadata to load
3603 // (if assume is valid at the load)
3604 CmpInst::Predicate Pred;
3606 if (match(IIOperand, m_ICmp(Pred, m_Instruction(LHS), m_Zero())) &&
3607 Pred == ICmpInst::ICMP_NE && LHS->getOpcode() == Instruction::Load &&
3608 LHS->getType()->isPointerTy() &&
3609 isValidAssumeForContext(II, LHS, &DT)) {
3610 MDNode *MD = MDNode::get(II->getContext(), None);
3611 LHS->setMetadata(LLVMContext::MD_nonnull, MD);
3612 return eraseInstFromFunction(*II);
3614 // TODO: apply nonnull return attributes to calls and invokes
3615 // TODO: apply range metadata for range check patterns?
3618 // If there is a dominating assume with the same condition as this one,
3619 // then this one is redundant, and should be removed.
3621 computeKnownBits(IIOperand, Known, 0, II);
3622 if (Known.One.isAllOnesValue())
3623 return eraseInstFromFunction(*II);
3625 // Update the cache of affected values for this assumption (we might be
3626 // here because we just simplified the condition).
3627 AC.updateAffectedValues(II);
3630 case Intrinsic::experimental_gc_relocate: {
3631 // Translate facts known about a pointer before relocating into
3632 // facts about the relocate value, while being careful to
3633 // preserve relocation semantics.
3634 Value *DerivedPtr = cast<GCRelocateInst>(II)->getDerivedPtr();
3636 // Remove the relocation if unused, note that this check is required
3637 // to prevent the cases below from looping forever.
3638 if (II->use_empty())
3639 return eraseInstFromFunction(*II);
3641 // Undef is undef, even after relocation.
3642 // TODO: provide a hook for this in GCStrategy. This is clearly legal for
3643 // most practical collectors, but there was discussion in the review thread
3644 // about whether it was legal for all possible collectors.
3645 if (isa<UndefValue>(DerivedPtr))
3646 // Use undef of gc_relocate's type to replace it.
3647 return replaceInstUsesWith(*II, UndefValue::get(II->getType()));
3649 if (auto *PT = dyn_cast<PointerType>(II->getType())) {
3650 // The relocation of null will be null for most any collector.
3651 // TODO: provide a hook for this in GCStrategy. There might be some
3652 // weird collector this property does not hold for.
3653 if (isa<ConstantPointerNull>(DerivedPtr))
3654 // Use null-pointer of gc_relocate's type to replace it.
3655 return replaceInstUsesWith(*II, ConstantPointerNull::get(PT));
3657 // isKnownNonNull -> nonnull attribute
3658 if (isKnownNonNullAt(DerivedPtr, II, &DT))
3659 II->addAttribute(AttributeList::ReturnIndex, Attribute::NonNull);
3662 // TODO: bitcast(relocate(p)) -> relocate(bitcast(p))
3663 // Canonicalize on the type from the uses to the defs
3665 // TODO: relocate((gep p, C, C2, ...)) -> gep(relocate(p), C, C2, ...)
3669 case Intrinsic::experimental_guard: {
3670 // Is this guard followed by another guard?
3671 Instruction *NextInst = II->getNextNode();
3672 Value *NextCond = nullptr;
3674 m_Intrinsic<Intrinsic::experimental_guard>(m_Value(NextCond)))) {
3675 Value *CurrCond = II->getArgOperand(0);
3677 // Remove a guard that it is immediately preceded by an identical guard.
3678 if (CurrCond == NextCond)
3679 return eraseInstFromFunction(*NextInst);
3681 // Otherwise canonicalize guard(a); guard(b) -> guard(a & b).
3682 II->setArgOperand(0, Builder->CreateAnd(CurrCond, NextCond));
3683 return eraseInstFromFunction(*NextInst);
3688 return visitCallSite(II);
3691 // Fence instruction simplification
3692 Instruction *InstCombiner::visitFenceInst(FenceInst &FI) {
3693 // Remove identical consecutive fences.
3694 if (auto *NFI = dyn_cast<FenceInst>(FI.getNextNode()))
3695 if (FI.isIdenticalTo(NFI))
3696 return eraseInstFromFunction(FI);
3700 // InvokeInst simplification
3702 Instruction *InstCombiner::visitInvokeInst(InvokeInst &II) {
3703 return visitCallSite(&II);
3706 /// If this cast does not affect the value passed through the varargs area, we
3707 /// can eliminate the use of the cast.
3708 static bool isSafeToEliminateVarargsCast(const CallSite CS,
3709 const DataLayout &DL,
3710 const CastInst *const CI,
3712 if (!CI->isLosslessCast())
3715 // If this is a GC intrinsic, avoid munging types. We need types for
3716 // statepoint reconstruction in SelectionDAG.
3717 // TODO: This is probably something which should be expanded to all
3718 // intrinsics since the entire point of intrinsics is that
3719 // they are understandable by the optimizer.
3720 if (isStatepoint(CS) || isGCRelocate(CS) || isGCResult(CS))
3723 // The size of ByVal or InAlloca arguments is derived from the type, so we
3724 // can't change to a type with a different size. If the size were
3725 // passed explicitly we could avoid this check.
3726 if (!CS.isByValOrInAllocaArgument(ix))
3730 cast<PointerType>(CI->getOperand(0)->getType())->getElementType();
3731 Type* DstTy = cast<PointerType>(CI->getType())->getElementType();
3732 if (!SrcTy->isSized() || !DstTy->isSized())
3734 if (DL.getTypeAllocSize(SrcTy) != DL.getTypeAllocSize(DstTy))
3739 Instruction *InstCombiner::tryOptimizeCall(CallInst *CI) {
3740 if (!CI->getCalledFunction()) return nullptr;
3742 auto InstCombineRAUW = [this](Instruction *From, Value *With) {
3743 replaceInstUsesWith(*From, With);
3745 LibCallSimplifier Simplifier(DL, &TLI, InstCombineRAUW);
3746 if (Value *With = Simplifier.optimizeCall(CI)) {
3748 return CI->use_empty() ? CI : replaceInstUsesWith(*CI, With);
3754 static IntrinsicInst *findInitTrampolineFromAlloca(Value *TrampMem) {
3755 // Strip off at most one level of pointer casts, looking for an alloca. This
3756 // is good enough in practice and simpler than handling any number of casts.
3757 Value *Underlying = TrampMem->stripPointerCasts();
3758 if (Underlying != TrampMem &&
3759 (!Underlying->hasOneUse() || Underlying->user_back() != TrampMem))
3761 if (!isa<AllocaInst>(Underlying))
3764 IntrinsicInst *InitTrampoline = nullptr;
3765 for (User *U : TrampMem->users()) {
3766 IntrinsicInst *II = dyn_cast<IntrinsicInst>(U);
3769 if (II->getIntrinsicID() == Intrinsic::init_trampoline) {
3771 // More than one init_trampoline writes to this value. Give up.
3773 InitTrampoline = II;
3776 if (II->getIntrinsicID() == Intrinsic::adjust_trampoline)
3777 // Allow any number of calls to adjust.trampoline.
3782 // No call to init.trampoline found.
3783 if (!InitTrampoline)
3786 // Check that the alloca is being used in the expected way.
3787 if (InitTrampoline->getOperand(0) != TrampMem)
3790 return InitTrampoline;
3793 static IntrinsicInst *findInitTrampolineFromBB(IntrinsicInst *AdjustTramp,
3795 // Visit all the previous instructions in the basic block, and try to find a
3796 // init.trampoline which has a direct path to the adjust.trampoline.
3797 for (BasicBlock::iterator I = AdjustTramp->getIterator(),
3798 E = AdjustTramp->getParent()->begin();
3800 Instruction *Inst = &*--I;
3801 if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(I))
3802 if (II->getIntrinsicID() == Intrinsic::init_trampoline &&
3803 II->getOperand(0) == TrampMem)
3805 if (Inst->mayWriteToMemory())
3811 // Given a call to llvm.adjust.trampoline, find and return the corresponding
3812 // call to llvm.init.trampoline if the call to the trampoline can be optimized
3813 // to a direct call to a function. Otherwise return NULL.
3815 static IntrinsicInst *findInitTrampoline(Value *Callee) {
3816 Callee = Callee->stripPointerCasts();
3817 IntrinsicInst *AdjustTramp = dyn_cast<IntrinsicInst>(Callee);
3819 AdjustTramp->getIntrinsicID() != Intrinsic::adjust_trampoline)
3822 Value *TrampMem = AdjustTramp->getOperand(0);
3824 if (IntrinsicInst *IT = findInitTrampolineFromAlloca(TrampMem))
3826 if (IntrinsicInst *IT = findInitTrampolineFromBB(AdjustTramp, TrampMem))
3831 /// Improvements for call and invoke instructions.
3832 Instruction *InstCombiner::visitCallSite(CallSite CS) {
3833 if (isAllocLikeFn(CS.getInstruction(), &TLI))
3834 return visitAllocSite(*CS.getInstruction());
3836 bool Changed = false;
3838 // Mark any parameters that are known to be non-null with the nonnull
3839 // attribute. This is helpful for inlining calls to functions with null
3840 // checks on their arguments.
3841 SmallVector<unsigned, 4> Indices;
3844 for (Value *V : CS.args()) {
3845 if (V->getType()->isPointerTy() &&
3846 !CS.paramHasAttr(ArgNo, Attribute::NonNull) &&
3847 isKnownNonNullAt(V, CS.getInstruction(), &DT))
3848 Indices.push_back(ArgNo + 1);
3852 assert(ArgNo == CS.arg_size() && "sanity check");
3854 if (!Indices.empty()) {
3855 AttributeList AS = CS.getAttributes();
3856 LLVMContext &Ctx = CS.getInstruction()->getContext();
3857 AS = AS.addAttribute(Ctx, Indices,
3858 Attribute::get(Ctx, Attribute::NonNull));
3859 CS.setAttributes(AS);
3863 // If the callee is a pointer to a function, attempt to move any casts to the
3864 // arguments of the call/invoke.
3865 Value *Callee = CS.getCalledValue();
3866 if (!isa<Function>(Callee) && transformConstExprCastCall(CS))
3869 if (Function *CalleeF = dyn_cast<Function>(Callee)) {
3870 // Remove the convergent attr on calls when the callee is not convergent.
3871 if (CS.isConvergent() && !CalleeF->isConvergent() &&
3872 !CalleeF->isIntrinsic()) {
3873 DEBUG(dbgs() << "Removing convergent attr from instr "
3874 << CS.getInstruction() << "\n");
3875 CS.setNotConvergent();
3876 return CS.getInstruction();
3879 // If the call and callee calling conventions don't match, this call must
3880 // be unreachable, as the call is undefined.
3881 if (CalleeF->getCallingConv() != CS.getCallingConv() &&
3882 // Only do this for calls to a function with a body. A prototype may
3883 // not actually end up matching the implementation's calling conv for a
3884 // variety of reasons (e.g. it may be written in assembly).
3885 !CalleeF->isDeclaration()) {
3886 Instruction *OldCall = CS.getInstruction();
3887 new StoreInst(ConstantInt::getTrue(Callee->getContext()),
3888 UndefValue::get(Type::getInt1PtrTy(Callee->getContext())),
3890 // If OldCall does not return void then replaceAllUsesWith undef.
3891 // This allows ValueHandlers and custom metadata to adjust itself.
3892 if (!OldCall->getType()->isVoidTy())
3893 replaceInstUsesWith(*OldCall, UndefValue::get(OldCall->getType()));
3894 if (isa<CallInst>(OldCall))
3895 return eraseInstFromFunction(*OldCall);
3897 // We cannot remove an invoke, because it would change the CFG, just
3898 // change the callee to a null pointer.
3899 cast<InvokeInst>(OldCall)->setCalledFunction(
3900 Constant::getNullValue(CalleeF->getType()));
3905 if (isa<ConstantPointerNull>(Callee) || isa<UndefValue>(Callee)) {
3906 // If CS does not return void then replaceAllUsesWith undef.
3907 // This allows ValueHandlers and custom metadata to adjust itself.
3908 if (!CS.getInstruction()->getType()->isVoidTy())
3909 replaceInstUsesWith(*CS.getInstruction(),
3910 UndefValue::get(CS.getInstruction()->getType()));
3912 if (isa<InvokeInst>(CS.getInstruction())) {
3913 // Can't remove an invoke because we cannot change the CFG.
3917 // This instruction is not reachable, just remove it. We insert a store to
3918 // undef so that we know that this code is not reachable, despite the fact
3919 // that we can't modify the CFG here.
3920 new StoreInst(ConstantInt::getTrue(Callee->getContext()),
3921 UndefValue::get(Type::getInt1PtrTy(Callee->getContext())),
3922 CS.getInstruction());
3924 return eraseInstFromFunction(*CS.getInstruction());
3927 if (IntrinsicInst *II = findInitTrampoline(Callee))
3928 return transformCallThroughTrampoline(CS, II);
3930 PointerType *PTy = cast<PointerType>(Callee->getType());
3931 FunctionType *FTy = cast<FunctionType>(PTy->getElementType());
3932 if (FTy->isVarArg()) {
3933 int ix = FTy->getNumParams();
3934 // See if we can optimize any arguments passed through the varargs area of
3936 for (CallSite::arg_iterator I = CS.arg_begin() + FTy->getNumParams(),
3937 E = CS.arg_end(); I != E; ++I, ++ix) {
3938 CastInst *CI = dyn_cast<CastInst>(*I);
3939 if (CI && isSafeToEliminateVarargsCast(CS, DL, CI, ix)) {
3940 *I = CI->getOperand(0);
3946 if (isa<InlineAsm>(Callee) && !CS.doesNotThrow()) {
3947 // Inline asm calls cannot throw - mark them 'nounwind'.
3948 CS.setDoesNotThrow();
3952 // Try to optimize the call if possible, we require DataLayout for most of
3953 // this. None of these calls are seen as possibly dead so go ahead and
3954 // delete the instruction now.
3955 if (CallInst *CI = dyn_cast<CallInst>(CS.getInstruction())) {
3956 Instruction *I = tryOptimizeCall(CI);
3957 // If we changed something return the result, etc. Otherwise let
3958 // the fallthrough check.
3959 if (I) return eraseInstFromFunction(*I);
3962 return Changed ? CS.getInstruction() : nullptr;
3965 /// If the callee is a constexpr cast of a function, attempt to move the cast to
3966 /// the arguments of the call/invoke.
3967 bool InstCombiner::transformConstExprCastCall(CallSite CS) {
3968 auto *Callee = dyn_cast<Function>(CS.getCalledValue()->stripPointerCasts());
3972 // The prototype of a thunk is a lie. Don't directly call such a function.
3973 if (Callee->hasFnAttribute("thunk"))
3976 Instruction *Caller = CS.getInstruction();
3977 const AttributeList &CallerPAL = CS.getAttributes();
3979 // Okay, this is a cast from a function to a different type. Unless doing so
3980 // would cause a type conversion of one of our arguments, change this call to
3981 // be a direct call with arguments casted to the appropriate types.
3983 FunctionType *FT = Callee->getFunctionType();
3984 Type *OldRetTy = Caller->getType();
3985 Type *NewRetTy = FT->getReturnType();
3987 // Check to see if we are changing the return type...
3988 if (OldRetTy != NewRetTy) {
3990 if (NewRetTy->isStructTy())
3991 return false; // TODO: Handle multiple return values.
3993 if (!CastInst::isBitOrNoopPointerCastable(NewRetTy, OldRetTy, DL)) {
3994 if (Callee->isDeclaration())
3995 return false; // Cannot transform this return value.
3997 if (!Caller->use_empty() &&
3998 // void -> non-void is handled specially
3999 !NewRetTy->isVoidTy())
4000 return false; // Cannot transform this return value.
4003 if (!CallerPAL.isEmpty() && !Caller->use_empty()) {
4004 AttrBuilder RAttrs(CallerPAL, AttributeList::ReturnIndex);
4005 if (RAttrs.overlaps(AttributeFuncs::typeIncompatible(NewRetTy)))
4006 return false; // Attribute not compatible with transformed value.
4009 // If the callsite is an invoke instruction, and the return value is used by
4010 // a PHI node in a successor, we cannot change the return type of the call
4011 // because there is no place to put the cast instruction (without breaking
4012 // the critical edge). Bail out in this case.
4013 if (!Caller->use_empty())
4014 if (InvokeInst *II = dyn_cast<InvokeInst>(Caller))
4015 for (User *U : II->users())
4016 if (PHINode *PN = dyn_cast<PHINode>(U))
4017 if (PN->getParent() == II->getNormalDest() ||
4018 PN->getParent() == II->getUnwindDest())
4022 unsigned NumActualArgs = CS.arg_size();
4023 unsigned NumCommonArgs = std::min(FT->getNumParams(), NumActualArgs);
4025 // Prevent us turning:
4026 // declare void @takes_i32_inalloca(i32* inalloca)
4027 // call void bitcast (void (i32*)* @takes_i32_inalloca to void (i32)*)(i32 0)
4030 // call void @takes_i32_inalloca(i32* null)
4032 // Similarly, avoid folding away bitcasts of byval calls.
4033 if (Callee->getAttributes().hasAttrSomewhere(Attribute::InAlloca) ||
4034 Callee->getAttributes().hasAttrSomewhere(Attribute::ByVal))
4037 CallSite::arg_iterator AI = CS.arg_begin();
4038 for (unsigned i = 0, e = NumCommonArgs; i != e; ++i, ++AI) {
4039 Type *ParamTy = FT->getParamType(i);
4040 Type *ActTy = (*AI)->getType();
4042 if (!CastInst::isBitOrNoopPointerCastable(ActTy, ParamTy, DL))
4043 return false; // Cannot transform this parameter value.
4045 if (AttrBuilder(CallerPAL.getParamAttributes(i))
4046 .overlaps(AttributeFuncs::typeIncompatible(ParamTy)))
4047 return false; // Attribute not compatible with transformed value.
4049 if (CS.isInAllocaArgument(i))
4050 return false; // Cannot transform to and from inalloca.
4052 // If the parameter is passed as a byval argument, then we have to have a
4053 // sized type and the sized type has to have the same size as the old type.
4054 if (ParamTy != ActTy && CallerPAL.hasParamAttribute(i, Attribute::ByVal)) {
4055 PointerType *ParamPTy = dyn_cast<PointerType>(ParamTy);
4056 if (!ParamPTy || !ParamPTy->getElementType()->isSized())
4059 Type *CurElTy = ActTy->getPointerElementType();
4060 if (DL.getTypeAllocSize(CurElTy) !=
4061 DL.getTypeAllocSize(ParamPTy->getElementType()))
4066 if (Callee->isDeclaration()) {
4067 // Do not delete arguments unless we have a function body.
4068 if (FT->getNumParams() < NumActualArgs && !FT->isVarArg())
4071 // If the callee is just a declaration, don't change the varargsness of the
4072 // call. We don't want to introduce a varargs call where one doesn't
4074 PointerType *APTy = cast<PointerType>(CS.getCalledValue()->getType());
4075 if (FT->isVarArg()!=cast<FunctionType>(APTy->getElementType())->isVarArg())
4078 // If both the callee and the cast type are varargs, we still have to make
4079 // sure the number of fixed parameters are the same or we have the same
4080 // ABI issues as if we introduce a varargs call.
4081 if (FT->isVarArg() &&
4082 cast<FunctionType>(APTy->getElementType())->isVarArg() &&
4083 FT->getNumParams() !=
4084 cast<FunctionType>(APTy->getElementType())->getNumParams())
4088 if (FT->getNumParams() < NumActualArgs && FT->isVarArg() &&
4089 !CallerPAL.isEmpty()) {
4090 // In this case we have more arguments than the new function type, but we
4091 // won't be dropping them. Check that these extra arguments have attributes
4092 // that are compatible with being a vararg call argument.
4094 if (CallerPAL.hasAttrSomewhere(Attribute::StructRet, &SRetIdx) &&
4095 SRetIdx > FT->getNumParams())
4099 // Okay, we decided that this is a safe thing to do: go ahead and start
4100 // inserting cast instructions as necessary.
4101 SmallVector<Value *, 8> Args;
4102 SmallVector<AttributeSet, 8> ArgAttrs;
4103 Args.reserve(NumActualArgs);
4104 ArgAttrs.reserve(NumActualArgs);
4106 // Get any return attributes.
4107 AttrBuilder RAttrs(CallerPAL, AttributeList::ReturnIndex);
4109 // If the return value is not being used, the type may not be compatible
4110 // with the existing attributes. Wipe out any problematic attributes.
4111 RAttrs.remove(AttributeFuncs::typeIncompatible(NewRetTy));
4113 AI = CS.arg_begin();
4114 for (unsigned i = 0; i != NumCommonArgs; ++i, ++AI) {
4115 Type *ParamTy = FT->getParamType(i);
4117 Value *NewArg = *AI;
4118 if ((*AI)->getType() != ParamTy)
4119 NewArg = Builder->CreateBitOrPointerCast(*AI, ParamTy);
4120 Args.push_back(NewArg);
4122 // Add any parameter attributes.
4123 ArgAttrs.push_back(CallerPAL.getParamAttributes(i));
4126 // If the function takes more arguments than the call was taking, add them
4128 for (unsigned i = NumCommonArgs; i != FT->getNumParams(); ++i) {
4129 Args.push_back(Constant::getNullValue(FT->getParamType(i)));
4130 ArgAttrs.push_back(AttributeSet());
4133 // If we are removing arguments to the function, emit an obnoxious warning.
4134 if (FT->getNumParams() < NumActualArgs) {
4135 // TODO: if (!FT->isVarArg()) this call may be unreachable. PR14722
4136 if (FT->isVarArg()) {
4137 // Add all of the arguments in their promoted form to the arg list.
4138 for (unsigned i = FT->getNumParams(); i != NumActualArgs; ++i, ++AI) {
4139 Type *PTy = getPromotedType((*AI)->getType());
4140 Value *NewArg = *AI;
4141 if (PTy != (*AI)->getType()) {
4142 // Must promote to pass through va_arg area!
4143 Instruction::CastOps opcode =
4144 CastInst::getCastOpcode(*AI, false, PTy, false);
4145 NewArg = Builder->CreateCast(opcode, *AI, PTy);
4147 Args.push_back(NewArg);
4149 // Add any parameter attributes.
4150 ArgAttrs.push_back(CallerPAL.getParamAttributes(i));
4155 AttributeSet FnAttrs = CallerPAL.getFnAttributes();
4157 if (NewRetTy->isVoidTy())
4158 Caller->setName(""); // Void type should not have a name.
4160 assert((ArgAttrs.size() == FT->getNumParams() || FT->isVarArg()) &&
4161 "missing argument attributes");
4162 LLVMContext &Ctx = Callee->getContext();
4163 AttributeList NewCallerPAL = AttributeList::get(
4164 Ctx, FnAttrs, AttributeSet::get(Ctx, RAttrs), ArgAttrs);
4166 SmallVector<OperandBundleDef, 1> OpBundles;
4167 CS.getOperandBundlesAsDefs(OpBundles);
4170 if (InvokeInst *II = dyn_cast<InvokeInst>(Caller)) {
4171 NewCS = Builder->CreateInvoke(Callee, II->getNormalDest(),
4172 II->getUnwindDest(), Args, OpBundles);
4174 NewCS = Builder->CreateCall(Callee, Args, OpBundles);
4175 cast<CallInst>(NewCS.getInstruction())
4176 ->setTailCallKind(cast<CallInst>(Caller)->getTailCallKind());
4178 NewCS->takeName(Caller);
4179 NewCS.setCallingConv(CS.getCallingConv());
4180 NewCS.setAttributes(NewCallerPAL);
4182 // Preserve the weight metadata for the new call instruction. The metadata
4183 // is used by SamplePGO to check callsite's hotness.
4185 if (Caller->extractProfTotalWeight(W))
4186 NewCS->setProfWeight(W);
4188 // Insert a cast of the return type as necessary.
4189 Instruction *NC = NewCS.getInstruction();
4191 if (OldRetTy != NV->getType() && !Caller->use_empty()) {
4192 if (!NV->getType()->isVoidTy()) {
4193 NV = NC = CastInst::CreateBitOrPointerCast(NC, OldRetTy);
4194 NC->setDebugLoc(Caller->getDebugLoc());
4196 // If this is an invoke instruction, we should insert it after the first
4197 // non-phi, instruction in the normal successor block.
4198 if (InvokeInst *II = dyn_cast<InvokeInst>(Caller)) {
4199 BasicBlock::iterator I = II->getNormalDest()->getFirstInsertionPt();
4200 InsertNewInstBefore(NC, *I);
4202 // Otherwise, it's a call, just insert cast right after the call.
4203 InsertNewInstBefore(NC, *Caller);
4205 Worklist.AddUsersToWorkList(*Caller);
4207 NV = UndefValue::get(Caller->getType());
4211 if (!Caller->use_empty())
4212 replaceInstUsesWith(*Caller, NV);
4213 else if (Caller->hasValueHandle()) {
4214 if (OldRetTy == NV->getType())
4215 ValueHandleBase::ValueIsRAUWd(Caller, NV);
4217 // We cannot call ValueIsRAUWd with a different type, and the
4218 // actual tracked value will disappear.
4219 ValueHandleBase::ValueIsDeleted(Caller);
4222 eraseInstFromFunction(*Caller);
4226 /// Turn a call to a function created by init_trampoline / adjust_trampoline
4227 /// intrinsic pair into a direct call to the underlying function.
4229 InstCombiner::transformCallThroughTrampoline(CallSite CS,
4230 IntrinsicInst *Tramp) {
4231 Value *Callee = CS.getCalledValue();
4232 PointerType *PTy = cast<PointerType>(Callee->getType());
4233 FunctionType *FTy = cast<FunctionType>(PTy->getElementType());
4234 AttributeList Attrs = CS.getAttributes();
4236 // If the call already has the 'nest' attribute somewhere then give up -
4237 // otherwise 'nest' would occur twice after splicing in the chain.
4238 if (Attrs.hasAttrSomewhere(Attribute::Nest))
4242 "transformCallThroughTrampoline called with incorrect CallSite.");
4244 Function *NestF =cast<Function>(Tramp->getArgOperand(1)->stripPointerCasts());
4245 FunctionType *NestFTy = cast<FunctionType>(NestF->getValueType());
4247 AttributeList NestAttrs = NestF->getAttributes();
4248 if (!NestAttrs.isEmpty()) {
4249 unsigned NestArgNo = 0;
4250 Type *NestTy = nullptr;
4251 AttributeSet NestAttr;
4253 // Look for a parameter marked with the 'nest' attribute.
4254 for (FunctionType::param_iterator I = NestFTy->param_begin(),
4255 E = NestFTy->param_end();
4256 I != E; ++NestArgNo, ++I) {
4257 AttributeSet AS = NestAttrs.getParamAttributes(NestArgNo);
4258 if (AS.hasAttribute(Attribute::Nest)) {
4259 // Record the parameter type and any other attributes.
4267 Instruction *Caller = CS.getInstruction();
4268 std::vector<Value*> NewArgs;
4269 std::vector<AttributeSet> NewArgAttrs;
4270 NewArgs.reserve(CS.arg_size() + 1);
4271 NewArgAttrs.reserve(CS.arg_size());
4273 // Insert the nest argument into the call argument list, which may
4274 // mean appending it. Likewise for attributes.
4278 CallSite::arg_iterator I = CS.arg_begin(), E = CS.arg_end();
4280 if (ArgNo == NestArgNo) {
4281 // Add the chain argument and attributes.
4282 Value *NestVal = Tramp->getArgOperand(2);
4283 if (NestVal->getType() != NestTy)
4284 NestVal = Builder->CreateBitCast(NestVal, NestTy, "nest");
4285 NewArgs.push_back(NestVal);
4286 NewArgAttrs.push_back(NestAttr);
4292 // Add the original argument and attributes.
4293 NewArgs.push_back(*I);
4294 NewArgAttrs.push_back(Attrs.getParamAttributes(ArgNo));
4301 // The trampoline may have been bitcast to a bogus type (FTy).
4302 // Handle this by synthesizing a new function type, equal to FTy
4303 // with the chain parameter inserted.
4305 std::vector<Type*> NewTypes;
4306 NewTypes.reserve(FTy->getNumParams()+1);
4308 // Insert the chain's type into the list of parameter types, which may
4309 // mean appending it.
4312 FunctionType::param_iterator I = FTy->param_begin(),
4313 E = FTy->param_end();
4316 if (ArgNo == NestArgNo)
4317 // Add the chain's type.
4318 NewTypes.push_back(NestTy);
4323 // Add the original type.
4324 NewTypes.push_back(*I);
4331 // Replace the trampoline call with a direct call. Let the generic
4332 // code sort out any function type mismatches.
4333 FunctionType *NewFTy = FunctionType::get(FTy->getReturnType(), NewTypes,
4335 Constant *NewCallee =
4336 NestF->getType() == PointerType::getUnqual(NewFTy) ?
4337 NestF : ConstantExpr::getBitCast(NestF,
4338 PointerType::getUnqual(NewFTy));
4339 AttributeList NewPAL =
4340 AttributeList::get(FTy->getContext(), Attrs.getFnAttributes(),
4341 Attrs.getRetAttributes(), NewArgAttrs);
4343 SmallVector<OperandBundleDef, 1> OpBundles;
4344 CS.getOperandBundlesAsDefs(OpBundles);
4346 Instruction *NewCaller;
4347 if (InvokeInst *II = dyn_cast<InvokeInst>(Caller)) {
4348 NewCaller = InvokeInst::Create(NewCallee,
4349 II->getNormalDest(), II->getUnwindDest(),
4350 NewArgs, OpBundles);
4351 cast<InvokeInst>(NewCaller)->setCallingConv(II->getCallingConv());
4352 cast<InvokeInst>(NewCaller)->setAttributes(NewPAL);
4354 NewCaller = CallInst::Create(NewCallee, NewArgs, OpBundles);
4355 cast<CallInst>(NewCaller)->setTailCallKind(
4356 cast<CallInst>(Caller)->getTailCallKind());
4357 cast<CallInst>(NewCaller)->setCallingConv(
4358 cast<CallInst>(Caller)->getCallingConv());
4359 cast<CallInst>(NewCaller)->setAttributes(NewPAL);
4366 // Replace the trampoline call with a direct call. Since there is no 'nest'
4367 // parameter, there is no need to adjust the argument list. Let the generic
4368 // code sort out any function type mismatches.
4369 Constant *NewCallee =
4370 NestF->getType() == PTy ? NestF :
4371 ConstantExpr::getBitCast(NestF, PTy);
4372 CS.setCalledFunction(NewCallee);
4373 return CS.getInstruction();