1 //===- InstCombineShifts.cpp ----------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the visitShl, visitLShr, and visitAShr functions.
12 //===----------------------------------------------------------------------===//
14 #include "InstCombineInternal.h"
15 #include "llvm/Analysis/ConstantFolding.h"
16 #include "llvm/Analysis/InstructionSimplify.h"
17 #include "llvm/IR/IntrinsicInst.h"
18 #include "llvm/IR/PatternMatch.h"
20 using namespace PatternMatch;
22 #define DEBUG_TYPE "instcombine"
24 Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
25 assert(I.getOperand(1)->getType() == I.getOperand(0)->getType());
26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
28 // See if we can fold away this shift.
29 if (SimplifyDemandedInstructionBits(I))
32 // Try to fold constant and into select arguments.
33 if (isa<Constant>(Op0))
34 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
35 if (Instruction *R = FoldOpIntoSelect(I, SI))
38 if (Constant *CUI = dyn_cast<Constant>(Op1))
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
42 // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
43 // Because shifts by negative values (which could occur if A were negative)
45 Value *A; const APInt *B;
46 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
47 // FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
48 // demand the sign bit (and many others) here??
49 Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
58 /// Return true if we can simplify two logical (either left or right) shifts
59 /// that have constant shift amounts.
60 static bool canEvaluateShiftedShift(unsigned FirstShiftAmt,
61 bool IsFirstShiftLeft,
62 Instruction *SecondShift, InstCombiner &IC,
64 assert(SecondShift->isLogicalShift() && "Unexpected instruction type");
66 // We need constant shifts.
67 auto *SecondShiftConst = dyn_cast<ConstantInt>(SecondShift->getOperand(1));
68 if (!SecondShiftConst)
71 unsigned SecondShiftAmt = SecondShiftConst->getZExtValue();
72 bool IsSecondShiftLeft = SecondShift->getOpcode() == Instruction::Shl;
74 // We can always fold shl(c1) + shl(c2) -> shl(c1+c2).
75 // We can always fold lshr(c1) + lshr(c2) -> lshr(c1+c2).
76 if (IsFirstShiftLeft == IsSecondShiftLeft)
79 // We can always fold lshr(c) + shl(c) -> and(c2).
80 // We can always fold shl(c) + lshr(c) -> and(c2).
81 if (FirstShiftAmt == SecondShiftAmt)
84 unsigned TypeWidth = SecondShift->getType()->getScalarSizeInBits();
86 // If the 2nd shift is bigger than the 1st, we can fold:
87 // lshr(c1) + shl(c2) -> shl(c3) + and(c4) or
88 // shl(c1) + lshr(c2) -> lshr(c3) + and(c4),
89 // but it isn't profitable unless we know the and'd out bits are already zero.
90 // Also check that the 2nd shift is valid (less than the type width) or we'll
91 // crash trying to produce the bit mask for the 'and'.
92 if (SecondShiftAmt > FirstShiftAmt && SecondShiftAmt < TypeWidth) {
93 unsigned MaskShift = IsSecondShiftLeft ? TypeWidth - SecondShiftAmt
94 : SecondShiftAmt - FirstShiftAmt;
95 APInt Mask = APInt::getLowBitsSet(TypeWidth, FirstShiftAmt) << MaskShift;
96 if (IC.MaskedValueIsZero(SecondShift->getOperand(0), Mask, 0, CxtI))
103 /// See if we can compute the specified value, but shifted
104 /// logically to the left or right by some number of bits. This should return
105 /// true if the expression can be computed for the same cost as the current
106 /// expression tree. This is used to eliminate extraneous shifting from things
108 /// %C = shl i128 %A, 64
109 /// %D = shl i128 %B, 96
110 /// %E = or i128 %C, %D
111 /// %F = lshr i128 %E, 64
112 /// where the client will ask if E can be computed shifted right by 64-bits. If
113 /// this succeeds, the GetShiftedValue function will be called to produce the
115 static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool IsLeftShift,
116 InstCombiner &IC, Instruction *CxtI) {
117 // We can always evaluate constants shifted.
118 if (isa<Constant>(V))
121 Instruction *I = dyn_cast<Instruction>(V);
122 if (!I) return false;
124 // If this is the opposite shift, we can directly reuse the input of the shift
125 // if the needed bits are already zero in the input. This allows us to reuse
126 // the value which means that we don't care if the shift has multiple uses.
127 // TODO: Handle opposite shift by exact value.
128 ConstantInt *CI = nullptr;
129 if ((IsLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) ||
130 (!IsLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) {
131 if (CI->getZExtValue() == NumBits) {
132 // TODO: Check that the input bits are already zero with MaskedValueIsZero
134 // If this is a truncate of a logical shr, we can truncate it to a smaller
135 // lshr iff we know that the bits we would otherwise be shifting in are
137 uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits();
138 uint32_t BitWidth = Ty->getScalarSizeInBits();
139 if (MaskedValueIsZero(I->getOperand(0),
140 APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
141 CI->getLimitedValue(BitWidth) < BitWidth) {
142 return CanEvaluateTruncated(I->getOperand(0), Ty);
149 // We can't mutate something that has multiple uses: doing so would
150 // require duplicating the instruction in general, which isn't profitable.
151 if (!I->hasOneUse()) return false;
153 switch (I->getOpcode()) {
154 default: return false;
155 case Instruction::And:
156 case Instruction::Or:
157 case Instruction::Xor:
158 // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
159 return CanEvaluateShifted(I->getOperand(0), NumBits, IsLeftShift, IC, I) &&
160 CanEvaluateShifted(I->getOperand(1), NumBits, IsLeftShift, IC, I);
162 case Instruction::Shl:
163 case Instruction::LShr:
164 return canEvaluateShiftedShift(NumBits, IsLeftShift, I, IC, CxtI);
166 case Instruction::Select: {
167 SelectInst *SI = cast<SelectInst>(I);
168 Value *TrueVal = SI->getTrueValue();
169 Value *FalseVal = SI->getFalseValue();
170 return CanEvaluateShifted(TrueVal, NumBits, IsLeftShift, IC, SI) &&
171 CanEvaluateShifted(FalseVal, NumBits, IsLeftShift, IC, SI);
173 case Instruction::PHI: {
174 // We can change a phi if we can change all operands. Note that we never
175 // get into trouble with cyclic PHIs here because we only consider
176 // instructions with a single use.
177 PHINode *PN = cast<PHINode>(I);
178 for (Value *IncValue : PN->incoming_values())
179 if (!CanEvaluateShifted(IncValue, NumBits, IsLeftShift, IC, PN))
186 /// When CanEvaluateShifted returned true for an expression,
187 /// this value inserts the new computation that produces the shifted value.
188 static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
189 InstCombiner &IC, const DataLayout &DL) {
190 // We can always evaluate constants shifted.
191 if (Constant *C = dyn_cast<Constant>(V)) {
193 V = IC.Builder->CreateShl(C, NumBits);
195 V = IC.Builder->CreateLShr(C, NumBits);
196 // If we got a constantexpr back, try to simplify it with TD info.
197 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V))
198 V = ConstantFoldConstantExpression(CE, DL, IC.getTargetLibraryInfo());
202 Instruction *I = cast<Instruction>(V);
205 switch (I->getOpcode()) {
206 default: llvm_unreachable("Inconsistency with CanEvaluateShifted");
207 case Instruction::And:
208 case Instruction::Or:
209 case Instruction::Xor:
210 // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
212 0, GetShiftedValue(I->getOperand(0), NumBits, isLeftShift, IC, DL));
214 1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
217 case Instruction::Shl: {
218 BinaryOperator *BO = cast<BinaryOperator>(I);
219 unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
221 // We only accept shifts-by-a-constant in CanEvaluateShifted.
222 ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
224 // We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
226 // If this is oversized composite shift, then unsigned shifts get 0.
227 unsigned NewShAmt = NumBits+CI->getZExtValue();
228 if (NewShAmt >= TypeWidth)
229 return Constant::getNullValue(I->getType());
231 BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
232 BO->setHasNoUnsignedWrap(false);
233 BO->setHasNoSignedWrap(false);
237 // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have
239 if (CI->getValue() == NumBits) {
240 APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits));
241 V = IC.Builder->CreateAnd(BO->getOperand(0),
242 ConstantInt::get(BO->getContext(), Mask));
243 if (Instruction *VI = dyn_cast<Instruction>(V)) {
250 // We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that
251 // the and won't be needed.
252 assert(CI->getZExtValue() > NumBits);
253 BO->setOperand(1, ConstantInt::get(BO->getType(),
254 CI->getZExtValue() - NumBits));
255 BO->setHasNoUnsignedWrap(false);
256 BO->setHasNoSignedWrap(false);
259 // FIXME: This is almost identical to the SHL case. Refactor both cases into
260 // a helper function.
261 case Instruction::LShr: {
262 BinaryOperator *BO = cast<BinaryOperator>(I);
263 unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
264 // We only accept shifts-by-a-constant in CanEvaluateShifted.
265 ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
267 // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
269 // If this is oversized composite shift, then unsigned shifts get 0.
270 unsigned NewShAmt = NumBits+CI->getZExtValue();
271 if (NewShAmt >= TypeWidth)
272 return Constant::getNullValue(BO->getType());
274 BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
275 BO->setIsExact(false);
279 // We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have
281 if (CI->getValue() == NumBits) {
282 APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits));
283 V = IC.Builder->CreateAnd(I->getOperand(0),
284 ConstantInt::get(BO->getContext(), Mask));
285 if (Instruction *VI = dyn_cast<Instruction>(V)) {
292 // We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that
293 // the and won't be needed.
294 assert(CI->getZExtValue() > NumBits);
295 BO->setOperand(1, ConstantInt::get(BO->getType(),
296 CI->getZExtValue() - NumBits));
297 BO->setIsExact(false);
301 case Instruction::Select:
303 1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
305 2, GetShiftedValue(I->getOperand(2), NumBits, isLeftShift, IC, DL));
307 case Instruction::PHI: {
308 // We can change a phi if we can change all operands. Note that we never
309 // get into trouble with cyclic PHIs here because we only consider
310 // instructions with a single use.
311 PHINode *PN = cast<PHINode>(I);
312 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
313 PN->setIncomingValue(i, GetShiftedValue(PN->getIncomingValue(i), NumBits,
314 isLeftShift, IC, DL));
322 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1,
324 bool isLeftShift = I.getOpcode() == Instruction::Shl;
326 ConstantInt *COp1 = nullptr;
327 if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1))
328 COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
329 else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1))
330 COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
332 COp1 = dyn_cast<ConstantInt>(Op1);
337 // See if we can propagate this shift into the input, this covers the trivial
338 // cast of lshr(shl(x,c1),c2) as well as other more complex cases.
339 if (I.getOpcode() != Instruction::AShr &&
340 CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this, &I)) {
341 DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
342 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
344 return replaceInstUsesWith(
345 I, GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift, *this, DL));
348 // See if we can simplify any instructions used by the instruction whose sole
349 // purpose is to compute bits we don't care about.
350 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
352 assert(!COp1->uge(TypeBits) &&
353 "Shift over the type width should have been removed already");
355 // ((X*C1) << C2) == (X * (C1 << C2))
356 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
357 if (BO->getOpcode() == Instruction::Mul && isLeftShift)
358 if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
359 return BinaryOperator::CreateMul(BO->getOperand(0),
360 ConstantExpr::getShl(BOOp, Op1));
362 // Try to fold constant and into select arguments.
363 if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
364 if (Instruction *R = FoldOpIntoSelect(I, SI))
366 if (isa<PHINode>(Op0))
367 if (Instruction *NV = FoldOpIntoPhi(I))
370 // Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2))
371 if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) {
372 Instruction *TrOp = dyn_cast<Instruction>(TI->getOperand(0));
373 // If 'shift2' is an ashr, we would have to get the sign bit into a funny
374 // place. Don't try to do this transformation in this case. Also, we
375 // require that the input operand is a shift-by-constant so that we have
376 // confidence that the shifts will get folded together. We could do this
377 // xform in more cases, but it is unlikely to be profitable.
378 if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
379 isa<ConstantInt>(TrOp->getOperand(1))) {
380 // Okay, we'll do this xform. Make the shift of shift.
381 Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType());
382 // (shift2 (shift1 & 0x00FF), c2)
383 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
385 // For logical shifts, the truncation has the effect of making the high
386 // part of the register be zeros. Emulate this by inserting an AND to
387 // clear the top bits as needed. This 'and' will usually be zapped by
388 // other xforms later if dead.
389 unsigned SrcSize = TrOp->getType()->getScalarSizeInBits();
390 unsigned DstSize = TI->getType()->getScalarSizeInBits();
391 APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize));
393 // The mask we constructed says what the trunc would do if occurring
394 // between the shifts. We want to know the effect *after* the second
395 // shift. We know that it is a logical shift by a constant, so adjust the
396 // mask as appropriate.
397 if (I.getOpcode() == Instruction::Shl)
398 MaskV <<= COp1->getZExtValue();
400 assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
401 MaskV = MaskV.lshr(COp1->getZExtValue());
405 Value *And = Builder->CreateAnd(NSh,
406 ConstantInt::get(I.getContext(), MaskV),
409 // Return the value truncated to the interesting size.
410 return new TruncInst(And, I.getType());
414 if (Op0->hasOneUse()) {
415 if (BinaryOperator *Op0BO = dyn_cast<BinaryOperator>(Op0)) {
416 // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
419 switch (Op0BO->getOpcode()) {
421 case Instruction::Add:
422 case Instruction::And:
423 case Instruction::Or:
424 case Instruction::Xor: {
425 // These operators commute.
426 // Turn (Y + (X >> C)) << C -> (X + (Y << C)) & (~0 << C)
427 if (isLeftShift && Op0BO->getOperand(1)->hasOneUse() &&
428 match(Op0BO->getOperand(1), m_Shr(m_Value(V1),
430 Value *YS = // (Y << C)
431 Builder->CreateShl(Op0BO->getOperand(0), Op1, Op0BO->getName());
433 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
434 Op0BO->getOperand(1)->getName());
435 uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
437 APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
438 Constant *Mask = ConstantInt::get(I.getContext(), Bits);
439 if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
440 Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
441 return BinaryOperator::CreateAnd(X, Mask);
444 // Turn (Y + ((X >> C) & CC)) << C -> ((X & (CC << C)) + (Y << C))
445 Value *Op0BOOp1 = Op0BO->getOperand(1);
446 if (isLeftShift && Op0BOOp1->hasOneUse() &&
448 m_And(m_OneUse(m_Shr(m_Value(V1), m_Specific(Op1))),
449 m_ConstantInt(CC)))) {
450 Value *YS = // (Y << C)
451 Builder->CreateShl(Op0BO->getOperand(0), Op1,
454 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
455 V1->getName()+".mask");
456 return BinaryOperator::Create(Op0BO->getOpcode(), YS, XM);
461 case Instruction::Sub: {
462 // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
463 if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
464 match(Op0BO->getOperand(0), m_Shr(m_Value(V1),
466 Value *YS = // (Y << C)
467 Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
469 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
470 Op0BO->getOperand(0)->getName());
471 uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
473 APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
474 Constant *Mask = ConstantInt::get(I.getContext(), Bits);
475 if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
476 Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
477 return BinaryOperator::CreateAnd(X, Mask);
480 // Turn (((X >> C)&CC) + Y) << C -> (X + (Y << C)) & (CC << C)
481 if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
482 match(Op0BO->getOperand(0),
483 m_And(m_OneUse(m_Shr(m_Value(V1), m_Value(V2))),
484 m_ConstantInt(CC))) && V2 == Op1) {
485 Value *YS = // (Y << C)
486 Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
488 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
489 V1->getName()+".mask");
491 return BinaryOperator::Create(Op0BO->getOpcode(), XM, YS);
499 // If the operand is a bitwise operator with a constant RHS, and the
500 // shift is the only use, we can pull it out of the shift.
501 if (ConstantInt *Op0C = dyn_cast<ConstantInt>(Op0BO->getOperand(1))) {
502 bool isValid = true; // Valid only for And, Or, Xor
503 bool highBitSet = false; // Transform if high bit of constant set?
505 switch (Op0BO->getOpcode()) {
506 default: isValid = false; break; // Do not perform transform!
507 case Instruction::Add:
508 isValid = isLeftShift;
510 case Instruction::Or:
511 case Instruction::Xor:
514 case Instruction::And:
519 // If this is a signed shift right, and the high bit is modified
520 // by the logical operation, do not perform the transformation.
521 // The highBitSet boolean indicates the value of the high bit of
522 // the constant which would cause it to be modified for this
525 if (isValid && I.getOpcode() == Instruction::AShr)
526 isValid = Op0C->getValue()[TypeBits-1] == highBitSet;
529 Constant *NewRHS = ConstantExpr::get(I.getOpcode(), Op0C, Op1);
532 Builder->CreateBinOp(I.getOpcode(), Op0BO->getOperand(0), Op1);
533 NewShift->takeName(Op0BO);
535 return BinaryOperator::Create(Op0BO->getOpcode(), NewShift,
542 // Find out if this is a shift of a shift by a constant.
543 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
544 if (ShiftOp && !ShiftOp->isShift())
547 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
549 // This is a constant shift of a constant shift. Be careful about hiding
550 // shl instructions behind bit masks. They are used to represent multiplies
551 // by a constant, and it is important that simple arithmetic expressions
552 // are still recognizable by scalar evolution.
554 // The transforms applied to shl are very similar to the transforms applied
555 // to mul by constant. We can be more aggressive about optimizing right
558 // Combinations of right and left shifts will still be optimized in
559 // DAGCombine where scalar evolution no longer applies.
561 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
562 uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
563 uint32_t ShiftAmt2 = COp1->getLimitedValue(TypeBits);
564 assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
565 if (ShiftAmt1 == 0) return nullptr; // Will be simplified in the future.
566 Value *X = ShiftOp->getOperand(0);
568 IntegerType *Ty = cast<IntegerType>(I.getType());
570 // Check for (X << c1) << c2 and (X >> c1) >> c2
571 if (I.getOpcode() == ShiftOp->getOpcode()) {
572 uint32_t AmtSum = ShiftAmt1+ShiftAmt2; // Fold into one big shift.
573 // If this is oversized composite shift, then unsigned shifts get 0, ashr
575 if (AmtSum >= TypeBits) {
576 if (I.getOpcode() != Instruction::AShr)
577 return replaceInstUsesWith(I, Constant::getNullValue(I.getType()));
578 AmtSum = TypeBits-1; // Saturate to 31 for i32 ashr.
581 return BinaryOperator::Create(I.getOpcode(), X,
582 ConstantInt::get(Ty, AmtSum));
585 if (ShiftAmt1 == ShiftAmt2) {
586 // If we have ((X << C) >>u C), turn this into X & (-1 >>u C).
587 if (I.getOpcode() == Instruction::LShr &&
588 ShiftOp->getOpcode() == Instruction::Shl) {
589 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1));
590 return BinaryOperator::CreateAnd(X,
591 ConstantInt::get(I.getContext(), Mask));
593 } else if (ShiftAmt1 < ShiftAmt2) {
594 uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1;
596 // (X >>?,exact C1) << C2 --> X << (C2-C1)
597 // The inexact version is deferred to DAGCombine so we don't hide shl
598 // behind a bit mask.
599 if (I.getOpcode() == Instruction::Shl &&
600 ShiftOp->getOpcode() != Instruction::Shl &&
601 ShiftOp->isExact()) {
602 assert(ShiftOp->getOpcode() == Instruction::LShr ||
603 ShiftOp->getOpcode() == Instruction::AShr);
604 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
605 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
607 NewShl->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
608 NewShl->setHasNoSignedWrap(I.hasNoSignedWrap());
612 // (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2)
613 if (I.getOpcode() == Instruction::LShr &&
614 ShiftOp->getOpcode() == Instruction::Shl) {
615 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
616 // (X <<nuw C1) >>u C2 --> X >>u (C2-C1)
617 if (ShiftOp->hasNoUnsignedWrap()) {
618 BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
620 NewLShr->setIsExact(I.isExact());
623 Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
625 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
626 return BinaryOperator::CreateAnd(Shift,
627 ConstantInt::get(I.getContext(),Mask));
630 // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
631 // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
632 if (I.getOpcode() == Instruction::AShr &&
633 ShiftOp->getOpcode() == Instruction::Shl) {
634 if (ShiftOp->hasNoSignedWrap()) {
635 // (X <<nsw C1) >>s C2 --> X >>s (C2-C1)
636 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
637 BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr,
639 NewAShr->setIsExact(I.isExact());
644 assert(ShiftAmt2 < ShiftAmt1);
645 uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2;
647 // (X >>?exact C1) << C2 --> X >>?exact (C1-C2)
648 // The inexact version is deferred to DAGCombine so we don't hide shl
649 // behind a bit mask.
650 if (I.getOpcode() == Instruction::Shl &&
651 ShiftOp->getOpcode() != Instruction::Shl &&
652 ShiftOp->isExact()) {
653 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
654 BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
656 NewShr->setIsExact(true);
660 // (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2)
661 if (I.getOpcode() == Instruction::LShr &&
662 ShiftOp->getOpcode() == Instruction::Shl) {
663 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
664 if (ShiftOp->hasNoUnsignedWrap()) {
665 // (X <<nuw C1) >>u C2 --> X <<nuw (C1-C2)
666 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
668 NewShl->setHasNoUnsignedWrap(true);
671 Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
673 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
674 return BinaryOperator::CreateAnd(Shift,
675 ConstantInt::get(I.getContext(),Mask));
678 // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
679 // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
680 if (I.getOpcode() == Instruction::AShr &&
681 ShiftOp->getOpcode() == Instruction::Shl) {
682 if (ShiftOp->hasNoSignedWrap()) {
683 // (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2)
684 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
685 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
687 NewShl->setHasNoSignedWrap(true);
696 Instruction *InstCombiner::visitShl(BinaryOperator &I) {
697 if (Value *V = SimplifyVectorOp(I))
698 return replaceInstUsesWith(I, V);
701 SimplifyShlInst(I.getOperand(0), I.getOperand(1), I.hasNoSignedWrap(),
702 I.hasNoUnsignedWrap(), DL, TLI, DT, AC))
703 return replaceInstUsesWith(I, V);
705 if (Instruction *V = commonShiftTransforms(I))
708 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(I.getOperand(1))) {
709 unsigned ShAmt = Op1C->getZExtValue();
711 // If the shifted-out value is known-zero, then this is a NUW shift.
712 if (!I.hasNoUnsignedWrap() &&
713 MaskedValueIsZero(I.getOperand(0),
714 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt), 0,
716 I.setHasNoUnsignedWrap();
720 // If the shifted out value is all signbits, this is a NSW shift.
721 if (!I.hasNoSignedWrap() &&
722 ComputeNumSignBits(I.getOperand(0), 0, &I) > ShAmt) {
723 I.setHasNoSignedWrap();
728 // (C1 << A) << C2 -> (C1 << C2) << A
731 if (match(I.getOperand(0), m_OneUse(m_Shl(m_Constant(C1), m_Value(A)))) &&
732 match(I.getOperand(1), m_Constant(C2)))
733 return BinaryOperator::CreateShl(ConstantExpr::getShl(C1, C2), A);
738 Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
739 if (Value *V = SimplifyVectorOp(I))
740 return replaceInstUsesWith(I, V);
742 if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
744 return replaceInstUsesWith(I, V);
746 if (Instruction *R = commonShiftTransforms(I))
749 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
751 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
752 unsigned ShAmt = Op1C->getZExtValue();
754 if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
755 unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
756 // ctlz.i32(x)>>5 --> zext(x == 0)
757 // cttz.i32(x)>>5 --> zext(x == 0)
758 // ctpop.i32(x)>>5 --> zext(x == -1)
759 if ((II->getIntrinsicID() == Intrinsic::ctlz ||
760 II->getIntrinsicID() == Intrinsic::cttz ||
761 II->getIntrinsicID() == Intrinsic::ctpop) &&
762 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
763 bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
764 Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
765 Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
766 return new ZExtInst(Cmp, II->getType());
770 // If the shifted-out value is known-zero, then this is an exact shift.
772 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt),
782 Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
783 if (Value *V = SimplifyVectorOp(I))
784 return replaceInstUsesWith(I, V);
786 if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
788 return replaceInstUsesWith(I, V);
790 if (Instruction *R = commonShiftTransforms(I))
793 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
795 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
796 unsigned ShAmt = Op1C->getZExtValue();
798 // If the input is a SHL by the same constant (ashr (shl X, C), C), then we
799 // have a sign-extend idiom.
801 if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
802 // If the input is an extension from the shifted amount value, e.g.
803 // %x = zext i8 %A to i32
804 // %y = shl i32 %x, 24
806 // then turn this into "z = sext i8 A to i32".
807 if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
808 uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
809 uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
810 if (Op1C->getZExtValue() == DestBits-SrcBits)
811 return new SExtInst(ZI->getOperand(0), ZI->getType());
815 // If the shifted-out value is known-zero, then this is an exact shift.
817 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt),
824 // See if we can turn a signed shr into an unsigned shr.
825 if (MaskedValueIsZero(Op0,
826 APInt::getSignBit(I.getType()->getScalarSizeInBits()),
828 return BinaryOperator::CreateLShr(Op0, Op1);