1 //===- LoopStrengthReduce.cpp - Strength Reduce IVs in Loops --------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This transformation analyzes and transforms the induction variables (and
10 // computations derived from them) into forms suitable for efficient execution
13 // This pass performs a strength reduction on array references inside loops that
14 // have as one or more of their components the loop induction variable, it
15 // rewrites expressions to take advantage of scaled-index addressing modes
16 // available on the target, and it performs a variety of other optimizations
17 // related to loop induction variables.
19 // Terminology note: this code has a lot of handling for "post-increment" or
20 // "post-inc" users. This is not talking about post-increment addressing modes;
21 // it is instead talking about code like this:
23 // %i = phi [ 0, %entry ], [ %i.next, %latch ]
25 // %i.next = add %i, 1
26 // %c = icmp eq %i.next, %n
28 // The SCEV for %i is {0,+,1}<%L>. The SCEV for %i.next is {1,+,1}<%L>, however
29 // it's useful to think about these as the same register, with some uses using
30 // the value of the register before the add and some using it after. In this
31 // example, the icmp is a post-increment user, since it uses %i.next, which is
32 // the value of the induction variable after the increment. The other common
33 // case of post-increment users is users outside the loop.
35 // TODO: More sophistication in the way Formulae are generated and filtered.
37 // TODO: Handle multiple loops at a time.
39 // TODO: Should the addressing mode BaseGV be changed to a ConstantExpr instead
42 // TODO: When truncation is free, truncate ICmp users' operands to make it a
43 // smaller encoding (on x86 at least).
45 // TODO: When a negated register is used by an add (such as in a list of
46 // multiple base registers, or as the increment expression in an addrec),
47 // we may not actually need both reg and (-1 * reg) in registers; the
48 // negation can be implemented by using a sub instead of an add. The
49 // lack of support for taking this into consideration when making
50 // register pressure decisions is partly worked around by the "Special"
53 //===----------------------------------------------------------------------===//
55 #include "llvm/Transforms/Scalar/LoopStrengthReduce.h"
56 #include "llvm/ADT/APInt.h"
57 #include "llvm/ADT/DenseMap.h"
58 #include "llvm/ADT/DenseSet.h"
59 #include "llvm/ADT/Hashing.h"
60 #include "llvm/ADT/PointerIntPair.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/ADT/SetVector.h"
63 #include "llvm/ADT/SmallBitVector.h"
64 #include "llvm/ADT/SmallPtrSet.h"
65 #include "llvm/ADT/SmallSet.h"
66 #include "llvm/ADT/SmallVector.h"
67 #include "llvm/ADT/iterator_range.h"
68 #include "llvm/Analysis/IVUsers.h"
69 #include "llvm/Analysis/LoopAnalysisManager.h"
70 #include "llvm/Analysis/LoopInfo.h"
71 #include "llvm/Analysis/LoopPass.h"
72 #include "llvm/Analysis/ScalarEvolution.h"
73 #include "llvm/Analysis/ScalarEvolutionExpander.h"
74 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
75 #include "llvm/Analysis/ScalarEvolutionNormalization.h"
76 #include "llvm/Analysis/TargetTransformInfo.h"
77 #include "llvm/Transforms/Utils/Local.h"
78 #include "llvm/Config/llvm-config.h"
79 #include "llvm/IR/BasicBlock.h"
80 #include "llvm/IR/Constant.h"
81 #include "llvm/IR/Constants.h"
82 #include "llvm/IR/DerivedTypes.h"
83 #include "llvm/IR/Dominators.h"
84 #include "llvm/IR/GlobalValue.h"
85 #include "llvm/IR/IRBuilder.h"
86 #include "llvm/IR/InstrTypes.h"
87 #include "llvm/IR/Instruction.h"
88 #include "llvm/IR/Instructions.h"
89 #include "llvm/IR/IntrinsicInst.h"
90 #include "llvm/IR/Intrinsics.h"
91 #include "llvm/IR/Module.h"
92 #include "llvm/IR/OperandTraits.h"
93 #include "llvm/IR/Operator.h"
94 #include "llvm/IR/PassManager.h"
95 #include "llvm/IR/Type.h"
96 #include "llvm/IR/Use.h"
97 #include "llvm/IR/User.h"
98 #include "llvm/IR/Value.h"
99 #include "llvm/IR/ValueHandle.h"
100 #include "llvm/Pass.h"
101 #include "llvm/Support/Casting.h"
102 #include "llvm/Support/CommandLine.h"
103 #include "llvm/Support/Compiler.h"
104 #include "llvm/Support/Debug.h"
105 #include "llvm/Support/ErrorHandling.h"
106 #include "llvm/Support/MathExtras.h"
107 #include "llvm/Support/raw_ostream.h"
108 #include "llvm/Transforms/Scalar.h"
109 #include "llvm/Transforms/Utils.h"
110 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
122 using namespace llvm;
124 #define DEBUG_TYPE "loop-reduce"
126 /// MaxIVUsers is an arbitrary threshold that provides an early opportunity for
127 /// bail out. This threshold is far beyond the number of users that LSR can
128 /// conceivably solve, so it should not affect generated code, but catches the
129 /// worst cases before LSR burns too much compile time and stack space.
130 static const unsigned MaxIVUsers = 200;
132 // Temporary flag to cleanup congruent phis after LSR phi expansion.
133 // It's currently disabled until we can determine whether it's truly useful or
134 // not. The flag should be removed after the v3.0 release.
135 // This is now needed for ivchains.
136 static cl::opt<bool> EnablePhiElim(
137 "enable-lsr-phielim", cl::Hidden, cl::init(true),
138 cl::desc("Enable LSR phi elimination"));
140 // The flag adds instruction count to solutions cost comparision.
141 static cl::opt<bool> InsnsCost(
142 "lsr-insns-cost", cl::Hidden, cl::init(true),
143 cl::desc("Add instruction count to a LSR cost model"));
145 // Flag to choose how to narrow complex lsr solution
146 static cl::opt<bool> LSRExpNarrow(
147 "lsr-exp-narrow", cl::Hidden, cl::init(false),
148 cl::desc("Narrow LSR complex solution using"
149 " expectation of registers number"));
151 // Flag to narrow search space by filtering non-optimal formulae with
152 // the same ScaledReg and Scale.
153 static cl::opt<bool> FilterSameScaledReg(
154 "lsr-filter-same-scaled-reg", cl::Hidden, cl::init(true),
155 cl::desc("Narrow LSR search space by filtering non-optimal formulae"
156 " with the same ScaledReg and Scale"));
158 static cl::opt<bool> EnableBackedgeIndexing(
159 "lsr-backedge-indexing", cl::Hidden, cl::init(true),
160 cl::desc("Enable the generation of cross iteration indexed memops"));
162 static cl::opt<unsigned> ComplexityLimit(
163 "lsr-complexity-limit", cl::Hidden,
164 cl::init(std::numeric_limits<uint16_t>::max()),
165 cl::desc("LSR search space complexity limit"));
167 static cl::opt<unsigned> SetupCostDepthLimit(
168 "lsr-setupcost-depth-limit", cl::Hidden, cl::init(7),
169 cl::desc("The limit on recursion depth for LSRs setup cost"));
172 // Stress test IV chain generation.
173 static cl::opt<bool> StressIVChain(
174 "stress-ivchain", cl::Hidden, cl::init(false),
175 cl::desc("Stress test LSR IV chains"));
177 static bool StressIVChain = false;
183 /// Used in situations where the accessed memory type is unknown.
184 static const unsigned UnknownAddressSpace =
185 std::numeric_limits<unsigned>::max();
187 Type *MemTy = nullptr;
188 unsigned AddrSpace = UnknownAddressSpace;
190 MemAccessTy() = default;
191 MemAccessTy(Type *Ty, unsigned AS) : MemTy(Ty), AddrSpace(AS) {}
193 bool operator==(MemAccessTy Other) const {
194 return MemTy == Other.MemTy && AddrSpace == Other.AddrSpace;
197 bool operator!=(MemAccessTy Other) const { return !(*this == Other); }
199 static MemAccessTy getUnknown(LLVMContext &Ctx,
200 unsigned AS = UnknownAddressSpace) {
201 return MemAccessTy(Type::getVoidTy(Ctx), AS);
204 Type *getType() { return MemTy; }
207 /// This class holds data which is used to order reuse candidates.
210 /// This represents the set of LSRUse indices which reference
211 /// a particular register.
212 SmallBitVector UsedByIndices;
214 void print(raw_ostream &OS) const;
218 } // end anonymous namespace
220 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
221 void RegSortData::print(raw_ostream &OS) const {
222 OS << "[NumUses=" << UsedByIndices.count() << ']';
225 LLVM_DUMP_METHOD void RegSortData::dump() const {
226 print(errs()); errs() << '\n';
232 /// Map register candidates to information about how they are used.
233 class RegUseTracker {
234 using RegUsesTy = DenseMap<const SCEV *, RegSortData>;
236 RegUsesTy RegUsesMap;
237 SmallVector<const SCEV *, 16> RegSequence;
240 void countRegister(const SCEV *Reg, size_t LUIdx);
241 void dropRegister(const SCEV *Reg, size_t LUIdx);
242 void swapAndDropUse(size_t LUIdx, size_t LastLUIdx);
244 bool isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const;
246 const SmallBitVector &getUsedByIndices(const SCEV *Reg) const;
250 using iterator = SmallVectorImpl<const SCEV *>::iterator;
251 using const_iterator = SmallVectorImpl<const SCEV *>::const_iterator;
253 iterator begin() { return RegSequence.begin(); }
254 iterator end() { return RegSequence.end(); }
255 const_iterator begin() const { return RegSequence.begin(); }
256 const_iterator end() const { return RegSequence.end(); }
259 } // end anonymous namespace
262 RegUseTracker::countRegister(const SCEV *Reg, size_t LUIdx) {
263 std::pair<RegUsesTy::iterator, bool> Pair =
264 RegUsesMap.insert(std::make_pair(Reg, RegSortData()));
265 RegSortData &RSD = Pair.first->second;
267 RegSequence.push_back(Reg);
268 RSD.UsedByIndices.resize(std::max(RSD.UsedByIndices.size(), LUIdx + 1));
269 RSD.UsedByIndices.set(LUIdx);
273 RegUseTracker::dropRegister(const SCEV *Reg, size_t LUIdx) {
274 RegUsesTy::iterator It = RegUsesMap.find(Reg);
275 assert(It != RegUsesMap.end());
276 RegSortData &RSD = It->second;
277 assert(RSD.UsedByIndices.size() > LUIdx);
278 RSD.UsedByIndices.reset(LUIdx);
282 RegUseTracker::swapAndDropUse(size_t LUIdx, size_t LastLUIdx) {
283 assert(LUIdx <= LastLUIdx);
285 // Update RegUses. The data structure is not optimized for this purpose;
286 // we must iterate through it and update each of the bit vectors.
287 for (auto &Pair : RegUsesMap) {
288 SmallBitVector &UsedByIndices = Pair.second.UsedByIndices;
289 if (LUIdx < UsedByIndices.size())
290 UsedByIndices[LUIdx] =
291 LastLUIdx < UsedByIndices.size() ? UsedByIndices[LastLUIdx] : false;
292 UsedByIndices.resize(std::min(UsedByIndices.size(), LastLUIdx));
297 RegUseTracker::isRegUsedByUsesOtherThan(const SCEV *Reg, size_t LUIdx) const {
298 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
299 if (I == RegUsesMap.end())
301 const SmallBitVector &UsedByIndices = I->second.UsedByIndices;
302 int i = UsedByIndices.find_first();
303 if (i == -1) return false;
304 if ((size_t)i != LUIdx) return true;
305 return UsedByIndices.find_next(i) != -1;
308 const SmallBitVector &RegUseTracker::getUsedByIndices(const SCEV *Reg) const {
309 RegUsesTy::const_iterator I = RegUsesMap.find(Reg);
310 assert(I != RegUsesMap.end() && "Unknown register!");
311 return I->second.UsedByIndices;
314 void RegUseTracker::clear() {
321 /// This class holds information that describes a formula for computing
322 /// satisfying a use. It may include broken-out immediates and scaled registers.
324 /// Global base address used for complex addressing.
325 GlobalValue *BaseGV = nullptr;
327 /// Base offset for complex addressing.
328 int64_t BaseOffset = 0;
330 /// Whether any complex addressing has a base register.
331 bool HasBaseReg = false;
333 /// The scale of any complex addressing.
336 /// The list of "base" registers for this use. When this is non-empty. The
337 /// canonical representation of a formula is
338 /// 1. BaseRegs.size > 1 implies ScaledReg != NULL and
339 /// 2. ScaledReg != NULL implies Scale != 1 || !BaseRegs.empty().
340 /// 3. The reg containing recurrent expr related with currect loop in the
341 /// formula should be put in the ScaledReg.
342 /// #1 enforces that the scaled register is always used when at least two
343 /// registers are needed by the formula: e.g., reg1 + reg2 is reg1 + 1 * reg2.
344 /// #2 enforces that 1 * reg is reg.
345 /// #3 ensures invariant regs with respect to current loop can be combined
346 /// together in LSR codegen.
347 /// This invariant can be temporarily broken while building a formula.
348 /// However, every formula inserted into the LSRInstance must be in canonical
350 SmallVector<const SCEV *, 4> BaseRegs;
352 /// The 'scaled' register for this use. This should be non-null when Scale is
354 const SCEV *ScaledReg = nullptr;
356 /// An additional constant offset which added near the use. This requires a
357 /// temporary register, but the offset itself can live in an add immediate
358 /// field rather than a register.
359 int64_t UnfoldedOffset = 0;
363 void initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE);
365 bool isCanonical(const Loop &L) const;
367 void canonicalize(const Loop &L);
371 bool hasZeroEnd() const;
373 size_t getNumRegs() const;
374 Type *getType() const;
376 void deleteBaseReg(const SCEV *&S);
378 bool referencesReg(const SCEV *S) const;
379 bool hasRegsUsedByUsesOtherThan(size_t LUIdx,
380 const RegUseTracker &RegUses) const;
382 void print(raw_ostream &OS) const;
386 } // end anonymous namespace
388 /// Recursion helper for initialMatch.
389 static void DoInitialMatch(const SCEV *S, Loop *L,
390 SmallVectorImpl<const SCEV *> &Good,
391 SmallVectorImpl<const SCEV *> &Bad,
392 ScalarEvolution &SE) {
393 // Collect expressions which properly dominate the loop header.
394 if (SE.properlyDominates(S, L->getHeader())) {
399 // Look at add operands.
400 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
401 for (const SCEV *S : Add->operands())
402 DoInitialMatch(S, L, Good, Bad, SE);
406 // Look at addrec operands.
407 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S))
408 if (!AR->getStart()->isZero() && AR->isAffine()) {
409 DoInitialMatch(AR->getStart(), L, Good, Bad, SE);
410 DoInitialMatch(SE.getAddRecExpr(SE.getConstant(AR->getType(), 0),
411 AR->getStepRecurrence(SE),
412 // FIXME: AR->getNoWrapFlags()
413 AR->getLoop(), SCEV::FlagAnyWrap),
418 // Handle a multiplication by -1 (negation) if it didn't fold.
419 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S))
420 if (Mul->getOperand(0)->isAllOnesValue()) {
421 SmallVector<const SCEV *, 4> Ops(Mul->op_begin()+1, Mul->op_end());
422 const SCEV *NewMul = SE.getMulExpr(Ops);
424 SmallVector<const SCEV *, 4> MyGood;
425 SmallVector<const SCEV *, 4> MyBad;
426 DoInitialMatch(NewMul, L, MyGood, MyBad, SE);
427 const SCEV *NegOne = SE.getSCEV(ConstantInt::getAllOnesValue(
428 SE.getEffectiveSCEVType(NewMul->getType())));
429 for (const SCEV *S : MyGood)
430 Good.push_back(SE.getMulExpr(NegOne, S));
431 for (const SCEV *S : MyBad)
432 Bad.push_back(SE.getMulExpr(NegOne, S));
436 // Ok, we can't do anything interesting. Just stuff the whole thing into a
437 // register and hope for the best.
441 /// Incorporate loop-variant parts of S into this Formula, attempting to keep
442 /// all loop-invariant and loop-computable values in a single base register.
443 void Formula::initialMatch(const SCEV *S, Loop *L, ScalarEvolution &SE) {
444 SmallVector<const SCEV *, 4> Good;
445 SmallVector<const SCEV *, 4> Bad;
446 DoInitialMatch(S, L, Good, Bad, SE);
448 const SCEV *Sum = SE.getAddExpr(Good);
450 BaseRegs.push_back(Sum);
454 const SCEV *Sum = SE.getAddExpr(Bad);
456 BaseRegs.push_back(Sum);
462 /// Check whether or not this formula satisfies the canonical
464 /// \see Formula::BaseRegs.
465 bool Formula::isCanonical(const Loop &L) const {
467 return BaseRegs.size() <= 1;
472 if (Scale == 1 && BaseRegs.empty())
475 const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
476 if (SAR && SAR->getLoop() == &L)
479 // If ScaledReg is not a recurrent expr, or it is but its loop is not current
480 // loop, meanwhile BaseRegs contains a recurrent expr reg related with current
481 // loop, we want to swap the reg in BaseRegs with ScaledReg.
483 find_if(make_range(BaseRegs.begin(), BaseRegs.end()), [&](const SCEV *S) {
484 return isa<const SCEVAddRecExpr>(S) &&
485 (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
487 return I == BaseRegs.end();
490 /// Helper method to morph a formula into its canonical representation.
491 /// \see Formula::BaseRegs.
492 /// Every formula having more than one base register, must use the ScaledReg
493 /// field. Otherwise, we would have to do special cases everywhere in LSR
494 /// to treat reg1 + reg2 + ... the same way as reg1 + 1*reg2 + ...
495 /// On the other hand, 1*reg should be canonicalized into reg.
496 void Formula::canonicalize(const Loop &L) {
499 // So far we did not need this case. This is easy to implement but it is
500 // useless to maintain dead code. Beside it could hurt compile time.
501 assert(!BaseRegs.empty() && "1*reg => reg, should not be needed.");
503 // Keep the invariant sum in BaseRegs and one of the variant sum in ScaledReg.
505 ScaledReg = BaseRegs.back();
510 // If ScaledReg is an invariant with respect to L, find the reg from
511 // BaseRegs containing the recurrent expr related with Loop L. Swap the
512 // reg with ScaledReg.
513 const SCEVAddRecExpr *SAR = dyn_cast<const SCEVAddRecExpr>(ScaledReg);
514 if (!SAR || SAR->getLoop() != &L) {
515 auto I = find_if(make_range(BaseRegs.begin(), BaseRegs.end()),
517 return isa<const SCEVAddRecExpr>(S) &&
518 (cast<SCEVAddRecExpr>(S)->getLoop() == &L);
520 if (I != BaseRegs.end())
521 std::swap(ScaledReg, *I);
525 /// Get rid of the scale in the formula.
526 /// In other words, this method morphes reg1 + 1*reg2 into reg1 + reg2.
527 /// \return true if it was possible to get rid of the scale, false otherwise.
528 /// \note After this operation the formula may not be in the canonical form.
529 bool Formula::unscale() {
533 BaseRegs.push_back(ScaledReg);
538 bool Formula::hasZeroEnd() const {
539 if (UnfoldedOffset || BaseOffset)
541 if (BaseRegs.size() != 1 || ScaledReg)
546 /// Return the total number of register operands used by this formula. This does
547 /// not include register uses implied by non-constant addrec strides.
548 size_t Formula::getNumRegs() const {
549 return !!ScaledReg + BaseRegs.size();
552 /// Return the type of this formula, if it has one, or null otherwise. This type
553 /// is meaningless except for the bit size.
554 Type *Formula::getType() const {
555 return !BaseRegs.empty() ? BaseRegs.front()->getType() :
556 ScaledReg ? ScaledReg->getType() :
557 BaseGV ? BaseGV->getType() :
561 /// Delete the given base reg from the BaseRegs list.
562 void Formula::deleteBaseReg(const SCEV *&S) {
563 if (&S != &BaseRegs.back())
564 std::swap(S, BaseRegs.back());
568 /// Test if this formula references the given register.
569 bool Formula::referencesReg(const SCEV *S) const {
570 return S == ScaledReg || is_contained(BaseRegs, S);
573 /// Test whether this formula uses registers which are used by uses other than
574 /// the use with the given index.
575 bool Formula::hasRegsUsedByUsesOtherThan(size_t LUIdx,
576 const RegUseTracker &RegUses) const {
578 if (RegUses.isRegUsedByUsesOtherThan(ScaledReg, LUIdx))
580 for (const SCEV *BaseReg : BaseRegs)
581 if (RegUses.isRegUsedByUsesOtherThan(BaseReg, LUIdx))
586 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
587 void Formula::print(raw_ostream &OS) const {
590 if (!First) OS << " + "; else First = false;
591 BaseGV->printAsOperand(OS, /*PrintType=*/false);
593 if (BaseOffset != 0) {
594 if (!First) OS << " + "; else First = false;
597 for (const SCEV *BaseReg : BaseRegs) {
598 if (!First) OS << " + "; else First = false;
599 OS << "reg(" << *BaseReg << ')';
601 if (HasBaseReg && BaseRegs.empty()) {
602 if (!First) OS << " + "; else First = false;
603 OS << "**error: HasBaseReg**";
604 } else if (!HasBaseReg && !BaseRegs.empty()) {
605 if (!First) OS << " + "; else First = false;
606 OS << "**error: !HasBaseReg**";
609 if (!First) OS << " + "; else First = false;
610 OS << Scale << "*reg(";
617 if (UnfoldedOffset != 0) {
618 if (!First) OS << " + ";
619 OS << "imm(" << UnfoldedOffset << ')';
623 LLVM_DUMP_METHOD void Formula::dump() const {
624 print(errs()); errs() << '\n';
628 /// Return true if the given addrec can be sign-extended without changing its
630 static bool isAddRecSExtable(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
632 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(AR->getType()) + 1);
633 return isa<SCEVAddRecExpr>(SE.getSignExtendExpr(AR, WideTy));
636 /// Return true if the given add can be sign-extended without changing its
638 static bool isAddSExtable(const SCEVAddExpr *A, ScalarEvolution &SE) {
640 IntegerType::get(SE.getContext(), SE.getTypeSizeInBits(A->getType()) + 1);
641 return isa<SCEVAddExpr>(SE.getSignExtendExpr(A, WideTy));
644 /// Return true if the given mul can be sign-extended without changing its
646 static bool isMulSExtable(const SCEVMulExpr *M, ScalarEvolution &SE) {
648 IntegerType::get(SE.getContext(),
649 SE.getTypeSizeInBits(M->getType()) * M->getNumOperands());
650 return isa<SCEVMulExpr>(SE.getSignExtendExpr(M, WideTy));
653 /// Return an expression for LHS /s RHS, if it can be determined and if the
654 /// remainder is known to be zero, or null otherwise. If IgnoreSignificantBits
655 /// is true, expressions like (X * Y) /s Y are simplified to Y, ignoring that
656 /// the multiplication may overflow, which is useful when the result will be
657 /// used in a context where the most significant bits are ignored.
658 static const SCEV *getExactSDiv(const SCEV *LHS, const SCEV *RHS,
660 bool IgnoreSignificantBits = false) {
661 // Handle the trivial case, which works for any SCEV type.
663 return SE.getConstant(LHS->getType(), 1);
665 // Handle a few RHS special cases.
666 const SCEVConstant *RC = dyn_cast<SCEVConstant>(RHS);
668 const APInt &RA = RC->getAPInt();
669 // Handle x /s -1 as x * -1, to give ScalarEvolution a chance to do
671 if (RA.isAllOnesValue())
672 return SE.getMulExpr(LHS, RC);
673 // Handle x /s 1 as x.
678 // Check for a division of a constant by a constant.
679 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(LHS)) {
682 const APInt &LA = C->getAPInt();
683 const APInt &RA = RC->getAPInt();
684 if (LA.srem(RA) != 0)
686 return SE.getConstant(LA.sdiv(RA));
689 // Distribute the sdiv over addrec operands, if the addrec doesn't overflow.
690 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(LHS)) {
691 if ((IgnoreSignificantBits || isAddRecSExtable(AR, SE)) && AR->isAffine()) {
692 const SCEV *Step = getExactSDiv(AR->getStepRecurrence(SE), RHS, SE,
693 IgnoreSignificantBits);
694 if (!Step) return nullptr;
695 const SCEV *Start = getExactSDiv(AR->getStart(), RHS, SE,
696 IgnoreSignificantBits);
697 if (!Start) return nullptr;
698 // FlagNW is independent of the start value, step direction, and is
699 // preserved with smaller magnitude steps.
700 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
701 return SE.getAddRecExpr(Start, Step, AR->getLoop(), SCEV::FlagAnyWrap);
706 // Distribute the sdiv over add operands, if the add doesn't overflow.
707 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(LHS)) {
708 if (IgnoreSignificantBits || isAddSExtable(Add, SE)) {
709 SmallVector<const SCEV *, 8> Ops;
710 for (const SCEV *S : Add->operands()) {
711 const SCEV *Op = getExactSDiv(S, RHS, SE, IgnoreSignificantBits);
712 if (!Op) return nullptr;
715 return SE.getAddExpr(Ops);
720 // Check for a multiply operand that we can pull RHS out of.
721 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(LHS)) {
722 if (IgnoreSignificantBits || isMulSExtable(Mul, SE)) {
723 SmallVector<const SCEV *, 4> Ops;
725 for (const SCEV *S : Mul->operands()) {
727 if (const SCEV *Q = getExactSDiv(S, RHS, SE,
728 IgnoreSignificantBits)) {
734 return Found ? SE.getMulExpr(Ops) : nullptr;
739 // Otherwise we don't know.
743 /// If S involves the addition of a constant integer value, return that integer
744 /// value, and mutate S to point to a new SCEV with that value excluded.
745 static int64_t ExtractImmediate(const SCEV *&S, ScalarEvolution &SE) {
746 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(S)) {
747 if (C->getAPInt().getMinSignedBits() <= 64) {
748 S = SE.getConstant(C->getType(), 0);
749 return C->getValue()->getSExtValue();
751 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
752 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
753 int64_t Result = ExtractImmediate(NewOps.front(), SE);
755 S = SE.getAddExpr(NewOps);
757 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
758 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
759 int64_t Result = ExtractImmediate(NewOps.front(), SE);
761 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
762 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
769 /// If S involves the addition of a GlobalValue address, return that symbol, and
770 /// mutate S to point to a new SCEV with that value excluded.
771 static GlobalValue *ExtractSymbol(const SCEV *&S, ScalarEvolution &SE) {
772 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(S)) {
773 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue())) {
774 S = SE.getConstant(GV->getType(), 0);
777 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
778 SmallVector<const SCEV *, 8> NewOps(Add->op_begin(), Add->op_end());
779 GlobalValue *Result = ExtractSymbol(NewOps.back(), SE);
781 S = SE.getAddExpr(NewOps);
783 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
784 SmallVector<const SCEV *, 8> NewOps(AR->op_begin(), AR->op_end());
785 GlobalValue *Result = ExtractSymbol(NewOps.front(), SE);
787 S = SE.getAddRecExpr(NewOps, AR->getLoop(),
788 // FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
795 /// Returns true if the specified instruction is using the specified value as an
797 static bool isAddressUse(const TargetTransformInfo &TTI,
798 Instruction *Inst, Value *OperandVal) {
799 bool isAddress = isa<LoadInst>(Inst);
800 if (StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
801 if (SI->getPointerOperand() == OperandVal)
803 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
804 // Addressing modes can also be folded into prefetches and a variety
806 switch (II->getIntrinsicID()) {
807 case Intrinsic::memset:
808 case Intrinsic::prefetch:
809 if (II->getArgOperand(0) == OperandVal)
812 case Intrinsic::memmove:
813 case Intrinsic::memcpy:
814 if (II->getArgOperand(0) == OperandVal ||
815 II->getArgOperand(1) == OperandVal)
819 MemIntrinsicInfo IntrInfo;
820 if (TTI.getTgtMemIntrinsic(II, IntrInfo)) {
821 if (IntrInfo.PtrVal == OperandVal)
826 } else if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
827 if (RMW->getPointerOperand() == OperandVal)
829 } else if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
830 if (CmpX->getPointerOperand() == OperandVal)
836 /// Return the type of the memory being accessed.
837 static MemAccessTy getAccessType(const TargetTransformInfo &TTI,
838 Instruction *Inst, Value *OperandVal) {
839 MemAccessTy AccessTy(Inst->getType(), MemAccessTy::UnknownAddressSpace);
840 if (const StoreInst *SI = dyn_cast<StoreInst>(Inst)) {
841 AccessTy.MemTy = SI->getOperand(0)->getType();
842 AccessTy.AddrSpace = SI->getPointerAddressSpace();
843 } else if (const LoadInst *LI = dyn_cast<LoadInst>(Inst)) {
844 AccessTy.AddrSpace = LI->getPointerAddressSpace();
845 } else if (const AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(Inst)) {
846 AccessTy.AddrSpace = RMW->getPointerAddressSpace();
847 } else if (const AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(Inst)) {
848 AccessTy.AddrSpace = CmpX->getPointerAddressSpace();
849 } else if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Inst)) {
850 switch (II->getIntrinsicID()) {
851 case Intrinsic::prefetch:
852 case Intrinsic::memset:
853 AccessTy.AddrSpace = II->getArgOperand(0)->getType()->getPointerAddressSpace();
854 AccessTy.MemTy = OperandVal->getType();
856 case Intrinsic::memmove:
857 case Intrinsic::memcpy:
858 AccessTy.AddrSpace = OperandVal->getType()->getPointerAddressSpace();
859 AccessTy.MemTy = OperandVal->getType();
862 MemIntrinsicInfo IntrInfo;
863 if (TTI.getTgtMemIntrinsic(II, IntrInfo) && IntrInfo.PtrVal) {
865 = IntrInfo.PtrVal->getType()->getPointerAddressSpace();
873 // All pointers have the same requirements, so canonicalize them to an
874 // arbitrary pointer type to minimize variation.
875 if (PointerType *PTy = dyn_cast<PointerType>(AccessTy.MemTy))
876 AccessTy.MemTy = PointerType::get(IntegerType::get(PTy->getContext(), 1),
877 PTy->getAddressSpace());
882 /// Return true if this AddRec is already a phi in its loop.
883 static bool isExistingPhi(const SCEVAddRecExpr *AR, ScalarEvolution &SE) {
884 for (PHINode &PN : AR->getLoop()->getHeader()->phis()) {
885 if (SE.isSCEVable(PN.getType()) &&
886 (SE.getEffectiveSCEVType(PN.getType()) ==
887 SE.getEffectiveSCEVType(AR->getType())) &&
888 SE.getSCEV(&PN) == AR)
894 /// Check if expanding this expression is likely to incur significant cost. This
895 /// is tricky because SCEV doesn't track which expressions are actually computed
896 /// by the current IR.
898 /// We currently allow expansion of IV increments that involve adds,
899 /// multiplication by constants, and AddRecs from existing phis.
901 /// TODO: Allow UDivExpr if we can find an existing IV increment that is an
902 /// obvious multiple of the UDivExpr.
903 static bool isHighCostExpansion(const SCEV *S,
904 SmallPtrSetImpl<const SCEV*> &Processed,
905 ScalarEvolution &SE) {
906 // Zero/One operand expressions
907 switch (S->getSCEVType()) {
912 return isHighCostExpansion(cast<SCEVTruncateExpr>(S)->getOperand(),
915 return isHighCostExpansion(cast<SCEVZeroExtendExpr>(S)->getOperand(),
918 return isHighCostExpansion(cast<SCEVSignExtendExpr>(S)->getOperand(),
922 if (!Processed.insert(S).second)
925 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
926 for (const SCEV *S : Add->operands()) {
927 if (isHighCostExpansion(S, Processed, SE))
933 if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
934 if (Mul->getNumOperands() == 2) {
935 // Multiplication by a constant is ok
936 if (isa<SCEVConstant>(Mul->getOperand(0)))
937 return isHighCostExpansion(Mul->getOperand(1), Processed, SE);
939 // If we have the value of one operand, check if an existing
940 // multiplication already generates this expression.
941 if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(Mul->getOperand(1))) {
942 Value *UVal = U->getValue();
943 for (User *UR : UVal->users()) {
944 // If U is a constant, it may be used by a ConstantExpr.
945 Instruction *UI = dyn_cast<Instruction>(UR);
946 if (UI && UI->getOpcode() == Instruction::Mul &&
947 SE.isSCEVable(UI->getType())) {
948 return SE.getSCEV(UI) == Mul;
955 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
956 if (isExistingPhi(AR, SE))
960 // Fow now, consider any other type of expression (div/mul/min/max) high cost.
964 /// If any of the instructions in the specified set are trivially dead, delete
965 /// them and see if this makes any of their operands subsequently dead.
967 DeleteTriviallyDeadInstructions(SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
968 bool Changed = false;
970 while (!DeadInsts.empty()) {
971 Value *V = DeadInsts.pop_back_val();
972 Instruction *I = dyn_cast_or_null<Instruction>(V);
974 if (!I || !isInstructionTriviallyDead(I))
977 for (Use &O : I->operands())
978 if (Instruction *U = dyn_cast<Instruction>(O)) {
981 DeadInsts.emplace_back(U);
984 I->eraseFromParent();
995 } // end anonymous namespace
997 /// Check if the addressing mode defined by \p F is completely
998 /// folded in \p LU at isel time.
999 /// This includes address-mode folding and special icmp tricks.
1000 /// This function returns true if \p LU can accommodate what \p F
1001 /// defines and up to 1 base + 1 scaled + offset.
1002 /// In other words, if \p F has several base registers, this function may
1003 /// still return true. Therefore, users still need to account for
1004 /// additional base registers and/or unfolded offsets to derive an
1005 /// accurate cost model.
1006 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1007 const LSRUse &LU, const Formula &F);
1009 // Get the cost of the scaling factor used in F for LU.
1010 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1011 const LSRUse &LU, const Formula &F,
1016 /// This class is used to measure and compare candidate formulae.
1018 const Loop *L = nullptr;
1019 ScalarEvolution *SE = nullptr;
1020 const TargetTransformInfo *TTI = nullptr;
1021 TargetTransformInfo::LSRCost C;
1025 Cost(const Loop *L, ScalarEvolution &SE, const TargetTransformInfo &TTI) :
1026 L(L), SE(&SE), TTI(&TTI) {
1037 bool isLess(Cost &Other);
1042 // Once any of the metrics loses, they must all remain losers.
1044 return ((C.Insns | C.NumRegs | C.AddRecCost | C.NumIVMuls | C.NumBaseAdds
1045 | C.ImmCost | C.SetupCost | C.ScaleCost) != ~0u)
1046 || ((C.Insns & C.NumRegs & C.AddRecCost & C.NumIVMuls & C.NumBaseAdds
1047 & C.ImmCost & C.SetupCost & C.ScaleCost) == ~0u);
1052 assert(isValid() && "invalid cost");
1053 return C.NumRegs == ~0u;
1056 void RateFormula(const Formula &F,
1057 SmallPtrSetImpl<const SCEV *> &Regs,
1058 const DenseSet<const SCEV *> &VisitedRegs,
1060 SmallPtrSetImpl<const SCEV *> *LoserRegs = nullptr);
1062 void print(raw_ostream &OS) const;
1066 void RateRegister(const Formula &F, const SCEV *Reg,
1067 SmallPtrSetImpl<const SCEV *> &Regs);
1068 void RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1069 SmallPtrSetImpl<const SCEV *> &Regs,
1070 SmallPtrSetImpl<const SCEV *> *LoserRegs);
1073 /// An operand value in an instruction which is to be replaced with some
1074 /// equivalent, possibly strength-reduced, replacement.
1076 /// The instruction which will be updated.
1077 Instruction *UserInst = nullptr;
1079 /// The operand of the instruction which will be replaced. The operand may be
1080 /// used more than once; every instance will be replaced.
1081 Value *OperandValToReplace = nullptr;
1083 /// If this user is to use the post-incremented value of an induction
1084 /// variable, this set is non-empty and holds the loops associated with the
1085 /// induction variable.
1086 PostIncLoopSet PostIncLoops;
1088 /// A constant offset to be added to the LSRUse expression. This allows
1089 /// multiple fixups to share the same LSRUse with different offsets, for
1090 /// example in an unrolled loop.
1093 LSRFixup() = default;
1095 bool isUseFullyOutsideLoop(const Loop *L) const;
1097 void print(raw_ostream &OS) const;
1101 /// A DenseMapInfo implementation for holding DenseMaps and DenseSets of sorted
1102 /// SmallVectors of const SCEV*.
1103 struct UniquifierDenseMapInfo {
1104 static SmallVector<const SCEV *, 4> getEmptyKey() {
1105 SmallVector<const SCEV *, 4> V;
1106 V.push_back(reinterpret_cast<const SCEV *>(-1));
1110 static SmallVector<const SCEV *, 4> getTombstoneKey() {
1111 SmallVector<const SCEV *, 4> V;
1112 V.push_back(reinterpret_cast<const SCEV *>(-2));
1116 static unsigned getHashValue(const SmallVector<const SCEV *, 4> &V) {
1117 return static_cast<unsigned>(hash_combine_range(V.begin(), V.end()));
1120 static bool isEqual(const SmallVector<const SCEV *, 4> &LHS,
1121 const SmallVector<const SCEV *, 4> &RHS) {
1126 /// This class holds the state that LSR keeps for each use in IVUsers, as well
1127 /// as uses invented by LSR itself. It includes information about what kinds of
1128 /// things can be folded into the user, information about the user itself, and
1129 /// information about how the use may be satisfied. TODO: Represent multiple
1130 /// users of the same expression in common?
1132 DenseSet<SmallVector<const SCEV *, 4>, UniquifierDenseMapInfo> Uniquifier;
1135 /// An enum for a kind of use, indicating what types of scaled and immediate
1136 /// operands it might support.
1138 Basic, ///< A normal use, with no folding.
1139 Special, ///< A special case of basic, allowing -1 scales.
1140 Address, ///< An address use; folding according to TargetLowering
1141 ICmpZero ///< An equality icmp with both operands folded into one.
1142 // TODO: Add a generic icmp too?
1145 using SCEVUseKindPair = PointerIntPair<const SCEV *, 2, KindType>;
1148 MemAccessTy AccessTy;
1150 /// The list of operands which are to be replaced.
1151 SmallVector<LSRFixup, 8> Fixups;
1153 /// Keep track of the min and max offsets of the fixups.
1154 int64_t MinOffset = std::numeric_limits<int64_t>::max();
1155 int64_t MaxOffset = std::numeric_limits<int64_t>::min();
1157 /// This records whether all of the fixups using this LSRUse are outside of
1158 /// the loop, in which case some special-case heuristics may be used.
1159 bool AllFixupsOutsideLoop = true;
1161 /// RigidFormula is set to true to guarantee that this use will be associated
1162 /// with a single formula--the one that initially matched. Some SCEV
1163 /// expressions cannot be expanded. This allows LSR to consider the registers
1164 /// used by those expressions without the need to expand them later after
1165 /// changing the formula.
1166 bool RigidFormula = false;
1168 /// This records the widest use type for any fixup using this
1169 /// LSRUse. FindUseWithSimilarFormula can't consider uses with different max
1170 /// fixup widths to be equivalent, because the narrower one may be relying on
1171 /// the implicit truncation to truncate away bogus bits.
1172 Type *WidestFixupType = nullptr;
1174 /// A list of ways to build a value that can satisfy this user. After the
1175 /// list is populated, one of these is selected heuristically and used to
1176 /// formulate a replacement for OperandValToReplace in UserInst.
1177 SmallVector<Formula, 12> Formulae;
1179 /// The set of register candidates used by all formulae in this LSRUse.
1180 SmallPtrSet<const SCEV *, 4> Regs;
1182 LSRUse(KindType K, MemAccessTy AT) : Kind(K), AccessTy(AT) {}
1184 LSRFixup &getNewFixup() {
1185 Fixups.push_back(LSRFixup());
1186 return Fixups.back();
1189 void pushFixup(LSRFixup &f) {
1190 Fixups.push_back(f);
1191 if (f.Offset > MaxOffset)
1192 MaxOffset = f.Offset;
1193 if (f.Offset < MinOffset)
1194 MinOffset = f.Offset;
1197 bool HasFormulaWithSameRegs(const Formula &F) const;
1198 float getNotSelectedProbability(const SCEV *Reg) const;
1199 bool InsertFormula(const Formula &F, const Loop &L);
1200 void DeleteFormula(Formula &F);
1201 void RecomputeRegs(size_t LUIdx, RegUseTracker &Reguses);
1203 void print(raw_ostream &OS) const;
1207 } // end anonymous namespace
1209 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1210 LSRUse::KindType Kind, MemAccessTy AccessTy,
1211 GlobalValue *BaseGV, int64_t BaseOffset,
1212 bool HasBaseReg, int64_t Scale,
1213 Instruction *Fixup = nullptr);
1215 static unsigned getSetupCost(const SCEV *Reg, unsigned Depth) {
1216 if (isa<SCEVUnknown>(Reg) || isa<SCEVConstant>(Reg))
1220 if (const auto *S = dyn_cast<SCEVAddRecExpr>(Reg))
1221 return getSetupCost(S->getStart(), Depth - 1);
1222 if (auto S = dyn_cast<SCEVCastExpr>(Reg))
1223 return getSetupCost(S->getOperand(), Depth - 1);
1224 if (auto S = dyn_cast<SCEVNAryExpr>(Reg))
1225 return std::accumulate(S->op_begin(), S->op_end(), 0,
1226 [&](unsigned i, const SCEV *Reg) {
1227 return i + getSetupCost(Reg, Depth - 1);
1229 if (auto S = dyn_cast<SCEVUDivExpr>(Reg))
1230 return getSetupCost(S->getLHS(), Depth - 1) +
1231 getSetupCost(S->getRHS(), Depth - 1);
1235 /// Tally up interesting quantities from the given register.
1236 void Cost::RateRegister(const Formula &F, const SCEV *Reg,
1237 SmallPtrSetImpl<const SCEV *> &Regs) {
1238 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Reg)) {
1239 // If this is an addrec for another loop, it should be an invariant
1240 // with respect to L since L is the innermost loop (at least
1241 // for now LSR only handles innermost loops).
1242 if (AR->getLoop() != L) {
1243 // If the AddRec exists, consider it's register free and leave it alone.
1244 if (isExistingPhi(AR, *SE))
1247 // It is bad to allow LSR for current loop to add induction variables
1248 // for its sibling loops.
1249 if (!AR->getLoop()->contains(L)) {
1254 // Otherwise, it will be an invariant with respect to Loop L.
1259 unsigned LoopCost = 1;
1260 if (TTI->isIndexedLoadLegal(TTI->MIM_PostInc, AR->getType()) ||
1261 TTI->isIndexedStoreLegal(TTI->MIM_PostInc, AR->getType())) {
1263 // If the step size matches the base offset, we could use pre-indexed
1265 if (TTI->shouldFavorBackedgeIndex(L)) {
1266 if (auto *Step = dyn_cast<SCEVConstant>(AR->getStepRecurrence(*SE)))
1267 if (Step->getAPInt() == F.BaseOffset)
1271 if (TTI->shouldFavorPostInc()) {
1272 const SCEV *LoopStep = AR->getStepRecurrence(*SE);
1273 if (isa<SCEVConstant>(LoopStep)) {
1274 const SCEV *LoopStart = AR->getStart();
1275 if (!isa<SCEVConstant>(LoopStart) &&
1276 SE->isLoopInvariant(LoopStart, L))
1281 C.AddRecCost += LoopCost;
1283 // Add the step value register, if it needs one.
1284 // TODO: The non-affine case isn't precisely modeled here.
1285 if (!AR->isAffine() || !isa<SCEVConstant>(AR->getOperand(1))) {
1286 if (!Regs.count(AR->getOperand(1))) {
1287 RateRegister(F, AR->getOperand(1), Regs);
1295 // Rough heuristic; favor registers which don't require extra setup
1296 // instructions in the preheader.
1297 C.SetupCost += getSetupCost(Reg, SetupCostDepthLimit);
1298 // Ensure we don't, even with the recusion limit, produce invalid costs.
1299 C.SetupCost = std::min<unsigned>(C.SetupCost, 1 << 16);
1301 C.NumIVMuls += isa<SCEVMulExpr>(Reg) &&
1302 SE->hasComputableLoopEvolution(Reg, L);
1305 /// Record this register in the set. If we haven't seen it before, rate
1306 /// it. Optional LoserRegs provides a way to declare any formula that refers to
1307 /// one of those regs an instant loser.
1308 void Cost::RatePrimaryRegister(const Formula &F, const SCEV *Reg,
1309 SmallPtrSetImpl<const SCEV *> &Regs,
1310 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1311 if (LoserRegs && LoserRegs->count(Reg)) {
1315 if (Regs.insert(Reg).second) {
1316 RateRegister(F, Reg, Regs);
1317 if (LoserRegs && isLoser())
1318 LoserRegs->insert(Reg);
1322 void Cost::RateFormula(const Formula &F,
1323 SmallPtrSetImpl<const SCEV *> &Regs,
1324 const DenseSet<const SCEV *> &VisitedRegs,
1326 SmallPtrSetImpl<const SCEV *> *LoserRegs) {
1327 assert(F.isCanonical(*L) && "Cost is accurate only for canonical formula");
1328 // Tally up the registers.
1329 unsigned PrevAddRecCost = C.AddRecCost;
1330 unsigned PrevNumRegs = C.NumRegs;
1331 unsigned PrevNumBaseAdds = C.NumBaseAdds;
1332 if (const SCEV *ScaledReg = F.ScaledReg) {
1333 if (VisitedRegs.count(ScaledReg)) {
1337 RatePrimaryRegister(F, ScaledReg, Regs, LoserRegs);
1341 for (const SCEV *BaseReg : F.BaseRegs) {
1342 if (VisitedRegs.count(BaseReg)) {
1346 RatePrimaryRegister(F, BaseReg, Regs, LoserRegs);
1351 // Determine how many (unfolded) adds we'll need inside the loop.
1352 size_t NumBaseParts = F.getNumRegs();
1353 if (NumBaseParts > 1)
1354 // Do not count the base and a possible second register if the target
1355 // allows to fold 2 registers.
1357 NumBaseParts - (1 + (F.Scale && isAMCompletelyFolded(*TTI, LU, F)));
1358 C.NumBaseAdds += (F.UnfoldedOffset != 0);
1360 // Accumulate non-free scaling amounts.
1361 C.ScaleCost += getScalingFactorCost(*TTI, LU, F, *L);
1363 // Tally up the non-zero immediates.
1364 for (const LSRFixup &Fixup : LU.Fixups) {
1365 int64_t O = Fixup.Offset;
1366 int64_t Offset = (uint64_t)O + F.BaseOffset;
1368 C.ImmCost += 64; // Handle symbolic values conservatively.
1369 // TODO: This should probably be the pointer size.
1370 else if (Offset != 0)
1371 C.ImmCost += APInt(64, Offset, true).getMinSignedBits();
1373 // Check with target if this offset with this instruction is
1374 // specifically not supported.
1375 if (LU.Kind == LSRUse::Address && Offset != 0 &&
1376 !isAMCompletelyFolded(*TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1377 Offset, F.HasBaseReg, F.Scale, Fixup.UserInst))
1381 // If we don't count instruction cost exit here.
1383 assert(isValid() && "invalid cost");
1387 // Treat every new register that exceeds TTI.getNumberOfRegisters() - 1 as
1388 // additional instruction (at least fill).
1389 unsigned TTIRegNum = TTI->getNumberOfRegisters(false) - 1;
1390 if (C.NumRegs > TTIRegNum) {
1391 // Cost already exceeded TTIRegNum, then only newly added register can add
1392 // new instructions.
1393 if (PrevNumRegs > TTIRegNum)
1394 C.Insns += (C.NumRegs - PrevNumRegs);
1396 C.Insns += (C.NumRegs - TTIRegNum);
1399 // If ICmpZero formula ends with not 0, it could not be replaced by
1400 // just add or sub. We'll need to compare final result of AddRec.
1401 // That means we'll need an additional instruction. But if the target can
1402 // macro-fuse a compare with a branch, don't count this extra instruction.
1403 // For -10 + {0, +, 1}:
1409 if (LU.Kind == LSRUse::ICmpZero && !F.hasZeroEnd() &&
1410 !TTI->canMacroFuseCmp())
1412 // Each new AddRec adds 1 instruction to calculation.
1413 C.Insns += (C.AddRecCost - PrevAddRecCost);
1415 // BaseAdds adds instructions for unfolded registers.
1416 if (LU.Kind != LSRUse::ICmpZero)
1417 C.Insns += C.NumBaseAdds - PrevNumBaseAdds;
1418 assert(isValid() && "invalid cost");
1421 /// Set this cost to a losing value.
1423 C.Insns = std::numeric_limits<unsigned>::max();
1424 C.NumRegs = std::numeric_limits<unsigned>::max();
1425 C.AddRecCost = std::numeric_limits<unsigned>::max();
1426 C.NumIVMuls = std::numeric_limits<unsigned>::max();
1427 C.NumBaseAdds = std::numeric_limits<unsigned>::max();
1428 C.ImmCost = std::numeric_limits<unsigned>::max();
1429 C.SetupCost = std::numeric_limits<unsigned>::max();
1430 C.ScaleCost = std::numeric_limits<unsigned>::max();
1433 /// Choose the lower cost.
1434 bool Cost::isLess(Cost &Other) {
1435 if (InsnsCost.getNumOccurrences() > 0 && InsnsCost &&
1436 C.Insns != Other.C.Insns)
1437 return C.Insns < Other.C.Insns;
1438 return TTI->isLSRCostLess(C, Other.C);
1441 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1442 void Cost::print(raw_ostream &OS) const {
1444 OS << C.Insns << " instruction" << (C.Insns == 1 ? " " : "s ");
1445 OS << C.NumRegs << " reg" << (C.NumRegs == 1 ? "" : "s");
1446 if (C.AddRecCost != 0)
1447 OS << ", with addrec cost " << C.AddRecCost;
1448 if (C.NumIVMuls != 0)
1449 OS << ", plus " << C.NumIVMuls << " IV mul"
1450 << (C.NumIVMuls == 1 ? "" : "s");
1451 if (C.NumBaseAdds != 0)
1452 OS << ", plus " << C.NumBaseAdds << " base add"
1453 << (C.NumBaseAdds == 1 ? "" : "s");
1454 if (C.ScaleCost != 0)
1455 OS << ", plus " << C.ScaleCost << " scale cost";
1457 OS << ", plus " << C.ImmCost << " imm cost";
1458 if (C.SetupCost != 0)
1459 OS << ", plus " << C.SetupCost << " setup cost";
1462 LLVM_DUMP_METHOD void Cost::dump() const {
1463 print(errs()); errs() << '\n';
1467 /// Test whether this fixup always uses its value outside of the given loop.
1468 bool LSRFixup::isUseFullyOutsideLoop(const Loop *L) const {
1469 // PHI nodes use their value in their incoming blocks.
1470 if (const PHINode *PN = dyn_cast<PHINode>(UserInst)) {
1471 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
1472 if (PN->getIncomingValue(i) == OperandValToReplace &&
1473 L->contains(PN->getIncomingBlock(i)))
1478 return !L->contains(UserInst);
1481 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1482 void LSRFixup::print(raw_ostream &OS) const {
1484 // Store is common and interesting enough to be worth special-casing.
1485 if (StoreInst *Store = dyn_cast<StoreInst>(UserInst)) {
1487 Store->getOperand(0)->printAsOperand(OS, /*PrintType=*/false);
1488 } else if (UserInst->getType()->isVoidTy())
1489 OS << UserInst->getOpcodeName();
1491 UserInst->printAsOperand(OS, /*PrintType=*/false);
1493 OS << ", OperandValToReplace=";
1494 OperandValToReplace->printAsOperand(OS, /*PrintType=*/false);
1496 for (const Loop *PIL : PostIncLoops) {
1497 OS << ", PostIncLoop=";
1498 PIL->getHeader()->printAsOperand(OS, /*PrintType=*/false);
1502 OS << ", Offset=" << Offset;
1505 LLVM_DUMP_METHOD void LSRFixup::dump() const {
1506 print(errs()); errs() << '\n';
1510 /// Test whether this use as a formula which has the same registers as the given
1512 bool LSRUse::HasFormulaWithSameRegs(const Formula &F) const {
1513 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1514 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1515 // Unstable sort by host order ok, because this is only used for uniquifying.
1517 return Uniquifier.count(Key);
1520 /// The function returns a probability of selecting formula without Reg.
1521 float LSRUse::getNotSelectedProbability(const SCEV *Reg) const {
1523 for (const Formula &F : Formulae)
1524 if (F.referencesReg(Reg))
1526 return ((float)(Formulae.size() - FNum)) / Formulae.size();
1529 /// If the given formula has not yet been inserted, add it to the list, and
1530 /// return true. Return false otherwise. The formula must be in canonical form.
1531 bool LSRUse::InsertFormula(const Formula &F, const Loop &L) {
1532 assert(F.isCanonical(L) && "Invalid canonical representation");
1534 if (!Formulae.empty() && RigidFormula)
1537 SmallVector<const SCEV *, 4> Key = F.BaseRegs;
1538 if (F.ScaledReg) Key.push_back(F.ScaledReg);
1539 // Unstable sort by host order ok, because this is only used for uniquifying.
1542 if (!Uniquifier.insert(Key).second)
1545 // Using a register to hold the value of 0 is not profitable.
1546 assert((!F.ScaledReg || !F.ScaledReg->isZero()) &&
1547 "Zero allocated in a scaled register!");
1549 for (const SCEV *BaseReg : F.BaseRegs)
1550 assert(!BaseReg->isZero() && "Zero allocated in a base register!");
1553 // Add the formula to the list.
1554 Formulae.push_back(F);
1556 // Record registers now being used by this use.
1557 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1559 Regs.insert(F.ScaledReg);
1564 /// Remove the given formula from this use's list.
1565 void LSRUse::DeleteFormula(Formula &F) {
1566 if (&F != &Formulae.back())
1567 std::swap(F, Formulae.back());
1568 Formulae.pop_back();
1571 /// Recompute the Regs field, and update RegUses.
1572 void LSRUse::RecomputeRegs(size_t LUIdx, RegUseTracker &RegUses) {
1573 // Now that we've filtered out some formulae, recompute the Regs set.
1574 SmallPtrSet<const SCEV *, 4> OldRegs = std::move(Regs);
1576 for (const Formula &F : Formulae) {
1577 if (F.ScaledReg) Regs.insert(F.ScaledReg);
1578 Regs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
1581 // Update the RegTracker.
1582 for (const SCEV *S : OldRegs)
1584 RegUses.dropRegister(S, LUIdx);
1587 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1588 void LSRUse::print(raw_ostream &OS) const {
1589 OS << "LSR Use: Kind=";
1591 case Basic: OS << "Basic"; break;
1592 case Special: OS << "Special"; break;
1593 case ICmpZero: OS << "ICmpZero"; break;
1595 OS << "Address of ";
1596 if (AccessTy.MemTy->isPointerTy())
1597 OS << "pointer"; // the full pointer type could be really verbose
1599 OS << *AccessTy.MemTy;
1602 OS << " in addrspace(" << AccessTy.AddrSpace << ')';
1605 OS << ", Offsets={";
1606 bool NeedComma = false;
1607 for (const LSRFixup &Fixup : Fixups) {
1608 if (NeedComma) OS << ',';
1614 if (AllFixupsOutsideLoop)
1615 OS << ", all-fixups-outside-loop";
1617 if (WidestFixupType)
1618 OS << ", widest fixup type: " << *WidestFixupType;
1621 LLVM_DUMP_METHOD void LSRUse::dump() const {
1622 print(errs()); errs() << '\n';
1626 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1627 LSRUse::KindType Kind, MemAccessTy AccessTy,
1628 GlobalValue *BaseGV, int64_t BaseOffset,
1629 bool HasBaseReg, int64_t Scale,
1630 Instruction *Fixup/*= nullptr*/) {
1632 case LSRUse::Address:
1633 return TTI.isLegalAddressingMode(AccessTy.MemTy, BaseGV, BaseOffset,
1634 HasBaseReg, Scale, AccessTy.AddrSpace, Fixup);
1636 case LSRUse::ICmpZero:
1637 // There's not even a target hook for querying whether it would be legal to
1638 // fold a GV into an ICmp.
1642 // ICmp only has two operands; don't allow more than two non-trivial parts.
1643 if (Scale != 0 && HasBaseReg && BaseOffset != 0)
1646 // ICmp only supports no scale or a -1 scale, as we can "fold" a -1 scale by
1647 // putting the scaled register in the other operand of the icmp.
1648 if (Scale != 0 && Scale != -1)
1651 // If we have low-level target information, ask the target if it can fold an
1652 // integer immediate on an icmp.
1653 if (BaseOffset != 0) {
1655 // ICmpZero BaseReg + BaseOffset => ICmp BaseReg, -BaseOffset
1656 // ICmpZero -1*ScaleReg + BaseOffset => ICmp ScaleReg, BaseOffset
1657 // Offs is the ICmp immediate.
1659 // The cast does the right thing with
1660 // std::numeric_limits<int64_t>::min().
1661 BaseOffset = -(uint64_t)BaseOffset;
1662 return TTI.isLegalICmpImmediate(BaseOffset);
1665 // ICmpZero BaseReg + -1*ScaleReg => ICmp BaseReg, ScaleReg
1669 // Only handle single-register values.
1670 return !BaseGV && Scale == 0 && BaseOffset == 0;
1672 case LSRUse::Special:
1673 // Special case Basic to handle -1 scales.
1674 return !BaseGV && (Scale == 0 || Scale == -1) && BaseOffset == 0;
1677 llvm_unreachable("Invalid LSRUse Kind!");
1680 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1681 int64_t MinOffset, int64_t MaxOffset,
1682 LSRUse::KindType Kind, MemAccessTy AccessTy,
1683 GlobalValue *BaseGV, int64_t BaseOffset,
1684 bool HasBaseReg, int64_t Scale) {
1685 // Check for overflow.
1686 if (((int64_t)((uint64_t)BaseOffset + MinOffset) > BaseOffset) !=
1689 MinOffset = (uint64_t)BaseOffset + MinOffset;
1690 if (((int64_t)((uint64_t)BaseOffset + MaxOffset) > BaseOffset) !=
1693 MaxOffset = (uint64_t)BaseOffset + MaxOffset;
1695 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MinOffset,
1696 HasBaseReg, Scale) &&
1697 isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, MaxOffset,
1701 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1702 int64_t MinOffset, int64_t MaxOffset,
1703 LSRUse::KindType Kind, MemAccessTy AccessTy,
1704 const Formula &F, const Loop &L) {
1705 // For the purpose of isAMCompletelyFolded either having a canonical formula
1706 // or a scale not equal to zero is correct.
1707 // Problems may arise from non canonical formulae having a scale == 0.
1708 // Strictly speaking it would best to just rely on canonical formulae.
1709 // However, when we generate the scaled formulae, we first check that the
1710 // scaling factor is profitable before computing the actual ScaledReg for
1711 // compile time sake.
1712 assert((F.isCanonical(L) || F.Scale != 0));
1713 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1714 F.BaseGV, F.BaseOffset, F.HasBaseReg, F.Scale);
1717 /// Test whether we know how to expand the current formula.
1718 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1719 int64_t MaxOffset, LSRUse::KindType Kind,
1720 MemAccessTy AccessTy, GlobalValue *BaseGV,
1721 int64_t BaseOffset, bool HasBaseReg, int64_t Scale) {
1722 // We know how to expand completely foldable formulae.
1723 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1724 BaseOffset, HasBaseReg, Scale) ||
1725 // Or formulae that use a base register produced by a sum of base
1728 isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy,
1729 BaseGV, BaseOffset, true, 0));
1732 static bool isLegalUse(const TargetTransformInfo &TTI, int64_t MinOffset,
1733 int64_t MaxOffset, LSRUse::KindType Kind,
1734 MemAccessTy AccessTy, const Formula &F) {
1735 return isLegalUse(TTI, MinOffset, MaxOffset, Kind, AccessTy, F.BaseGV,
1736 F.BaseOffset, F.HasBaseReg, F.Scale);
1739 static bool isAMCompletelyFolded(const TargetTransformInfo &TTI,
1740 const LSRUse &LU, const Formula &F) {
1741 // Target may want to look at the user instructions.
1742 if (LU.Kind == LSRUse::Address && TTI.LSRWithInstrQueries()) {
1743 for (const LSRFixup &Fixup : LU.Fixups)
1744 if (!isAMCompletelyFolded(TTI, LSRUse::Address, LU.AccessTy, F.BaseGV,
1745 (F.BaseOffset + Fixup.Offset), F.HasBaseReg,
1746 F.Scale, Fixup.UserInst))
1751 return isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1752 LU.AccessTy, F.BaseGV, F.BaseOffset, F.HasBaseReg,
1756 static unsigned getScalingFactorCost(const TargetTransformInfo &TTI,
1757 const LSRUse &LU, const Formula &F,
1762 // If the use is not completely folded in that instruction, we will have to
1763 // pay an extra cost only for scale != 1.
1764 if (!isAMCompletelyFolded(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind,
1766 return F.Scale != 1;
1769 case LSRUse::Address: {
1770 // Check the scaling factor cost with both the min and max offsets.
1771 int ScaleCostMinOffset = TTI.getScalingFactorCost(
1772 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MinOffset, F.HasBaseReg,
1773 F.Scale, LU.AccessTy.AddrSpace);
1774 int ScaleCostMaxOffset = TTI.getScalingFactorCost(
1775 LU.AccessTy.MemTy, F.BaseGV, F.BaseOffset + LU.MaxOffset, F.HasBaseReg,
1776 F.Scale, LU.AccessTy.AddrSpace);
1778 assert(ScaleCostMinOffset >= 0 && ScaleCostMaxOffset >= 0 &&
1779 "Legal addressing mode has an illegal cost!");
1780 return std::max(ScaleCostMinOffset, ScaleCostMaxOffset);
1782 case LSRUse::ICmpZero:
1784 case LSRUse::Special:
1785 // The use is completely folded, i.e., everything is folded into the
1790 llvm_unreachable("Invalid LSRUse Kind!");
1793 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1794 LSRUse::KindType Kind, MemAccessTy AccessTy,
1795 GlobalValue *BaseGV, int64_t BaseOffset,
1797 // Fast-path: zero is always foldable.
1798 if (BaseOffset == 0 && !BaseGV) return true;
1800 // Conservatively, create an address with an immediate and a
1801 // base and a scale.
1802 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1804 // Canonicalize a scale of 1 to a base register if the formula doesn't
1805 // already have a base register.
1806 if (!HasBaseReg && Scale == 1) {
1811 return isAMCompletelyFolded(TTI, Kind, AccessTy, BaseGV, BaseOffset,
1815 static bool isAlwaysFoldable(const TargetTransformInfo &TTI,
1816 ScalarEvolution &SE, int64_t MinOffset,
1817 int64_t MaxOffset, LSRUse::KindType Kind,
1818 MemAccessTy AccessTy, const SCEV *S,
1820 // Fast-path: zero is always foldable.
1821 if (S->isZero()) return true;
1823 // Conservatively, create an address with an immediate and a
1824 // base and a scale.
1825 int64_t BaseOffset = ExtractImmediate(S, SE);
1826 GlobalValue *BaseGV = ExtractSymbol(S, SE);
1828 // If there's anything else involved, it's not foldable.
1829 if (!S->isZero()) return false;
1831 // Fast-path: zero is always foldable.
1832 if (BaseOffset == 0 && !BaseGV) return true;
1834 // Conservatively, create an address with an immediate and a
1835 // base and a scale.
1836 int64_t Scale = Kind == LSRUse::ICmpZero ? -1 : 1;
1838 return isAMCompletelyFolded(TTI, MinOffset, MaxOffset, Kind, AccessTy, BaseGV,
1839 BaseOffset, HasBaseReg, Scale);
1844 /// An individual increment in a Chain of IV increments. Relate an IV user to
1845 /// an expression that computes the IV it uses from the IV used by the previous
1846 /// link in the Chain.
1848 /// For the head of a chain, IncExpr holds the absolute SCEV expression for the
1849 /// original IVOperand. The head of the chain's IVOperand is only valid during
1850 /// chain collection, before LSR replaces IV users. During chain generation,
1851 /// IncExpr can be used to find the new IVOperand that computes the same
1854 Instruction *UserInst;
1856 const SCEV *IncExpr;
1858 IVInc(Instruction *U, Value *O, const SCEV *E)
1859 : UserInst(U), IVOperand(O), IncExpr(E) {}
1862 // The list of IV increments in program order. We typically add the head of a
1863 // chain without finding subsequent links.
1865 SmallVector<IVInc, 1> Incs;
1866 const SCEV *ExprBase = nullptr;
1868 IVChain() = default;
1869 IVChain(const IVInc &Head, const SCEV *Base)
1870 : Incs(1, Head), ExprBase(Base) {}
1872 using const_iterator = SmallVectorImpl<IVInc>::const_iterator;
1874 // Return the first increment in the chain.
1875 const_iterator begin() const {
1876 assert(!Incs.empty());
1877 return std::next(Incs.begin());
1879 const_iterator end() const {
1883 // Returns true if this chain contains any increments.
1884 bool hasIncs() const { return Incs.size() >= 2; }
1886 // Add an IVInc to the end of this chain.
1887 void add(const IVInc &X) { Incs.push_back(X); }
1889 // Returns the last UserInst in the chain.
1890 Instruction *tailUserInst() const { return Incs.back().UserInst; }
1892 // Returns true if IncExpr can be profitably added to this chain.
1893 bool isProfitableIncrement(const SCEV *OperExpr,
1894 const SCEV *IncExpr,
1898 /// Helper for CollectChains to track multiple IV increment uses. Distinguish
1899 /// between FarUsers that definitely cross IV increments and NearUsers that may
1900 /// be used between IV increments.
1902 SmallPtrSet<Instruction*, 4> FarUsers;
1903 SmallPtrSet<Instruction*, 4> NearUsers;
1906 /// This class holds state for the main loop strength reduction logic.
1909 ScalarEvolution &SE;
1912 AssumptionCache &AC;
1913 TargetLibraryInfo &LibInfo;
1914 const TargetTransformInfo &TTI;
1916 bool FavorBackedgeIndex = false;
1917 bool Changed = false;
1919 /// This is the insert position that the current loop's induction variable
1920 /// increment should be placed. In simple loops, this is the latch block's
1921 /// terminator. But in more complicated cases, this is a position which will
1922 /// dominate all the in-loop post-increment users.
1923 Instruction *IVIncInsertPos = nullptr;
1925 /// Interesting factors between use strides.
1927 /// We explicitly use a SetVector which contains a SmallSet, instead of the
1928 /// default, a SmallDenseSet, because we need to use the full range of
1929 /// int64_ts, and there's currently no good way of doing that with
1931 SetVector<int64_t, SmallVector<int64_t, 8>, SmallSet<int64_t, 8>> Factors;
1933 /// Interesting use types, to facilitate truncation reuse.
1934 SmallSetVector<Type *, 4> Types;
1936 /// The list of interesting uses.
1937 mutable SmallVector<LSRUse, 16> Uses;
1939 /// Track which uses use which register candidates.
1940 RegUseTracker RegUses;
1942 // Limit the number of chains to avoid quadratic behavior. We don't expect to
1943 // have more than a few IV increment chains in a loop. Missing a Chain falls
1944 // back to normal LSR behavior for those uses.
1945 static const unsigned MaxChains = 8;
1947 /// IV users can form a chain of IV increments.
1948 SmallVector<IVChain, MaxChains> IVChainVec;
1950 /// IV users that belong to profitable IVChains.
1951 SmallPtrSet<Use*, MaxChains> IVIncSet;
1953 void OptimizeShadowIV();
1954 bool FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse);
1955 ICmpInst *OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse);
1956 void OptimizeLoopTermCond();
1958 void ChainInstruction(Instruction *UserInst, Instruction *IVOper,
1959 SmallVectorImpl<ChainUsers> &ChainUsersVec);
1960 void FinalizeChain(IVChain &Chain);
1961 void CollectChains();
1962 void GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
1963 SmallVectorImpl<WeakTrackingVH> &DeadInsts);
1965 void CollectInterestingTypesAndFactors();
1966 void CollectFixupsAndInitialFormulae();
1968 // Support for sharing of LSRUses between LSRFixups.
1969 using UseMapTy = DenseMap<LSRUse::SCEVUseKindPair, size_t>;
1972 bool reconcileNewOffset(LSRUse &LU, int64_t NewOffset, bool HasBaseReg,
1973 LSRUse::KindType Kind, MemAccessTy AccessTy);
1975 std::pair<size_t, int64_t> getUse(const SCEV *&Expr, LSRUse::KindType Kind,
1976 MemAccessTy AccessTy);
1978 void DeleteUse(LSRUse &LU, size_t LUIdx);
1980 LSRUse *FindUseWithSimilarFormula(const Formula &F, const LSRUse &OrigLU);
1982 void InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1983 void InsertSupplementalFormula(const SCEV *S, LSRUse &LU, size_t LUIdx);
1984 void CountRegisters(const Formula &F, size_t LUIdx);
1985 bool InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F);
1987 void CollectLoopInvariantFixupsAndFormulae();
1989 void GenerateReassociations(LSRUse &LU, unsigned LUIdx, Formula Base,
1990 unsigned Depth = 0);
1992 void GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
1993 const Formula &Base, unsigned Depth,
1994 size_t Idx, bool IsScaledReg = false);
1995 void GenerateCombinations(LSRUse &LU, unsigned LUIdx, Formula Base);
1996 void GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
1997 const Formula &Base, size_t Idx,
1998 bool IsScaledReg = false);
1999 void GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2000 void GenerateConstantOffsetsImpl(LSRUse &LU, unsigned LUIdx,
2001 const Formula &Base,
2002 const SmallVectorImpl<int64_t> &Worklist,
2003 size_t Idx, bool IsScaledReg = false);
2004 void GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx, Formula Base);
2005 void GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2006 void GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base);
2007 void GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base);
2008 void GenerateCrossUseConstantOffsets();
2009 void GenerateAllReuseFormulae();
2011 void FilterOutUndesirableDedicatedRegisters();
2013 size_t EstimateSearchSpaceComplexity() const;
2014 void NarrowSearchSpaceByDetectingSupersets();
2015 void NarrowSearchSpaceByCollapsingUnrolledCode();
2016 void NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
2017 void NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
2018 void NarrowSearchSpaceByDeletingCostlyFormulas();
2019 void NarrowSearchSpaceByPickingWinnerRegs();
2020 void NarrowSearchSpaceUsingHeuristics();
2022 void SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
2024 SmallVectorImpl<const Formula *> &Workspace,
2025 const Cost &CurCost,
2026 const SmallPtrSet<const SCEV *, 16> &CurRegs,
2027 DenseSet<const SCEV *> &VisitedRegs) const;
2028 void Solve(SmallVectorImpl<const Formula *> &Solution) const;
2030 BasicBlock::iterator
2031 HoistInsertPosition(BasicBlock::iterator IP,
2032 const SmallVectorImpl<Instruction *> &Inputs) const;
2033 BasicBlock::iterator
2034 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
2037 SCEVExpander &Rewriter) const;
2039 Value *Expand(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2040 BasicBlock::iterator IP, SCEVExpander &Rewriter,
2041 SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2042 void RewriteForPHI(PHINode *PN, const LSRUse &LU, const LSRFixup &LF,
2043 const Formula &F, SCEVExpander &Rewriter,
2044 SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2045 void Rewrite(const LSRUse &LU, const LSRFixup &LF, const Formula &F,
2046 SCEVExpander &Rewriter,
2047 SmallVectorImpl<WeakTrackingVH> &DeadInsts) const;
2048 void ImplementSolution(const SmallVectorImpl<const Formula *> &Solution);
2051 LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE, DominatorTree &DT,
2052 LoopInfo &LI, const TargetTransformInfo &TTI, AssumptionCache &AC,
2053 TargetLibraryInfo &LibInfo);
2055 bool getChanged() const { return Changed; }
2057 void print_factors_and_types(raw_ostream &OS) const;
2058 void print_fixups(raw_ostream &OS) const;
2059 void print_uses(raw_ostream &OS) const;
2060 void print(raw_ostream &OS) const;
2064 } // end anonymous namespace
2066 /// If IV is used in a int-to-float cast inside the loop then try to eliminate
2067 /// the cast operation.
2068 void LSRInstance::OptimizeShadowIV() {
2069 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2070 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2073 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end();
2074 UI != E; /* empty */) {
2075 IVUsers::const_iterator CandidateUI = UI;
2077 Instruction *ShadowUse = CandidateUI->getUser();
2078 Type *DestTy = nullptr;
2079 bool IsSigned = false;
2081 /* If shadow use is a int->float cast then insert a second IV
2082 to eliminate this cast.
2084 for (unsigned i = 0; i < n; ++i)
2090 for (unsigned i = 0; i < n; ++i, ++d)
2093 if (UIToFPInst *UCast = dyn_cast<UIToFPInst>(CandidateUI->getUser())) {
2095 DestTy = UCast->getDestTy();
2097 else if (SIToFPInst *SCast = dyn_cast<SIToFPInst>(CandidateUI->getUser())) {
2099 DestTy = SCast->getDestTy();
2101 if (!DestTy) continue;
2103 // If target does not support DestTy natively then do not apply
2104 // this transformation.
2105 if (!TTI.isTypeLegal(DestTy)) continue;
2107 PHINode *PH = dyn_cast<PHINode>(ShadowUse->getOperand(0));
2109 if (PH->getNumIncomingValues() != 2) continue;
2111 // If the calculation in integers overflows, the result in FP type will
2112 // differ. So we only can do this transformation if we are guaranteed to not
2113 // deal with overflowing values
2114 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(SE.getSCEV(PH));
2116 if (IsSigned && !AR->hasNoSignedWrap()) continue;
2117 if (!IsSigned && !AR->hasNoUnsignedWrap()) continue;
2119 Type *SrcTy = PH->getType();
2120 int Mantissa = DestTy->getFPMantissaWidth();
2121 if (Mantissa == -1) continue;
2122 if ((int)SE.getTypeSizeInBits(SrcTy) > Mantissa)
2125 unsigned Entry, Latch;
2126 if (PH->getIncomingBlock(0) == L->getLoopPreheader()) {
2134 ConstantInt *Init = dyn_cast<ConstantInt>(PH->getIncomingValue(Entry));
2135 if (!Init) continue;
2136 Constant *NewInit = ConstantFP::get(DestTy, IsSigned ?
2137 (double)Init->getSExtValue() :
2138 (double)Init->getZExtValue());
2140 BinaryOperator *Incr =
2141 dyn_cast<BinaryOperator>(PH->getIncomingValue(Latch));
2142 if (!Incr) continue;
2143 if (Incr->getOpcode() != Instruction::Add
2144 && Incr->getOpcode() != Instruction::Sub)
2147 /* Initialize new IV, double d = 0.0 in above example. */
2148 ConstantInt *C = nullptr;
2149 if (Incr->getOperand(0) == PH)
2150 C = dyn_cast<ConstantInt>(Incr->getOperand(1));
2151 else if (Incr->getOperand(1) == PH)
2152 C = dyn_cast<ConstantInt>(Incr->getOperand(0));
2158 // Ignore negative constants, as the code below doesn't handle them
2159 // correctly. TODO: Remove this restriction.
2160 if (!C->getValue().isStrictlyPositive()) continue;
2162 /* Add new PHINode. */
2163 PHINode *NewPH = PHINode::Create(DestTy, 2, "IV.S.", PH);
2165 /* create new increment. '++d' in above example. */
2166 Constant *CFP = ConstantFP::get(DestTy, C->getZExtValue());
2167 BinaryOperator *NewIncr =
2168 BinaryOperator::Create(Incr->getOpcode() == Instruction::Add ?
2169 Instruction::FAdd : Instruction::FSub,
2170 NewPH, CFP, "IV.S.next.", Incr);
2172 NewPH->addIncoming(NewInit, PH->getIncomingBlock(Entry));
2173 NewPH->addIncoming(NewIncr, PH->getIncomingBlock(Latch));
2175 /* Remove cast operation */
2176 ShadowUse->replaceAllUsesWith(NewPH);
2177 ShadowUse->eraseFromParent();
2183 /// If Cond has an operand that is an expression of an IV, set the IV user and
2184 /// stride information and return true, otherwise return false.
2185 bool LSRInstance::FindIVUserForCond(ICmpInst *Cond, IVStrideUse *&CondUse) {
2186 for (IVStrideUse &U : IU)
2187 if (U.getUser() == Cond) {
2188 // NOTE: we could handle setcc instructions with multiple uses here, but
2189 // InstCombine does it as well for simple uses, it's not clear that it
2190 // occurs enough in real life to handle.
2197 /// Rewrite the loop's terminating condition if it uses a max computation.
2199 /// This is a narrow solution to a specific, but acute, problem. For loops
2205 /// } while (++i < n);
2207 /// the trip count isn't just 'n', because 'n' might not be positive. And
2208 /// unfortunately this can come up even for loops where the user didn't use
2209 /// a C do-while loop. For example, seemingly well-behaved top-test loops
2210 /// will commonly be lowered like this:
2216 /// } while (++i < n);
2219 /// and then it's possible for subsequent optimization to obscure the if
2220 /// test in such a way that indvars can't find it.
2222 /// When indvars can't find the if test in loops like this, it creates a
2223 /// max expression, which allows it to give the loop a canonical
2224 /// induction variable:
2227 /// max = n < 1 ? 1 : n;
2230 /// } while (++i != max);
2232 /// Canonical induction variables are necessary because the loop passes
2233 /// are designed around them. The most obvious example of this is the
2234 /// LoopInfo analysis, which doesn't remember trip count values. It
2235 /// expects to be able to rediscover the trip count each time it is
2236 /// needed, and it does this using a simple analysis that only succeeds if
2237 /// the loop has a canonical induction variable.
2239 /// However, when it comes time to generate code, the maximum operation
2240 /// can be quite costly, especially if it's inside of an outer loop.
2242 /// This function solves this problem by detecting this type of loop and
2243 /// rewriting their conditions from ICMP_NE back to ICMP_SLT, and deleting
2244 /// the instructions for the maximum computation.
2245 ICmpInst *LSRInstance::OptimizeMax(ICmpInst *Cond, IVStrideUse* &CondUse) {
2246 // Check that the loop matches the pattern we're looking for.
2247 if (Cond->getPredicate() != CmpInst::ICMP_EQ &&
2248 Cond->getPredicate() != CmpInst::ICMP_NE)
2251 SelectInst *Sel = dyn_cast<SelectInst>(Cond->getOperand(1));
2252 if (!Sel || !Sel->hasOneUse()) return Cond;
2254 const SCEV *BackedgeTakenCount = SE.getBackedgeTakenCount(L);
2255 if (isa<SCEVCouldNotCompute>(BackedgeTakenCount))
2257 const SCEV *One = SE.getConstant(BackedgeTakenCount->getType(), 1);
2259 // Add one to the backedge-taken count to get the trip count.
2260 const SCEV *IterationCount = SE.getAddExpr(One, BackedgeTakenCount);
2261 if (IterationCount != SE.getSCEV(Sel)) return Cond;
2263 // Check for a max calculation that matches the pattern. There's no check
2264 // for ICMP_ULE here because the comparison would be with zero, which
2265 // isn't interesting.
2266 CmpInst::Predicate Pred = ICmpInst::BAD_ICMP_PREDICATE;
2267 const SCEVNAryExpr *Max = nullptr;
2268 if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(BackedgeTakenCount)) {
2269 Pred = ICmpInst::ICMP_SLE;
2271 } else if (const SCEVSMaxExpr *S = dyn_cast<SCEVSMaxExpr>(IterationCount)) {
2272 Pred = ICmpInst::ICMP_SLT;
2274 } else if (const SCEVUMaxExpr *U = dyn_cast<SCEVUMaxExpr>(IterationCount)) {
2275 Pred = ICmpInst::ICMP_ULT;
2282 // To handle a max with more than two operands, this optimization would
2283 // require additional checking and setup.
2284 if (Max->getNumOperands() != 2)
2287 const SCEV *MaxLHS = Max->getOperand(0);
2288 const SCEV *MaxRHS = Max->getOperand(1);
2290 // ScalarEvolution canonicalizes constants to the left. For < and >, look
2291 // for a comparison with 1. For <= and >=, a comparison with zero.
2293 (ICmpInst::isTrueWhenEqual(Pred) ? !MaxLHS->isZero() : (MaxLHS != One)))
2296 // Check the relevant induction variable for conformance to
2298 const SCEV *IV = SE.getSCEV(Cond->getOperand(0));
2299 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(IV);
2300 if (!AR || !AR->isAffine() ||
2301 AR->getStart() != One ||
2302 AR->getStepRecurrence(SE) != One)
2305 assert(AR->getLoop() == L &&
2306 "Loop condition operand is an addrec in a different loop!");
2308 // Check the right operand of the select, and remember it, as it will
2309 // be used in the new comparison instruction.
2310 Value *NewRHS = nullptr;
2311 if (ICmpInst::isTrueWhenEqual(Pred)) {
2312 // Look for n+1, and grab n.
2313 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(1)))
2314 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2315 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2316 NewRHS = BO->getOperand(0);
2317 if (AddOperator *BO = dyn_cast<AddOperator>(Sel->getOperand(2)))
2318 if (ConstantInt *BO1 = dyn_cast<ConstantInt>(BO->getOperand(1)))
2319 if (BO1->isOne() && SE.getSCEV(BO->getOperand(0)) == MaxRHS)
2320 NewRHS = BO->getOperand(0);
2323 } else if (SE.getSCEV(Sel->getOperand(1)) == MaxRHS)
2324 NewRHS = Sel->getOperand(1);
2325 else if (SE.getSCEV(Sel->getOperand(2)) == MaxRHS)
2326 NewRHS = Sel->getOperand(2);
2327 else if (const SCEVUnknown *SU = dyn_cast<SCEVUnknown>(MaxRHS))
2328 NewRHS = SU->getValue();
2330 // Max doesn't match expected pattern.
2333 // Determine the new comparison opcode. It may be signed or unsigned,
2334 // and the original comparison may be either equality or inequality.
2335 if (Cond->getPredicate() == CmpInst::ICMP_EQ)
2336 Pred = CmpInst::getInversePredicate(Pred);
2338 // Ok, everything looks ok to change the condition into an SLT or SGE and
2339 // delete the max calculation.
2341 new ICmpInst(Cond, Pred, Cond->getOperand(0), NewRHS, "scmp");
2343 // Delete the max calculation instructions.
2344 Cond->replaceAllUsesWith(NewCond);
2345 CondUse->setUser(NewCond);
2346 Instruction *Cmp = cast<Instruction>(Sel->getOperand(0));
2347 Cond->eraseFromParent();
2348 Sel->eraseFromParent();
2349 if (Cmp->use_empty())
2350 Cmp->eraseFromParent();
2354 /// Change loop terminating condition to use the postinc iv when possible.
2356 LSRInstance::OptimizeLoopTermCond() {
2357 SmallPtrSet<Instruction *, 4> PostIncs;
2359 // We need a different set of heuristics for rotated and non-rotated loops.
2360 // If a loop is rotated then the latch is also the backedge, so inserting
2361 // post-inc expressions just before the latch is ideal. To reduce live ranges
2362 // it also makes sense to rewrite terminating conditions to use post-inc
2365 // If the loop is not rotated then the latch is not a backedge; the latch
2366 // check is done in the loop head. Adding post-inc expressions before the
2367 // latch will cause overlapping live-ranges of pre-inc and post-inc expressions
2368 // in the loop body. In this case we do *not* want to use post-inc expressions
2369 // in the latch check, and we want to insert post-inc expressions before
2371 BasicBlock *LatchBlock = L->getLoopLatch();
2372 SmallVector<BasicBlock*, 8> ExitingBlocks;
2373 L->getExitingBlocks(ExitingBlocks);
2374 if (llvm::all_of(ExitingBlocks, [&LatchBlock](const BasicBlock *BB) {
2375 return LatchBlock != BB;
2377 // The backedge doesn't exit the loop; treat this as a head-tested loop.
2378 IVIncInsertPos = LatchBlock->getTerminator();
2382 // Otherwise treat this as a rotated loop.
2383 for (BasicBlock *ExitingBlock : ExitingBlocks) {
2384 // Get the terminating condition for the loop if possible. If we
2385 // can, we want to change it to use a post-incremented version of its
2386 // induction variable, to allow coalescing the live ranges for the IV into
2387 // one register value.
2389 BranchInst *TermBr = dyn_cast<BranchInst>(ExitingBlock->getTerminator());
2392 // FIXME: Overly conservative, termination condition could be an 'or' etc..
2393 if (TermBr->isUnconditional() || !isa<ICmpInst>(TermBr->getCondition()))
2396 // Search IVUsesByStride to find Cond's IVUse if there is one.
2397 IVStrideUse *CondUse = nullptr;
2398 ICmpInst *Cond = cast<ICmpInst>(TermBr->getCondition());
2399 if (!FindIVUserForCond(Cond, CondUse))
2402 // If the trip count is computed in terms of a max (due to ScalarEvolution
2403 // being unable to find a sufficient guard, for example), change the loop
2404 // comparison to use SLT or ULT instead of NE.
2405 // One consequence of doing this now is that it disrupts the count-down
2406 // optimization. That's not always a bad thing though, because in such
2407 // cases it may still be worthwhile to avoid a max.
2408 Cond = OptimizeMax(Cond, CondUse);
2410 // If this exiting block dominates the latch block, it may also use
2411 // the post-inc value if it won't be shared with other uses.
2412 // Check for dominance.
2413 if (!DT.dominates(ExitingBlock, LatchBlock))
2416 // Conservatively avoid trying to use the post-inc value in non-latch
2417 // exits if there may be pre-inc users in intervening blocks.
2418 if (LatchBlock != ExitingBlock)
2419 for (IVUsers::const_iterator UI = IU.begin(), E = IU.end(); UI != E; ++UI)
2420 // Test if the use is reachable from the exiting block. This dominator
2421 // query is a conservative approximation of reachability.
2422 if (&*UI != CondUse &&
2423 !DT.properlyDominates(UI->getUser()->getParent(), ExitingBlock)) {
2424 // Conservatively assume there may be reuse if the quotient of their
2425 // strides could be a legal scale.
2426 const SCEV *A = IU.getStride(*CondUse, L);
2427 const SCEV *B = IU.getStride(*UI, L);
2428 if (!A || !B) continue;
2429 if (SE.getTypeSizeInBits(A->getType()) !=
2430 SE.getTypeSizeInBits(B->getType())) {
2431 if (SE.getTypeSizeInBits(A->getType()) >
2432 SE.getTypeSizeInBits(B->getType()))
2433 B = SE.getSignExtendExpr(B, A->getType());
2435 A = SE.getSignExtendExpr(A, B->getType());
2437 if (const SCEVConstant *D =
2438 dyn_cast_or_null<SCEVConstant>(getExactSDiv(B, A, SE))) {
2439 const ConstantInt *C = D->getValue();
2440 // Stride of one or negative one can have reuse with non-addresses.
2441 if (C->isOne() || C->isMinusOne())
2442 goto decline_post_inc;
2443 // Avoid weird situations.
2444 if (C->getValue().getMinSignedBits() >= 64 ||
2445 C->getValue().isMinSignedValue())
2446 goto decline_post_inc;
2447 // Check for possible scaled-address reuse.
2448 if (isAddressUse(TTI, UI->getUser(), UI->getOperandValToReplace())) {
2449 MemAccessTy AccessTy = getAccessType(
2450 TTI, UI->getUser(), UI->getOperandValToReplace());
2451 int64_t Scale = C->getSExtValue();
2452 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2454 /*HasBaseReg=*/false, Scale,
2455 AccessTy.AddrSpace))
2456 goto decline_post_inc;
2458 if (TTI.isLegalAddressingMode(AccessTy.MemTy, /*BaseGV=*/nullptr,
2460 /*HasBaseReg=*/false, Scale,
2461 AccessTy.AddrSpace))
2462 goto decline_post_inc;
2467 LLVM_DEBUG(dbgs() << " Change loop exiting icmp to use postinc iv: "
2470 // It's possible for the setcc instruction to be anywhere in the loop, and
2471 // possible for it to have multiple users. If it is not immediately before
2472 // the exiting block branch, move it.
2473 if (&*++BasicBlock::iterator(Cond) != TermBr) {
2474 if (Cond->hasOneUse()) {
2475 Cond->moveBefore(TermBr);
2477 // Clone the terminating condition and insert into the loopend.
2478 ICmpInst *OldCond = Cond;
2479 Cond = cast<ICmpInst>(Cond->clone());
2480 Cond->setName(L->getHeader()->getName() + ".termcond");
2481 ExitingBlock->getInstList().insert(TermBr->getIterator(), Cond);
2483 // Clone the IVUse, as the old use still exists!
2484 CondUse = &IU.AddUser(Cond, CondUse->getOperandValToReplace());
2485 TermBr->replaceUsesOfWith(OldCond, Cond);
2489 // If we get to here, we know that we can transform the setcc instruction to
2490 // use the post-incremented version of the IV, allowing us to coalesce the
2491 // live ranges for the IV correctly.
2492 CondUse->transformToPostInc(L);
2495 PostIncs.insert(Cond);
2499 // Determine an insertion point for the loop induction variable increment. It
2500 // must dominate all the post-inc comparisons we just set up, and it must
2501 // dominate the loop latch edge.
2502 IVIncInsertPos = L->getLoopLatch()->getTerminator();
2503 for (Instruction *Inst : PostIncs) {
2505 DT.findNearestCommonDominator(IVIncInsertPos->getParent(),
2507 if (BB == Inst->getParent())
2508 IVIncInsertPos = Inst;
2509 else if (BB != IVIncInsertPos->getParent())
2510 IVIncInsertPos = BB->getTerminator();
2514 /// Determine if the given use can accommodate a fixup at the given offset and
2515 /// other details. If so, update the use and return true.
2516 bool LSRInstance::reconcileNewOffset(LSRUse &LU, int64_t NewOffset,
2517 bool HasBaseReg, LSRUse::KindType Kind,
2518 MemAccessTy AccessTy) {
2519 int64_t NewMinOffset = LU.MinOffset;
2520 int64_t NewMaxOffset = LU.MaxOffset;
2521 MemAccessTy NewAccessTy = AccessTy;
2523 // Check for a mismatched kind. It's tempting to collapse mismatched kinds to
2524 // something conservative, however this can pessimize in the case that one of
2525 // the uses will have all its uses outside the loop, for example.
2526 if (LU.Kind != Kind)
2529 // Check for a mismatched access type, and fall back conservatively as needed.
2530 // TODO: Be less conservative when the type is similar and can use the same
2531 // addressing modes.
2532 if (Kind == LSRUse::Address) {
2533 if (AccessTy.MemTy != LU.AccessTy.MemTy) {
2534 NewAccessTy = MemAccessTy::getUnknown(AccessTy.MemTy->getContext(),
2535 AccessTy.AddrSpace);
2539 // Conservatively assume HasBaseReg is true for now.
2540 if (NewOffset < LU.MinOffset) {
2541 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2542 LU.MaxOffset - NewOffset, HasBaseReg))
2544 NewMinOffset = NewOffset;
2545 } else if (NewOffset > LU.MaxOffset) {
2546 if (!isAlwaysFoldable(TTI, Kind, NewAccessTy, /*BaseGV=*/nullptr,
2547 NewOffset - LU.MinOffset, HasBaseReg))
2549 NewMaxOffset = NewOffset;
2553 LU.MinOffset = NewMinOffset;
2554 LU.MaxOffset = NewMaxOffset;
2555 LU.AccessTy = NewAccessTy;
2559 /// Return an LSRUse index and an offset value for a fixup which needs the given
2560 /// expression, with the given kind and optional access type. Either reuse an
2561 /// existing use or create a new one, as needed.
2562 std::pair<size_t, int64_t> LSRInstance::getUse(const SCEV *&Expr,
2563 LSRUse::KindType Kind,
2564 MemAccessTy AccessTy) {
2565 const SCEV *Copy = Expr;
2566 int64_t Offset = ExtractImmediate(Expr, SE);
2568 // Basic uses can't accept any offset, for example.
2569 if (!isAlwaysFoldable(TTI, Kind, AccessTy, /*BaseGV=*/ nullptr,
2570 Offset, /*HasBaseReg=*/ true)) {
2575 std::pair<UseMapTy::iterator, bool> P =
2576 UseMap.insert(std::make_pair(LSRUse::SCEVUseKindPair(Expr, Kind), 0));
2578 // A use already existed with this base.
2579 size_t LUIdx = P.first->second;
2580 LSRUse &LU = Uses[LUIdx];
2581 if (reconcileNewOffset(LU, Offset, /*HasBaseReg=*/true, Kind, AccessTy))
2583 return std::make_pair(LUIdx, Offset);
2586 // Create a new use.
2587 size_t LUIdx = Uses.size();
2588 P.first->second = LUIdx;
2589 Uses.push_back(LSRUse(Kind, AccessTy));
2590 LSRUse &LU = Uses[LUIdx];
2592 LU.MinOffset = Offset;
2593 LU.MaxOffset = Offset;
2594 return std::make_pair(LUIdx, Offset);
2597 /// Delete the given use from the Uses list.
2598 void LSRInstance::DeleteUse(LSRUse &LU, size_t LUIdx) {
2599 if (&LU != &Uses.back())
2600 std::swap(LU, Uses.back());
2604 RegUses.swapAndDropUse(LUIdx, Uses.size());
2607 /// Look for a use distinct from OrigLU which is has a formula that has the same
2608 /// registers as the given formula.
2610 LSRInstance::FindUseWithSimilarFormula(const Formula &OrigF,
2611 const LSRUse &OrigLU) {
2612 // Search all uses for the formula. This could be more clever.
2613 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
2614 LSRUse &LU = Uses[LUIdx];
2615 // Check whether this use is close enough to OrigLU, to see whether it's
2616 // worthwhile looking through its formulae.
2617 // Ignore ICmpZero uses because they may contain formulae generated by
2618 // GenerateICmpZeroScales, in which case adding fixup offsets may
2620 if (&LU != &OrigLU &&
2621 LU.Kind != LSRUse::ICmpZero &&
2622 LU.Kind == OrigLU.Kind && OrigLU.AccessTy == LU.AccessTy &&
2623 LU.WidestFixupType == OrigLU.WidestFixupType &&
2624 LU.HasFormulaWithSameRegs(OrigF)) {
2625 // Scan through this use's formulae.
2626 for (const Formula &F : LU.Formulae) {
2627 // Check to see if this formula has the same registers and symbols
2629 if (F.BaseRegs == OrigF.BaseRegs &&
2630 F.ScaledReg == OrigF.ScaledReg &&
2631 F.BaseGV == OrigF.BaseGV &&
2632 F.Scale == OrigF.Scale &&
2633 F.UnfoldedOffset == OrigF.UnfoldedOffset) {
2634 if (F.BaseOffset == 0)
2636 // This is the formula where all the registers and symbols matched;
2637 // there aren't going to be any others. Since we declined it, we
2638 // can skip the rest of the formulae and proceed to the next LSRUse.
2645 // Nothing looked good.
2649 void LSRInstance::CollectInterestingTypesAndFactors() {
2650 SmallSetVector<const SCEV *, 4> Strides;
2652 // Collect interesting types and strides.
2653 SmallVector<const SCEV *, 4> Worklist;
2654 for (const IVStrideUse &U : IU) {
2655 const SCEV *Expr = IU.getExpr(U);
2657 // Collect interesting types.
2658 Types.insert(SE.getEffectiveSCEVType(Expr->getType()));
2660 // Add strides for mentioned loops.
2661 Worklist.push_back(Expr);
2663 const SCEV *S = Worklist.pop_back_val();
2664 if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
2665 if (AR->getLoop() == L)
2666 Strides.insert(AR->getStepRecurrence(SE));
2667 Worklist.push_back(AR->getStart());
2668 } else if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
2669 Worklist.append(Add->op_begin(), Add->op_end());
2671 } while (!Worklist.empty());
2674 // Compute interesting factors from the set of interesting strides.
2675 for (SmallSetVector<const SCEV *, 4>::const_iterator
2676 I = Strides.begin(), E = Strides.end(); I != E; ++I)
2677 for (SmallSetVector<const SCEV *, 4>::const_iterator NewStrideIter =
2678 std::next(I); NewStrideIter != E; ++NewStrideIter) {
2679 const SCEV *OldStride = *I;
2680 const SCEV *NewStride = *NewStrideIter;
2682 if (SE.getTypeSizeInBits(OldStride->getType()) !=
2683 SE.getTypeSizeInBits(NewStride->getType())) {
2684 if (SE.getTypeSizeInBits(OldStride->getType()) >
2685 SE.getTypeSizeInBits(NewStride->getType()))
2686 NewStride = SE.getSignExtendExpr(NewStride, OldStride->getType());
2688 OldStride = SE.getSignExtendExpr(OldStride, NewStride->getType());
2690 if (const SCEVConstant *Factor =
2691 dyn_cast_or_null<SCEVConstant>(getExactSDiv(NewStride, OldStride,
2693 if (Factor->getAPInt().getMinSignedBits() <= 64)
2694 Factors.insert(Factor->getAPInt().getSExtValue());
2695 } else if (const SCEVConstant *Factor =
2696 dyn_cast_or_null<SCEVConstant>(getExactSDiv(OldStride,
2699 if (Factor->getAPInt().getMinSignedBits() <= 64)
2700 Factors.insert(Factor->getAPInt().getSExtValue());
2704 // If all uses use the same type, don't bother looking for truncation-based
2706 if (Types.size() == 1)
2709 LLVM_DEBUG(print_factors_and_types(dbgs()));
2712 /// Helper for CollectChains that finds an IV operand (computed by an AddRec in
2713 /// this loop) within [OI,OE) or returns OE. If IVUsers mapped Instructions to
2714 /// IVStrideUses, we could partially skip this.
2715 static User::op_iterator
2716 findIVOperand(User::op_iterator OI, User::op_iterator OE,
2717 Loop *L, ScalarEvolution &SE) {
2718 for(; OI != OE; ++OI) {
2719 if (Instruction *Oper = dyn_cast<Instruction>(*OI)) {
2720 if (!SE.isSCEVable(Oper->getType()))
2723 if (const SCEVAddRecExpr *AR =
2724 dyn_cast<SCEVAddRecExpr>(SE.getSCEV(Oper))) {
2725 if (AR->getLoop() == L)
2733 /// IVChain logic must consistently peek base TruncInst operands, so wrap it in
2734 /// a convenient helper.
2735 static Value *getWideOperand(Value *Oper) {
2736 if (TruncInst *Trunc = dyn_cast<TruncInst>(Oper))
2737 return Trunc->getOperand(0);
2741 /// Return true if we allow an IV chain to include both types.
2742 static bool isCompatibleIVType(Value *LVal, Value *RVal) {
2743 Type *LType = LVal->getType();
2744 Type *RType = RVal->getType();
2745 return (LType == RType) || (LType->isPointerTy() && RType->isPointerTy() &&
2746 // Different address spaces means (possibly)
2747 // different types of the pointer implementation,
2748 // e.g. i16 vs i32 so disallow that.
2749 (LType->getPointerAddressSpace() ==
2750 RType->getPointerAddressSpace()));
2753 /// Return an approximation of this SCEV expression's "base", or NULL for any
2754 /// constant. Returning the expression itself is conservative. Returning a
2755 /// deeper subexpression is more precise and valid as long as it isn't less
2756 /// complex than another subexpression. For expressions involving multiple
2757 /// unscaled values, we need to return the pointer-type SCEVUnknown. This avoids
2758 /// forming chains across objects, such as: PrevOper==a[i], IVOper==b[i],
2761 /// Since SCEVUnknown is the rightmost type, and pointers are the rightmost
2762 /// SCEVUnknown, we simply return the rightmost SCEV operand.
2763 static const SCEV *getExprBase(const SCEV *S) {
2764 switch (S->getSCEVType()) {
2765 default: // uncluding scUnknown.
2770 return getExprBase(cast<SCEVTruncateExpr>(S)->getOperand());
2772 return getExprBase(cast<SCEVZeroExtendExpr>(S)->getOperand());
2774 return getExprBase(cast<SCEVSignExtendExpr>(S)->getOperand());
2776 // Skip over scaled operands (scMulExpr) to follow add operands as long as
2777 // there's nothing more complex.
2778 // FIXME: not sure if we want to recognize negation.
2779 const SCEVAddExpr *Add = cast<SCEVAddExpr>(S);
2780 for (std::reverse_iterator<SCEVAddExpr::op_iterator> I(Add->op_end()),
2781 E(Add->op_begin()); I != E; ++I) {
2782 const SCEV *SubExpr = *I;
2783 if (SubExpr->getSCEVType() == scAddExpr)
2784 return getExprBase(SubExpr);
2786 if (SubExpr->getSCEVType() != scMulExpr)
2789 return S; // all operands are scaled, be conservative.
2792 return getExprBase(cast<SCEVAddRecExpr>(S)->getStart());
2796 /// Return true if the chain increment is profitable to expand into a loop
2797 /// invariant value, which may require its own register. A profitable chain
2798 /// increment will be an offset relative to the same base. We allow such offsets
2799 /// to potentially be used as chain increment as long as it's not obviously
2800 /// expensive to expand using real instructions.
2801 bool IVChain::isProfitableIncrement(const SCEV *OperExpr,
2802 const SCEV *IncExpr,
2803 ScalarEvolution &SE) {
2804 // Aggressively form chains when -stress-ivchain.
2808 // Do not replace a constant offset from IV head with a nonconstant IV
2810 if (!isa<SCEVConstant>(IncExpr)) {
2811 const SCEV *HeadExpr = SE.getSCEV(getWideOperand(Incs[0].IVOperand));
2812 if (isa<SCEVConstant>(SE.getMinusSCEV(OperExpr, HeadExpr)))
2816 SmallPtrSet<const SCEV*, 8> Processed;
2817 return !isHighCostExpansion(IncExpr, Processed, SE);
2820 /// Return true if the number of registers needed for the chain is estimated to
2821 /// be less than the number required for the individual IV users. First prohibit
2822 /// any IV users that keep the IV live across increments (the Users set should
2823 /// be empty). Next count the number and type of increments in the chain.
2825 /// Chaining IVs can lead to considerable code bloat if ISEL doesn't
2826 /// effectively use postinc addressing modes. Only consider it profitable it the
2827 /// increments can be computed in fewer registers when chained.
2829 /// TODO: Consider IVInc free if it's already used in another chains.
2831 isProfitableChain(IVChain &Chain, SmallPtrSetImpl<Instruction*> &Users,
2832 ScalarEvolution &SE) {
2836 if (!Chain.hasIncs())
2839 if (!Users.empty()) {
2840 LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " users:\n";
2841 for (Instruction *Inst
2842 : Users) { dbgs() << " " << *Inst << "\n"; });
2845 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
2847 // The chain itself may require a register, so intialize cost to 1.
2850 // A complete chain likely eliminates the need for keeping the original IV in
2851 // a register. LSR does not currently know how to form a complete chain unless
2852 // the header phi already exists.
2853 if (isa<PHINode>(Chain.tailUserInst())
2854 && SE.getSCEV(Chain.tailUserInst()) == Chain.Incs[0].IncExpr) {
2857 const SCEV *LastIncExpr = nullptr;
2858 unsigned NumConstIncrements = 0;
2859 unsigned NumVarIncrements = 0;
2860 unsigned NumReusedIncrements = 0;
2861 for (const IVInc &Inc : Chain) {
2862 if (Inc.IncExpr->isZero())
2865 // Incrementing by zero or some constant is neutral. We assume constants can
2866 // be folded into an addressing mode or an add's immediate operand.
2867 if (isa<SCEVConstant>(Inc.IncExpr)) {
2868 ++NumConstIncrements;
2872 if (Inc.IncExpr == LastIncExpr)
2873 ++NumReusedIncrements;
2877 LastIncExpr = Inc.IncExpr;
2879 // An IV chain with a single increment is handled by LSR's postinc
2880 // uses. However, a chain with multiple increments requires keeping the IV's
2881 // value live longer than it needs to be if chained.
2882 if (NumConstIncrements > 1)
2885 // Materializing increment expressions in the preheader that didn't exist in
2886 // the original code may cost a register. For example, sign-extended array
2887 // indices can produce ridiculous increments like this:
2888 // IV + ((sext i32 (2 * %s) to i64) + (-1 * (sext i32 %s to i64)))
2889 cost += NumVarIncrements;
2891 // Reusing variable increments likely saves a register to hold the multiple of
2893 cost -= NumReusedIncrements;
2895 LLVM_DEBUG(dbgs() << "Chain: " << *Chain.Incs[0].UserInst << " Cost: " << cost
2901 /// Add this IV user to an existing chain or make it the head of a new chain.
2902 void LSRInstance::ChainInstruction(Instruction *UserInst, Instruction *IVOper,
2903 SmallVectorImpl<ChainUsers> &ChainUsersVec) {
2904 // When IVs are used as types of varying widths, they are generally converted
2905 // to a wider type with some uses remaining narrow under a (free) trunc.
2906 Value *const NextIV = getWideOperand(IVOper);
2907 const SCEV *const OperExpr = SE.getSCEV(NextIV);
2908 const SCEV *const OperExprBase = getExprBase(OperExpr);
2910 // Visit all existing chains. Check if its IVOper can be computed as a
2911 // profitable loop invariant increment from the last link in the Chain.
2912 unsigned ChainIdx = 0, NChains = IVChainVec.size();
2913 const SCEV *LastIncExpr = nullptr;
2914 for (; ChainIdx < NChains; ++ChainIdx) {
2915 IVChain &Chain = IVChainVec[ChainIdx];
2917 // Prune the solution space aggressively by checking that both IV operands
2918 // are expressions that operate on the same unscaled SCEVUnknown. This
2919 // "base" will be canceled by the subsequent getMinusSCEV call. Checking
2920 // first avoids creating extra SCEV expressions.
2921 if (!StressIVChain && Chain.ExprBase != OperExprBase)
2924 Value *PrevIV = getWideOperand(Chain.Incs.back().IVOperand);
2925 if (!isCompatibleIVType(PrevIV, NextIV))
2928 // A phi node terminates a chain.
2929 if (isa<PHINode>(UserInst) && isa<PHINode>(Chain.tailUserInst()))
2932 // The increment must be loop-invariant so it can be kept in a register.
2933 const SCEV *PrevExpr = SE.getSCEV(PrevIV);
2934 const SCEV *IncExpr = SE.getMinusSCEV(OperExpr, PrevExpr);
2935 if (!SE.isLoopInvariant(IncExpr, L))
2938 if (Chain.isProfitableIncrement(OperExpr, IncExpr, SE)) {
2939 LastIncExpr = IncExpr;
2943 // If we haven't found a chain, create a new one, unless we hit the max. Don't
2944 // bother for phi nodes, because they must be last in the chain.
2945 if (ChainIdx == NChains) {
2946 if (isa<PHINode>(UserInst))
2948 if (NChains >= MaxChains && !StressIVChain) {
2949 LLVM_DEBUG(dbgs() << "IV Chain Limit\n");
2952 LastIncExpr = OperExpr;
2953 // IVUsers may have skipped over sign/zero extensions. We don't currently
2954 // attempt to form chains involving extensions unless they can be hoisted
2955 // into this loop's AddRec.
2956 if (!isa<SCEVAddRecExpr>(LastIncExpr))
2959 IVChainVec.push_back(IVChain(IVInc(UserInst, IVOper, LastIncExpr),
2961 ChainUsersVec.resize(NChains);
2962 LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Head: (" << *UserInst
2963 << ") IV=" << *LastIncExpr << "\n");
2965 LLVM_DEBUG(dbgs() << "IV Chain#" << ChainIdx << " Inc: (" << *UserInst
2966 << ") IV+" << *LastIncExpr << "\n");
2967 // Add this IV user to the end of the chain.
2968 IVChainVec[ChainIdx].add(IVInc(UserInst, IVOper, LastIncExpr));
2970 IVChain &Chain = IVChainVec[ChainIdx];
2972 SmallPtrSet<Instruction*,4> &NearUsers = ChainUsersVec[ChainIdx].NearUsers;
2973 // This chain's NearUsers become FarUsers.
2974 if (!LastIncExpr->isZero()) {
2975 ChainUsersVec[ChainIdx].FarUsers.insert(NearUsers.begin(),
2980 // All other uses of IVOperand become near uses of the chain.
2981 // We currently ignore intermediate values within SCEV expressions, assuming
2982 // they will eventually be used be the current chain, or can be computed
2983 // from one of the chain increments. To be more precise we could
2984 // transitively follow its user and only add leaf IV users to the set.
2985 for (User *U : IVOper->users()) {
2986 Instruction *OtherUse = dyn_cast<Instruction>(U);
2989 // Uses in the chain will no longer be uses if the chain is formed.
2990 // Include the head of the chain in this iteration (not Chain.begin()).
2991 IVChain::const_iterator IncIter = Chain.Incs.begin();
2992 IVChain::const_iterator IncEnd = Chain.Incs.end();
2993 for( ; IncIter != IncEnd; ++IncIter) {
2994 if (IncIter->UserInst == OtherUse)
2997 if (IncIter != IncEnd)
3000 if (SE.isSCEVable(OtherUse->getType())
3001 && !isa<SCEVUnknown>(SE.getSCEV(OtherUse))
3002 && IU.isIVUserOrOperand(OtherUse)) {
3005 NearUsers.insert(OtherUse);
3008 // Since this user is part of the chain, it's no longer considered a use
3010 ChainUsersVec[ChainIdx].FarUsers.erase(UserInst);
3013 /// Populate the vector of Chains.
3015 /// This decreases ILP at the architecture level. Targets with ample registers,
3016 /// multiple memory ports, and no register renaming probably don't want
3017 /// this. However, such targets should probably disable LSR altogether.
3019 /// The job of LSR is to make a reasonable choice of induction variables across
3020 /// the loop. Subsequent passes can easily "unchain" computation exposing more
3021 /// ILP *within the loop* if the target wants it.
3023 /// Finding the best IV chain is potentially a scheduling problem. Since LSR
3024 /// will not reorder memory operations, it will recognize this as a chain, but
3025 /// will generate redundant IV increments. Ideally this would be corrected later
3026 /// by a smart scheduler:
3032 /// TODO: Walk the entire domtree within this loop, not just the path to the
3033 /// loop latch. This will discover chains on side paths, but requires
3034 /// maintaining multiple copies of the Chains state.
3035 void LSRInstance::CollectChains() {
3036 LLVM_DEBUG(dbgs() << "Collecting IV Chains.\n");
3037 SmallVector<ChainUsers, 8> ChainUsersVec;
3039 SmallVector<BasicBlock *,8> LatchPath;
3040 BasicBlock *LoopHeader = L->getHeader();
3041 for (DomTreeNode *Rung = DT.getNode(L->getLoopLatch());
3042 Rung->getBlock() != LoopHeader; Rung = Rung->getIDom()) {
3043 LatchPath.push_back(Rung->getBlock());
3045 LatchPath.push_back(LoopHeader);
3047 // Walk the instruction stream from the loop header to the loop latch.
3048 for (BasicBlock *BB : reverse(LatchPath)) {
3049 for (Instruction &I : *BB) {
3050 // Skip instructions that weren't seen by IVUsers analysis.
3051 if (isa<PHINode>(I) || !IU.isIVUserOrOperand(&I))
3054 // Ignore users that are part of a SCEV expression. This way we only
3055 // consider leaf IV Users. This effectively rediscovers a portion of
3056 // IVUsers analysis but in program order this time.
3057 if (SE.isSCEVable(I.getType()) && !isa<SCEVUnknown>(SE.getSCEV(&I)))
3060 // Remove this instruction from any NearUsers set it may be in.
3061 for (unsigned ChainIdx = 0, NChains = IVChainVec.size();
3062 ChainIdx < NChains; ++ChainIdx) {
3063 ChainUsersVec[ChainIdx].NearUsers.erase(&I);
3065 // Search for operands that can be chained.
3066 SmallPtrSet<Instruction*, 4> UniqueOperands;
3067 User::op_iterator IVOpEnd = I.op_end();
3068 User::op_iterator IVOpIter = findIVOperand(I.op_begin(), IVOpEnd, L, SE);
3069 while (IVOpIter != IVOpEnd) {
3070 Instruction *IVOpInst = cast<Instruction>(*IVOpIter);
3071 if (UniqueOperands.insert(IVOpInst).second)
3072 ChainInstruction(&I, IVOpInst, ChainUsersVec);
3073 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3075 } // Continue walking down the instructions.
3076 } // Continue walking down the domtree.
3077 // Visit phi backedges to determine if the chain can generate the IV postinc.
3078 for (PHINode &PN : L->getHeader()->phis()) {
3079 if (!SE.isSCEVable(PN.getType()))
3083 dyn_cast<Instruction>(PN.getIncomingValueForBlock(L->getLoopLatch()));
3085 ChainInstruction(&PN, IncV, ChainUsersVec);
3087 // Remove any unprofitable chains.
3088 unsigned ChainIdx = 0;
3089 for (unsigned UsersIdx = 0, NChains = IVChainVec.size();
3090 UsersIdx < NChains; ++UsersIdx) {
3091 if (!isProfitableChain(IVChainVec[UsersIdx],
3092 ChainUsersVec[UsersIdx].FarUsers, SE))
3094 // Preserve the chain at UsesIdx.
3095 if (ChainIdx != UsersIdx)
3096 IVChainVec[ChainIdx] = IVChainVec[UsersIdx];
3097 FinalizeChain(IVChainVec[ChainIdx]);
3100 IVChainVec.resize(ChainIdx);
3103 void LSRInstance::FinalizeChain(IVChain &Chain) {
3104 assert(!Chain.Incs.empty() && "empty IV chains are not allowed");
3105 LLVM_DEBUG(dbgs() << "Final Chain: " << *Chain.Incs[0].UserInst << "\n");
3107 for (const IVInc &Inc : Chain) {
3108 LLVM_DEBUG(dbgs() << " Inc: " << *Inc.UserInst << "\n");
3109 auto UseI = find(Inc.UserInst->operands(), Inc.IVOperand);
3110 assert(UseI != Inc.UserInst->op_end() && "cannot find IV operand");
3111 IVIncSet.insert(UseI);
3115 /// Return true if the IVInc can be folded into an addressing mode.
3116 static bool canFoldIVIncExpr(const SCEV *IncExpr, Instruction *UserInst,
3117 Value *Operand, const TargetTransformInfo &TTI) {
3118 const SCEVConstant *IncConst = dyn_cast<SCEVConstant>(IncExpr);
3119 if (!IncConst || !isAddressUse(TTI, UserInst, Operand))
3122 if (IncConst->getAPInt().getMinSignedBits() > 64)
3125 MemAccessTy AccessTy = getAccessType(TTI, UserInst, Operand);
3126 int64_t IncOffset = IncConst->getValue()->getSExtValue();
3127 if (!isAlwaysFoldable(TTI, LSRUse::Address, AccessTy, /*BaseGV=*/nullptr,
3128 IncOffset, /*HasBaseReg=*/false))
3134 /// Generate an add or subtract for each IVInc in a chain to materialize the IV
3135 /// user's operand from the previous IV user's operand.
3136 void LSRInstance::GenerateIVChain(const IVChain &Chain, SCEVExpander &Rewriter,
3137 SmallVectorImpl<WeakTrackingVH> &DeadInsts) {
3138 // Find the new IVOperand for the head of the chain. It may have been replaced
3140 const IVInc &Head = Chain.Incs[0];
3141 User::op_iterator IVOpEnd = Head.UserInst->op_end();
3142 // findIVOperand returns IVOpEnd if it can no longer find a valid IV user.
3143 User::op_iterator IVOpIter = findIVOperand(Head.UserInst->op_begin(),
3145 Value *IVSrc = nullptr;
3146 while (IVOpIter != IVOpEnd) {
3147 IVSrc = getWideOperand(*IVOpIter);
3149 // If this operand computes the expression that the chain needs, we may use
3150 // it. (Check this after setting IVSrc which is used below.)
3152 // Note that if Head.IncExpr is wider than IVSrc, then this phi is too
3153 // narrow for the chain, so we can no longer use it. We do allow using a
3154 // wider phi, assuming the LSR checked for free truncation. In that case we
3155 // should already have a truncate on this operand such that
3156 // getSCEV(IVSrc) == IncExpr.
3157 if (SE.getSCEV(*IVOpIter) == Head.IncExpr
3158 || SE.getSCEV(IVSrc) == Head.IncExpr) {
3161 IVOpIter = findIVOperand(std::next(IVOpIter), IVOpEnd, L, SE);
3163 if (IVOpIter == IVOpEnd) {
3164 // Gracefully give up on this chain.
3165 LLVM_DEBUG(dbgs() << "Concealed chain head: " << *Head.UserInst << "\n");
3169 LLVM_DEBUG(dbgs() << "Generate chain at: " << *IVSrc << "\n");
3170 Type *IVTy = IVSrc->getType();
3171 Type *IntTy = SE.getEffectiveSCEVType(IVTy);
3172 const SCEV *LeftOverExpr = nullptr;
3173 for (const IVInc &Inc : Chain) {
3174 Instruction *InsertPt = Inc.UserInst;
3175 if (isa<PHINode>(InsertPt))
3176 InsertPt = L->getLoopLatch()->getTerminator();
3178 // IVOper will replace the current IV User's operand. IVSrc is the IV
3179 // value currently held in a register.
3180 Value *IVOper = IVSrc;
3181 if (!Inc.IncExpr->isZero()) {
3182 // IncExpr was the result of subtraction of two narrow values, so must
3184 const SCEV *IncExpr = SE.getNoopOrSignExtend(Inc.IncExpr, IntTy);
3185 LeftOverExpr = LeftOverExpr ?
3186 SE.getAddExpr(LeftOverExpr, IncExpr) : IncExpr;
3188 if (LeftOverExpr && !LeftOverExpr->isZero()) {
3189 // Expand the IV increment.
3190 Rewriter.clearPostInc();
3191 Value *IncV = Rewriter.expandCodeFor(LeftOverExpr, IntTy, InsertPt);
3192 const SCEV *IVOperExpr = SE.getAddExpr(SE.getUnknown(IVSrc),
3193 SE.getUnknown(IncV));
3194 IVOper = Rewriter.expandCodeFor(IVOperExpr, IVTy, InsertPt);
3196 // If an IV increment can't be folded, use it as the next IV value.
3197 if (!canFoldIVIncExpr(LeftOverExpr, Inc.UserInst, Inc.IVOperand, TTI)) {
3198 assert(IVTy == IVOper->getType() && "inconsistent IV increment type");
3200 LeftOverExpr = nullptr;
3203 Type *OperTy = Inc.IVOperand->getType();
3204 if (IVTy != OperTy) {
3205 assert(SE.getTypeSizeInBits(IVTy) >= SE.getTypeSizeInBits(OperTy) &&
3206 "cannot extend a chained IV");
3207 IRBuilder<> Builder(InsertPt);
3208 IVOper = Builder.CreateTruncOrBitCast(IVOper, OperTy, "lsr.chain");
3210 Inc.UserInst->replaceUsesOfWith(Inc.IVOperand, IVOper);
3211 DeadInsts.emplace_back(Inc.IVOperand);
3213 // If LSR created a new, wider phi, we may also replace its postinc. We only
3214 // do this if we also found a wide value for the head of the chain.
3215 if (isa<PHINode>(Chain.tailUserInst())) {
3216 for (PHINode &Phi : L->getHeader()->phis()) {
3217 if (!isCompatibleIVType(&Phi, IVSrc))
3219 Instruction *PostIncV = dyn_cast<Instruction>(
3220 Phi.getIncomingValueForBlock(L->getLoopLatch()));
3221 if (!PostIncV || (SE.getSCEV(PostIncV) != SE.getSCEV(IVSrc)))
3223 Value *IVOper = IVSrc;
3224 Type *PostIncTy = PostIncV->getType();
3225 if (IVTy != PostIncTy) {
3226 assert(PostIncTy->isPointerTy() && "mixing int/ptr IV types");
3227 IRBuilder<> Builder(L->getLoopLatch()->getTerminator());
3228 Builder.SetCurrentDebugLocation(PostIncV->getDebugLoc());
3229 IVOper = Builder.CreatePointerCast(IVSrc, PostIncTy, "lsr.chain");
3231 Phi.replaceUsesOfWith(PostIncV, IVOper);
3232 DeadInsts.emplace_back(PostIncV);
3237 void LSRInstance::CollectFixupsAndInitialFormulae() {
3238 BranchInst *ExitBranch = nullptr;
3239 bool SaveCmp = TTI.canSaveCmp(L, &ExitBranch, &SE, &LI, &DT, &AC, &LibInfo);
3241 for (const IVStrideUse &U : IU) {
3242 Instruction *UserInst = U.getUser();
3243 // Skip IV users that are part of profitable IV Chains.
3244 User::op_iterator UseI =
3245 find(UserInst->operands(), U.getOperandValToReplace());
3246 assert(UseI != UserInst->op_end() && "cannot find IV operand");
3247 if (IVIncSet.count(UseI)) {
3248 LLVM_DEBUG(dbgs() << "Use is in profitable chain: " << **UseI << '\n');
3252 LSRUse::KindType Kind = LSRUse::Basic;
3253 MemAccessTy AccessTy;
3254 if (isAddressUse(TTI, UserInst, U.getOperandValToReplace())) {
3255 Kind = LSRUse::Address;
3256 AccessTy = getAccessType(TTI, UserInst, U.getOperandValToReplace());
3259 const SCEV *S = IU.getExpr(U);
3260 PostIncLoopSet TmpPostIncLoops = U.getPostIncLoops();
3262 // Equality (== and !=) ICmps are special. We can rewrite (i == N) as
3263 // (N - i == 0), and this allows (N - i) to be the expression that we work
3264 // with rather than just N or i, so we can consider the register
3265 // requirements for both N and i at the same time. Limiting this code to
3266 // equality icmps is not a problem because all interesting loops use
3267 // equality icmps, thanks to IndVarSimplify.
3268 if (ICmpInst *CI = dyn_cast<ICmpInst>(UserInst))
3269 if (CI->isEquality()) {
3270 // If CI can be saved in some target, like replaced inside hardware loop
3271 // in PowerPC, no need to generate initial formulae for it.
3272 if (SaveCmp && CI == dyn_cast<ICmpInst>(ExitBranch->getCondition()))
3274 // Swap the operands if needed to put the OperandValToReplace on the
3275 // left, for consistency.
3276 Value *NV = CI->getOperand(1);
3277 if (NV == U.getOperandValToReplace()) {
3278 CI->setOperand(1, CI->getOperand(0));
3279 CI->setOperand(0, NV);
3280 NV = CI->getOperand(1);
3284 // x == y --> x - y == 0
3285 const SCEV *N = SE.getSCEV(NV);
3286 if (SE.isLoopInvariant(N, L) && isSafeToExpand(N, SE)) {
3287 // S is normalized, so normalize N before folding it into S
3288 // to keep the result normalized.
3289 N = normalizeForPostIncUse(N, TmpPostIncLoops, SE);
3290 Kind = LSRUse::ICmpZero;
3291 S = SE.getMinusSCEV(N, S);
3294 // -1 and the negations of all interesting strides (except the negation
3295 // of -1) are now also interesting.
3296 for (size_t i = 0, e = Factors.size(); i != e; ++i)
3297 if (Factors[i] != -1)
3298 Factors.insert(-(uint64_t)Factors[i]);
3302 // Get or create an LSRUse.
3303 std::pair<size_t, int64_t> P = getUse(S, Kind, AccessTy);
3304 size_t LUIdx = P.first;
3305 int64_t Offset = P.second;
3306 LSRUse &LU = Uses[LUIdx];
3308 // Record the fixup.
3309 LSRFixup &LF = LU.getNewFixup();
3310 LF.UserInst = UserInst;
3311 LF.OperandValToReplace = U.getOperandValToReplace();
3312 LF.PostIncLoops = TmpPostIncLoops;
3314 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3316 if (!LU.WidestFixupType ||
3317 SE.getTypeSizeInBits(LU.WidestFixupType) <
3318 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3319 LU.WidestFixupType = LF.OperandValToReplace->getType();
3321 // If this is the first use of this LSRUse, give it a formula.
3322 if (LU.Formulae.empty()) {
3323 InsertInitialFormula(S, LU, LUIdx);
3324 CountRegisters(LU.Formulae.back(), LUIdx);
3328 LLVM_DEBUG(print_fixups(dbgs()));
3331 /// Insert a formula for the given expression into the given use, separating out
3332 /// loop-variant portions from loop-invariant and loop-computable portions.
3334 LSRInstance::InsertInitialFormula(const SCEV *S, LSRUse &LU, size_t LUIdx) {
3335 // Mark uses whose expressions cannot be expanded.
3336 if (!isSafeToExpand(S, SE))
3337 LU.RigidFormula = true;
3340 F.initialMatch(S, L, SE);
3341 bool Inserted = InsertFormula(LU, LUIdx, F);
3342 assert(Inserted && "Initial formula already exists!"); (void)Inserted;
3345 /// Insert a simple single-register formula for the given expression into the
3348 LSRInstance::InsertSupplementalFormula(const SCEV *S,
3349 LSRUse &LU, size_t LUIdx) {
3351 F.BaseRegs.push_back(S);
3352 F.HasBaseReg = true;
3353 bool Inserted = InsertFormula(LU, LUIdx, F);
3354 assert(Inserted && "Supplemental formula already exists!"); (void)Inserted;
3357 /// Note which registers are used by the given formula, updating RegUses.
3358 void LSRInstance::CountRegisters(const Formula &F, size_t LUIdx) {
3360 RegUses.countRegister(F.ScaledReg, LUIdx);
3361 for (const SCEV *BaseReg : F.BaseRegs)
3362 RegUses.countRegister(BaseReg, LUIdx);
3365 /// If the given formula has not yet been inserted, add it to the list, and
3366 /// return true. Return false otherwise.
3367 bool LSRInstance::InsertFormula(LSRUse &LU, unsigned LUIdx, const Formula &F) {
3368 // Do not insert formula that we will not be able to expand.
3369 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F) &&
3370 "Formula is illegal");
3372 if (!LU.InsertFormula(F, *L))
3375 CountRegisters(F, LUIdx);
3379 /// Check for other uses of loop-invariant values which we're tracking. These
3380 /// other uses will pin these values in registers, making them less profitable
3381 /// for elimination.
3382 /// TODO: This currently misses non-constant addrec step registers.
3383 /// TODO: Should this give more weight to users inside the loop?
3385 LSRInstance::CollectLoopInvariantFixupsAndFormulae() {
3386 SmallVector<const SCEV *, 8> Worklist(RegUses.begin(), RegUses.end());
3387 SmallPtrSet<const SCEV *, 32> Visited;
3389 while (!Worklist.empty()) {
3390 const SCEV *S = Worklist.pop_back_val();
3392 // Don't process the same SCEV twice
3393 if (!Visited.insert(S).second)
3396 if (const SCEVNAryExpr *N = dyn_cast<SCEVNAryExpr>(S))
3397 Worklist.append(N->op_begin(), N->op_end());
3398 else if (const SCEVCastExpr *C = dyn_cast<SCEVCastExpr>(S))
3399 Worklist.push_back(C->getOperand());
3400 else if (const SCEVUDivExpr *D = dyn_cast<SCEVUDivExpr>(S)) {
3401 Worklist.push_back(D->getLHS());
3402 Worklist.push_back(D->getRHS());
3403 } else if (const SCEVUnknown *US = dyn_cast<SCEVUnknown>(S)) {
3404 const Value *V = US->getValue();
3405 if (const Instruction *Inst = dyn_cast<Instruction>(V)) {
3406 // Look for instructions defined outside the loop.
3407 if (L->contains(Inst)) continue;
3408 } else if (isa<UndefValue>(V))
3409 // Undef doesn't have a live range, so it doesn't matter.
3411 for (const Use &U : V->uses()) {
3412 const Instruction *UserInst = dyn_cast<Instruction>(U.getUser());
3413 // Ignore non-instructions.
3416 // Ignore instructions in other functions (as can happen with
3418 if (UserInst->getParent()->getParent() != L->getHeader()->getParent())
3420 // Ignore instructions not dominated by the loop.
3421 const BasicBlock *UseBB = !isa<PHINode>(UserInst) ?
3422 UserInst->getParent() :
3423 cast<PHINode>(UserInst)->getIncomingBlock(
3424 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
3425 if (!DT.dominates(L->getHeader(), UseBB))
3427 // Don't bother if the instruction is in a BB which ends in an EHPad.
3428 if (UseBB->getTerminator()->isEHPad())
3430 // Don't bother rewriting PHIs in catchswitch blocks.
3431 if (isa<CatchSwitchInst>(UserInst->getParent()->getTerminator()))
3433 // Ignore uses which are part of other SCEV expressions, to avoid
3434 // analyzing them multiple times.
3435 if (SE.isSCEVable(UserInst->getType())) {
3436 const SCEV *UserS = SE.getSCEV(const_cast<Instruction *>(UserInst));
3437 // If the user is a no-op, look through to its uses.
3438 if (!isa<SCEVUnknown>(UserS))
3442 SE.getUnknown(const_cast<Instruction *>(UserInst)));
3446 // Ignore icmp instructions which are already being analyzed.
3447 if (const ICmpInst *ICI = dyn_cast<ICmpInst>(UserInst)) {
3448 unsigned OtherIdx = !U.getOperandNo();
3449 Value *OtherOp = const_cast<Value *>(ICI->getOperand(OtherIdx));
3450 if (SE.hasComputableLoopEvolution(SE.getSCEV(OtherOp), L))
3454 std::pair<size_t, int64_t> P = getUse(
3455 S, LSRUse::Basic, MemAccessTy());
3456 size_t LUIdx = P.first;
3457 int64_t Offset = P.second;
3458 LSRUse &LU = Uses[LUIdx];
3459 LSRFixup &LF = LU.getNewFixup();
3460 LF.UserInst = const_cast<Instruction *>(UserInst);
3461 LF.OperandValToReplace = U;
3463 LU.AllFixupsOutsideLoop &= LF.isUseFullyOutsideLoop(L);
3464 if (!LU.WidestFixupType ||
3465 SE.getTypeSizeInBits(LU.WidestFixupType) <
3466 SE.getTypeSizeInBits(LF.OperandValToReplace->getType()))
3467 LU.WidestFixupType = LF.OperandValToReplace->getType();
3468 InsertSupplementalFormula(US, LU, LUIdx);
3469 CountRegisters(LU.Formulae.back(), Uses.size() - 1);
3476 /// Split S into subexpressions which can be pulled out into separate
3477 /// registers. If C is non-null, multiply each subexpression by C.
3479 /// Return remainder expression after factoring the subexpressions captured by
3480 /// Ops. If Ops is complete, return NULL.
3481 static const SCEV *CollectSubexprs(const SCEV *S, const SCEVConstant *C,
3482 SmallVectorImpl<const SCEV *> &Ops,
3484 ScalarEvolution &SE,
3485 unsigned Depth = 0) {
3486 // Arbitrarily cap recursion to protect compile time.
3490 if (const SCEVAddExpr *Add = dyn_cast<SCEVAddExpr>(S)) {
3491 // Break out add operands.
3492 for (const SCEV *S : Add->operands()) {
3493 const SCEV *Remainder = CollectSubexprs(S, C, Ops, L, SE, Depth+1);
3495 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3498 } else if (const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S)) {
3499 // Split a non-zero base out of an addrec.
3500 if (AR->getStart()->isZero() || !AR->isAffine())
3503 const SCEV *Remainder = CollectSubexprs(AR->getStart(),
3504 C, Ops, L, SE, Depth+1);
3505 // Split the non-zero AddRec unless it is part of a nested recurrence that
3506 // does not pertain to this loop.
3507 if (Remainder && (AR->getLoop() == L || !isa<SCEVAddRecExpr>(Remainder))) {
3508 Ops.push_back(C ? SE.getMulExpr(C, Remainder) : Remainder);
3509 Remainder = nullptr;
3511 if (Remainder != AR->getStart()) {
3513 Remainder = SE.getConstant(AR->getType(), 0);
3514 return SE.getAddRecExpr(Remainder,
3515 AR->getStepRecurrence(SE),
3517 //FIXME: AR->getNoWrapFlags(SCEV::FlagNW)
3520 } else if (const SCEVMulExpr *Mul = dyn_cast<SCEVMulExpr>(S)) {
3521 // Break (C * (a + b + c)) into C*a + C*b + C*c.
3522 if (Mul->getNumOperands() != 2)
3524 if (const SCEVConstant *Op0 =
3525 dyn_cast<SCEVConstant>(Mul->getOperand(0))) {
3526 C = C ? cast<SCEVConstant>(SE.getMulExpr(C, Op0)) : Op0;
3527 const SCEV *Remainder =
3528 CollectSubexprs(Mul->getOperand(1), C, Ops, L, SE, Depth+1);
3530 Ops.push_back(SE.getMulExpr(C, Remainder));
3537 /// Return true if the SCEV represents a value that may end up as a
3538 /// post-increment operation.
3539 static bool mayUsePostIncMode(const TargetTransformInfo &TTI,
3540 LSRUse &LU, const SCEV *S, const Loop *L,
3541 ScalarEvolution &SE) {
3542 if (LU.Kind != LSRUse::Address ||
3543 !LU.AccessTy.getType()->isIntOrIntVectorTy())
3545 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(S);
3548 const SCEV *LoopStep = AR->getStepRecurrence(SE);
3549 if (!isa<SCEVConstant>(LoopStep))
3551 if (LU.AccessTy.getType()->getScalarSizeInBits() !=
3552 LoopStep->getType()->getScalarSizeInBits())
3554 // Check if a post-indexed load/store can be used.
3555 if (TTI.isIndexedLoadLegal(TTI.MIM_PostInc, AR->getType()) ||
3556 TTI.isIndexedStoreLegal(TTI.MIM_PostInc, AR->getType())) {
3557 const SCEV *LoopStart = AR->getStart();
3558 if (!isa<SCEVConstant>(LoopStart) && SE.isLoopInvariant(LoopStart, L))
3564 /// Helper function for LSRInstance::GenerateReassociations.
3565 void LSRInstance::GenerateReassociationsImpl(LSRUse &LU, unsigned LUIdx,
3566 const Formula &Base,
3567 unsigned Depth, size_t Idx,
3569 const SCEV *BaseReg = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3570 // Don't generate reassociations for the base register of a value that
3571 // may generate a post-increment operator. The reason is that the
3572 // reassociations cause extra base+register formula to be created,
3573 // and possibly chosen, but the post-increment is more efficient.
3574 if (TTI.shouldFavorPostInc() && mayUsePostIncMode(TTI, LU, BaseReg, L, SE))
3576 SmallVector<const SCEV *, 8> AddOps;
3577 const SCEV *Remainder = CollectSubexprs(BaseReg, nullptr, AddOps, L, SE);
3579 AddOps.push_back(Remainder);
3581 if (AddOps.size() == 1)
3584 for (SmallVectorImpl<const SCEV *>::const_iterator J = AddOps.begin(),
3587 // Loop-variant "unknown" values are uninteresting; we won't be able to
3588 // do anything meaningful with them.
3589 if (isa<SCEVUnknown>(*J) && !SE.isLoopInvariant(*J, L))
3592 // Don't pull a constant into a register if the constant could be folded
3593 // into an immediate field.
3594 if (isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3595 LU.AccessTy, *J, Base.getNumRegs() > 1))
3598 // Collect all operands except *J.
3599 SmallVector<const SCEV *, 8> InnerAddOps(
3600 ((const SmallVector<const SCEV *, 8> &)AddOps).begin(), J);
3601 InnerAddOps.append(std::next(J),
3602 ((const SmallVector<const SCEV *, 8> &)AddOps).end());
3604 // Don't leave just a constant behind in a register if the constant could
3605 // be folded into an immediate field.
3606 if (InnerAddOps.size() == 1 &&
3607 isAlwaysFoldable(TTI, SE, LU.MinOffset, LU.MaxOffset, LU.Kind,
3608 LU.AccessTy, InnerAddOps[0], Base.getNumRegs() > 1))
3611 const SCEV *InnerSum = SE.getAddExpr(InnerAddOps);
3612 if (InnerSum->isZero())
3616 // Add the remaining pieces of the add back into the new formula.
3617 const SCEVConstant *InnerSumSC = dyn_cast<SCEVConstant>(InnerSum);
3618 if (InnerSumSC && SE.getTypeSizeInBits(InnerSumSC->getType()) <= 64 &&
3619 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3620 InnerSumSC->getValue()->getZExtValue())) {
3622 (uint64_t)F.UnfoldedOffset + InnerSumSC->getValue()->getZExtValue();
3624 F.ScaledReg = nullptr;
3626 F.BaseRegs.erase(F.BaseRegs.begin() + Idx);
3627 } else if (IsScaledReg)
3628 F.ScaledReg = InnerSum;
3630 F.BaseRegs[Idx] = InnerSum;
3632 // Add J as its own register, or an unfolded immediate.
3633 const SCEVConstant *SC = dyn_cast<SCEVConstant>(*J);
3634 if (SC && SE.getTypeSizeInBits(SC->getType()) <= 64 &&
3635 TTI.isLegalAddImmediate((uint64_t)F.UnfoldedOffset +
3636 SC->getValue()->getZExtValue()))
3638 (uint64_t)F.UnfoldedOffset + SC->getValue()->getZExtValue();
3640 F.BaseRegs.push_back(*J);
3641 // We may have changed the number of register in base regs, adjust the
3642 // formula accordingly.
3645 if (InsertFormula(LU, LUIdx, F))
3646 // If that formula hadn't been seen before, recurse to find more like
3648 // Add check on Log16(AddOps.size()) - same as Log2_32(AddOps.size()) >> 2)
3649 // Because just Depth is not enough to bound compile time.
3650 // This means that every time AddOps.size() is greater 16^x we will add
3652 GenerateReassociations(LU, LUIdx, LU.Formulae.back(),
3653 Depth + 1 + (Log2_32(AddOps.size()) >> 2));
3657 /// Split out subexpressions from adds and the bases of addrecs.
3658 void LSRInstance::GenerateReassociations(LSRUse &LU, unsigned LUIdx,
3659 Formula Base, unsigned Depth) {
3660 assert(Base.isCanonical(*L) && "Input must be in the canonical form");
3661 // Arbitrarily cap recursion to protect compile time.
3665 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3666 GenerateReassociationsImpl(LU, LUIdx, Base, Depth, i);
3668 if (Base.Scale == 1)
3669 GenerateReassociationsImpl(LU, LUIdx, Base, Depth,
3670 /* Idx */ -1, /* IsScaledReg */ true);
3673 /// Generate a formula consisting of all of the loop-dominating registers added
3674 /// into a single register.
3675 void LSRInstance::GenerateCombinations(LSRUse &LU, unsigned LUIdx,
3677 // This method is only interesting on a plurality of registers.
3678 if (Base.BaseRegs.size() + (Base.Scale == 1) +
3679 (Base.UnfoldedOffset != 0) <= 1)
3682 // Flatten the representation, i.e., reg1 + 1*reg2 => reg1 + reg2, before
3683 // processing the formula.
3685 SmallVector<const SCEV *, 4> Ops;
3686 Formula NewBase = Base;
3687 NewBase.BaseRegs.clear();
3688 Type *CombinedIntegerType = nullptr;
3689 for (const SCEV *BaseReg : Base.BaseRegs) {
3690 if (SE.properlyDominates(BaseReg, L->getHeader()) &&
3691 !SE.hasComputableLoopEvolution(BaseReg, L)) {
3692 if (!CombinedIntegerType)
3693 CombinedIntegerType = SE.getEffectiveSCEVType(BaseReg->getType());
3694 Ops.push_back(BaseReg);
3697 NewBase.BaseRegs.push_back(BaseReg);
3700 // If no register is relevant, we're done.
3701 if (Ops.size() == 0)
3704 // Utility function for generating the required variants of the combined
3706 auto GenerateFormula = [&](const SCEV *Sum) {
3707 Formula F = NewBase;
3709 // TODO: If Sum is zero, it probably means ScalarEvolution missed an
3710 // opportunity to fold something. For now, just ignore such cases
3711 // rather than proceed with zero in a register.
3715 F.BaseRegs.push_back(Sum);
3717 (void)InsertFormula(LU, LUIdx, F);
3720 // If we collected at least two registers, generate a formula combining them.
3721 if (Ops.size() > 1) {
3722 SmallVector<const SCEV *, 4> OpsCopy(Ops); // Don't let SE modify Ops.
3723 GenerateFormula(SE.getAddExpr(OpsCopy));
3726 // If we have an unfolded offset, generate a formula combining it with the
3727 // registers collected.
3728 if (NewBase.UnfoldedOffset) {
3729 assert(CombinedIntegerType && "Missing a type for the unfolded offset");
3730 Ops.push_back(SE.getConstant(CombinedIntegerType, NewBase.UnfoldedOffset,
3732 NewBase.UnfoldedOffset = 0;
3733 GenerateFormula(SE.getAddExpr(Ops));
3737 /// Helper function for LSRInstance::GenerateSymbolicOffsets.
3738 void LSRInstance::GenerateSymbolicOffsetsImpl(LSRUse &LU, unsigned LUIdx,
3739 const Formula &Base, size_t Idx,
3741 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3742 GlobalValue *GV = ExtractSymbol(G, SE);
3743 if (G->isZero() || !GV)
3747 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3752 F.BaseRegs[Idx] = G;
3753 (void)InsertFormula(LU, LUIdx, F);
3756 /// Generate reuse formulae using symbolic offsets.
3757 void LSRInstance::GenerateSymbolicOffsets(LSRUse &LU, unsigned LUIdx,
3759 // We can't add a symbolic offset if the address already contains one.
3760 if (Base.BaseGV) return;
3762 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3763 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, i);
3764 if (Base.Scale == 1)
3765 GenerateSymbolicOffsetsImpl(LU, LUIdx, Base, /* Idx */ -1,
3766 /* IsScaledReg */ true);
3769 /// Helper function for LSRInstance::GenerateConstantOffsets.
3770 void LSRInstance::GenerateConstantOffsetsImpl(
3771 LSRUse &LU, unsigned LUIdx, const Formula &Base,
3772 const SmallVectorImpl<int64_t> &Worklist, size_t Idx, bool IsScaledReg) {
3774 auto GenerateOffset = [&](const SCEV *G, int64_t Offset) {
3776 F.BaseOffset = (uint64_t)Base.BaseOffset - Offset;
3778 if (isLegalUse(TTI, LU.MinOffset - Offset, LU.MaxOffset - Offset, LU.Kind,
3780 // Add the offset to the base register.
3781 const SCEV *NewG = SE.getAddExpr(SE.getConstant(G->getType(), Offset), G);
3782 // If it cancelled out, drop the base register, otherwise update it.
3783 if (NewG->isZero()) {
3786 F.ScaledReg = nullptr;
3788 F.deleteBaseReg(F.BaseRegs[Idx]);
3790 } else if (IsScaledReg)
3793 F.BaseRegs[Idx] = NewG;
3795 (void)InsertFormula(LU, LUIdx, F);
3799 const SCEV *G = IsScaledReg ? Base.ScaledReg : Base.BaseRegs[Idx];
3801 // With constant offsets and constant steps, we can generate pre-inc
3802 // accesses by having the offset equal the step. So, for access #0 with a
3803 // step of 8, we generate a G - 8 base which would require the first access
3804 // to be ((G - 8) + 8),+,8. The pre-indexed access then updates the pointer
3805 // for itself and hopefully becomes the base for other accesses. This means
3806 // means that a single pre-indexed access can be generated to become the new
3807 // base pointer for each iteration of the loop, resulting in no extra add/sub
3808 // instructions for pointer updating.
3809 if (FavorBackedgeIndex && LU.Kind == LSRUse::Address) {
3810 if (auto *GAR = dyn_cast<SCEVAddRecExpr>(G)) {
3812 dyn_cast<SCEVConstant>(GAR->getStepRecurrence(SE))) {
3813 const APInt &StepInt = StepRec->getAPInt();
3814 int64_t Step = StepInt.isNegative() ?
3815 StepInt.getSExtValue() : StepInt.getZExtValue();
3817 for (int64_t Offset : Worklist) {
3819 GenerateOffset(G, Offset);
3824 for (int64_t Offset : Worklist)
3825 GenerateOffset(G, Offset);
3827 int64_t Imm = ExtractImmediate(G, SE);
3828 if (G->isZero() || Imm == 0)
3831 F.BaseOffset = (uint64_t)F.BaseOffset + Imm;
3832 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy, F))
3837 F.BaseRegs[Idx] = G;
3838 (void)InsertFormula(LU, LUIdx, F);
3841 /// GenerateConstantOffsets - Generate reuse formulae using symbolic offsets.
3842 void LSRInstance::GenerateConstantOffsets(LSRUse &LU, unsigned LUIdx,
3844 // TODO: For now, just add the min and max offset, because it usually isn't
3845 // worthwhile looking at everything inbetween.
3846 SmallVector<int64_t, 2> Worklist;
3847 Worklist.push_back(LU.MinOffset);
3848 if (LU.MaxOffset != LU.MinOffset)
3849 Worklist.push_back(LU.MaxOffset);
3851 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i)
3852 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, i);
3853 if (Base.Scale == 1)
3854 GenerateConstantOffsetsImpl(LU, LUIdx, Base, Worklist, /* Idx */ -1,
3855 /* IsScaledReg */ true);
3858 /// For ICmpZero, check to see if we can scale up the comparison. For example, x
3859 /// == y -> x*c == y*c.
3860 void LSRInstance::GenerateICmpZeroScales(LSRUse &LU, unsigned LUIdx,
3862 if (LU.Kind != LSRUse::ICmpZero) return;
3864 // Determine the integer type for the base formula.
3865 Type *IntTy = Base.getType();
3867 if (SE.getTypeSizeInBits(IntTy) > 64) return;
3869 // Don't do this if there is more than one offset.
3870 if (LU.MinOffset != LU.MaxOffset) return;
3872 // Check if transformation is valid. It is illegal to multiply pointer.
3873 if (Base.ScaledReg && Base.ScaledReg->getType()->isPointerTy())
3875 for (const SCEV *BaseReg : Base.BaseRegs)
3876 if (BaseReg->getType()->isPointerTy())
3878 assert(!Base.BaseGV && "ICmpZero use is not legal!");
3880 // Check each interesting stride.
3881 for (int64_t Factor : Factors) {
3882 // Check that the multiplication doesn't overflow.
3883 if (Base.BaseOffset == std::numeric_limits<int64_t>::min() && Factor == -1)
3885 int64_t NewBaseOffset = (uint64_t)Base.BaseOffset * Factor;
3886 if (NewBaseOffset / Factor != Base.BaseOffset)
3888 // If the offset will be truncated at this use, check that it is in bounds.
3889 if (!IntTy->isPointerTy() &&
3890 !ConstantInt::isValueValidForType(IntTy, NewBaseOffset))
3893 // Check that multiplying with the use offset doesn't overflow.
3894 int64_t Offset = LU.MinOffset;
3895 if (Offset == std::numeric_limits<int64_t>::min() && Factor == -1)
3897 Offset = (uint64_t)Offset * Factor;
3898 if (Offset / Factor != LU.MinOffset)
3900 // If the offset will be truncated at this use, check that it is in bounds.
3901 if (!IntTy->isPointerTy() &&
3902 !ConstantInt::isValueValidForType(IntTy, Offset))
3906 F.BaseOffset = NewBaseOffset;
3908 // Check that this scale is legal.
3909 if (!isLegalUse(TTI, Offset, Offset, LU.Kind, LU.AccessTy, F))
3912 // Compensate for the use having MinOffset built into it.
3913 F.BaseOffset = (uint64_t)F.BaseOffset + Offset - LU.MinOffset;
3915 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3917 // Check that multiplying with each base register doesn't overflow.
3918 for (size_t i = 0, e = F.BaseRegs.size(); i != e; ++i) {
3919 F.BaseRegs[i] = SE.getMulExpr(F.BaseRegs[i], FactorS);
3920 if (getExactSDiv(F.BaseRegs[i], FactorS, SE) != Base.BaseRegs[i])
3924 // Check that multiplying with the scaled register doesn't overflow.
3926 F.ScaledReg = SE.getMulExpr(F.ScaledReg, FactorS);
3927 if (getExactSDiv(F.ScaledReg, FactorS, SE) != Base.ScaledReg)
3931 // Check that multiplying with the unfolded offset doesn't overflow.
3932 if (F.UnfoldedOffset != 0) {
3933 if (F.UnfoldedOffset == std::numeric_limits<int64_t>::min() &&
3936 F.UnfoldedOffset = (uint64_t)F.UnfoldedOffset * Factor;
3937 if (F.UnfoldedOffset / Factor != Base.UnfoldedOffset)
3939 // If the offset will be truncated, check that it is in bounds.
3940 if (!IntTy->isPointerTy() &&
3941 !ConstantInt::isValueValidForType(IntTy, F.UnfoldedOffset))
3945 // If we make it here and it's legal, add it.
3946 (void)InsertFormula(LU, LUIdx, F);
3951 /// Generate stride factor reuse formulae by making use of scaled-offset address
3952 /// modes, for example.
3953 void LSRInstance::GenerateScales(LSRUse &LU, unsigned LUIdx, Formula Base) {
3954 // Determine the integer type for the base formula.
3955 Type *IntTy = Base.getType();
3958 // If this Formula already has a scaled register, we can't add another one.
3959 // Try to unscale the formula to generate a better scale.
3960 if (Base.Scale != 0 && !Base.unscale())
3963 assert(Base.Scale == 0 && "unscale did not did its job!");
3965 // Check each interesting stride.
3966 for (int64_t Factor : Factors) {
3967 Base.Scale = Factor;
3968 Base.HasBaseReg = Base.BaseRegs.size() > 1;
3969 // Check whether this scale is going to be legal.
3970 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
3972 // As a special-case, handle special out-of-loop Basic users specially.
3973 // TODO: Reconsider this special case.
3974 if (LU.Kind == LSRUse::Basic &&
3975 isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LSRUse::Special,
3976 LU.AccessTy, Base) &&
3977 LU.AllFixupsOutsideLoop)
3978 LU.Kind = LSRUse::Special;
3982 // For an ICmpZero, negating a solitary base register won't lead to
3984 if (LU.Kind == LSRUse::ICmpZero &&
3985 !Base.HasBaseReg && Base.BaseOffset == 0 && !Base.BaseGV)
3987 // For each addrec base reg, if its loop is current loop, apply the scale.
3988 for (size_t i = 0, e = Base.BaseRegs.size(); i != e; ++i) {
3989 const SCEVAddRecExpr *AR = dyn_cast<SCEVAddRecExpr>(Base.BaseRegs[i]);
3990 if (AR && (AR->getLoop() == L || LU.AllFixupsOutsideLoop)) {
3991 const SCEV *FactorS = SE.getConstant(IntTy, Factor);
3992 if (FactorS->isZero())
3994 // Divide out the factor, ignoring high bits, since we'll be
3995 // scaling the value back up in the end.
3996 if (const SCEV *Quotient = getExactSDiv(AR, FactorS, SE, true)) {
3997 // TODO: This could be optimized to avoid all the copying.
3999 F.ScaledReg = Quotient;
4000 F.deleteBaseReg(F.BaseRegs[i]);
4001 // The canonical representation of 1*reg is reg, which is already in
4002 // Base. In that case, do not try to insert the formula, it will be
4004 if (F.Scale == 1 && (F.BaseRegs.empty() ||
4005 (AR->getLoop() != L && LU.AllFixupsOutsideLoop)))
4007 // If AllFixupsOutsideLoop is true and F.Scale is 1, we may generate
4008 // non canonical Formula with ScaledReg's loop not being L.
4009 if (F.Scale == 1 && LU.AllFixupsOutsideLoop)
4011 (void)InsertFormula(LU, LUIdx, F);
4018 /// Generate reuse formulae from different IV types.
4019 void LSRInstance::GenerateTruncates(LSRUse &LU, unsigned LUIdx, Formula Base) {
4020 // Don't bother truncating symbolic values.
4021 if (Base.BaseGV) return;
4023 // Determine the integer type for the base formula.
4024 Type *DstTy = Base.getType();
4026 DstTy = SE.getEffectiveSCEVType(DstTy);
4028 for (Type *SrcTy : Types) {
4029 if (SrcTy != DstTy && TTI.isTruncateFree(SrcTy, DstTy)) {
4032 // Sometimes SCEV is able to prove zero during ext transform. It may
4033 // happen if SCEV did not do all possible transforms while creating the
4034 // initial node (maybe due to depth limitations), but it can do them while
4037 const SCEV *NewScaledReg = SE.getAnyExtendExpr(F.ScaledReg, SrcTy);
4038 if (NewScaledReg->isZero())
4040 F.ScaledReg = NewScaledReg;
4042 bool HasZeroBaseReg = false;
4043 for (const SCEV *&BaseReg : F.BaseRegs) {
4044 const SCEV *NewBaseReg = SE.getAnyExtendExpr(BaseReg, SrcTy);
4045 if (NewBaseReg->isZero()) {
4046 HasZeroBaseReg = true;
4049 BaseReg = NewBaseReg;
4054 // TODO: This assumes we've done basic processing on all uses and
4055 // have an idea what the register usage is.
4056 if (!F.hasRegsUsedByUsesOtherThan(LUIdx, RegUses))
4060 (void)InsertFormula(LU, LUIdx, F);
4067 /// Helper class for GenerateCrossUseConstantOffsets. It's used to defer
4068 /// modifications so that the search phase doesn't have to worry about the data
4069 /// structures moving underneath it.
4073 const SCEV *OrigReg;
4075 WorkItem(size_t LI, int64_t I, const SCEV *R)
4076 : LUIdx(LI), Imm(I), OrigReg(R) {}
4078 void print(raw_ostream &OS) const;
4082 } // end anonymous namespace
4084 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
4085 void WorkItem::print(raw_ostream &OS) const {
4086 OS << "in formulae referencing " << *OrigReg << " in use " << LUIdx
4087 << " , add offset " << Imm;
4090 LLVM_DUMP_METHOD void WorkItem::dump() const {
4091 print(errs()); errs() << '\n';
4095 /// Look for registers which are a constant distance apart and try to form reuse
4096 /// opportunities between them.
4097 void LSRInstance::GenerateCrossUseConstantOffsets() {
4098 // Group the registers by their value without any added constant offset.
4099 using ImmMapTy = std::map<int64_t, const SCEV *>;
4101 DenseMap<const SCEV *, ImmMapTy> Map;
4102 DenseMap<const SCEV *, SmallBitVector> UsedByIndicesMap;
4103 SmallVector<const SCEV *, 8> Sequence;
4104 for (const SCEV *Use : RegUses) {
4105 const SCEV *Reg = Use; // Make a copy for ExtractImmediate to modify.
4106 int64_t Imm = ExtractImmediate(Reg, SE);
4107 auto Pair = Map.insert(std::make_pair(Reg, ImmMapTy()));
4109 Sequence.push_back(Reg);
4110 Pair.first->second.insert(std::make_pair(Imm, Use));
4111 UsedByIndicesMap[Reg] |= RegUses.getUsedByIndices(Use);
4114 // Now examine each set of registers with the same base value. Build up
4115 // a list of work to do and do the work in a separate step so that we're
4116 // not adding formulae and register counts while we're searching.
4117 SmallVector<WorkItem, 32> WorkItems;
4118 SmallSet<std::pair<size_t, int64_t>, 32> UniqueItems;
4119 for (const SCEV *Reg : Sequence) {
4120 const ImmMapTy &Imms = Map.find(Reg)->second;
4122 // It's not worthwhile looking for reuse if there's only one offset.
4123 if (Imms.size() == 1)
4126 LLVM_DEBUG(dbgs() << "Generating cross-use offsets for " << *Reg << ':';
4127 for (const auto &Entry
4129 << ' ' << Entry.first;
4132 // Examine each offset.
4133 for (ImmMapTy::const_iterator J = Imms.begin(), JE = Imms.end();
4135 const SCEV *OrigReg = J->second;
4137 int64_t JImm = J->first;
4138 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(OrigReg);
4140 if (!isa<SCEVConstant>(OrigReg) &&
4141 UsedByIndicesMap[Reg].count() == 1) {
4142 LLVM_DEBUG(dbgs() << "Skipping cross-use reuse for " << *OrigReg
4147 // Conservatively examine offsets between this orig reg a few selected
4149 int64_t First = Imms.begin()->first;
4150 int64_t Last = std::prev(Imms.end())->first;
4151 // Compute (First + Last) / 2 without overflow using the fact that
4152 // First + Last = 2 * (First + Last) + (First ^ Last).
4153 int64_t Avg = (First & Last) + ((First ^ Last) >> 1);
4154 // If the result is negative and First is odd and Last even (or vice versa),
4155 // we rounded towards -inf. Add 1 in that case, to round towards 0.
4156 Avg = Avg + ((First ^ Last) & ((uint64_t)Avg >> 63));
4157 ImmMapTy::const_iterator OtherImms[] = {
4158 Imms.begin(), std::prev(Imms.end()),
4159 Imms.lower_bound(Avg)};
4160 for (size_t i = 0, e = array_lengthof(OtherImms); i != e; ++i) {
4161 ImmMapTy::const_iterator M = OtherImms[i];
4162 if (M == J || M == JE) continue;
4164 // Compute the difference between the two.
4165 int64_t Imm = (uint64_t)JImm - M->first;
4166 for (unsigned LUIdx : UsedByIndices.set_bits())
4167 // Make a memo of this use, offset, and register tuple.
4168 if (UniqueItems.insert(std::make_pair(LUIdx, Imm)).second)
4169 WorkItems.push_back(WorkItem(LUIdx, Imm, OrigReg));
4176 UsedByIndicesMap.clear();
4177 UniqueItems.clear();
4179 // Now iterate through the worklist and add new formulae.
4180 for (const WorkItem &WI : WorkItems) {
4181 size_t LUIdx = WI.LUIdx;
4182 LSRUse &LU = Uses[LUIdx];
4183 int64_t Imm = WI.Imm;
4184 const SCEV *OrigReg = WI.OrigReg;
4186 Type *IntTy = SE.getEffectiveSCEVType(OrigReg->getType());
4187 const SCEV *NegImmS = SE.getSCEV(ConstantInt::get(IntTy, -(uint64_t)Imm));
4188 unsigned BitWidth = SE.getTypeSizeInBits(IntTy);
4190 // TODO: Use a more targeted data structure.
4191 for (size_t L = 0, LE = LU.Formulae.size(); L != LE; ++L) {
4192 Formula F = LU.Formulae[L];
4193 // FIXME: The code for the scaled and unscaled registers looks
4194 // very similar but slightly different. Investigate if they
4195 // could be merged. That way, we would not have to unscale the
4198 // Use the immediate in the scaled register.
4199 if (F.ScaledReg == OrigReg) {
4200 int64_t Offset = (uint64_t)F.BaseOffset + Imm * (uint64_t)F.Scale;
4201 // Don't create 50 + reg(-50).
4202 if (F.referencesReg(SE.getSCEV(
4203 ConstantInt::get(IntTy, -(uint64_t)Offset))))
4206 NewF.BaseOffset = Offset;
4207 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
4210 NewF.ScaledReg = SE.getAddExpr(NegImmS, NewF.ScaledReg);
4212 // If the new scale is a constant in a register, and adding the constant
4213 // value to the immediate would produce a value closer to zero than the
4214 // immediate itself, then the formula isn't worthwhile.
4215 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewF.ScaledReg))
4216 if (C->getValue()->isNegative() != (NewF.BaseOffset < 0) &&
4217 (C->getAPInt().abs() * APInt(BitWidth, F.Scale))
4218 .ule(std::abs(NewF.BaseOffset)))
4222 NewF.canonicalize(*this->L);
4223 (void)InsertFormula(LU, LUIdx, NewF);
4225 // Use the immediate in a base register.
4226 for (size_t N = 0, NE = F.BaseRegs.size(); N != NE; ++N) {
4227 const SCEV *BaseReg = F.BaseRegs[N];
4228 if (BaseReg != OrigReg)
4231 NewF.BaseOffset = (uint64_t)NewF.BaseOffset + Imm;
4232 if (!isLegalUse(TTI, LU.MinOffset, LU.MaxOffset,
4233 LU.Kind, LU.AccessTy, NewF)) {
4234 if (TTI.shouldFavorPostInc() &&
4235 mayUsePostIncMode(TTI, LU, OrigReg, this->L, SE))
4237 if (!TTI.isLegalAddImmediate((uint64_t)NewF.UnfoldedOffset + Imm))
4240 NewF.UnfoldedOffset = (uint64_t)NewF.UnfoldedOffset + Imm;
4242 NewF.BaseRegs[N] = SE.getAddExpr(NegImmS, BaseReg);
4244 // If the new formula has a constant in a register, and adding the
4245 // constant value to the immediate would produce a value closer to
4246 // zero than the immediate itself, then the formula isn't worthwhile.
4247 for (const SCEV *NewReg : NewF.BaseRegs)
4248 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(NewReg))
4249 if ((C->getAPInt() + NewF.BaseOffset)
4251 .slt(std::abs(NewF.BaseOffset)) &&
4252 (C->getAPInt() + NewF.BaseOffset).countTrailingZeros() >=
4253 countTrailingZeros<uint64_t>(NewF.BaseOffset))
4257 NewF.canonicalize(*this->L);
4258 (void)InsertFormula(LU, LUIdx, NewF);
4267 /// Generate formulae for each use.
4269 LSRInstance::GenerateAllReuseFormulae() {
4270 // This is split into multiple loops so that hasRegsUsedByUsesOtherThan
4271 // queries are more precise.
4272 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4273 LSRUse &LU = Uses[LUIdx];
4274 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4275 GenerateReassociations(LU, LUIdx, LU.Formulae[i]);
4276 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4277 GenerateCombinations(LU, LUIdx, LU.Formulae[i]);
4279 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4280 LSRUse &LU = Uses[LUIdx];
4281 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4282 GenerateSymbolicOffsets(LU, LUIdx, LU.Formulae[i]);
4283 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4284 GenerateConstantOffsets(LU, LUIdx, LU.Formulae[i]);
4285 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4286 GenerateICmpZeroScales(LU, LUIdx, LU.Formulae[i]);
4287 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4288 GenerateScales(LU, LUIdx, LU.Formulae[i]);
4290 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4291 LSRUse &LU = Uses[LUIdx];
4292 for (size_t i = 0, f = LU.Formulae.size(); i != f; ++i)
4293 GenerateTruncates(LU, LUIdx, LU.Formulae[i]);
4296 GenerateCrossUseConstantOffsets();
4298 LLVM_DEBUG(dbgs() << "\n"
4299 "After generating reuse formulae:\n";
4300 print_uses(dbgs()));
4303 /// If there are multiple formulae with the same set of registers used
4304 /// by other uses, pick the best one and delete the others.
4305 void LSRInstance::FilterOutUndesirableDedicatedRegisters() {
4306 DenseSet<const SCEV *> VisitedRegs;
4307 SmallPtrSet<const SCEV *, 16> Regs;
4308 SmallPtrSet<const SCEV *, 16> LoserRegs;
4310 bool ChangedFormulae = false;
4313 // Collect the best formula for each unique set of shared registers. This
4314 // is reset for each use.
4315 using BestFormulaeTy =
4316 DenseMap<SmallVector<const SCEV *, 4>, size_t, UniquifierDenseMapInfo>;
4318 BestFormulaeTy BestFormulae;
4320 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4321 LSRUse &LU = Uses[LUIdx];
4322 LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4326 for (size_t FIdx = 0, NumForms = LU.Formulae.size();
4327 FIdx != NumForms; ++FIdx) {
4328 Formula &F = LU.Formulae[FIdx];
4330 // Some formulas are instant losers. For example, they may depend on
4331 // nonexistent AddRecs from other loops. These need to be filtered
4332 // immediately, otherwise heuristics could choose them over others leading
4333 // to an unsatisfactory solution. Passing LoserRegs into RateFormula here
4334 // avoids the need to recompute this information across formulae using the
4335 // same bad AddRec. Passing LoserRegs is also essential unless we remove
4336 // the corresponding bad register from the Regs set.
4337 Cost CostF(L, SE, TTI);
4339 CostF.RateFormula(F, Regs, VisitedRegs, LU, &LoserRegs);
4340 if (CostF.isLoser()) {
4341 // During initial formula generation, undesirable formulae are generated
4342 // by uses within other loops that have some non-trivial address mode or
4343 // use the postinc form of the IV. LSR needs to provide these formulae
4344 // as the basis of rediscovering the desired formula that uses an AddRec
4345 // corresponding to the existing phi. Once all formulae have been
4346 // generated, these initial losers may be pruned.
4347 LLVM_DEBUG(dbgs() << " Filtering loser "; F.print(dbgs());
4351 SmallVector<const SCEV *, 4> Key;
4352 for (const SCEV *Reg : F.BaseRegs) {
4353 if (RegUses.isRegUsedByUsesOtherThan(Reg, LUIdx))
4357 RegUses.isRegUsedByUsesOtherThan(F.ScaledReg, LUIdx))
4358 Key.push_back(F.ScaledReg);
4359 // Unstable sort by host order ok, because this is only used for
4363 std::pair<BestFormulaeTy::const_iterator, bool> P =
4364 BestFormulae.insert(std::make_pair(Key, FIdx));
4368 Formula &Best = LU.Formulae[P.first->second];
4370 Cost CostBest(L, SE, TTI);
4372 CostBest.RateFormula(Best, Regs, VisitedRegs, LU);
4373 if (CostF.isLess(CostBest))
4375 LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4377 " in favor of formula ";
4378 Best.print(dbgs()); dbgs() << '\n');
4381 ChangedFormulae = true;
4383 LU.DeleteFormula(F);
4389 // Now that we've filtered out some formulae, recompute the Regs set.
4391 LU.RecomputeRegs(LUIdx, RegUses);
4393 // Reset this to prepare for the next use.
4394 BestFormulae.clear();
4397 LLVM_DEBUG(if (ChangedFormulae) {
4399 "After filtering out undesirable candidates:\n";
4404 /// Estimate the worst-case number of solutions the solver might have to
4405 /// consider. It almost never considers this many solutions because it prune the
4406 /// search space, but the pruning isn't always sufficient.
4407 size_t LSRInstance::EstimateSearchSpaceComplexity() const {
4409 for (const LSRUse &LU : Uses) {
4410 size_t FSize = LU.Formulae.size();
4411 if (FSize >= ComplexityLimit) {
4412 Power = ComplexityLimit;
4416 if (Power >= ComplexityLimit)
4422 /// When one formula uses a superset of the registers of another formula, it
4423 /// won't help reduce register pressure (though it may not necessarily hurt
4424 /// register pressure); remove it to simplify the system.
4425 void LSRInstance::NarrowSearchSpaceByDetectingSupersets() {
4426 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4427 LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4429 LLVM_DEBUG(dbgs() << "Narrowing the search space by eliminating formulae "
4430 "which use a superset of registers used by other "
4433 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4434 LSRUse &LU = Uses[LUIdx];
4436 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4437 Formula &F = LU.Formulae[i];
4438 // Look for a formula with a constant or GV in a register. If the use
4439 // also has a formula with that same value in an immediate field,
4440 // delete the one that uses a register.
4441 for (SmallVectorImpl<const SCEV *>::const_iterator
4442 I = F.BaseRegs.begin(), E = F.BaseRegs.end(); I != E; ++I) {
4443 if (const SCEVConstant *C = dyn_cast<SCEVConstant>(*I)) {
4445 //FIXME: Formulas should store bitwidth to do wrapping properly.
4447 NewF.BaseOffset += (uint64_t)C->getValue()->getSExtValue();
4448 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4449 (I - F.BaseRegs.begin()));
4450 if (LU.HasFormulaWithSameRegs(NewF)) {
4451 LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4453 LU.DeleteFormula(F);
4459 } else if (const SCEVUnknown *U = dyn_cast<SCEVUnknown>(*I)) {
4460 if (GlobalValue *GV = dyn_cast<GlobalValue>(U->getValue()))
4464 NewF.BaseRegs.erase(NewF.BaseRegs.begin() +
4465 (I - F.BaseRegs.begin()));
4466 if (LU.HasFormulaWithSameRegs(NewF)) {
4467 LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs());
4469 LU.DeleteFormula(F);
4480 LU.RecomputeRegs(LUIdx, RegUses);
4483 LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4487 /// When there are many registers for expressions like A, A+1, A+2, etc.,
4488 /// allocate a single register for them.
4489 void LSRInstance::NarrowSearchSpaceByCollapsingUnrolledCode() {
4490 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4494 dbgs() << "The search space is too complex.\n"
4495 "Narrowing the search space by assuming that uses separated "
4496 "by a constant offset will use the same registers.\n");
4498 // This is especially useful for unrolled loops.
4500 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4501 LSRUse &LU = Uses[LUIdx];
4502 for (const Formula &F : LU.Formulae) {
4503 if (F.BaseOffset == 0 || (F.Scale != 0 && F.Scale != 1))
4506 LSRUse *LUThatHas = FindUseWithSimilarFormula(F, LU);
4510 if (!reconcileNewOffset(*LUThatHas, F.BaseOffset, /*HasBaseReg=*/ false,
4511 LU.Kind, LU.AccessTy))
4514 LLVM_DEBUG(dbgs() << " Deleting use "; LU.print(dbgs()); dbgs() << '\n');
4516 LUThatHas->AllFixupsOutsideLoop &= LU.AllFixupsOutsideLoop;
4518 // Transfer the fixups of LU to LUThatHas.
4519 for (LSRFixup &Fixup : LU.Fixups) {
4520 Fixup.Offset += F.BaseOffset;
4521 LUThatHas->pushFixup(Fixup);
4522 LLVM_DEBUG(dbgs() << "New fixup has offset " << Fixup.Offset << '\n');
4525 // Delete formulae from the new use which are no longer legal.
4527 for (size_t i = 0, e = LUThatHas->Formulae.size(); i != e; ++i) {
4528 Formula &F = LUThatHas->Formulae[i];
4529 if (!isLegalUse(TTI, LUThatHas->MinOffset, LUThatHas->MaxOffset,
4530 LUThatHas->Kind, LUThatHas->AccessTy, F)) {
4531 LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4532 LUThatHas->DeleteFormula(F);
4540 LUThatHas->RecomputeRegs(LUThatHas - &Uses.front(), RegUses);
4542 // Delete the old use.
4543 DeleteUse(LU, LUIdx);
4550 LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4553 /// Call FilterOutUndesirableDedicatedRegisters again, if necessary, now that
4554 /// we've done more filtering, as it may be able to find more formulae to
4556 void LSRInstance::NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters(){
4557 if (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4558 LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4560 LLVM_DEBUG(dbgs() << "Narrowing the search space by re-filtering out "
4561 "undesirable dedicated registers.\n");
4563 FilterOutUndesirableDedicatedRegisters();
4565 LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4569 /// If a LSRUse has multiple formulae with the same ScaledReg and Scale.
4570 /// Pick the best one and delete the others.
4571 /// This narrowing heuristic is to keep as many formulae with different
4572 /// Scale and ScaledReg pair as possible while narrowing the search space.
4573 /// The benefit is that it is more likely to find out a better solution
4574 /// from a formulae set with more Scale and ScaledReg variations than
4575 /// a formulae set with the same Scale and ScaledReg. The picking winner
4576 /// reg heuristic will often keep the formulae with the same Scale and
4577 /// ScaledReg and filter others, and we want to avoid that if possible.
4578 void LSRInstance::NarrowSearchSpaceByFilterFormulaWithSameScaledReg() {
4579 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4583 dbgs() << "The search space is too complex.\n"
4584 "Narrowing the search space by choosing the best Formula "
4585 "from the Formulae with the same Scale and ScaledReg.\n");
4587 // Map the "Scale * ScaledReg" pair to the best formula of current LSRUse.
4588 using BestFormulaeTy = DenseMap<std::pair<const SCEV *, int64_t>, size_t>;
4590 BestFormulaeTy BestFormulae;
4592 bool ChangedFormulae = false;
4594 DenseSet<const SCEV *> VisitedRegs;
4595 SmallPtrSet<const SCEV *, 16> Regs;
4597 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4598 LSRUse &LU = Uses[LUIdx];
4599 LLVM_DEBUG(dbgs() << "Filtering for use "; LU.print(dbgs());
4602 // Return true if Formula FA is better than Formula FB.
4603 auto IsBetterThan = [&](Formula &FA, Formula &FB) {
4604 // First we will try to choose the Formula with fewer new registers.
4605 // For a register used by current Formula, the more the register is
4606 // shared among LSRUses, the less we increase the register number
4607 // counter of the formula.
4608 size_t FARegNum = 0;
4609 for (const SCEV *Reg : FA.BaseRegs) {
4610 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4611 FARegNum += (NumUses - UsedByIndices.count() + 1);
4613 size_t FBRegNum = 0;
4614 for (const SCEV *Reg : FB.BaseRegs) {
4615 const SmallBitVector &UsedByIndices = RegUses.getUsedByIndices(Reg);
4616 FBRegNum += (NumUses - UsedByIndices.count() + 1);
4618 if (FARegNum != FBRegNum)
4619 return FARegNum < FBRegNum;
4621 // If the new register numbers are the same, choose the Formula with
4623 Cost CostFA(L, SE, TTI);
4624 Cost CostFB(L, SE, TTI);
4626 CostFA.RateFormula(FA, Regs, VisitedRegs, LU);
4628 CostFB.RateFormula(FB, Regs, VisitedRegs, LU);
4629 return CostFA.isLess(CostFB);
4633 for (size_t FIdx = 0, NumForms = LU.Formulae.size(); FIdx != NumForms;
4635 Formula &F = LU.Formulae[FIdx];
4638 auto P = BestFormulae.insert({{F.ScaledReg, F.Scale}, FIdx});
4642 Formula &Best = LU.Formulae[P.first->second];
4643 if (IsBetterThan(F, Best))
4645 LLVM_DEBUG(dbgs() << " Filtering out formula "; F.print(dbgs());
4647 " in favor of formula ";
4648 Best.print(dbgs()); dbgs() << '\n');
4650 ChangedFormulae = true;
4652 LU.DeleteFormula(F);
4658 LU.RecomputeRegs(LUIdx, RegUses);
4660 // Reset this to prepare for the next use.
4661 BestFormulae.clear();
4664 LLVM_DEBUG(if (ChangedFormulae) {
4666 "After filtering out undesirable candidates:\n";
4671 /// The function delete formulas with high registers number expectation.
4672 /// Assuming we don't know the value of each formula (already delete
4673 /// all inefficient), generate probability of not selecting for each
4677 /// reg(a) + reg({0,+,1})
4678 /// reg(a) + reg({-1,+,1}) + 1
4681 /// reg(b) + reg({0,+,1})
4682 /// reg(b) + reg({-1,+,1}) + 1
4685 /// reg(c) + reg(b) + reg({0,+,1})
4686 /// reg(c) + reg({b,+,1})
4688 /// Probability of not selecting
4690 /// reg(a) (1/3) * 1 * 1
4691 /// reg(b) 1 * (1/3) * (1/2)
4692 /// reg({0,+,1}) (2/3) * (2/3) * (1/2)
4693 /// reg({-1,+,1}) (2/3) * (2/3) * 1
4694 /// reg({a,+,1}) (2/3) * 1 * 1
4695 /// reg({b,+,1}) 1 * (2/3) * (2/3)
4696 /// reg(c) 1 * 1 * 0
4698 /// Now count registers number mathematical expectation for each formula:
4699 /// Note that for each use we exclude probability if not selecting for the use.
4700 /// For example for Use1 probability for reg(a) would be just 1 * 1 (excluding
4701 /// probabilty 1/3 of not selecting for Use1).
4703 /// reg(a) + reg({0,+,1}) 1 + 1/3 -- to be deleted
4704 /// reg(a) + reg({-1,+,1}) + 1 1 + 4/9 -- to be deleted
4707 /// reg(b) + reg({0,+,1}) 1/2 + 1/3 -- to be deleted
4708 /// reg(b) + reg({-1,+,1}) + 1 1/2 + 2/3 -- to be deleted
4709 /// reg({b,+,1}) 2/3
4711 /// reg(c) + reg(b) + reg({0,+,1}) 1 + 1/3 + 4/9 -- to be deleted
4712 /// reg(c) + reg({b,+,1}) 1 + 2/3
4713 void LSRInstance::NarrowSearchSpaceByDeletingCostlyFormulas() {
4714 if (EstimateSearchSpaceComplexity() < ComplexityLimit)
4716 // Ok, we have too many of formulae on our hands to conveniently handle.
4717 // Use a rough heuristic to thin out the list.
4719 // Set of Regs wich will be 100% used in final solution.
4720 // Used in each formula of a solution (in example above this is reg(c)).
4721 // We can skip them in calculations.
4722 SmallPtrSet<const SCEV *, 4> UniqRegs;
4723 LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4725 // Map each register to probability of not selecting
4726 DenseMap <const SCEV *, float> RegNumMap;
4727 for (const SCEV *Reg : RegUses) {
4728 if (UniqRegs.count(Reg))
4731 for (const LSRUse &LU : Uses) {
4732 if (!LU.Regs.count(Reg))
4734 float P = LU.getNotSelectedProbability(Reg);
4738 UniqRegs.insert(Reg);
4740 RegNumMap.insert(std::make_pair(Reg, PNotSel));
4744 dbgs() << "Narrowing the search space by deleting costly formulas\n");
4746 // Delete formulas where registers number expectation is high.
4747 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4748 LSRUse &LU = Uses[LUIdx];
4749 // If nothing to delete - continue.
4750 if (LU.Formulae.size() < 2)
4752 // This is temporary solution to test performance. Float should be
4753 // replaced with round independent type (based on integers) to avoid
4754 // different results for different target builds.
4755 float FMinRegNum = LU.Formulae[0].getNumRegs();
4756 float FMinARegNum = LU.Formulae[0].getNumRegs();
4758 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4759 Formula &F = LU.Formulae[i];
4762 for (const SCEV *BaseReg : F.BaseRegs) {
4763 if (UniqRegs.count(BaseReg))
4765 FRegNum += RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4766 if (isa<SCEVAddRecExpr>(BaseReg))
4768 RegNumMap[BaseReg] / LU.getNotSelectedProbability(BaseReg);
4770 if (const SCEV *ScaledReg = F.ScaledReg) {
4771 if (!UniqRegs.count(ScaledReg)) {
4773 RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4774 if (isa<SCEVAddRecExpr>(ScaledReg))
4776 RegNumMap[ScaledReg] / LU.getNotSelectedProbability(ScaledReg);
4779 if (FMinRegNum > FRegNum ||
4780 (FMinRegNum == FRegNum && FMinARegNum > FARegNum)) {
4781 FMinRegNum = FRegNum;
4782 FMinARegNum = FARegNum;
4786 LLVM_DEBUG(dbgs() << " The formula "; LU.Formulae[MinIdx].print(dbgs());
4787 dbgs() << " with min reg num " << FMinRegNum << '\n');
4789 std::swap(LU.Formulae[MinIdx], LU.Formulae[0]);
4790 while (LU.Formulae.size() != 1) {
4791 LLVM_DEBUG(dbgs() << " Deleting "; LU.Formulae.back().print(dbgs());
4793 LU.Formulae.pop_back();
4795 LU.RecomputeRegs(LUIdx, RegUses);
4796 assert(LU.Formulae.size() == 1 && "Should be exactly 1 min regs formula");
4797 Formula &F = LU.Formulae[0];
4798 LLVM_DEBUG(dbgs() << " Leaving only "; F.print(dbgs()); dbgs() << '\n');
4799 // When we choose the formula, the regs become unique.
4800 UniqRegs.insert(F.BaseRegs.begin(), F.BaseRegs.end());
4802 UniqRegs.insert(F.ScaledReg);
4804 LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4807 /// Pick a register which seems likely to be profitable, and then in any use
4808 /// which has any reference to that register, delete all formulae which do not
4809 /// reference that register.
4810 void LSRInstance::NarrowSearchSpaceByPickingWinnerRegs() {
4811 // With all other options exhausted, loop until the system is simple
4812 // enough to handle.
4813 SmallPtrSet<const SCEV *, 4> Taken;
4814 while (EstimateSearchSpaceComplexity() >= ComplexityLimit) {
4815 // Ok, we have too many of formulae on our hands to conveniently handle.
4816 // Use a rough heuristic to thin out the list.
4817 LLVM_DEBUG(dbgs() << "The search space is too complex.\n");
4819 // Pick the register which is used by the most LSRUses, which is likely
4820 // to be a good reuse register candidate.
4821 const SCEV *Best = nullptr;
4822 unsigned BestNum = 0;
4823 for (const SCEV *Reg : RegUses) {
4824 if (Taken.count(Reg))
4828 BestNum = RegUses.getUsedByIndices(Reg).count();
4830 unsigned Count = RegUses.getUsedByIndices(Reg).count();
4831 if (Count > BestNum) {
4838 LLVM_DEBUG(dbgs() << "Narrowing the search space by assuming " << *Best
4839 << " will yield profitable reuse.\n");
4842 // In any use with formulae which references this register, delete formulae
4843 // which don't reference it.
4844 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx) {
4845 LSRUse &LU = Uses[LUIdx];
4846 if (!LU.Regs.count(Best)) continue;
4849 for (size_t i = 0, e = LU.Formulae.size(); i != e; ++i) {
4850 Formula &F = LU.Formulae[i];
4851 if (!F.referencesReg(Best)) {
4852 LLVM_DEBUG(dbgs() << " Deleting "; F.print(dbgs()); dbgs() << '\n');
4853 LU.DeleteFormula(F);
4857 assert(e != 0 && "Use has no formulae left! Is Regs inconsistent?");
4863 LU.RecomputeRegs(LUIdx, RegUses);
4866 LLVM_DEBUG(dbgs() << "After pre-selection:\n"; print_uses(dbgs()));
4870 /// If there are an extraordinary number of formulae to choose from, use some
4871 /// rough heuristics to prune down the number of formulae. This keeps the main
4872 /// solver from taking an extraordinary amount of time in some worst-case
4874 void LSRInstance::NarrowSearchSpaceUsingHeuristics() {
4875 NarrowSearchSpaceByDetectingSupersets();
4876 NarrowSearchSpaceByCollapsingUnrolledCode();
4877 NarrowSearchSpaceByRefilteringUndesirableDedicatedRegisters();
4878 if (FilterSameScaledReg)
4879 NarrowSearchSpaceByFilterFormulaWithSameScaledReg();
4881 NarrowSearchSpaceByDeletingCostlyFormulas();
4883 NarrowSearchSpaceByPickingWinnerRegs();
4886 /// This is the recursive solver.
4887 void LSRInstance::SolveRecurse(SmallVectorImpl<const Formula *> &Solution,
4889 SmallVectorImpl<const Formula *> &Workspace,
4890 const Cost &CurCost,
4891 const SmallPtrSet<const SCEV *, 16> &CurRegs,
4892 DenseSet<const SCEV *> &VisitedRegs) const {
4895 // - use more aggressive filtering
4896 // - sort the formula so that the most profitable solutions are found first
4897 // - sort the uses too
4899 // - don't compute a cost, and then compare. compare while computing a cost
4901 // - track register sets with SmallBitVector
4903 const LSRUse &LU = Uses[Workspace.size()];
4905 // If this use references any register that's already a part of the
4906 // in-progress solution, consider it a requirement that a formula must
4907 // reference that register in order to be considered. This prunes out
4908 // unprofitable searching.
4909 SmallSetVector<const SCEV *, 4> ReqRegs;
4910 for (const SCEV *S : CurRegs)
4911 if (LU.Regs.count(S))
4914 SmallPtrSet<const SCEV *, 16> NewRegs;
4915 Cost NewCost(L, SE, TTI);
4916 for (const Formula &F : LU.Formulae) {
4917 // Ignore formulae which may not be ideal in terms of register reuse of
4918 // ReqRegs. The formula should use all required registers before
4919 // introducing new ones.
4920 int NumReqRegsToFind = std::min(F.getNumRegs(), ReqRegs.size());
4921 for (const SCEV *Reg : ReqRegs) {
4922 if ((F.ScaledReg && F.ScaledReg == Reg) ||
4923 is_contained(F.BaseRegs, Reg)) {
4925 if (NumReqRegsToFind == 0)
4929 if (NumReqRegsToFind != 0) {
4930 // If none of the formulae satisfied the required registers, then we could
4931 // clear ReqRegs and try again. Currently, we simply give up in this case.
4935 // Evaluate the cost of the current formula. If it's already worse than
4936 // the current best, prune the search at that point.
4939 NewCost.RateFormula(F, NewRegs, VisitedRegs, LU);
4940 if (NewCost.isLess(SolutionCost)) {
4941 Workspace.push_back(&F);
4942 if (Workspace.size() != Uses.size()) {
4943 SolveRecurse(Solution, SolutionCost, Workspace, NewCost,
4944 NewRegs, VisitedRegs);
4945 if (F.getNumRegs() == 1 && Workspace.size() == 1)
4946 VisitedRegs.insert(F.ScaledReg ? F.ScaledReg : F.BaseRegs[0]);
4948 LLVM_DEBUG(dbgs() << "New best at "; NewCost.print(dbgs());
4949 dbgs() << ".\nRegs:\n";
4950 for (const SCEV *S : NewRegs) dbgs()
4951 << "- " << *S << "\n";
4954 SolutionCost = NewCost;
4955 Solution = Workspace;
4957 Workspace.pop_back();
4962 /// Choose one formula from each use. Return the results in the given Solution
4964 void LSRInstance::Solve(SmallVectorImpl<const Formula *> &Solution) const {
4965 SmallVector<const Formula *, 8> Workspace;
4966 Cost SolutionCost(L, SE, TTI);
4967 SolutionCost.Lose();
4968 Cost CurCost(L, SE, TTI);
4969 SmallPtrSet<const SCEV *, 16> CurRegs;
4970 DenseSet<const SCEV *> VisitedRegs;
4971 Workspace.reserve(Uses.size());
4973 // SolveRecurse does all the work.
4974 SolveRecurse(Solution, SolutionCost, Workspace, CurCost,
4975 CurRegs, VisitedRegs);
4976 if (Solution.empty()) {
4977 LLVM_DEBUG(dbgs() << "\nNo Satisfactory Solution\n");
4981 // Ok, we've now made all our decisions.
4982 LLVM_DEBUG(dbgs() << "\n"
4983 "The chosen solution requires ";
4984 SolutionCost.print(dbgs()); dbgs() << ":\n";
4985 for (size_t i = 0, e = Uses.size(); i != e; ++i) {
4987 Uses[i].print(dbgs());
4990 Solution[i]->print(dbgs());
4994 assert(Solution.size() == Uses.size() && "Malformed solution!");
4997 /// Helper for AdjustInsertPositionForExpand. Climb up the dominator tree far as
4998 /// we can go while still being dominated by the input positions. This helps
4999 /// canonicalize the insert position, which encourages sharing.
5000 BasicBlock::iterator
5001 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
5002 const SmallVectorImpl<Instruction *> &Inputs)
5004 Instruction *Tentative = &*IP;
5006 bool AllDominate = true;
5007 Instruction *BetterPos = nullptr;
5008 // Don't bother attempting to insert before a catchswitch, their basic block
5009 // cannot have other non-PHI instructions.
5010 if (isa<CatchSwitchInst>(Tentative))
5013 for (Instruction *Inst : Inputs) {
5014 if (Inst == Tentative || !DT.dominates(Inst, Tentative)) {
5015 AllDominate = false;
5018 // Attempt to find an insert position in the middle of the block,
5019 // instead of at the end, so that it can be used for other expansions.
5020 if (Tentative->getParent() == Inst->getParent() &&
5021 (!BetterPos || !DT.dominates(Inst, BetterPos)))
5022 BetterPos = &*std::next(BasicBlock::iterator(Inst));
5027 IP = BetterPos->getIterator();
5029 IP = Tentative->getIterator();
5031 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
5032 unsigned IPLoopDepth = IPLoop ? IPLoop->getLoopDepth() : 0;
5035 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
5036 if (!Rung) return IP;
5037 Rung = Rung->getIDom();
5038 if (!Rung) return IP;
5039 IDom = Rung->getBlock();
5041 // Don't climb into a loop though.
5042 const Loop *IDomLoop = LI.getLoopFor(IDom);
5043 unsigned IDomDepth = IDomLoop ? IDomLoop->getLoopDepth() : 0;
5044 if (IDomDepth <= IPLoopDepth &&
5045 (IDomDepth != IPLoopDepth || IDomLoop == IPLoop))
5049 Tentative = IDom->getTerminator();
5055 /// Determine an input position which will be dominated by the operands and
5056 /// which will dominate the result.
5057 BasicBlock::iterator
5058 LSRInstance::AdjustInsertPositionForExpand(BasicBlock::iterator LowestIP,
5061 SCEVExpander &Rewriter) const {
5062 // Collect some instructions which must be dominated by the
5063 // expanding replacement. These must be dominated by any operands that
5064 // will be required in the expansion.
5065 SmallVector<Instruction *, 4> Inputs;
5066 if (Instruction *I = dyn_cast<Instruction>(LF.OperandValToReplace))
5067 Inputs.push_back(I);
5068 if (LU.Kind == LSRUse::ICmpZero)
5069 if (Instruction *I =
5070 dyn_cast<Instruction>(cast<ICmpInst>(LF.UserInst)->getOperand(1)))
5071 Inputs.push_back(I);
5072 if (LF.PostIncLoops.count(L)) {
5073 if (LF.isUseFullyOutsideLoop(L))
5074 Inputs.push_back(L->getLoopLatch()->getTerminator());
5076 Inputs.push_back(IVIncInsertPos);
5078 // The expansion must also be dominated by the increment positions of any
5079 // loops it for which it is using post-inc mode.
5080 for (const Loop *PIL : LF.PostIncLoops) {
5081 if (PIL == L) continue;
5083 // Be dominated by the loop exit.
5084 SmallVector<BasicBlock *, 4> ExitingBlocks;
5085 PIL->getExitingBlocks(ExitingBlocks);
5086 if (!ExitingBlocks.empty()) {
5087 BasicBlock *BB = ExitingBlocks[0];
5088 for (unsigned i = 1, e = ExitingBlocks.size(); i != e; ++i)
5089 BB = DT.findNearestCommonDominator(BB, ExitingBlocks[i]);
5090 Inputs.push_back(BB->getTerminator());
5094 assert(!isa<PHINode>(LowestIP) && !LowestIP->isEHPad()
5095 && !isa<DbgInfoIntrinsic>(LowestIP) &&
5096 "Insertion point must be a normal instruction");
5098 // Then, climb up the immediate dominator tree as far as we can go while
5099 // still being dominated by the input positions.
5100 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
5102 // Don't insert instructions before PHI nodes.
5103 while (isa<PHINode>(IP)) ++IP;
5105 // Ignore landingpad instructions.
5106 while (IP->isEHPad()) ++IP;
5108 // Ignore debug intrinsics.
5109 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
5111 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
5112 // IP consistent across expansions and allows the previously inserted
5113 // instructions to be reused by subsequent expansion.
5114 while (Rewriter.isInsertedInstruction(&*IP) && IP != LowestIP)
5120 /// Emit instructions for the leading candidate expression for this LSRUse (this
5121 /// is called "expanding").
5122 Value *LSRInstance::Expand(const LSRUse &LU, const LSRFixup &LF,
5123 const Formula &F, BasicBlock::iterator IP,
5124 SCEVExpander &Rewriter,
5125 SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5126 if (LU.RigidFormula)
5127 return LF.OperandValToReplace;
5129 // Determine an input position which will be dominated by the operands and
5130 // which will dominate the result.
5131 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
5132 Rewriter.setInsertPoint(&*IP);
5134 // Inform the Rewriter if we have a post-increment use, so that it can
5135 // perform an advantageous expansion.
5136 Rewriter.setPostInc(LF.PostIncLoops);
5138 // This is the type that the user actually needs.
5139 Type *OpTy = LF.OperandValToReplace->getType();
5140 // This will be the type that we'll initially expand to.
5141 Type *Ty = F.getType();
5143 // No type known; just expand directly to the ultimate type.
5145 else if (SE.getEffectiveSCEVType(Ty) == SE.getEffectiveSCEVType(OpTy))
5146 // Expand directly to the ultimate type if it's the right size.
5148 // This is the type to do integer arithmetic in.
5149 Type *IntTy = SE.getEffectiveSCEVType(Ty);
5151 // Build up a list of operands to add together to form the full base.
5152 SmallVector<const SCEV *, 8> Ops;
5154 // Expand the BaseRegs portion.
5155 for (const SCEV *Reg : F.BaseRegs) {
5156 assert(!Reg->isZero() && "Zero allocated in a base register!");
5158 // If we're expanding for a post-inc user, make the post-inc adjustment.
5159 Reg = denormalizeForPostIncUse(Reg, LF.PostIncLoops, SE);
5160 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr)));
5163 // Expand the ScaledReg portion.
5164 Value *ICmpScaledV = nullptr;
5166 const SCEV *ScaledS = F.ScaledReg;
5168 // If we're expanding for a post-inc user, make the post-inc adjustment.
5169 PostIncLoopSet &Loops = const_cast<PostIncLoopSet &>(LF.PostIncLoops);
5170 ScaledS = denormalizeForPostIncUse(ScaledS, Loops, SE);
5172 if (LU.Kind == LSRUse::ICmpZero) {
5173 // Expand ScaleReg as if it was part of the base regs.
5176 SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr)));
5178 // An interesting way of "folding" with an icmp is to use a negated
5179 // scale, which we'll implement by inserting it into the other operand
5181 assert(F.Scale == -1 &&
5182 "The only scale supported by ICmpZero uses is -1!");
5183 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr);
5186 // Otherwise just expand the scaled register and an explicit scale,
5187 // which is expected to be matched as part of the address.
5189 // Flush the operand list to suppress SCEVExpander hoisting address modes.
5190 // Unless the addressing mode will not be folded.
5191 if (!Ops.empty() && LU.Kind == LSRUse::Address &&
5192 isAMCompletelyFolded(TTI, LU, F)) {
5193 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), nullptr);
5195 Ops.push_back(SE.getUnknown(FullV));
5197 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr));
5200 SE.getMulExpr(ScaledS, SE.getConstant(ScaledS->getType(), F.Scale));
5201 Ops.push_back(ScaledS);
5205 // Expand the GV portion.
5207 // Flush the operand list to suppress SCEVExpander hoisting.
5209 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5211 Ops.push_back(SE.getUnknown(FullV));
5213 Ops.push_back(SE.getUnknown(F.BaseGV));
5216 // Flush the operand list to suppress SCEVExpander hoisting of both folded and
5217 // unfolded offsets. LSR assumes they both live next to their uses.
5219 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty);
5221 Ops.push_back(SE.getUnknown(FullV));
5224 // Expand the immediate portion.
5225 int64_t Offset = (uint64_t)F.BaseOffset + LF.Offset;
5227 if (LU.Kind == LSRUse::ICmpZero) {
5228 // The other interesting way of "folding" with an ICmpZero is to use a
5229 // negated immediate.
5231 ICmpScaledV = ConstantInt::get(IntTy, -(uint64_t)Offset);
5233 Ops.push_back(SE.getUnknown(ICmpScaledV));
5234 ICmpScaledV = ConstantInt::get(IntTy, Offset);
5237 // Just add the immediate values. These again are expected to be matched
5238 // as part of the address.
5239 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy, Offset)));
5243 // Expand the unfolded offset portion.
5244 int64_t UnfoldedOffset = F.UnfoldedOffset;
5245 if (UnfoldedOffset != 0) {
5246 // Just add the immediate values.
5247 Ops.push_back(SE.getUnknown(ConstantInt::getSigned(IntTy,
5251 // Emit instructions summing all the operands.
5252 const SCEV *FullS = Ops.empty() ?
5253 SE.getConstant(IntTy, 0) :
5255 Value *FullV = Rewriter.expandCodeFor(FullS, Ty);
5257 // We're done expanding now, so reset the rewriter.
5258 Rewriter.clearPostInc();
5260 // An ICmpZero Formula represents an ICmp which we're handling as a
5261 // comparison against zero. Now that we've expanded an expression for that
5262 // form, update the ICmp's other operand.
5263 if (LU.Kind == LSRUse::ICmpZero) {
5264 ICmpInst *CI = cast<ICmpInst>(LF.UserInst);
5265 DeadInsts.emplace_back(CI->getOperand(1));
5266 assert(!F.BaseGV && "ICmp does not support folding a global value and "
5267 "a scale at the same time!");
5268 if (F.Scale == -1) {
5269 if (ICmpScaledV->getType() != OpTy) {
5271 CastInst::Create(CastInst::getCastOpcode(ICmpScaledV, false,
5273 ICmpScaledV, OpTy, "tmp", CI);
5276 CI->setOperand(1, ICmpScaledV);
5278 // A scale of 1 means that the scale has been expanded as part of the
5280 assert((F.Scale == 0 || F.Scale == 1) &&
5281 "ICmp does not support folding a global value and "
5282 "a scale at the same time!");
5283 Constant *C = ConstantInt::getSigned(SE.getEffectiveSCEVType(OpTy),
5285 if (C->getType() != OpTy)
5286 C = ConstantExpr::getCast(CastInst::getCastOpcode(C, false,
5290 CI->setOperand(1, C);
5297 /// Helper for Rewrite. PHI nodes are special because the use of their operands
5298 /// effectively happens in their predecessor blocks, so the expression may need
5299 /// to be expanded in multiple places.
5300 void LSRInstance::RewriteForPHI(
5301 PHINode *PN, const LSRUse &LU, const LSRFixup &LF, const Formula &F,
5302 SCEVExpander &Rewriter, SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5303 DenseMap<BasicBlock *, Value *> Inserted;
5304 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
5305 if (PN->getIncomingValue(i) == LF.OperandValToReplace) {
5306 bool needUpdateFixups = false;
5307 BasicBlock *BB = PN->getIncomingBlock(i);
5309 // If this is a critical edge, split the edge so that we do not insert
5310 // the code on all predecessor/successor paths. We do this unless this
5311 // is the canonical backedge for this loop, which complicates post-inc
5313 if (e != 1 && BB->getTerminator()->getNumSuccessors() > 1 &&
5314 !isa<IndirectBrInst>(BB->getTerminator()) &&
5315 !isa<CatchSwitchInst>(BB->getTerminator())) {
5316 BasicBlock *Parent = PN->getParent();
5317 Loop *PNLoop = LI.getLoopFor(Parent);
5318 if (!PNLoop || Parent != PNLoop->getHeader()) {
5319 // Split the critical edge.
5320 BasicBlock *NewBB = nullptr;
5321 if (!Parent->isLandingPad()) {
5322 NewBB = SplitCriticalEdge(BB, Parent,
5323 CriticalEdgeSplittingOptions(&DT, &LI)
5324 .setMergeIdenticalEdges()
5325 .setKeepOneInputPHIs());
5327 SmallVector<BasicBlock*, 2> NewBBs;
5328 SplitLandingPadPredecessors(Parent, BB, "", "", NewBBs, &DT, &LI);
5331 // If NewBB==NULL, then SplitCriticalEdge refused to split because all
5332 // phi predecessors are identical. The simple thing to do is skip
5333 // splitting in this case rather than complicate the API.
5335 // If PN is outside of the loop and BB is in the loop, we want to
5336 // move the block to be immediately before the PHI block, not
5337 // immediately after BB.
5338 if (L->contains(BB) && !L->contains(PN))
5339 NewBB->moveBefore(PN->getParent());
5341 // Splitting the edge can reduce the number of PHI entries we have.
5342 e = PN->getNumIncomingValues();
5344 i = PN->getBasicBlockIndex(BB);
5346 needUpdateFixups = true;
5351 std::pair<DenseMap<BasicBlock *, Value *>::iterator, bool> Pair =
5352 Inserted.insert(std::make_pair(BB, static_cast<Value *>(nullptr)));
5354 PN->setIncomingValue(i, Pair.first->second);
5356 Value *FullV = Expand(LU, LF, F, BB->getTerminator()->getIterator(),
5357 Rewriter, DeadInsts);
5359 // If this is reuse-by-noop-cast, insert the noop cast.
5360 Type *OpTy = LF.OperandValToReplace->getType();
5361 if (FullV->getType() != OpTy)
5363 CastInst::Create(CastInst::getCastOpcode(FullV, false,
5365 FullV, LF.OperandValToReplace->getType(),
5366 "tmp", BB->getTerminator());
5368 PN->setIncomingValue(i, FullV);
5369 Pair.first->second = FullV;
5372 // If LSR splits critical edge and phi node has other pending
5373 // fixup operands, we need to update those pending fixups. Otherwise
5374 // formulae will not be implemented completely and some instructions
5375 // will not be eliminated.
5376 if (needUpdateFixups) {
5377 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx)
5378 for (LSRFixup &Fixup : Uses[LUIdx].Fixups)
5379 // If fixup is supposed to rewrite some operand in the phi
5380 // that was just updated, it may be already moved to
5381 // another phi node. Such fixup requires update.
5382 if (Fixup.UserInst == PN) {
5383 // Check if the operand we try to replace still exists in the
5385 bool foundInOriginalPHI = false;
5386 for (const auto &val : PN->incoming_values())
5387 if (val == Fixup.OperandValToReplace) {
5388 foundInOriginalPHI = true;
5392 // If fixup operand found in original PHI - nothing to do.
5393 if (foundInOriginalPHI)
5396 // Otherwise it might be moved to another PHI and requires update.
5397 // If fixup operand not found in any of the incoming blocks that
5398 // means we have already rewritten it - nothing to do.
5399 for (const auto &Block : PN->blocks())
5400 for (BasicBlock::iterator I = Block->begin(); isa<PHINode>(I);
5402 PHINode *NewPN = cast<PHINode>(I);
5403 for (const auto &val : NewPN->incoming_values())
5404 if (val == Fixup.OperandValToReplace)
5405 Fixup.UserInst = NewPN;
5412 /// Emit instructions for the leading candidate expression for this LSRUse (this
5413 /// is called "expanding"), and update the UserInst to reference the newly
5415 void LSRInstance::Rewrite(const LSRUse &LU, const LSRFixup &LF,
5416 const Formula &F, SCEVExpander &Rewriter,
5417 SmallVectorImpl<WeakTrackingVH> &DeadInsts) const {
5418 // First, find an insertion point that dominates UserInst. For PHI nodes,
5419 // find the nearest block which dominates all the relevant uses.
5420 if (PHINode *PN = dyn_cast<PHINode>(LF.UserInst)) {
5421 RewriteForPHI(PN, LU, LF, F, Rewriter, DeadInsts);
5424 Expand(LU, LF, F, LF.UserInst->getIterator(), Rewriter, DeadInsts);
5426 // If this is reuse-by-noop-cast, insert the noop cast.
5427 Type *OpTy = LF.OperandValToReplace->getType();
5428 if (FullV->getType() != OpTy) {
5430 CastInst::Create(CastInst::getCastOpcode(FullV, false, OpTy, false),
5431 FullV, OpTy, "tmp", LF.UserInst);
5435 // Update the user. ICmpZero is handled specially here (for now) because
5436 // Expand may have updated one of the operands of the icmp already, and
5437 // its new value may happen to be equal to LF.OperandValToReplace, in
5438 // which case doing replaceUsesOfWith leads to replacing both operands
5439 // with the same value. TODO: Reorganize this.
5440 if (LU.Kind == LSRUse::ICmpZero)
5441 LF.UserInst->setOperand(0, FullV);
5443 LF.UserInst->replaceUsesOfWith(LF.OperandValToReplace, FullV);
5446 DeadInsts.emplace_back(LF.OperandValToReplace);
5449 /// Rewrite all the fixup locations with new values, following the chosen
5451 void LSRInstance::ImplementSolution(
5452 const SmallVectorImpl<const Formula *> &Solution) {
5453 // Keep track of instructions we may have made dead, so that
5454 // we can remove them after we are done working.
5455 SmallVector<WeakTrackingVH, 16> DeadInsts;
5457 SCEVExpander Rewriter(SE, L->getHeader()->getModule()->getDataLayout(),
5460 Rewriter.setDebugType(DEBUG_TYPE);
5462 Rewriter.disableCanonicalMode();
5463 Rewriter.enableLSRMode();
5464 Rewriter.setIVIncInsertPos(L, IVIncInsertPos);
5466 // Mark phi nodes that terminate chains so the expander tries to reuse them.
5467 for (const IVChain &Chain : IVChainVec) {
5468 if (PHINode *PN = dyn_cast<PHINode>(Chain.tailUserInst()))
5469 Rewriter.setChainedPhi(PN);
5472 // Expand the new value definitions and update the users.
5473 for (size_t LUIdx = 0, NumUses = Uses.size(); LUIdx != NumUses; ++LUIdx)
5474 for (const LSRFixup &Fixup : Uses[LUIdx].Fixups) {
5475 Rewrite(Uses[LUIdx], Fixup, *Solution[LUIdx], Rewriter, DeadInsts);
5479 for (const IVChain &Chain : IVChainVec) {
5480 GenerateIVChain(Chain, Rewriter, DeadInsts);
5483 // Clean up after ourselves. This must be done before deleting any
5487 Changed |= DeleteTriviallyDeadInstructions(DeadInsts);
5490 LSRInstance::LSRInstance(Loop *L, IVUsers &IU, ScalarEvolution &SE,
5491 DominatorTree &DT, LoopInfo &LI,
5492 const TargetTransformInfo &TTI, AssumptionCache &AC,
5493 TargetLibraryInfo &LibInfo)
5494 : IU(IU), SE(SE), DT(DT), LI(LI), AC(AC), LibInfo(LibInfo), TTI(TTI), L(L),
5495 FavorBackedgeIndex(EnableBackedgeIndexing &&
5496 TTI.shouldFavorBackedgeIndex(L)) {
5497 // If LoopSimplify form is not available, stay out of trouble.
5498 if (!L->isLoopSimplifyForm())
5501 // If there's no interesting work to be done, bail early.
5502 if (IU.empty()) return;
5504 // If there's too much analysis to be done, bail early. We won't be able to
5505 // model the problem anyway.
5506 unsigned NumUsers = 0;
5507 for (const IVStrideUse &U : IU) {
5508 if (++NumUsers > MaxIVUsers) {
5510 LLVM_DEBUG(dbgs() << "LSR skipping loop, too many IV Users in " << U
5514 // Bail out if we have a PHI on an EHPad that gets a value from a
5515 // CatchSwitchInst. Because the CatchSwitchInst cannot be split, there is
5516 // no good place to stick any instructions.
5517 if (auto *PN = dyn_cast<PHINode>(U.getUser())) {
5518 auto *FirstNonPHI = PN->getParent()->getFirstNonPHI();
5519 if (isa<FuncletPadInst>(FirstNonPHI) ||
5520 isa<CatchSwitchInst>(FirstNonPHI))
5521 for (BasicBlock *PredBB : PN->blocks())
5522 if (isa<CatchSwitchInst>(PredBB->getFirstNonPHI()))
5528 // All dominating loops must have preheaders, or SCEVExpander may not be able
5529 // to materialize an AddRecExpr whose Start is an outer AddRecExpr.
5531 // IVUsers analysis should only create users that are dominated by simple loop
5532 // headers. Since this loop should dominate all of its users, its user list
5533 // should be empty if this loop itself is not within a simple loop nest.
5534 for (DomTreeNode *Rung = DT.getNode(L->getLoopPreheader());
5535 Rung; Rung = Rung->getIDom()) {
5536 BasicBlock *BB = Rung->getBlock();
5537 const Loop *DomLoop = LI.getLoopFor(BB);
5538 if (DomLoop && DomLoop->getHeader() == BB) {
5539 assert(DomLoop->getLoopPreheader() && "LSR needs a simplified loop nest");
5544 LLVM_DEBUG(dbgs() << "\nLSR on loop ";
5545 L->getHeader()->printAsOperand(dbgs(), /*PrintType=*/false);
5548 // First, perform some low-level loop optimizations.
5550 OptimizeLoopTermCond();
5552 // If loop preparation eliminates all interesting IV users, bail.
5553 if (IU.empty()) return;
5555 // Skip nested loops until we can model them better with formulae.
5557 LLVM_DEBUG(dbgs() << "LSR skipping outer loop " << *L << "\n");
5561 // Start collecting data and preparing for the solver.
5563 CollectInterestingTypesAndFactors();
5564 CollectFixupsAndInitialFormulae();
5565 CollectLoopInvariantFixupsAndFormulae();
5570 LLVM_DEBUG(dbgs() << "LSR found " << Uses.size() << " uses:\n";
5571 print_uses(dbgs()));
5573 // Now use the reuse data to generate a bunch of interesting ways
5574 // to formulate the values needed for the uses.
5575 GenerateAllReuseFormulae();
5577 FilterOutUndesirableDedicatedRegisters();
5578 NarrowSearchSpaceUsingHeuristics();
5580 SmallVector<const Formula *, 8> Solution;
5583 // Release memory that is no longer needed.
5588 if (Solution.empty())
5592 // Formulae should be legal.
5593 for (const LSRUse &LU : Uses) {
5594 for (const Formula &F : LU.Formulae)
5595 assert(isLegalUse(TTI, LU.MinOffset, LU.MaxOffset, LU.Kind, LU.AccessTy,
5596 F) && "Illegal formula generated!");
5600 // Now that we've decided what we want, make it so.
5601 ImplementSolution(Solution);
5604 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
5605 void LSRInstance::print_factors_and_types(raw_ostream &OS) const {
5606 if (Factors.empty() && Types.empty()) return;
5608 OS << "LSR has identified the following interesting factors and types: ";
5611 for (int64_t Factor : Factors) {
5612 if (!First) OS << ", ";
5614 OS << '*' << Factor;
5617 for (Type *Ty : Types) {
5618 if (!First) OS << ", ";
5620 OS << '(' << *Ty << ')';
5625 void LSRInstance::print_fixups(raw_ostream &OS) const {
5626 OS << "LSR is examining the following fixup sites:\n";
5627 for (const LSRUse &LU : Uses)
5628 for (const LSRFixup &LF : LU.Fixups) {
5635 void LSRInstance::print_uses(raw_ostream &OS) const {
5636 OS << "LSR is examining the following uses:\n";
5637 for (const LSRUse &LU : Uses) {
5641 for (const Formula &F : LU.Formulae) {
5649 void LSRInstance::print(raw_ostream &OS) const {
5650 print_factors_and_types(OS);
5655 LLVM_DUMP_METHOD void LSRInstance::dump() const {
5656 print(errs()); errs() << '\n';
5662 class LoopStrengthReduce : public LoopPass {
5664 static char ID; // Pass ID, replacement for typeid
5666 LoopStrengthReduce();
5669 bool runOnLoop(Loop *L, LPPassManager &LPM) override;
5670 void getAnalysisUsage(AnalysisUsage &AU) const override;
5673 } // end anonymous namespace
5675 LoopStrengthReduce::LoopStrengthReduce() : LoopPass(ID) {
5676 initializeLoopStrengthReducePass(*PassRegistry::getPassRegistry());
5679 void LoopStrengthReduce::getAnalysisUsage(AnalysisUsage &AU) const {
5680 // We split critical edges, so we change the CFG. However, we do update
5681 // many analyses if they are around.
5682 AU.addPreservedID(LoopSimplifyID);
5684 AU.addRequired<LoopInfoWrapperPass>();
5685 AU.addPreserved<LoopInfoWrapperPass>();
5686 AU.addRequiredID(LoopSimplifyID);
5687 AU.addRequired<DominatorTreeWrapperPass>();
5688 AU.addPreserved<DominatorTreeWrapperPass>();
5689 AU.addRequired<ScalarEvolutionWrapperPass>();
5690 AU.addPreserved<ScalarEvolutionWrapperPass>();
5691 AU.addRequired<AssumptionCacheTracker>();
5692 AU.addRequired<TargetLibraryInfoWrapperPass>();
5693 // Requiring LoopSimplify a second time here prevents IVUsers from running
5694 // twice, since LoopSimplify was invalidated by running ScalarEvolution.
5695 AU.addRequiredID(LoopSimplifyID);
5696 AU.addRequired<IVUsersWrapperPass>();
5697 AU.addPreserved<IVUsersWrapperPass>();
5698 AU.addRequired<TargetTransformInfoWrapperPass>();
5701 static bool ReduceLoopStrength(Loop *L, IVUsers &IU, ScalarEvolution &SE,
5702 DominatorTree &DT, LoopInfo &LI,
5703 const TargetTransformInfo &TTI,
5704 AssumptionCache &AC,
5705 TargetLibraryInfo &LibInfo) {
5707 bool Changed = false;
5709 // Run the main LSR transformation.
5710 Changed |= LSRInstance(L, IU, SE, DT, LI, TTI, AC, LibInfo).getChanged();
5712 // Remove any extra phis created by processing inner loops.
5713 Changed |= DeleteDeadPHIs(L->getHeader());
5714 if (EnablePhiElim && L->isLoopSimplifyForm()) {
5715 SmallVector<WeakTrackingVH, 16> DeadInsts;
5716 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
5717 SCEVExpander Rewriter(SE, DL, "lsr");
5719 Rewriter.setDebugType(DEBUG_TYPE);
5721 unsigned numFolded = Rewriter.replaceCongruentIVs(L, &DT, DeadInsts, &TTI);
5724 DeleteTriviallyDeadInstructions(DeadInsts);
5725 DeleteDeadPHIs(L->getHeader());
5731 bool LoopStrengthReduce::runOnLoop(Loop *L, LPPassManager & /*LPM*/) {
5735 auto &IU = getAnalysis<IVUsersWrapperPass>().getIU();
5736 auto &SE = getAnalysis<ScalarEvolutionWrapperPass>().getSE();
5737 auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
5738 auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
5739 const auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(
5740 *L->getHeader()->getParent());
5741 auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(
5742 *L->getHeader()->getParent());
5743 auto &LibInfo = getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
5744 return ReduceLoopStrength(L, IU, SE, DT, LI, TTI, AC, LibInfo);
5747 PreservedAnalyses LoopStrengthReducePass::run(Loop &L, LoopAnalysisManager &AM,
5748 LoopStandardAnalysisResults &AR,
5750 if (!ReduceLoopStrength(&L, AM.getResult<IVUsersAnalysis>(L, AR), AR.SE,
5751 AR.DT, AR.LI, AR.TTI, AR.AC, AR.TLI))
5752 return PreservedAnalyses::all();
5754 return getLoopPassPreservedAnalyses();
5757 char LoopStrengthReduce::ID = 0;
5759 INITIALIZE_PASS_BEGIN(LoopStrengthReduce, "loop-reduce",
5760 "Loop Strength Reduction", false, false)
5761 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
5762 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
5763 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
5764 INITIALIZE_PASS_DEPENDENCY(IVUsersWrapperPass)
5765 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
5766 INITIALIZE_PASS_DEPENDENCY(LoopSimplify)
5767 INITIALIZE_PASS_END(LoopStrengthReduce, "loop-reduce",
5768 "Loop Strength Reduction", false, false)
5770 Pass *llvm::createLoopStrengthReducePass() { return new LoopStrengthReduce(); }