1 //===- LoopVectorize.cpp - A Loop Vectorizer ------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is the LLVM loop vectorizer. This pass modifies 'vectorizable' loops
11 // and generates target-independent LLVM-IR.
12 // The vectorizer uses the TargetTransformInfo analysis to estimate the costs
13 // of instructions in order to estimate the profitability of vectorization.
15 // The loop vectorizer combines consecutive loop iterations into a single
16 // 'wide' iteration. After this transformation the index is incremented
17 // by the SIMD vector width, and not by one.
19 // This pass has three parts:
20 // 1. The main loop pass that drives the different parts.
21 // 2. LoopVectorizationLegality - A unit that checks for the legality
22 // of the vectorization.
23 // 3. InnerLoopVectorizer - A unit that performs the actual
24 // widening of instructions.
25 // 4. LoopVectorizationCostModel - A unit that checks for the profitability
26 // of vectorization. It decides on the optimal vector width, which
27 // can be one, if vectorization is not profitable.
29 //===----------------------------------------------------------------------===//
31 // The reduction-variable vectorization is based on the paper:
32 // D. Nuzman and R. Henderson. Multi-platform Auto-vectorization.
34 // Variable uniformity checks are inspired by:
35 // Karrenberg, R. and Hack, S. Whole Function Vectorization.
37 // The interleaved access vectorization is based on the paper:
38 // Dorit Nuzman, Ira Rosen and Ayal Zaks. Auto-Vectorization of Interleaved
41 // Other ideas/concepts are from:
42 // A. Zaks and D. Nuzman. Autovectorization in GCC-two years later.
44 // S. Maleki, Y. Gao, M. Garzaran, T. Wong and D. Padua. An Evaluation of
45 // Vectorizing Compilers.
47 //===----------------------------------------------------------------------===//
49 #include "llvm/Transforms/Vectorize/LoopVectorize.h"
51 #include "VPlanBuilder.h"
52 #include "llvm/ADT/APInt.h"
53 #include "llvm/ADT/ArrayRef.h"
54 #include "llvm/ADT/DenseMap.h"
55 #include "llvm/ADT/DenseMapInfo.h"
56 #include "llvm/ADT/Hashing.h"
57 #include "llvm/ADT/MapVector.h"
58 #include "llvm/ADT/None.h"
59 #include "llvm/ADT/Optional.h"
60 #include "llvm/ADT/SCCIterator.h"
61 #include "llvm/ADT/STLExtras.h"
62 #include "llvm/ADT/SetVector.h"
63 #include "llvm/ADT/SmallPtrSet.h"
64 #include "llvm/ADT/SmallSet.h"
65 #include "llvm/ADT/SmallVector.h"
66 #include "llvm/ADT/Statistic.h"
67 #include "llvm/ADT/StringRef.h"
68 #include "llvm/ADT/Twine.h"
69 #include "llvm/ADT/iterator_range.h"
70 #include "llvm/Analysis/AssumptionCache.h"
71 #include "llvm/Analysis/BasicAliasAnalysis.h"
72 #include "llvm/Analysis/BlockFrequencyInfo.h"
73 #include "llvm/Analysis/CodeMetrics.h"
74 #include "llvm/Analysis/DemandedBits.h"
75 #include "llvm/Analysis/GlobalsModRef.h"
76 #include "llvm/Analysis/LoopAccessAnalysis.h"
77 #include "llvm/Analysis/LoopAnalysisManager.h"
78 #include "llvm/Analysis/LoopInfo.h"
79 #include "llvm/Analysis/LoopIterator.h"
80 #include "llvm/Analysis/OptimizationRemarkEmitter.h"
81 #include "llvm/Analysis/ScalarEvolution.h"
82 #include "llvm/Analysis/ScalarEvolutionExpander.h"
83 #include "llvm/Analysis/ScalarEvolutionExpressions.h"
84 #include "llvm/Analysis/TargetLibraryInfo.h"
85 #include "llvm/Analysis/TargetTransformInfo.h"
86 #include "llvm/Analysis/VectorUtils.h"
87 #include "llvm/IR/Attributes.h"
88 #include "llvm/IR/BasicBlock.h"
89 #include "llvm/IR/CFG.h"
90 #include "llvm/IR/Constant.h"
91 #include "llvm/IR/Constants.h"
92 #include "llvm/IR/DataLayout.h"
93 #include "llvm/IR/DebugInfoMetadata.h"
94 #include "llvm/IR/DebugLoc.h"
95 #include "llvm/IR/DerivedTypes.h"
96 #include "llvm/IR/DiagnosticInfo.h"
97 #include "llvm/IR/Dominators.h"
98 #include "llvm/IR/Function.h"
99 #include "llvm/IR/IRBuilder.h"
100 #include "llvm/IR/InstrTypes.h"
101 #include "llvm/IR/Instruction.h"
102 #include "llvm/IR/Instructions.h"
103 #include "llvm/IR/IntrinsicInst.h"
104 #include "llvm/IR/Intrinsics.h"
105 #include "llvm/IR/LLVMContext.h"
106 #include "llvm/IR/Metadata.h"
107 #include "llvm/IR/Module.h"
108 #include "llvm/IR/Operator.h"
109 #include "llvm/IR/Type.h"
110 #include "llvm/IR/Use.h"
111 #include "llvm/IR/User.h"
112 #include "llvm/IR/Value.h"
113 #include "llvm/IR/ValueHandle.h"
114 #include "llvm/IR/Verifier.h"
115 #include "llvm/Pass.h"
116 #include "llvm/Support/Casting.h"
117 #include "llvm/Support/CommandLine.h"
118 #include "llvm/Support/Compiler.h"
119 #include "llvm/Support/Debug.h"
120 #include "llvm/Support/ErrorHandling.h"
121 #include "llvm/Support/MathExtras.h"
122 #include "llvm/Support/raw_ostream.h"
123 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
124 #include "llvm/Transforms/Utils/LoopSimplify.h"
125 #include "llvm/Transforms/Utils/LoopUtils.h"
126 #include "llvm/Transforms/Utils/LoopVersioning.h"
131 #include <functional>
140 using namespace llvm;
142 #define LV_NAME "loop-vectorize"
143 #define DEBUG_TYPE LV_NAME
145 STATISTIC(LoopsVectorized, "Number of loops vectorized");
146 STATISTIC(LoopsAnalyzed, "Number of loops analyzed for vectorization");
149 EnableIfConversion("enable-if-conversion", cl::init(true), cl::Hidden,
150 cl::desc("Enable if-conversion during vectorization."));
152 /// Loops with a known constant trip count below this number are vectorized only
153 /// if no scalar iteration overheads are incurred.
154 static cl::opt<unsigned> TinyTripCountVectorThreshold(
155 "vectorizer-min-trip-count", cl::init(16), cl::Hidden,
156 cl::desc("Loops with a constant trip count that is smaller than this "
157 "value are vectorized only if no scalar iteration overheads "
160 static cl::opt<bool> MaximizeBandwidth(
161 "vectorizer-maximize-bandwidth", cl::init(false), cl::Hidden,
162 cl::desc("Maximize bandwidth when selecting vectorization factor which "
163 "will be determined by the smallest type in loop."));
165 static cl::opt<bool> EnableInterleavedMemAccesses(
166 "enable-interleaved-mem-accesses", cl::init(false), cl::Hidden,
167 cl::desc("Enable vectorization on interleaved memory accesses in a loop"));
169 /// Maximum factor for an interleaved memory access.
170 static cl::opt<unsigned> MaxInterleaveGroupFactor(
171 "max-interleave-group-factor", cl::Hidden,
172 cl::desc("Maximum factor for an interleaved access group (default = 8)"),
175 /// We don't interleave loops with a known constant trip count below this
177 static const unsigned TinyTripCountInterleaveThreshold = 128;
179 static cl::opt<unsigned> ForceTargetNumScalarRegs(
180 "force-target-num-scalar-regs", cl::init(0), cl::Hidden,
181 cl::desc("A flag that overrides the target's number of scalar registers."));
183 static cl::opt<unsigned> ForceTargetNumVectorRegs(
184 "force-target-num-vector-regs", cl::init(0), cl::Hidden,
185 cl::desc("A flag that overrides the target's number of vector registers."));
187 /// Maximum vectorization interleave count.
188 static const unsigned MaxInterleaveFactor = 16;
190 static cl::opt<unsigned> ForceTargetMaxScalarInterleaveFactor(
191 "force-target-max-scalar-interleave", cl::init(0), cl::Hidden,
192 cl::desc("A flag that overrides the target's max interleave factor for "
195 static cl::opt<unsigned> ForceTargetMaxVectorInterleaveFactor(
196 "force-target-max-vector-interleave", cl::init(0), cl::Hidden,
197 cl::desc("A flag that overrides the target's max interleave factor for "
198 "vectorized loops."));
200 static cl::opt<unsigned> ForceTargetInstructionCost(
201 "force-target-instruction-cost", cl::init(0), cl::Hidden,
202 cl::desc("A flag that overrides the target's expected cost for "
203 "an instruction to a single constant value. Mostly "
204 "useful for getting consistent testing."));
206 static cl::opt<unsigned> SmallLoopCost(
207 "small-loop-cost", cl::init(20), cl::Hidden,
209 "The cost of a loop that is considered 'small' by the interleaver."));
211 static cl::opt<bool> LoopVectorizeWithBlockFrequency(
212 "loop-vectorize-with-block-frequency", cl::init(false), cl::Hidden,
213 cl::desc("Enable the use of the block frequency analysis to access PGO "
214 "heuristics minimizing code growth in cold regions and being more "
215 "aggressive in hot regions."));
217 // Runtime interleave loops for load/store throughput.
218 static cl::opt<bool> EnableLoadStoreRuntimeInterleave(
219 "enable-loadstore-runtime-interleave", cl::init(true), cl::Hidden,
221 "Enable runtime interleaving until load/store ports are saturated"));
223 /// The number of stores in a loop that are allowed to need predication.
224 static cl::opt<unsigned> NumberOfStoresToPredicate(
225 "vectorize-num-stores-pred", cl::init(1), cl::Hidden,
226 cl::desc("Max number of stores to be predicated behind an if."));
228 static cl::opt<bool> EnableIndVarRegisterHeur(
229 "enable-ind-var-reg-heur", cl::init(true), cl::Hidden,
230 cl::desc("Count the induction variable only once when interleaving"));
232 static cl::opt<bool> EnableCondStoresVectorization(
233 "enable-cond-stores-vec", cl::init(true), cl::Hidden,
234 cl::desc("Enable if predication of stores during vectorization."));
236 static cl::opt<unsigned> MaxNestedScalarReductionIC(
237 "max-nested-scalar-reduction-interleave", cl::init(2), cl::Hidden,
238 cl::desc("The maximum interleave count to use when interleaving a scalar "
239 "reduction in a nested loop."));
241 static cl::opt<unsigned> PragmaVectorizeMemoryCheckThreshold(
242 "pragma-vectorize-memory-check-threshold", cl::init(128), cl::Hidden,
243 cl::desc("The maximum allowed number of runtime memory checks with a "
244 "vectorize(enable) pragma."));
246 static cl::opt<unsigned> VectorizeSCEVCheckThreshold(
247 "vectorize-scev-check-threshold", cl::init(16), cl::Hidden,
248 cl::desc("The maximum number of SCEV checks allowed."));
250 static cl::opt<unsigned> PragmaVectorizeSCEVCheckThreshold(
251 "pragma-vectorize-scev-check-threshold", cl::init(128), cl::Hidden,
252 cl::desc("The maximum number of SCEV checks allowed with a "
253 "vectorize(enable) pragma"));
255 /// Create an analysis remark that explains why vectorization failed
257 /// \p PassName is the name of the pass (e.g. can be AlwaysPrint). \p
258 /// RemarkName is the identifier for the remark. If \p I is passed it is an
259 /// instruction that prevents vectorization. Otherwise \p TheLoop is used for
260 /// the location of the remark. \return the remark object that can be
262 static OptimizationRemarkAnalysis
263 createMissedAnalysis(const char *PassName, StringRef RemarkName, Loop *TheLoop,
264 Instruction *I = nullptr) {
265 Value *CodeRegion = TheLoop->getHeader();
266 DebugLoc DL = TheLoop->getStartLoc();
269 CodeRegion = I->getParent();
270 // If there is no debug location attached to the instruction, revert back to
272 if (I->getDebugLoc())
273 DL = I->getDebugLoc();
276 OptimizationRemarkAnalysis R(PassName, RemarkName, DL, CodeRegion);
277 R << "loop not vectorized: ";
283 class LoopVectorizationLegality;
284 class LoopVectorizationCostModel;
285 class LoopVectorizationRequirements;
287 } // end anonymous namespace
289 /// Returns true if the given loop body has a cycle, excluding the loop
291 static bool hasCyclesInLoopBody(const Loop &L) {
295 for (const auto &SCC :
296 make_range(scc_iterator<Loop, LoopBodyTraits>::begin(L),
297 scc_iterator<Loop, LoopBodyTraits>::end(L))) {
298 if (SCC.size() > 1) {
299 DEBUG(dbgs() << "LVL: Detected a cycle in the loop body:\n");
307 /// A helper function for converting Scalar types to vector types.
308 /// If the incoming type is void, we return void. If the VF is 1, we return
310 static Type *ToVectorTy(Type *Scalar, unsigned VF) {
311 if (Scalar->isVoidTy() || VF == 1)
313 return VectorType::get(Scalar, VF);
316 // FIXME: The following helper functions have multiple implementations
317 // in the project. They can be effectively organized in a common Load/Store
320 /// A helper function that returns the pointer operand of a load or store
322 static Value *getPointerOperand(Value *I) {
323 if (auto *LI = dyn_cast<LoadInst>(I))
324 return LI->getPointerOperand();
325 if (auto *SI = dyn_cast<StoreInst>(I))
326 return SI->getPointerOperand();
330 /// A helper function that returns the type of loaded or stored value.
331 static Type *getMemInstValueType(Value *I) {
332 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
333 "Expected Load or Store instruction");
334 if (auto *LI = dyn_cast<LoadInst>(I))
335 return LI->getType();
336 return cast<StoreInst>(I)->getValueOperand()->getType();
339 /// A helper function that returns the alignment of load or store instruction.
340 static unsigned getMemInstAlignment(Value *I) {
341 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
342 "Expected Load or Store instruction");
343 if (auto *LI = dyn_cast<LoadInst>(I))
344 return LI->getAlignment();
345 return cast<StoreInst>(I)->getAlignment();
348 /// A helper function that returns the address space of the pointer operand of
349 /// load or store instruction.
350 static unsigned getMemInstAddressSpace(Value *I) {
351 assert((isa<LoadInst>(I) || isa<StoreInst>(I)) &&
352 "Expected Load or Store instruction");
353 if (auto *LI = dyn_cast<LoadInst>(I))
354 return LI->getPointerAddressSpace();
355 return cast<StoreInst>(I)->getPointerAddressSpace();
358 /// A helper function that returns true if the given type is irregular. The
359 /// type is irregular if its allocated size doesn't equal the store size of an
360 /// element of the corresponding vector type at the given vectorization factor.
361 static bool hasIrregularType(Type *Ty, const DataLayout &DL, unsigned VF) {
362 // Determine if an array of VF elements of type Ty is "bitcast compatible"
363 // with a <VF x Ty> vector.
365 auto *VectorTy = VectorType::get(Ty, VF);
366 return VF * DL.getTypeAllocSize(Ty) != DL.getTypeStoreSize(VectorTy);
369 // If the vectorization factor is one, we just check if an array of type Ty
370 // requires padding between elements.
371 return DL.getTypeAllocSizeInBits(Ty) != DL.getTypeSizeInBits(Ty);
374 /// A helper function that returns the reciprocal of the block probability of
375 /// predicated blocks. If we return X, we are assuming the predicated block
376 /// will execute once for for every X iterations of the loop header.
378 /// TODO: We should use actual block probability here, if available. Currently,
379 /// we always assume predicated blocks have a 50% chance of executing.
380 static unsigned getReciprocalPredBlockProb() { return 2; }
382 /// A helper function that adds a 'fast' flag to floating-point operations.
383 static Value *addFastMathFlag(Value *V) {
384 if (isa<FPMathOperator>(V)) {
387 cast<Instruction>(V)->setFastMathFlags(Flags);
392 /// A helper function that returns an integer or floating-point constant with
394 static Constant *getSignedIntOrFpConstant(Type *Ty, int64_t C) {
395 return Ty->isIntegerTy() ? ConstantInt::getSigned(Ty, C)
396 : ConstantFP::get(Ty, C);
401 /// InnerLoopVectorizer vectorizes loops which contain only one basic
402 /// block to a specified vectorization factor (VF).
403 /// This class performs the widening of scalars into vectors, or multiple
404 /// scalars. This class also implements the following features:
405 /// * It inserts an epilogue loop for handling loops that don't have iteration
406 /// counts that are known to be a multiple of the vectorization factor.
407 /// * It handles the code generation for reduction variables.
408 /// * Scalarization (implementation using scalars) of un-vectorizable
410 /// InnerLoopVectorizer does not perform any vectorization-legality
411 /// checks, and relies on the caller to check for the different legality
412 /// aspects. The InnerLoopVectorizer relies on the
413 /// LoopVectorizationLegality class to provide information about the induction
414 /// and reduction variables that were found to a given vectorization factor.
415 class InnerLoopVectorizer {
417 InnerLoopVectorizer(Loop *OrigLoop, PredicatedScalarEvolution &PSE,
418 LoopInfo *LI, DominatorTree *DT,
419 const TargetLibraryInfo *TLI,
420 const TargetTransformInfo *TTI, AssumptionCache *AC,
421 OptimizationRemarkEmitter *ORE, unsigned VecWidth,
422 unsigned UnrollFactor, LoopVectorizationLegality *LVL,
423 LoopVectorizationCostModel *CM)
424 : OrigLoop(OrigLoop), PSE(PSE), LI(LI), DT(DT), TLI(TLI), TTI(TTI),
425 AC(AC), ORE(ORE), VF(VecWidth), UF(UnrollFactor),
426 Builder(PSE.getSE()->getContext()),
427 VectorLoopValueMap(UnrollFactor, VecWidth), Legal(LVL), Cost(CM) {}
428 virtual ~InnerLoopVectorizer() = default;
430 /// Create a new empty loop. Unlink the old loop and connect the new one.
431 /// Return the pre-header block of the new loop.
432 BasicBlock *createVectorizedLoopSkeleton();
434 /// Widen a single instruction within the innermost loop.
435 void widenInstruction(Instruction &I);
437 /// Fix the vectorized code, taking care of header phi's, live-outs, and more.
438 void fixVectorizedLoop();
440 // Return true if any runtime check is added.
441 bool areSafetyChecksAdded() { return AddedSafetyChecks; }
443 /// A type for vectorized values in the new loop. Each value from the
444 /// original loop, when vectorized, is represented by UF vector values in the
445 /// new unrolled loop, where UF is the unroll factor.
446 using VectorParts = SmallVector<Value *, 2>;
448 /// Vectorize a single PHINode in a block. This method handles the induction
449 /// variable canonicalization. It supports both VF = 1 for unrolled loops and
450 /// arbitrary length vectors.
451 void widenPHIInstruction(Instruction *PN, unsigned UF, unsigned VF);
453 /// A helper function to scalarize a single Instruction in the innermost loop.
454 /// Generates a sequence of scalar instances for each lane between \p MinLane
455 /// and \p MaxLane, times each part between \p MinPart and \p MaxPart,
457 void scalarizeInstruction(Instruction *Instr, const VPIteration &Instance,
458 bool IfPredicateInstr);
460 /// Widen an integer or floating-point induction variable \p IV. If \p Trunc
461 /// is provided, the integer induction variable will first be truncated to
462 /// the corresponding type.
463 void widenIntOrFpInduction(PHINode *IV, TruncInst *Trunc = nullptr);
465 /// getOrCreateVectorValue and getOrCreateScalarValue coordinate to generate a
466 /// vector or scalar value on-demand if one is not yet available. When
467 /// vectorizing a loop, we visit the definition of an instruction before its
468 /// uses. When visiting the definition, we either vectorize or scalarize the
469 /// instruction, creating an entry for it in the corresponding map. (In some
470 /// cases, such as induction variables, we will create both vector and scalar
471 /// entries.) Then, as we encounter uses of the definition, we derive values
472 /// for each scalar or vector use unless such a value is already available.
473 /// For example, if we scalarize a definition and one of its uses is vector,
474 /// we build the required vector on-demand with an insertelement sequence
475 /// when visiting the use. Otherwise, if the use is scalar, we can use the
476 /// existing scalar definition.
478 /// Return a value in the new loop corresponding to \p V from the original
479 /// loop at unroll index \p Part. If the value has already been vectorized,
480 /// the corresponding vector entry in VectorLoopValueMap is returned. If,
481 /// however, the value has a scalar entry in VectorLoopValueMap, we construct
482 /// a new vector value on-demand by inserting the scalar values into a vector
483 /// with an insertelement sequence. If the value has been neither vectorized
484 /// nor scalarized, it must be loop invariant, so we simply broadcast the
485 /// value into a vector.
486 Value *getOrCreateVectorValue(Value *V, unsigned Part);
488 /// Return a value in the new loop corresponding to \p V from the original
489 /// loop at unroll and vector indices \p Instance. If the value has been
490 /// vectorized but not scalarized, the necessary extractelement instruction
491 /// will be generated.
492 Value *getOrCreateScalarValue(Value *V, const VPIteration &Instance);
494 /// Construct the vector value of a scalarized value \p V one lane at a time.
495 void packScalarIntoVectorValue(Value *V, const VPIteration &Instance);
497 /// Try to vectorize the interleaved access group that \p Instr belongs to.
498 void vectorizeInterleaveGroup(Instruction *Instr);
500 /// Vectorize Load and Store instructions, optionally masking the vector
501 /// operations if \p BlockInMask is non-null.
502 void vectorizeMemoryInstruction(Instruction *Instr,
503 VectorParts *BlockInMask = nullptr);
505 /// \brief Set the debug location in the builder using the debug location in
507 void setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr);
510 friend class LoopVectorizationPlanner;
512 /// A small list of PHINodes.
513 using PhiVector = SmallVector<PHINode *, 4>;
515 /// A type for scalarized values in the new loop. Each value from the
516 /// original loop, when scalarized, is represented by UF x VF scalar values
517 /// in the new unrolled loop, where UF is the unroll factor and VF is the
518 /// vectorization factor.
519 using ScalarParts = SmallVector<SmallVector<Value *, 4>, 2>;
521 /// Set up the values of the IVs correctly when exiting the vector loop.
522 void fixupIVUsers(PHINode *OrigPhi, const InductionDescriptor &II,
523 Value *CountRoundDown, Value *EndValue,
524 BasicBlock *MiddleBlock);
526 /// Create a new induction variable inside L.
527 PHINode *createInductionVariable(Loop *L, Value *Start, Value *End,
528 Value *Step, Instruction *DL);
530 /// Handle all cross-iteration phis in the header.
531 void fixCrossIterationPHIs();
533 /// Fix a first-order recurrence. This is the second phase of vectorizing
535 void fixFirstOrderRecurrence(PHINode *Phi);
537 /// Fix a reduction cross-iteration phi. This is the second phase of
538 /// vectorizing this phi node.
539 void fixReduction(PHINode *Phi);
541 /// \brief The Loop exit block may have single value PHI nodes with some
542 /// incoming value. While vectorizing we only handled real values
543 /// that were defined inside the loop and we should have one value for
544 /// each predecessor of its parent basic block. See PR14725.
547 /// Iteratively sink the scalarized operands of a predicated instruction into
548 /// the block that was created for it.
549 void sinkScalarOperands(Instruction *PredInst);
551 /// Shrinks vector element sizes to the smallest bitwidth they can be legally
553 void truncateToMinimalBitwidths();
555 /// Insert the new loop to the loop hierarchy and pass manager
556 /// and update the analysis passes.
557 void updateAnalysis();
559 /// Create a broadcast instruction. This method generates a broadcast
560 /// instruction (shuffle) for loop invariant values and for the induction
561 /// value. If this is the induction variable then we extend it to N, N+1, ...
562 /// this is needed because each iteration in the loop corresponds to a SIMD
564 virtual Value *getBroadcastInstrs(Value *V);
566 /// This function adds (StartIdx, StartIdx + Step, StartIdx + 2*Step, ...)
567 /// to each vector element of Val. The sequence starts at StartIndex.
568 /// \p Opcode is relevant for FP induction variable.
569 virtual Value *getStepVector(Value *Val, int StartIdx, Value *Step,
570 Instruction::BinaryOps Opcode =
571 Instruction::BinaryOpsEnd);
573 /// Compute scalar induction steps. \p ScalarIV is the scalar induction
574 /// variable on which to base the steps, \p Step is the size of the step, and
575 /// \p EntryVal is the value from the original loop that maps to the steps.
576 /// Note that \p EntryVal doesn't have to be an induction variable (e.g., it
577 /// can be a truncate instruction).
578 void buildScalarSteps(Value *ScalarIV, Value *Step, Value *EntryVal,
579 const InductionDescriptor &ID);
581 /// Create a vector induction phi node based on an existing scalar one. \p
582 /// EntryVal is the value from the original loop that maps to the vector phi
583 /// node, and \p Step is the loop-invariant step. If \p EntryVal is a
584 /// truncate instruction, instead of widening the original IV, we widen a
585 /// version of the IV truncated to \p EntryVal's type.
586 void createVectorIntOrFpInductionPHI(const InductionDescriptor &II,
587 Value *Step, Instruction *EntryVal);
589 /// Returns true if an instruction \p I should be scalarized instead of
590 /// vectorized for the chosen vectorization factor.
591 bool shouldScalarizeInstruction(Instruction *I) const;
593 /// Returns true if we should generate a scalar version of \p IV.
594 bool needsScalarInduction(Instruction *IV) const;
596 /// If there is a cast involved in the induction variable \p ID, which should
597 /// be ignored in the vectorized loop body, this function records the
598 /// VectorLoopValue of the respective Phi also as the VectorLoopValue of the
599 /// cast. We had already proved that the casted Phi is equal to the uncasted
600 /// Phi in the vectorized loop (under a runtime guard), and therefore
601 /// there is no need to vectorize the cast - the same value can be used in the
602 /// vector loop for both the Phi and the cast.
603 /// If \p VectorLoopValue is a scalarized value, \p Lane is also specified,
604 /// Otherwise, \p VectorLoopValue is a widened/vectorized value.
605 void recordVectorLoopValueForInductionCast (const InductionDescriptor &ID,
606 Value *VectorLoopValue,
608 unsigned Lane = UINT_MAX);
610 /// Generate a shuffle sequence that will reverse the vector Vec.
611 virtual Value *reverseVector(Value *Vec);
613 /// Returns (and creates if needed) the original loop trip count.
614 Value *getOrCreateTripCount(Loop *NewLoop);
616 /// Returns (and creates if needed) the trip count of the widened loop.
617 Value *getOrCreateVectorTripCount(Loop *NewLoop);
619 /// Returns a bitcasted value to the requested vector type.
620 /// Also handles bitcasts of vector<float> <-> vector<pointer> types.
621 Value *createBitOrPointerCast(Value *V, VectorType *DstVTy,
622 const DataLayout &DL);
624 /// Emit a bypass check to see if the vector trip count is zero, including if
626 void emitMinimumIterationCountCheck(Loop *L, BasicBlock *Bypass);
628 /// Emit a bypass check to see if all of the SCEV assumptions we've
629 /// had to make are correct.
630 void emitSCEVChecks(Loop *L, BasicBlock *Bypass);
632 /// Emit bypass checks to check any memory assumptions we may have made.
633 void emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass);
635 /// Add additional metadata to \p To that was not present on \p Orig.
637 /// Currently this is used to add the noalias annotations based on the
638 /// inserted memchecks. Use this for instructions that are *cloned* into the
640 void addNewMetadata(Instruction *To, const Instruction *Orig);
642 /// Add metadata from one instruction to another.
644 /// This includes both the original MDs from \p From and additional ones (\see
645 /// addNewMetadata). Use this for *newly created* instructions in the vector
647 void addMetadata(Instruction *To, Instruction *From);
649 /// \brief Similar to the previous function but it adds the metadata to a
650 /// vector of instructions.
651 void addMetadata(ArrayRef<Value *> To, Instruction *From);
653 /// The original loop.
656 /// A wrapper around ScalarEvolution used to add runtime SCEV checks. Applies
657 /// dynamic knowledge to simplify SCEV expressions and converts them to a
658 /// more usable form.
659 PredicatedScalarEvolution &PSE;
670 /// Target Library Info.
671 const TargetLibraryInfo *TLI;
673 /// Target Transform Info.
674 const TargetTransformInfo *TTI;
676 /// Assumption Cache.
679 /// Interface to emit optimization remarks.
680 OptimizationRemarkEmitter *ORE;
682 /// \brief LoopVersioning. It's only set up (non-null) if memchecks were
685 /// This is currently only used to add no-alias metadata based on the
686 /// memchecks. The actually versioning is performed manually.
687 std::unique_ptr<LoopVersioning> LVer;
689 /// The vectorization SIMD factor to use. Each vector will have this many
693 /// The vectorization unroll factor to use. Each scalar is vectorized to this
694 /// many different vector instructions.
697 /// The builder that we use
700 // --- Vectorization state ---
702 /// The vector-loop preheader.
703 BasicBlock *LoopVectorPreHeader;
705 /// The scalar-loop preheader.
706 BasicBlock *LoopScalarPreHeader;
708 /// Middle Block between the vector and the scalar.
709 BasicBlock *LoopMiddleBlock;
711 /// The ExitBlock of the scalar loop.
712 BasicBlock *LoopExitBlock;
714 /// The vector loop body.
715 BasicBlock *LoopVectorBody;
717 /// The scalar loop body.
718 BasicBlock *LoopScalarBody;
720 /// A list of all bypass blocks. The first block is the entry of the loop.
721 SmallVector<BasicBlock *, 4> LoopBypassBlocks;
723 /// The new Induction variable which was added to the new block.
724 PHINode *Induction = nullptr;
726 /// The induction variable of the old basic block.
727 PHINode *OldInduction = nullptr;
729 /// Maps values from the original loop to their corresponding values in the
730 /// vectorized loop. A key value can map to either vector values, scalar
731 /// values or both kinds of values, depending on whether the key was
732 /// vectorized and scalarized.
733 VectorizerValueMap VectorLoopValueMap;
735 /// Store instructions that were predicated.
736 SmallVector<Instruction *, 4> PredicatedInstructions;
738 /// Trip count of the original loop.
739 Value *TripCount = nullptr;
741 /// Trip count of the widened loop (TripCount - TripCount % (VF*UF))
742 Value *VectorTripCount = nullptr;
744 /// The legality analysis.
745 LoopVectorizationLegality *Legal;
747 /// The profitablity analysis.
748 LoopVectorizationCostModel *Cost;
750 // Record whether runtime checks are added.
751 bool AddedSafetyChecks = false;
753 // Holds the end values for each induction variable. We save the end values
754 // so we can later fix-up the external users of the induction variables.
755 DenseMap<PHINode *, Value *> IVEndValues;
758 class InnerLoopUnroller : public InnerLoopVectorizer {
760 InnerLoopUnroller(Loop *OrigLoop, PredicatedScalarEvolution &PSE,
761 LoopInfo *LI, DominatorTree *DT,
762 const TargetLibraryInfo *TLI,
763 const TargetTransformInfo *TTI, AssumptionCache *AC,
764 OptimizationRemarkEmitter *ORE, unsigned UnrollFactor,
765 LoopVectorizationLegality *LVL,
766 LoopVectorizationCostModel *CM)
767 : InnerLoopVectorizer(OrigLoop, PSE, LI, DT, TLI, TTI, AC, ORE, 1,
768 UnrollFactor, LVL, CM) {}
771 Value *getBroadcastInstrs(Value *V) override;
772 Value *getStepVector(Value *Val, int StartIdx, Value *Step,
773 Instruction::BinaryOps Opcode =
774 Instruction::BinaryOpsEnd) override;
775 Value *reverseVector(Value *Vec) override;
778 } // end namespace llvm
780 /// \brief Look for a meaningful debug location on the instruction or it's
782 static Instruction *getDebugLocFromInstOrOperands(Instruction *I) {
787 if (I->getDebugLoc() != Empty)
790 for (User::op_iterator OI = I->op_begin(), OE = I->op_end(); OI != OE; ++OI) {
791 if (Instruction *OpInst = dyn_cast<Instruction>(*OI))
792 if (OpInst->getDebugLoc() != Empty)
799 void InnerLoopVectorizer::setDebugLocFromInst(IRBuilder<> &B, const Value *Ptr) {
800 if (const Instruction *Inst = dyn_cast_or_null<Instruction>(Ptr)) {
801 const DILocation *DIL = Inst->getDebugLoc();
802 if (DIL && Inst->getFunction()->isDebugInfoForProfiling() &&
803 !isa<DbgInfoIntrinsic>(Inst))
804 B.SetCurrentDebugLocation(DIL->cloneWithDuplicationFactor(UF * VF));
806 B.SetCurrentDebugLocation(DIL);
808 B.SetCurrentDebugLocation(DebugLoc());
812 /// \return string containing a file name and a line # for the given loop.
813 static std::string getDebugLocString(const Loop *L) {
816 raw_string_ostream OS(Result);
817 if (const DebugLoc LoopDbgLoc = L->getStartLoc())
818 LoopDbgLoc.print(OS);
820 // Just print the module name.
821 OS << L->getHeader()->getParent()->getParent()->getModuleIdentifier();
828 void InnerLoopVectorizer::addNewMetadata(Instruction *To,
829 const Instruction *Orig) {
830 // If the loop was versioned with memchecks, add the corresponding no-alias
832 if (LVer && (isa<LoadInst>(Orig) || isa<StoreInst>(Orig)))
833 LVer->annotateInstWithNoAlias(To, Orig);
836 void InnerLoopVectorizer::addMetadata(Instruction *To,
838 propagateMetadata(To, From);
839 addNewMetadata(To, From);
842 void InnerLoopVectorizer::addMetadata(ArrayRef<Value *> To,
844 for (Value *V : To) {
845 if (Instruction *I = dyn_cast<Instruction>(V))
846 addMetadata(I, From);
852 /// \brief The group of interleaved loads/stores sharing the same stride and
853 /// close to each other.
855 /// Each member in this group has an index starting from 0, and the largest
856 /// index should be less than interleaved factor, which is equal to the absolute
857 /// value of the access's stride.
859 /// E.g. An interleaved load group of factor 4:
860 /// for (unsigned i = 0; i < 1024; i+=4) {
861 /// a = A[i]; // Member of index 0
862 /// b = A[i+1]; // Member of index 1
863 /// d = A[i+3]; // Member of index 3
867 /// An interleaved store group of factor 4:
868 /// for (unsigned i = 0; i < 1024; i+=4) {
870 /// A[i] = a; // Member of index 0
871 /// A[i+1] = b; // Member of index 1
872 /// A[i+2] = c; // Member of index 2
873 /// A[i+3] = d; // Member of index 3
876 /// Note: the interleaved load group could have gaps (missing members), but
877 /// the interleaved store group doesn't allow gaps.
878 class InterleaveGroup {
880 InterleaveGroup(Instruction *Instr, int Stride, unsigned Align)
881 : Align(Align), InsertPos(Instr) {
882 assert(Align && "The alignment should be non-zero");
884 Factor = std::abs(Stride);
885 assert(Factor > 1 && "Invalid interleave factor");
887 Reverse = Stride < 0;
891 bool isReverse() const { return Reverse; }
892 unsigned getFactor() const { return Factor; }
893 unsigned getAlignment() const { return Align; }
894 unsigned getNumMembers() const { return Members.size(); }
896 /// \brief Try to insert a new member \p Instr with index \p Index and
897 /// alignment \p NewAlign. The index is related to the leader and it could be
898 /// negative if it is the new leader.
900 /// \returns false if the instruction doesn't belong to the group.
901 bool insertMember(Instruction *Instr, int Index, unsigned NewAlign) {
902 assert(NewAlign && "The new member's alignment should be non-zero");
904 int Key = Index + SmallestKey;
906 // Skip if there is already a member with the same index.
907 if (Members.count(Key))
910 if (Key > LargestKey) {
911 // The largest index is always less than the interleave factor.
912 if (Index >= static_cast<int>(Factor))
916 } else if (Key < SmallestKey) {
917 // The largest index is always less than the interleave factor.
918 if (LargestKey - Key >= static_cast<int>(Factor))
924 // It's always safe to select the minimum alignment.
925 Align = std::min(Align, NewAlign);
926 Members[Key] = Instr;
930 /// \brief Get the member with the given index \p Index
932 /// \returns nullptr if contains no such member.
933 Instruction *getMember(unsigned Index) const {
934 int Key = SmallestKey + Index;
935 if (!Members.count(Key))
938 return Members.find(Key)->second;
941 /// \brief Get the index for the given member. Unlike the key in the member
942 /// map, the index starts from 0.
943 unsigned getIndex(Instruction *Instr) const {
944 for (auto I : Members)
945 if (I.second == Instr)
946 return I.first - SmallestKey;
948 llvm_unreachable("InterleaveGroup contains no such member");
951 Instruction *getInsertPos() const { return InsertPos; }
952 void setInsertPos(Instruction *Inst) { InsertPos = Inst; }
954 /// Add metadata (e.g. alias info) from the instructions in this group to \p
957 /// FIXME: this function currently does not add noalias metadata a'la
958 /// addNewMedata. To do that we need to compute the intersection of the
959 /// noalias info from all members.
960 void addMetadata(Instruction *NewInst) const {
961 SmallVector<Value *, 4> VL;
962 std::transform(Members.begin(), Members.end(), std::back_inserter(VL),
963 [](std::pair<int, Instruction *> p) { return p.second; });
964 propagateMetadata(NewInst, VL);
968 unsigned Factor; // Interleave Factor.
971 DenseMap<int, Instruction *> Members;
975 // To avoid breaking dependences, vectorized instructions of an interleave
976 // group should be inserted at either the first load or the last store in
979 // E.g. %even = load i32 // Insert Position
980 // %add = add i32 %even // Use of %even
984 // %odd = add i32 // Def of %odd
985 // store i32 %odd // Insert Position
986 Instruction *InsertPos;
988 } // end namespace llvm
992 /// \brief Drive the analysis of interleaved memory accesses in the loop.
994 /// Use this class to analyze interleaved accesses only when we can vectorize
995 /// a loop. Otherwise it's meaningless to do analysis as the vectorization
996 /// on interleaved accesses is unsafe.
998 /// The analysis collects interleave groups and records the relationships
999 /// between the member and the group in a map.
1000 class InterleavedAccessInfo {
1002 InterleavedAccessInfo(PredicatedScalarEvolution &PSE, Loop *L,
1003 DominatorTree *DT, LoopInfo *LI)
1004 : PSE(PSE), TheLoop(L), DT(DT), LI(LI) {}
1006 ~InterleavedAccessInfo() {
1007 SmallSet<InterleaveGroup *, 4> DelSet;
1008 // Avoid releasing a pointer twice.
1009 for (auto &I : InterleaveGroupMap)
1010 DelSet.insert(I.second);
1011 for (auto *Ptr : DelSet)
1015 /// \brief Analyze the interleaved accesses and collect them in interleave
1016 /// groups. Substitute symbolic strides using \p Strides.
1017 void analyzeInterleaving(const ValueToValueMap &Strides);
1019 /// \brief Check if \p Instr belongs to any interleave group.
1020 bool isInterleaved(Instruction *Instr) const {
1021 return InterleaveGroupMap.count(Instr);
1024 /// \brief Get the interleave group that \p Instr belongs to.
1026 /// \returns nullptr if doesn't have such group.
1027 InterleaveGroup *getInterleaveGroup(Instruction *Instr) const {
1028 if (InterleaveGroupMap.count(Instr))
1029 return InterleaveGroupMap.find(Instr)->second;
1033 /// \brief Returns true if an interleaved group that may access memory
1034 /// out-of-bounds requires a scalar epilogue iteration for correctness.
1035 bool requiresScalarEpilogue() const { return RequiresScalarEpilogue; }
1037 /// \brief Initialize the LoopAccessInfo used for dependence checking.
1038 void setLAI(const LoopAccessInfo *Info) { LAI = Info; }
1041 /// A wrapper around ScalarEvolution, used to add runtime SCEV checks.
1042 /// Simplifies SCEV expressions in the context of existing SCEV assumptions.
1043 /// The interleaved access analysis can also add new predicates (for example
1044 /// by versioning strides of pointers).
1045 PredicatedScalarEvolution &PSE;
1050 const LoopAccessInfo *LAI = nullptr;
1052 /// True if the loop may contain non-reversed interleaved groups with
1053 /// out-of-bounds accesses. We ensure we don't speculatively access memory
1054 /// out-of-bounds by executing at least one scalar epilogue iteration.
1055 bool RequiresScalarEpilogue = false;
1057 /// Holds the relationships between the members and the interleave group.
1058 DenseMap<Instruction *, InterleaveGroup *> InterleaveGroupMap;
1060 /// Holds dependences among the memory accesses in the loop. It maps a source
1061 /// access to a set of dependent sink accesses.
1062 DenseMap<Instruction *, SmallPtrSet<Instruction *, 2>> Dependences;
1064 /// \brief The descriptor for a strided memory access.
1065 struct StrideDescriptor {
1066 StrideDescriptor() = default;
1067 StrideDescriptor(int64_t Stride, const SCEV *Scev, uint64_t Size,
1069 : Stride(Stride), Scev(Scev), Size(Size), Align(Align) {}
1071 // The access's stride. It is negative for a reverse access.
1074 // The scalar expression of this access.
1075 const SCEV *Scev = nullptr;
1077 // The size of the memory object.
1080 // The alignment of this access.
1084 /// \brief A type for holding instructions and their stride descriptors.
1085 using StrideEntry = std::pair<Instruction *, StrideDescriptor>;
1087 /// \brief Create a new interleave group with the given instruction \p Instr,
1088 /// stride \p Stride and alignment \p Align.
1090 /// \returns the newly created interleave group.
1091 InterleaveGroup *createInterleaveGroup(Instruction *Instr, int Stride,
1093 assert(!InterleaveGroupMap.count(Instr) &&
1094 "Already in an interleaved access group");
1095 InterleaveGroupMap[Instr] = new InterleaveGroup(Instr, Stride, Align);
1096 return InterleaveGroupMap[Instr];
1099 /// \brief Release the group and remove all the relationships.
1100 void releaseGroup(InterleaveGroup *Group) {
1101 for (unsigned i = 0; i < Group->getFactor(); i++)
1102 if (Instruction *Member = Group->getMember(i))
1103 InterleaveGroupMap.erase(Member);
1108 /// \brief Collect all the accesses with a constant stride in program order.
1109 void collectConstStrideAccesses(
1110 MapVector<Instruction *, StrideDescriptor> &AccessStrideInfo,
1111 const ValueToValueMap &Strides);
1113 /// \brief Returns true if \p Stride is allowed in an interleaved group.
1114 static bool isStrided(int Stride) {
1115 unsigned Factor = std::abs(Stride);
1116 return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;
1119 /// \brief Returns true if \p BB is a predicated block.
1120 bool isPredicated(BasicBlock *BB) const {
1121 return LoopAccessInfo::blockNeedsPredication(BB, TheLoop, DT);
1124 /// \brief Returns true if LoopAccessInfo can be used for dependence queries.
1125 bool areDependencesValid() const {
1126 return LAI && LAI->getDepChecker().getDependences();
1129 /// \brief Returns true if memory accesses \p A and \p B can be reordered, if
1130 /// necessary, when constructing interleaved groups.
1132 /// \p A must precede \p B in program order. We return false if reordering is
1133 /// not necessary or is prevented because \p A and \p B may be dependent.
1134 bool canReorderMemAccessesForInterleavedGroups(StrideEntry *A,
1135 StrideEntry *B) const {
1136 // Code motion for interleaved accesses can potentially hoist strided loads
1137 // and sink strided stores. The code below checks the legality of the
1138 // following two conditions:
1140 // 1. Potentially moving a strided load (B) before any store (A) that
1143 // 2. Potentially moving a strided store (A) after any load or store (B)
1146 // It's legal to reorder A and B if we know there isn't a dependence from A
1147 // to B. Note that this determination is conservative since some
1148 // dependences could potentially be reordered safely.
1150 // A is potentially the source of a dependence.
1151 auto *Src = A->first;
1152 auto SrcDes = A->second;
1154 // B is potentially the sink of a dependence.
1155 auto *Sink = B->first;
1156 auto SinkDes = B->second;
1158 // Code motion for interleaved accesses can't violate WAR dependences.
1159 // Thus, reordering is legal if the source isn't a write.
1160 if (!Src->mayWriteToMemory())
1163 // At least one of the accesses must be strided.
1164 if (!isStrided(SrcDes.Stride) && !isStrided(SinkDes.Stride))
1167 // If dependence information is not available from LoopAccessInfo,
1168 // conservatively assume the instructions can't be reordered.
1169 if (!areDependencesValid())
1172 // If we know there is a dependence from source to sink, assume the
1173 // instructions can't be reordered. Otherwise, reordering is legal.
1174 return !Dependences.count(Src) || !Dependences.lookup(Src).count(Sink);
1177 /// \brief Collect the dependences from LoopAccessInfo.
1179 /// We process the dependences once during the interleaved access analysis to
1180 /// enable constant-time dependence queries.
1181 void collectDependences() {
1182 if (!areDependencesValid())
1184 auto *Deps = LAI->getDepChecker().getDependences();
1185 for (auto Dep : *Deps)
1186 Dependences[Dep.getSource(*LAI)].insert(Dep.getDestination(*LAI));
1190 /// Utility class for getting and setting loop vectorizer hints in the form
1191 /// of loop metadata.
1192 /// This class keeps a number of loop annotations locally (as member variables)
1193 /// and can, upon request, write them back as metadata on the loop. It will
1194 /// initially scan the loop for existing metadata, and will update the local
1195 /// values based on information in the loop.
1196 /// We cannot write all values to metadata, as the mere presence of some info,
1197 /// for example 'force', means a decision has been made. So, we need to be
1198 /// careful NOT to add them if the user hasn't specifically asked so.
1199 class LoopVectorizeHints {
1200 enum HintKind { HK_WIDTH, HK_UNROLL, HK_FORCE, HK_ISVECTORIZED };
1202 /// Hint - associates name and validation with the hint value.
1205 unsigned Value; // This may have to change for non-numeric values.
1208 Hint(const char *Name, unsigned Value, HintKind Kind)
1209 : Name(Name), Value(Value), Kind(Kind) {}
1211 bool validate(unsigned Val) {
1214 return isPowerOf2_32(Val) && Val <= VectorizerParams::MaxVectorWidth;
1216 return isPowerOf2_32(Val) && Val <= MaxInterleaveFactor;
1219 case HK_ISVECTORIZED:
1220 return (Val==0 || Val==1);
1226 /// Vectorization width.
1229 /// Vectorization interleave factor.
1232 /// Vectorization forced
1235 /// Already Vectorized
1238 /// Return the loop metadata prefix.
1239 static StringRef Prefix() { return "llvm.loop."; }
1241 /// True if there is any unsafe math in the loop.
1242 bool PotentiallyUnsafe = false;
1246 FK_Undefined = -1, ///< Not selected.
1247 FK_Disabled = 0, ///< Forcing disabled.
1248 FK_Enabled = 1, ///< Forcing enabled.
1251 LoopVectorizeHints(const Loop *L, bool DisableInterleaving,
1252 OptimizationRemarkEmitter &ORE)
1253 : Width("vectorize.width", VectorizerParams::VectorizationFactor,
1255 Interleave("interleave.count", DisableInterleaving, HK_UNROLL),
1256 Force("vectorize.enable", FK_Undefined, HK_FORCE),
1257 IsVectorized("isvectorized", 0, HK_ISVECTORIZED), TheLoop(L), ORE(ORE) {
1258 // Populate values with existing loop metadata.
1259 getHintsFromMetadata();
1261 // force-vector-interleave overrides DisableInterleaving.
1262 if (VectorizerParams::isInterleaveForced())
1263 Interleave.Value = VectorizerParams::VectorizationInterleave;
1265 if (IsVectorized.Value != 1)
1266 // If the vectorization width and interleaving count are both 1 then
1267 // consider the loop to have been already vectorized because there's
1268 // nothing more that we can do.
1269 IsVectorized.Value = Width.Value == 1 && Interleave.Value == 1;
1270 DEBUG(if (DisableInterleaving && Interleave.Value == 1) dbgs()
1271 << "LV: Interleaving disabled by the pass manager\n");
1274 /// Mark the loop L as already vectorized by setting the width to 1.
1275 void setAlreadyVectorized() {
1276 IsVectorized.Value = 1;
1277 Hint Hints[] = {IsVectorized};
1278 writeHintsToMetadata(Hints);
1281 bool allowVectorization(Function *F, Loop *L, bool AlwaysVectorize) const {
1282 if (getForce() == LoopVectorizeHints::FK_Disabled) {
1283 DEBUG(dbgs() << "LV: Not vectorizing: #pragma vectorize disable.\n");
1284 emitRemarkWithHints();
1288 if (!AlwaysVectorize && getForce() != LoopVectorizeHints::FK_Enabled) {
1289 DEBUG(dbgs() << "LV: Not vectorizing: No #pragma vectorize enable.\n");
1290 emitRemarkWithHints();
1294 if (getIsVectorized() == 1) {
1295 DEBUG(dbgs() << "LV: Not vectorizing: Disabled/already vectorized.\n");
1296 // FIXME: Add interleave.disable metadata. This will allow
1297 // vectorize.disable to be used without disabling the pass and errors
1298 // to differentiate between disabled vectorization and a width of 1.
1300 return OptimizationRemarkAnalysis(vectorizeAnalysisPassName(),
1301 "AllDisabled", L->getStartLoc(),
1303 << "loop not vectorized: vectorization and interleaving are "
1304 "explicitly disabled, or the loop has already been "
1313 /// Dumps all the hint information.
1314 void emitRemarkWithHints() const {
1315 using namespace ore;
1318 if (Force.Value == LoopVectorizeHints::FK_Disabled)
1319 return OptimizationRemarkMissed(LV_NAME, "MissedExplicitlyDisabled",
1320 TheLoop->getStartLoc(),
1321 TheLoop->getHeader())
1322 << "loop not vectorized: vectorization is explicitly disabled";
1324 OptimizationRemarkMissed R(LV_NAME, "MissedDetails",
1325 TheLoop->getStartLoc(),
1326 TheLoop->getHeader());
1327 R << "loop not vectorized";
1328 if (Force.Value == LoopVectorizeHints::FK_Enabled) {
1329 R << " (Force=" << NV("Force", true);
1330 if (Width.Value != 0)
1331 R << ", Vector Width=" << NV("VectorWidth", Width.Value);
1332 if (Interleave.Value != 0)
1333 R << ", Interleave Count="
1334 << NV("InterleaveCount", Interleave.Value);
1342 unsigned getWidth() const { return Width.Value; }
1343 unsigned getInterleave() const { return Interleave.Value; }
1344 unsigned getIsVectorized() const { return IsVectorized.Value; }
1345 enum ForceKind getForce() const { return (ForceKind)Force.Value; }
1347 /// \brief If hints are provided that force vectorization, use the AlwaysPrint
1348 /// pass name to force the frontend to print the diagnostic.
1349 const char *vectorizeAnalysisPassName() const {
1350 if (getWidth() == 1)
1352 if (getForce() == LoopVectorizeHints::FK_Disabled)
1354 if (getForce() == LoopVectorizeHints::FK_Undefined && getWidth() == 0)
1356 return OptimizationRemarkAnalysis::AlwaysPrint;
1359 bool allowReordering() const {
1360 // When enabling loop hints are provided we allow the vectorizer to change
1361 // the order of operations that is given by the scalar loop. This is not
1362 // enabled by default because can be unsafe or inefficient. For example,
1363 // reordering floating-point operations will change the way round-off
1364 // error accumulates in the loop.
1365 return getForce() == LoopVectorizeHints::FK_Enabled || getWidth() > 1;
1368 bool isPotentiallyUnsafe() const {
1369 // Avoid FP vectorization if the target is unsure about proper support.
1370 // This may be related to the SIMD unit in the target not handling
1371 // IEEE 754 FP ops properly, or bad single-to-double promotions.
1372 // Otherwise, a sequence of vectorized loops, even without reduction,
1373 // could lead to different end results on the destination vectors.
1374 return getForce() != LoopVectorizeHints::FK_Enabled && PotentiallyUnsafe;
1377 void setPotentiallyUnsafe() { PotentiallyUnsafe = true; }
1380 /// Find hints specified in the loop metadata and update local values.
1381 void getHintsFromMetadata() {
1382 MDNode *LoopID = TheLoop->getLoopID();
1386 // First operand should refer to the loop id itself.
1387 assert(LoopID->getNumOperands() > 0 && "requires at least one operand");
1388 assert(LoopID->getOperand(0) == LoopID && "invalid loop id");
1390 for (unsigned i = 1, ie = LoopID->getNumOperands(); i < ie; ++i) {
1391 const MDString *S = nullptr;
1392 SmallVector<Metadata *, 4> Args;
1394 // The expected hint is either a MDString or a MDNode with the first
1395 // operand a MDString.
1396 if (const MDNode *MD = dyn_cast<MDNode>(LoopID->getOperand(i))) {
1397 if (!MD || MD->getNumOperands() == 0)
1399 S = dyn_cast<MDString>(MD->getOperand(0));
1400 for (unsigned i = 1, ie = MD->getNumOperands(); i < ie; ++i)
1401 Args.push_back(MD->getOperand(i));
1403 S = dyn_cast<MDString>(LoopID->getOperand(i));
1404 assert(Args.size() == 0 && "too many arguments for MDString");
1410 // Check if the hint starts with the loop metadata prefix.
1411 StringRef Name = S->getString();
1412 if (Args.size() == 1)
1413 setHint(Name, Args[0]);
1417 /// Checks string hint with one operand and set value if valid.
1418 void setHint(StringRef Name, Metadata *Arg) {
1419 if (!Name.startswith(Prefix()))
1421 Name = Name.substr(Prefix().size(), StringRef::npos);
1423 const ConstantInt *C = mdconst::dyn_extract<ConstantInt>(Arg);
1426 unsigned Val = C->getZExtValue();
1428 Hint *Hints[] = {&Width, &Interleave, &Force, &IsVectorized};
1429 for (auto H : Hints) {
1430 if (Name == H->Name) {
1431 if (H->validate(Val))
1434 DEBUG(dbgs() << "LV: ignoring invalid hint '" << Name << "'\n");
1440 /// Create a new hint from name / value pair.
1441 MDNode *createHintMetadata(StringRef Name, unsigned V) const {
1442 LLVMContext &Context = TheLoop->getHeader()->getContext();
1443 Metadata *MDs[] = {MDString::get(Context, Name),
1444 ConstantAsMetadata::get(
1445 ConstantInt::get(Type::getInt32Ty(Context), V))};
1446 return MDNode::get(Context, MDs);
1449 /// Matches metadata with hint name.
1450 bool matchesHintMetadataName(MDNode *Node, ArrayRef<Hint> HintTypes) {
1451 MDString *Name = dyn_cast<MDString>(Node->getOperand(0));
1455 for (auto H : HintTypes)
1456 if (Name->getString().endswith(H.Name))
1461 /// Sets current hints into loop metadata, keeping other values intact.
1462 void writeHintsToMetadata(ArrayRef<Hint> HintTypes) {
1463 if (HintTypes.empty())
1466 // Reserve the first element to LoopID (see below).
1467 SmallVector<Metadata *, 4> MDs(1);
1468 // If the loop already has metadata, then ignore the existing operands.
1469 MDNode *LoopID = TheLoop->getLoopID();
1471 for (unsigned i = 1, ie = LoopID->getNumOperands(); i < ie; ++i) {
1472 MDNode *Node = cast<MDNode>(LoopID->getOperand(i));
1473 // If node in update list, ignore old value.
1474 if (!matchesHintMetadataName(Node, HintTypes))
1475 MDs.push_back(Node);
1479 // Now, add the missing hints.
1480 for (auto H : HintTypes)
1481 MDs.push_back(createHintMetadata(Twine(Prefix(), H.Name).str(), H.Value));
1483 // Replace current metadata node with new one.
1484 LLVMContext &Context = TheLoop->getHeader()->getContext();
1485 MDNode *NewLoopID = MDNode::get(Context, MDs);
1486 // Set operand 0 to refer to the loop id itself.
1487 NewLoopID->replaceOperandWith(0, NewLoopID);
1489 TheLoop->setLoopID(NewLoopID);
1492 /// The loop these hints belong to.
1493 const Loop *TheLoop;
1495 /// Interface to emit optimization remarks.
1496 OptimizationRemarkEmitter &ORE;
1499 } // end anonymous namespace
1501 static void emitMissedWarning(Function *F, Loop *L,
1502 const LoopVectorizeHints &LH,
1503 OptimizationRemarkEmitter *ORE) {
1504 LH.emitRemarkWithHints();
1506 if (LH.getForce() == LoopVectorizeHints::FK_Enabled) {
1507 if (LH.getWidth() != 1)
1508 ORE->emit(DiagnosticInfoOptimizationFailure(
1509 DEBUG_TYPE, "FailedRequestedVectorization",
1510 L->getStartLoc(), L->getHeader())
1511 << "loop not vectorized: "
1512 << "failed explicitly specified loop vectorization");
1513 else if (LH.getInterleave() != 1)
1514 ORE->emit(DiagnosticInfoOptimizationFailure(
1515 DEBUG_TYPE, "FailedRequestedInterleaving", L->getStartLoc(),
1517 << "loop not interleaved: "
1518 << "failed explicitly specified loop interleaving");
1524 /// LoopVectorizationLegality checks if it is legal to vectorize a loop, and
1525 /// to what vectorization factor.
1526 /// This class does not look at the profitability of vectorization, only the
1527 /// legality. This class has two main kinds of checks:
1528 /// * Memory checks - The code in canVectorizeMemory checks if vectorization
1529 /// will change the order of memory accesses in a way that will change the
1530 /// correctness of the program.
1531 /// * Scalars checks - The code in canVectorizeInstrs and canVectorizeMemory
1532 /// checks for a number of different conditions, such as the availability of a
1533 /// single induction variable, that all types are supported and vectorize-able,
1534 /// etc. This code reflects the capabilities of InnerLoopVectorizer.
1535 /// This class is also used by InnerLoopVectorizer for identifying
1536 /// induction variable and the different reduction variables.
1537 class LoopVectorizationLegality {
1539 LoopVectorizationLegality(
1540 Loop *L, PredicatedScalarEvolution &PSE, DominatorTree *DT,
1541 TargetLibraryInfo *TLI, AliasAnalysis *AA, Function *F,
1542 const TargetTransformInfo *TTI,
1543 std::function<const LoopAccessInfo &(Loop &)> *GetLAA, LoopInfo *LI,
1544 OptimizationRemarkEmitter *ORE, LoopVectorizationRequirements *R,
1545 LoopVectorizeHints *H, DemandedBits *DB, AssumptionCache *AC)
1546 : TheLoop(L), PSE(PSE), TLI(TLI), TTI(TTI), DT(DT), GetLAA(GetLAA),
1547 ORE(ORE), InterleaveInfo(PSE, L, DT, LI), Requirements(R), Hints(H),
1550 /// ReductionList contains the reduction descriptors for all
1551 /// of the reductions that were found in the loop.
1552 using ReductionList = DenseMap<PHINode *, RecurrenceDescriptor>;
1554 /// InductionList saves induction variables and maps them to the
1555 /// induction descriptor.
1556 using InductionList = MapVector<PHINode *, InductionDescriptor>;
1558 /// RecurrenceSet contains the phi nodes that are recurrences other than
1559 /// inductions and reductions.
1560 using RecurrenceSet = SmallPtrSet<const PHINode *, 8>;
1562 /// Returns true if it is legal to vectorize this loop.
1563 /// This does not mean that it is profitable to vectorize this
1564 /// loop, only that it is legal to do so.
1565 bool canVectorize();
1567 /// Returns the primary induction variable.
1568 PHINode *getPrimaryInduction() { return PrimaryInduction; }
1570 /// Returns the reduction variables found in the loop.
1571 ReductionList *getReductionVars() { return &Reductions; }
1573 /// Returns the induction variables found in the loop.
1574 InductionList *getInductionVars() { return &Inductions; }
1576 /// Return the first-order recurrences found in the loop.
1577 RecurrenceSet *getFirstOrderRecurrences() { return &FirstOrderRecurrences; }
1579 /// Return the set of instructions to sink to handle first-order recurrences.
1580 DenseMap<Instruction *, Instruction *> &getSinkAfter() { return SinkAfter; }
1582 /// Returns the widest induction type.
1583 Type *getWidestInductionType() { return WidestIndTy; }
1585 /// Returns True if V is a Phi node of an induction variable in this loop.
1586 bool isInductionPhi(const Value *V);
1588 /// Returns True if V is a cast that is part of an induction def-use chain,
1589 /// and had been proven to be redundant under a runtime guard (in other
1590 /// words, the cast has the same SCEV expression as the induction phi).
1591 bool isCastedInductionVariable(const Value *V);
1593 /// Returns True if V can be considered as an induction variable in this
1594 /// loop. V can be the induction phi, or some redundant cast in the def-use
1595 /// chain of the inducion phi.
1596 bool isInductionVariable(const Value *V);
1598 /// Returns True if PN is a reduction variable in this loop.
1599 bool isReductionVariable(PHINode *PN) { return Reductions.count(PN); }
1601 /// Returns True if Phi is a first-order recurrence in this loop.
1602 bool isFirstOrderRecurrence(const PHINode *Phi);
1604 /// Return true if the block BB needs to be predicated in order for the loop
1605 /// to be vectorized.
1606 bool blockNeedsPredication(BasicBlock *BB);
1608 /// Check if this pointer is consecutive when vectorizing. This happens
1609 /// when the last index of the GEP is the induction variable, or that the
1610 /// pointer itself is an induction variable.
1611 /// This check allows us to vectorize A[idx] into a wide load/store.
1613 /// 0 - Stride is unknown or non-consecutive.
1614 /// 1 - Address is consecutive.
1615 /// -1 - Address is consecutive, and decreasing.
1616 /// NOTE: This method must only be used before modifying the original scalar
1617 /// loop. Do not use after invoking 'createVectorizedLoopSkeleton' (PR34965).
1618 int isConsecutivePtr(Value *Ptr);
1620 /// Returns true if the value V is uniform within the loop.
1621 bool isUniform(Value *V);
1623 /// Returns the information that we collected about runtime memory check.
1624 const RuntimePointerChecking *getRuntimePointerChecking() const {
1625 return LAI->getRuntimePointerChecking();
1628 const LoopAccessInfo *getLAI() const { return LAI; }
1630 /// \brief Check if \p Instr belongs to any interleaved access group.
1631 bool isAccessInterleaved(Instruction *Instr) {
1632 return InterleaveInfo.isInterleaved(Instr);
1635 /// \brief Get the interleaved access group that \p Instr belongs to.
1636 const InterleaveGroup *getInterleavedAccessGroup(Instruction *Instr) {
1637 return InterleaveInfo.getInterleaveGroup(Instr);
1640 /// \brief Returns true if an interleaved group requires a scalar iteration
1641 /// to handle accesses with gaps.
1642 bool requiresScalarEpilogue() const {
1643 return InterleaveInfo.requiresScalarEpilogue();
1646 unsigned getMaxSafeDepDistBytes() { return LAI->getMaxSafeDepDistBytes(); }
1648 uint64_t getMaxSafeRegisterWidth() const {
1649 return LAI->getDepChecker().getMaxSafeRegisterWidth();
1652 bool hasStride(Value *V) { return LAI->hasStride(V); }
1654 /// Returns true if the target machine supports masked store operation
1655 /// for the given \p DataType and kind of access to \p Ptr.
1656 bool isLegalMaskedStore(Type *DataType, Value *Ptr) {
1657 return isConsecutivePtr(Ptr) && TTI->isLegalMaskedStore(DataType);
1660 /// Returns true if the target machine supports masked load operation
1661 /// for the given \p DataType and kind of access to \p Ptr.
1662 bool isLegalMaskedLoad(Type *DataType, Value *Ptr) {
1663 return isConsecutivePtr(Ptr) && TTI->isLegalMaskedLoad(DataType);
1666 /// Returns true if the target machine supports masked scatter operation
1667 /// for the given \p DataType.
1668 bool isLegalMaskedScatter(Type *DataType) {
1669 return TTI->isLegalMaskedScatter(DataType);
1672 /// Returns true if the target machine supports masked gather operation
1673 /// for the given \p DataType.
1674 bool isLegalMaskedGather(Type *DataType) {
1675 return TTI->isLegalMaskedGather(DataType);
1678 /// Returns true if the target machine can represent \p V as a masked gather
1679 /// or scatter operation.
1680 bool isLegalGatherOrScatter(Value *V) {
1681 auto *LI = dyn_cast<LoadInst>(V);
1682 auto *SI = dyn_cast<StoreInst>(V);
1685 auto *Ptr = getPointerOperand(V);
1686 auto *Ty = cast<PointerType>(Ptr->getType())->getElementType();
1687 return (LI && isLegalMaskedGather(Ty)) || (SI && isLegalMaskedScatter(Ty));
1690 /// Returns true if vector representation of the instruction \p I
1692 bool isMaskRequired(const Instruction *I) { return (MaskedOp.count(I) != 0); }
1694 unsigned getNumStores() const { return LAI->getNumStores(); }
1695 unsigned getNumLoads() const { return LAI->getNumLoads(); }
1696 unsigned getNumPredStores() const { return NumPredStores; }
1698 /// Returns true if \p I is an instruction that will be scalarized with
1699 /// predication. Such instructions include conditional stores and
1700 /// instructions that may divide by zero.
1701 bool isScalarWithPredication(Instruction *I);
1703 /// Returns true if \p I is a memory instruction with consecutive memory
1704 /// access that can be widened.
1705 bool memoryInstructionCanBeWidened(Instruction *I, unsigned VF = 1);
1707 // Returns true if the NoNaN attribute is set on the function.
1708 bool hasFunNoNaNAttr() const { return HasFunNoNaNAttr; }
1711 /// Check if a single basic block loop is vectorizable.
1712 /// At this point we know that this is a loop with a constant trip count
1713 /// and we only need to check individual instructions.
1714 bool canVectorizeInstrs();
1716 /// When we vectorize loops we may change the order in which
1717 /// we read and write from memory. This method checks if it is
1718 /// legal to vectorize the code, considering only memory constrains.
1719 /// Returns true if the loop is vectorizable
1720 bool canVectorizeMemory();
1722 /// Return true if we can vectorize this loop using the IF-conversion
1724 bool canVectorizeWithIfConvert();
1726 /// Return true if all of the instructions in the block can be speculatively
1727 /// executed. \p SafePtrs is a list of addresses that are known to be legal
1728 /// and we know that we can read from them without segfault.
1729 bool blockCanBePredicated(BasicBlock *BB, SmallPtrSetImpl<Value *> &SafePtrs);
1731 /// Updates the vectorization state by adding \p Phi to the inductions list.
1732 /// This can set \p Phi as the main induction of the loop if \p Phi is a
1733 /// better choice for the main induction than the existing one.
1734 void addInductionPhi(PHINode *Phi, const InductionDescriptor &ID,
1735 SmallPtrSetImpl<Value *> &AllowedExit);
1737 /// Create an analysis remark that explains why vectorization failed
1739 /// \p RemarkName is the identifier for the remark. If \p I is passed it is
1740 /// an instruction that prevents vectorization. Otherwise the loop is used
1741 /// for the location of the remark. \return the remark object that can be
1743 OptimizationRemarkAnalysis
1744 createMissedAnalysis(StringRef RemarkName, Instruction *I = nullptr) const {
1745 return ::createMissedAnalysis(Hints->vectorizeAnalysisPassName(),
1746 RemarkName, TheLoop, I);
1749 /// \brief If an access has a symbolic strides, this maps the pointer value to
1750 /// the stride symbol.
1751 const ValueToValueMap *getSymbolicStrides() {
1752 // FIXME: Currently, the set of symbolic strides is sometimes queried before
1753 // it's collected. This happens from canVectorizeWithIfConvert, when the
1754 // pointer is checked to reference consecutive elements suitable for a
1756 return LAI ? &LAI->getSymbolicStrides() : nullptr;
1759 unsigned NumPredStores = 0;
1761 /// The loop that we evaluate.
1764 /// A wrapper around ScalarEvolution used to add runtime SCEV checks.
1765 /// Applies dynamic knowledge to simplify SCEV expressions in the context
1766 /// of existing SCEV assumptions. The analysis will also add a minimal set
1767 /// of new predicates if this is required to enable vectorization and
1769 PredicatedScalarEvolution &PSE;
1771 /// Target Library Info.
1772 TargetLibraryInfo *TLI;
1774 /// Target Transform Info
1775 const TargetTransformInfo *TTI;
1780 // LoopAccess analysis.
1781 std::function<const LoopAccessInfo &(Loop &)> *GetLAA;
1783 // And the loop-accesses info corresponding to this loop. This pointer is
1784 // null until canVectorizeMemory sets it up.
1785 const LoopAccessInfo *LAI = nullptr;
1787 /// Interface to emit optimization remarks.
1788 OptimizationRemarkEmitter *ORE;
1790 /// The interleave access information contains groups of interleaved accesses
1791 /// with the same stride and close to each other.
1792 InterleavedAccessInfo InterleaveInfo;
1794 // --- vectorization state --- //
1796 /// Holds the primary induction variable. This is the counter of the
1798 PHINode *PrimaryInduction = nullptr;
1800 /// Holds the reduction variables.
1801 ReductionList Reductions;
1803 /// Holds all of the induction variables that we found in the loop.
1804 /// Notice that inductions don't need to start at zero and that induction
1805 /// variables can be pointers.
1806 InductionList Inductions;
1808 /// Holds all the casts that participate in the update chain of the induction
1809 /// variables, and that have been proven to be redundant (possibly under a
1810 /// runtime guard). These casts can be ignored when creating the vectorized
1812 SmallPtrSet<Instruction *, 4> InductionCastsToIgnore;
1814 /// Holds the phi nodes that are first-order recurrences.
1815 RecurrenceSet FirstOrderRecurrences;
1817 /// Holds instructions that need to sink past other instructions to handle
1818 /// first-order recurrences.
1819 DenseMap<Instruction *, Instruction *> SinkAfter;
1821 /// Holds the widest induction type encountered.
1822 Type *WidestIndTy = nullptr;
1824 /// Allowed outside users. This holds the induction and reduction
1825 /// vars which can be accessed from outside the loop.
1826 SmallPtrSet<Value *, 4> AllowedExit;
1828 /// Can we assume the absence of NaNs.
1829 bool HasFunNoNaNAttr = false;
1831 /// Vectorization requirements that will go through late-evaluation.
1832 LoopVectorizationRequirements *Requirements;
1834 /// Used to emit an analysis of any legality issues.
1835 LoopVectorizeHints *Hints;
1837 /// The demanded bits analsyis is used to compute the minimum type size in
1838 /// which a reduction can be computed.
1841 /// The assumption cache analysis is used to compute the minimum type size in
1842 /// which a reduction can be computed.
1843 AssumptionCache *AC;
1845 /// While vectorizing these instructions we have to generate a
1846 /// call to the appropriate masked intrinsic
1847 SmallPtrSet<const Instruction *, 8> MaskedOp;
1850 /// LoopVectorizationCostModel - estimates the expected speedups due to
1852 /// In many cases vectorization is not profitable. This can happen because of
1853 /// a number of reasons. In this class we mainly attempt to predict the
1854 /// expected speedup/slowdowns due to the supported instruction set. We use the
1855 /// TargetTransformInfo to query the different backends for the cost of
1856 /// different operations.
1857 class LoopVectorizationCostModel {
1859 LoopVectorizationCostModel(Loop *L, PredicatedScalarEvolution &PSE,
1860 LoopInfo *LI, LoopVectorizationLegality *Legal,
1861 const TargetTransformInfo &TTI,
1862 const TargetLibraryInfo *TLI, DemandedBits *DB,
1863 AssumptionCache *AC,
1864 OptimizationRemarkEmitter *ORE, const Function *F,
1865 const LoopVectorizeHints *Hints)
1866 : TheLoop(L), PSE(PSE), LI(LI), Legal(Legal), TTI(TTI), TLI(TLI), DB(DB),
1867 AC(AC), ORE(ORE), TheFunction(F), Hints(Hints) {}
1869 /// \return An upper bound for the vectorization factor, or None if
1870 /// vectorization should be avoided up front.
1871 Optional<unsigned> computeMaxVF(bool OptForSize);
1873 /// Information about vectorization costs
1874 struct VectorizationFactor {
1875 // Vector width with best cost
1878 // Cost of the loop with that width
1882 /// \return The most profitable vectorization factor and the cost of that VF.
1883 /// This method checks every power of two up to MaxVF. If UserVF is not ZERO
1884 /// then this vectorization factor will be selected if vectorization is
1886 VectorizationFactor selectVectorizationFactor(unsigned MaxVF);
1888 /// Setup cost-based decisions for user vectorization factor.
1889 void selectUserVectorizationFactor(unsigned UserVF) {
1890 collectUniformsAndScalars(UserVF);
1891 collectInstsToScalarize(UserVF);
1894 /// \return The size (in bits) of the smallest and widest types in the code
1895 /// that needs to be vectorized. We ignore values that remain scalar such as
1896 /// 64 bit loop indices.
1897 std::pair<unsigned, unsigned> getSmallestAndWidestTypes();
1899 /// \return The desired interleave count.
1900 /// If interleave count has been specified by metadata it will be returned.
1901 /// Otherwise, the interleave count is computed and returned. VF and LoopCost
1902 /// are the selected vectorization factor and the cost of the selected VF.
1903 unsigned selectInterleaveCount(bool OptForSize, unsigned VF,
1906 /// Memory access instruction may be vectorized in more than one way.
1907 /// Form of instruction after vectorization depends on cost.
1908 /// This function takes cost-based decisions for Load/Store instructions
1909 /// and collects them in a map. This decisions map is used for building
1910 /// the lists of loop-uniform and loop-scalar instructions.
1911 /// The calculated cost is saved with widening decision in order to
1912 /// avoid redundant calculations.
1913 void setCostBasedWideningDecision(unsigned VF);
1915 /// \brief A struct that represents some properties of the register usage
1917 struct RegisterUsage {
1918 /// Holds the number of loop invariant values that are used in the loop.
1919 unsigned LoopInvariantRegs;
1921 /// Holds the maximum number of concurrent live intervals in the loop.
1922 unsigned MaxLocalUsers;
1924 /// Holds the number of instructions in the loop.
1925 unsigned NumInstructions;
1928 /// \return Returns information about the register usages of the loop for the
1929 /// given vectorization factors.
1930 SmallVector<RegisterUsage, 8> calculateRegisterUsage(ArrayRef<unsigned> VFs);
1932 /// Collect values we want to ignore in the cost model.
1933 void collectValuesToIgnore();
1935 /// \returns The smallest bitwidth each instruction can be represented with.
1936 /// The vector equivalents of these instructions should be truncated to this
1938 const MapVector<Instruction *, uint64_t> &getMinimalBitwidths() const {
1942 /// \returns True if it is more profitable to scalarize instruction \p I for
1943 /// vectorization factor \p VF.
1944 bool isProfitableToScalarize(Instruction *I, unsigned VF) const {
1945 assert(VF > 1 && "Profitable to scalarize relevant only for VF > 1.");
1946 auto Scalars = InstsToScalarize.find(VF);
1947 assert(Scalars != InstsToScalarize.end() &&
1948 "VF not yet analyzed for scalarization profitability");
1949 return Scalars->second.count(I);
1952 /// Returns true if \p I is known to be uniform after vectorization.
1953 bool isUniformAfterVectorization(Instruction *I, unsigned VF) const {
1956 assert(Uniforms.count(VF) && "VF not yet analyzed for uniformity");
1957 auto UniformsPerVF = Uniforms.find(VF);
1958 return UniformsPerVF->second.count(I);
1961 /// Returns true if \p I is known to be scalar after vectorization.
1962 bool isScalarAfterVectorization(Instruction *I, unsigned VF) const {
1965 assert(Scalars.count(VF) && "Scalar values are not calculated for VF");
1966 auto ScalarsPerVF = Scalars.find(VF);
1967 return ScalarsPerVF->second.count(I);
1970 /// \returns True if instruction \p I can be truncated to a smaller bitwidth
1971 /// for vectorization factor \p VF.
1972 bool canTruncateToMinimalBitwidth(Instruction *I, unsigned VF) const {
1973 return VF > 1 && MinBWs.count(I) && !isProfitableToScalarize(I, VF) &&
1974 !isScalarAfterVectorization(I, VF);
1977 /// Decision that was taken during cost calculation for memory instruction.
1980 CM_Widen, // For consecutive accesses with stride +1.
1981 CM_Widen_Reverse, // For consecutive accesses with stride -1.
1987 /// Save vectorization decision \p W and \p Cost taken by the cost model for
1988 /// instruction \p I and vector width \p VF.
1989 void setWideningDecision(Instruction *I, unsigned VF, InstWidening W,
1991 assert(VF >= 2 && "Expected VF >=2");
1992 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
1995 /// Save vectorization decision \p W and \p Cost taken by the cost model for
1996 /// interleaving group \p Grp and vector width \p VF.
1997 void setWideningDecision(const InterleaveGroup *Grp, unsigned VF,
1998 InstWidening W, unsigned Cost) {
1999 assert(VF >= 2 && "Expected VF >=2");
2000 /// Broadcast this decicion to all instructions inside the group.
2001 /// But the cost will be assigned to one instruction only.
2002 for (unsigned i = 0; i < Grp->getFactor(); ++i) {
2003 if (auto *I = Grp->getMember(i)) {
2004 if (Grp->getInsertPos() == I)
2005 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, Cost);
2007 WideningDecisions[std::make_pair(I, VF)] = std::make_pair(W, 0);
2012 /// Return the cost model decision for the given instruction \p I and vector
2013 /// width \p VF. Return CM_Unknown if this instruction did not pass
2014 /// through the cost modeling.
2015 InstWidening getWideningDecision(Instruction *I, unsigned VF) {
2016 assert(VF >= 2 && "Expected VF >=2");
2017 std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
2018 auto Itr = WideningDecisions.find(InstOnVF);
2019 if (Itr == WideningDecisions.end())
2021 return Itr->second.first;
2024 /// Return the vectorization cost for the given instruction \p I and vector
2026 unsigned getWideningCost(Instruction *I, unsigned VF) {
2027 assert(VF >= 2 && "Expected VF >=2");
2028 std::pair<Instruction *, unsigned> InstOnVF = std::make_pair(I, VF);
2029 assert(WideningDecisions.count(InstOnVF) && "The cost is not calculated");
2030 return WideningDecisions[InstOnVF].second;
2033 /// Return True if instruction \p I is an optimizable truncate whose operand
2034 /// is an induction variable. Such a truncate will be removed by adding a new
2035 /// induction variable with the destination type.
2036 bool isOptimizableIVTruncate(Instruction *I, unsigned VF) {
2037 // If the instruction is not a truncate, return false.
2038 auto *Trunc = dyn_cast<TruncInst>(I);
2042 // Get the source and destination types of the truncate.
2043 Type *SrcTy = ToVectorTy(cast<CastInst>(I)->getSrcTy(), VF);
2044 Type *DestTy = ToVectorTy(cast<CastInst>(I)->getDestTy(), VF);
2046 // If the truncate is free for the given types, return false. Replacing a
2047 // free truncate with an induction variable would add an induction variable
2048 // update instruction to each iteration of the loop. We exclude from this
2049 // check the primary induction variable since it will need an update
2050 // instruction regardless.
2051 Value *Op = Trunc->getOperand(0);
2052 if (Op != Legal->getPrimaryInduction() && TTI.isTruncateFree(SrcTy, DestTy))
2055 // If the truncated value is not an induction variable, return false.
2056 return Legal->isInductionPhi(Op);
2059 /// Collects the instructions to scalarize for each predicated instruction in
2061 void collectInstsToScalarize(unsigned VF);
2063 /// Collect Uniform and Scalar values for the given \p VF.
2064 /// The sets depend on CM decision for Load/Store instructions
2065 /// that may be vectorized as interleave, gather-scatter or scalarized.
2066 void collectUniformsAndScalars(unsigned VF) {
2067 // Do the analysis once.
2068 if (VF == 1 || Uniforms.count(VF))
2070 setCostBasedWideningDecision(VF);
2071 collectLoopUniforms(VF);
2072 collectLoopScalars(VF);
2076 /// \return An upper bound for the vectorization factor, larger than zero.
2077 /// One is returned if vectorization should best be avoided due to cost.
2078 unsigned computeFeasibleMaxVF(bool OptForSize, unsigned ConstTripCount);
2080 /// The vectorization cost is a combination of the cost itself and a boolean
2081 /// indicating whether any of the contributing operations will actually
2083 /// vector values after type legalization in the backend. If this latter value
2085 /// false, then all operations will be scalarized (i.e. no vectorization has
2086 /// actually taken place).
2087 using VectorizationCostTy = std::pair<unsigned, bool>;
2089 /// Returns the expected execution cost. The unit of the cost does
2090 /// not matter because we use the 'cost' units to compare different
2091 /// vector widths. The cost that is returned is *not* normalized by
2092 /// the factor width.
2093 VectorizationCostTy expectedCost(unsigned VF);
2095 /// Returns the execution time cost of an instruction for a given vector
2096 /// width. Vector width of one means scalar.
2097 VectorizationCostTy getInstructionCost(Instruction *I, unsigned VF);
2099 /// The cost-computation logic from getInstructionCost which provides
2100 /// the vector type as an output parameter.
2101 unsigned getInstructionCost(Instruction *I, unsigned VF, Type *&VectorTy);
2103 /// Calculate vectorization cost of memory instruction \p I.
2104 unsigned getMemoryInstructionCost(Instruction *I, unsigned VF);
2106 /// The cost computation for scalarized memory instruction.
2107 unsigned getMemInstScalarizationCost(Instruction *I, unsigned VF);
2109 /// The cost computation for interleaving group of memory instructions.
2110 unsigned getInterleaveGroupCost(Instruction *I, unsigned VF);
2112 /// The cost computation for Gather/Scatter instruction.
2113 unsigned getGatherScatterCost(Instruction *I, unsigned VF);
2115 /// The cost computation for widening instruction \p I with consecutive
2117 unsigned getConsecutiveMemOpCost(Instruction *I, unsigned VF);
2119 /// The cost calculation for Load instruction \p I with uniform pointer -
2120 /// scalar load + broadcast.
2121 unsigned getUniformMemOpCost(Instruction *I, unsigned VF);
2123 /// Returns whether the instruction is a load or store and will be a emitted
2124 /// as a vector operation.
2125 bool isConsecutiveLoadOrStore(Instruction *I);
2127 /// Create an analysis remark that explains why vectorization failed
2129 /// \p RemarkName is the identifier for the remark. \return the remark object
2130 /// that can be streamed to.
2131 OptimizationRemarkAnalysis createMissedAnalysis(StringRef RemarkName) {
2132 return ::createMissedAnalysis(Hints->vectorizeAnalysisPassName(),
2133 RemarkName, TheLoop);
2136 /// Map of scalar integer values to the smallest bitwidth they can be legally
2137 /// represented as. The vector equivalents of these values should be truncated
2139 MapVector<Instruction *, uint64_t> MinBWs;
2141 /// A type representing the costs for instructions if they were to be
2142 /// scalarized rather than vectorized. The entries are Instruction-Cost
2144 using ScalarCostsTy = DenseMap<Instruction *, unsigned>;
2146 /// A set containing all BasicBlocks that are known to present after
2147 /// vectorization as a predicated block.
2148 SmallPtrSet<BasicBlock *, 4> PredicatedBBsAfterVectorization;
2150 /// A map holding scalar costs for different vectorization factors. The
2151 /// presence of a cost for an instruction in the mapping indicates that the
2152 /// instruction will be scalarized when vectorizing with the associated
2153 /// vectorization factor. The entries are VF-ScalarCostTy pairs.
2154 DenseMap<unsigned, ScalarCostsTy> InstsToScalarize;
2156 /// Holds the instructions known to be uniform after vectorization.
2157 /// The data is collected per VF.
2158 DenseMap<unsigned, SmallPtrSet<Instruction *, 4>> Uniforms;
2160 /// Holds the instructions known to be scalar after vectorization.
2161 /// The data is collected per VF.
2162 DenseMap<unsigned, SmallPtrSet<Instruction *, 4>> Scalars;
2164 /// Holds the instructions (address computations) that are forced to be
2166 DenseMap<unsigned, SmallPtrSet<Instruction *, 4>> ForcedScalars;
2168 /// Returns the expected difference in cost from scalarizing the expression
2169 /// feeding a predicated instruction \p PredInst. The instructions to
2170 /// scalarize and their scalar costs are collected in \p ScalarCosts. A
2171 /// non-negative return value implies the expression will be scalarized.
2172 /// Currently, only single-use chains are considered for scalarization.
2173 int computePredInstDiscount(Instruction *PredInst, ScalarCostsTy &ScalarCosts,
2176 /// Collect the instructions that are uniform after vectorization. An
2177 /// instruction is uniform if we represent it with a single scalar value in
2178 /// the vectorized loop corresponding to each vector iteration. Examples of
2179 /// uniform instructions include pointer operands of consecutive or
2180 /// interleaved memory accesses. Note that although uniformity implies an
2181 /// instruction will be scalar, the reverse is not true. In general, a
2182 /// scalarized instruction will be represented by VF scalar values in the
2183 /// vectorized loop, each corresponding to an iteration of the original
2185 void collectLoopUniforms(unsigned VF);
2187 /// Collect the instructions that are scalar after vectorization. An
2188 /// instruction is scalar if it is known to be uniform or will be scalarized
2189 /// during vectorization. Non-uniform scalarized instructions will be
2190 /// represented by VF values in the vectorized loop, each corresponding to an
2191 /// iteration of the original scalar loop.
2192 void collectLoopScalars(unsigned VF);
2194 /// Keeps cost model vectorization decision and cost for instructions.
2195 /// Right now it is used for memory instructions only.
2196 using DecisionList = DenseMap<std::pair<Instruction *, unsigned>,
2197 std::pair<InstWidening, unsigned>>;
2199 DecisionList WideningDecisions;
2202 /// The loop that we evaluate.
2205 /// Predicated scalar evolution analysis.
2206 PredicatedScalarEvolution &PSE;
2208 /// Loop Info analysis.
2211 /// Vectorization legality.
2212 LoopVectorizationLegality *Legal;
2214 /// Vector target information.
2215 const TargetTransformInfo &TTI;
2217 /// Target Library Info.
2218 const TargetLibraryInfo *TLI;
2220 /// Demanded bits analysis.
2223 /// Assumption cache.
2224 AssumptionCache *AC;
2226 /// Interface to emit optimization remarks.
2227 OptimizationRemarkEmitter *ORE;
2229 const Function *TheFunction;
2231 /// Loop Vectorize Hint.
2232 const LoopVectorizeHints *Hints;
2234 /// Values to ignore in the cost model.
2235 SmallPtrSet<const Value *, 16> ValuesToIgnore;
2237 /// Values to ignore in the cost model when VF > 1.
2238 SmallPtrSet<const Value *, 16> VecValuesToIgnore;
2241 } // end anonymous namespace
2245 /// InnerLoopVectorizer vectorizes loops which contain only one basic
2246 /// LoopVectorizationPlanner - drives the vectorization process after having
2247 /// passed Legality checks.
2248 /// The planner builds and optimizes the Vectorization Plans which record the
2249 /// decisions how to vectorize the given loop. In particular, represent the
2250 /// control-flow of the vectorized version, the replication of instructions that
2251 /// are to be scalarized, and interleave access groups.
2252 class LoopVectorizationPlanner {
2253 /// The loop that we evaluate.
2256 /// Loop Info analysis.
2259 /// Target Library Info.
2260 const TargetLibraryInfo *TLI;
2262 /// Target Transform Info.
2263 const TargetTransformInfo *TTI;
2265 /// The legality analysis.
2266 LoopVectorizationLegality *Legal;
2268 /// The profitablity analysis.
2269 LoopVectorizationCostModel &CM;
2271 using VPlanPtr = std::unique_ptr<VPlan>;
2273 SmallVector<VPlanPtr, 4> VPlans;
2275 /// This class is used to enable the VPlan to invoke a method of ILV. This is
2276 /// needed until the method is refactored out of ILV and becomes reusable.
2277 struct VPCallbackILV : public VPCallback {
2278 InnerLoopVectorizer &ILV;
2280 VPCallbackILV(InnerLoopVectorizer &ILV) : ILV(ILV) {}
2282 Value *getOrCreateVectorValues(Value *V, unsigned Part) override {
2283 return ILV.getOrCreateVectorValue(V, Part);
2287 /// A builder used to construct the current plan.
2290 /// When we if-convert we need to create edge masks. We have to cache values
2291 /// so that we don't end up with exponential recursion/IR. Note that
2292 /// if-conversion currently takes place during VPlan-construction, so these
2293 /// caches are only used at that stage.
2294 using EdgeMaskCacheTy =
2295 DenseMap<std::pair<BasicBlock *, BasicBlock *>, VPValue *>;
2296 using BlockMaskCacheTy = DenseMap<BasicBlock *, VPValue *>;
2297 EdgeMaskCacheTy EdgeMaskCache;
2298 BlockMaskCacheTy BlockMaskCache;
2300 unsigned BestVF = 0;
2301 unsigned BestUF = 0;
2304 LoopVectorizationPlanner(Loop *L, LoopInfo *LI, const TargetLibraryInfo *TLI,
2305 const TargetTransformInfo *TTI,
2306 LoopVectorizationLegality *Legal,
2307 LoopVectorizationCostModel &CM)
2308 : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM) {}
2310 /// Plan how to best vectorize, return the best VF and its cost.
2311 LoopVectorizationCostModel::VectorizationFactor plan(bool OptForSize,
2314 /// Finalize the best decision and dispose of all other VPlans.
2315 void setBestPlan(unsigned VF, unsigned UF);
2317 /// Generate the IR code for the body of the vectorized loop according to the
2318 /// best selected VPlan.
2319 void executePlan(InnerLoopVectorizer &LB, DominatorTree *DT);
2321 void printPlans(raw_ostream &O) {
2322 for (const auto &Plan : VPlans)
2327 /// Collect the instructions from the original loop that would be trivially
2328 /// dead in the vectorized loop if generated.
2329 void collectTriviallyDeadInstructions(
2330 SmallPtrSetImpl<Instruction *> &DeadInstructions);
2332 /// A range of powers-of-2 vectorization factors with fixed start and
2333 /// adjustable end. The range includes start and excludes end, e.g.,:
2334 /// [1, 9) = {1, 2, 4, 8}
2337 const unsigned Start;
2339 // Need not be a power of 2. If End <= Start range is empty.
2343 /// Test a \p Predicate on a \p Range of VF's. Return the value of applying
2344 /// \p Predicate on Range.Start, possibly decreasing Range.End such that the
2345 /// returned value holds for the entire \p Range.
2346 bool getDecisionAndClampRange(const std::function<bool(unsigned)> &Predicate,
2349 /// Build VPlans for power-of-2 VF's between \p MinVF and \p MaxVF inclusive,
2350 /// according to the information gathered by Legal when it checked if it is
2351 /// legal to vectorize the loop.
2352 void buildVPlans(unsigned MinVF, unsigned MaxVF);
2355 /// A helper function that computes the predicate of the block BB, assuming
2356 /// that the header block of the loop is set to True. It returns the *entry*
2357 /// mask for the block BB.
2358 VPValue *createBlockInMask(BasicBlock *BB, VPlanPtr &Plan);
2360 /// A helper function that computes the predicate of the edge between SRC
2362 VPValue *createEdgeMask(BasicBlock *Src, BasicBlock *Dst, VPlanPtr &Plan);
2364 /// Check if \I belongs to an Interleave Group within the given VF \p Range,
2365 /// \return true in the first returned value if so and false otherwise.
2366 /// Build a new VPInterleaveGroup Recipe if \I is the primary member of an IG
2367 /// for \p Range.Start, and provide it as the second returned value.
2368 /// Note that if \I is an adjunct member of an IG for \p Range.Start, the
2369 /// \return value is <true, nullptr>, as it is handled by another recipe.
2370 /// \p Range.End may be decreased to ensure same decision from \p Range.Start
2371 /// to \p Range.End.
2372 VPInterleaveRecipe *tryToInterleaveMemory(Instruction *I, VFRange &Range);
2374 // Check if \I is a memory instruction to be widened for \p Range.Start and
2375 // potentially masked. Such instructions are handled by a recipe that takes an
2376 // additional VPInstruction for the mask.
2377 VPWidenMemoryInstructionRecipe *tryToWidenMemory(Instruction *I,
2381 /// Check if an induction recipe should be constructed for \I within the given
2382 /// VF \p Range. If so build and return it. If not, return null. \p Range.End
2383 /// may be decreased to ensure same decision from \p Range.Start to
2385 VPWidenIntOrFpInductionRecipe *tryToOptimizeInduction(Instruction *I,
2388 /// Handle non-loop phi nodes. Currently all such phi nodes are turned into
2389 /// a sequence of select instructions as the vectorizer currently performs
2390 /// full if-conversion.
2391 VPBlendRecipe *tryToBlend(Instruction *I, VPlanPtr &Plan);
2393 /// Check if \p I can be widened within the given VF \p Range. If \p I can be
2394 /// widened for \p Range.Start, check if the last recipe of \p VPBB can be
2395 /// extended to include \p I or else build a new VPWidenRecipe for it and
2396 /// append it to \p VPBB. Return true if \p I can be widened for Range.Start,
2397 /// false otherwise. Range.End may be decreased to ensure same decision from
2398 /// \p Range.Start to \p Range.End.
2399 bool tryToWiden(Instruction *I, VPBasicBlock *VPBB, VFRange &Range);
2401 /// Build a VPReplicationRecipe for \p I and enclose it within a Region if it
2402 /// is predicated. \return \p VPBB augmented with this new recipe if \p I is
2403 /// not predicated, otherwise \return a new VPBasicBlock that succeeds the new
2404 /// Region. Update the packing decision of predicated instructions if they
2405 /// feed \p I. Range.End may be decreased to ensure same recipe behavior from
2406 /// \p Range.Start to \p Range.End.
2407 VPBasicBlock *handleReplication(
2408 Instruction *I, VFRange &Range, VPBasicBlock *VPBB,
2409 DenseMap<Instruction *, VPReplicateRecipe *> &PredInst2Recipe,
2412 /// Create a replicating region for instruction \p I that requires
2413 /// predication. \p PredRecipe is a VPReplicateRecipe holding \p I.
2414 VPRegionBlock *createReplicateRegion(Instruction *I, VPRecipeBase *PredRecipe,
2417 /// Build a VPlan according to the information gathered by Legal. \return a
2418 /// VPlan for vectorization factors \p Range.Start and up to \p Range.End
2419 /// exclusive, possibly decreasing \p Range.End.
2420 VPlanPtr buildVPlan(VFRange &Range,
2421 const SmallPtrSetImpl<Value *> &NeedDef);
2424 } // end namespace llvm
2428 /// \brief This holds vectorization requirements that must be verified late in
2429 /// the process. The requirements are set by legalize and costmodel. Once
2430 /// vectorization has been determined to be possible and profitable the
2431 /// requirements can be verified by looking for metadata or compiler options.
2432 /// For example, some loops require FP commutativity which is only allowed if
2433 /// vectorization is explicitly specified or if the fast-math compiler option
2434 /// has been provided.
2435 /// Late evaluation of these requirements allows helpful diagnostics to be
2436 /// composed that tells the user what need to be done to vectorize the loop. For
2437 /// example, by specifying #pragma clang loop vectorize or -ffast-math. Late
2438 /// evaluation should be used only when diagnostics can generated that can be
2439 /// followed by a non-expert user.
2440 class LoopVectorizationRequirements {
2442 LoopVectorizationRequirements(OptimizationRemarkEmitter &ORE) : ORE(ORE) {}
2444 void addUnsafeAlgebraInst(Instruction *I) {
2445 // First unsafe algebra instruction.
2446 if (!UnsafeAlgebraInst)
2447 UnsafeAlgebraInst = I;
2450 void addRuntimePointerChecks(unsigned Num) { NumRuntimePointerChecks = Num; }
2452 bool doesNotMeet(Function *F, Loop *L, const LoopVectorizeHints &Hints) {
2453 const char *PassName = Hints.vectorizeAnalysisPassName();
2454 bool Failed = false;
2455 if (UnsafeAlgebraInst && !Hints.allowReordering()) {
2457 return OptimizationRemarkAnalysisFPCommute(
2458 PassName, "CantReorderFPOps",
2459 UnsafeAlgebraInst->getDebugLoc(),
2460 UnsafeAlgebraInst->getParent())
2461 << "loop not vectorized: cannot prove it is safe to reorder "
2462 "floating-point operations";
2467 // Test if runtime memcheck thresholds are exceeded.
2468 bool PragmaThresholdReached =
2469 NumRuntimePointerChecks > PragmaVectorizeMemoryCheckThreshold;
2470 bool ThresholdReached =
2471 NumRuntimePointerChecks > VectorizerParams::RuntimeMemoryCheckThreshold;
2472 if ((ThresholdReached && !Hints.allowReordering()) ||
2473 PragmaThresholdReached) {
2475 return OptimizationRemarkAnalysisAliasing(PassName, "CantReorderMemOps",
2478 << "loop not vectorized: cannot prove it is safe to reorder "
2479 "memory operations";
2481 DEBUG(dbgs() << "LV: Too many memory checks needed.\n");
2489 unsigned NumRuntimePointerChecks = 0;
2490 Instruction *UnsafeAlgebraInst = nullptr;
2492 /// Interface to emit optimization remarks.
2493 OptimizationRemarkEmitter &ORE;
2496 } // end anonymous namespace
2498 static void addAcyclicInnerLoop(Loop &L, SmallVectorImpl<Loop *> &V) {
2500 if (!hasCyclesInLoopBody(L))
2504 for (Loop *InnerL : L)
2505 addAcyclicInnerLoop(*InnerL, V);
2510 /// The LoopVectorize Pass.
2511 struct LoopVectorize : public FunctionPass {
2512 /// Pass identification, replacement for typeid
2515 LoopVectorizePass Impl;
2517 explicit LoopVectorize(bool NoUnrolling = false, bool AlwaysVectorize = true)
2518 : FunctionPass(ID) {
2519 Impl.DisableUnrolling = NoUnrolling;
2520 Impl.AlwaysVectorize = AlwaysVectorize;
2521 initializeLoopVectorizePass(*PassRegistry::getPassRegistry());
2524 bool runOnFunction(Function &F) override {
2525 if (skipFunction(F))
2528 auto *SE = &getAnalysis<ScalarEvolutionWrapperPass>().getSE();
2529 auto *LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
2530 auto *TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
2531 auto *DT = &getAnalysis<DominatorTreeWrapperPass>().getDomTree();
2532 auto *BFI = &getAnalysis<BlockFrequencyInfoWrapperPass>().getBFI();
2533 auto *TLIP = getAnalysisIfAvailable<TargetLibraryInfoWrapperPass>();
2534 auto *TLI = TLIP ? &TLIP->getTLI() : nullptr;
2535 auto *AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
2536 auto *AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
2537 auto *LAA = &getAnalysis<LoopAccessLegacyAnalysis>();
2538 auto *DB = &getAnalysis<DemandedBitsWrapperPass>().getDemandedBits();
2539 auto *ORE = &getAnalysis<OptimizationRemarkEmitterWrapperPass>().getORE();
2541 std::function<const LoopAccessInfo &(Loop &)> GetLAA =
2542 [&](Loop &L) -> const LoopAccessInfo & { return LAA->getInfo(&L); };
2544 return Impl.runImpl(F, *SE, *LI, *TTI, *DT, *BFI, TLI, *DB, *AA, *AC,
2548 void getAnalysisUsage(AnalysisUsage &AU) const override {
2549 AU.addRequired<AssumptionCacheTracker>();
2550 AU.addRequired<BlockFrequencyInfoWrapperPass>();
2551 AU.addRequired<DominatorTreeWrapperPass>();
2552 AU.addRequired<LoopInfoWrapperPass>();
2553 AU.addRequired<ScalarEvolutionWrapperPass>();
2554 AU.addRequired<TargetTransformInfoWrapperPass>();
2555 AU.addRequired<AAResultsWrapperPass>();
2556 AU.addRequired<LoopAccessLegacyAnalysis>();
2557 AU.addRequired<DemandedBitsWrapperPass>();
2558 AU.addRequired<OptimizationRemarkEmitterWrapperPass>();
2559 AU.addPreserved<LoopInfoWrapperPass>();
2560 AU.addPreserved<DominatorTreeWrapperPass>();
2561 AU.addPreserved<BasicAAWrapperPass>();
2562 AU.addPreserved<GlobalsAAWrapperPass>();
2566 } // end anonymous namespace
2568 //===----------------------------------------------------------------------===//
2569 // Implementation of LoopVectorizationLegality, InnerLoopVectorizer and
2570 // LoopVectorizationCostModel and LoopVectorizationPlanner.
2571 //===----------------------------------------------------------------------===//
2573 Value *InnerLoopVectorizer::getBroadcastInstrs(Value *V) {
2574 // We need to place the broadcast of invariant variables outside the loop.
2575 Instruction *Instr = dyn_cast<Instruction>(V);
2576 bool NewInstr = (Instr && Instr->getParent() == LoopVectorBody);
2577 bool Invariant = OrigLoop->isLoopInvariant(V) && !NewInstr;
2579 // Place the code for broadcasting invariant variables in the new preheader.
2580 IRBuilder<>::InsertPointGuard Guard(Builder);
2582 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator());
2584 // Broadcast the scalar into all locations in the vector.
2585 Value *Shuf = Builder.CreateVectorSplat(VF, V, "broadcast");
2590 void InnerLoopVectorizer::createVectorIntOrFpInductionPHI(
2591 const InductionDescriptor &II, Value *Step, Instruction *EntryVal) {
2592 Value *Start = II.getStartValue();
2594 // Construct the initial value of the vector IV in the vector loop preheader
2595 auto CurrIP = Builder.saveIP();
2596 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator());
2597 if (isa<TruncInst>(EntryVal)) {
2598 assert(Start->getType()->isIntegerTy() &&
2599 "Truncation requires an integer type");
2600 auto *TruncType = cast<IntegerType>(EntryVal->getType());
2601 Step = Builder.CreateTrunc(Step, TruncType);
2602 Start = Builder.CreateCast(Instruction::Trunc, Start, TruncType);
2604 Value *SplatStart = Builder.CreateVectorSplat(VF, Start);
2605 Value *SteppedStart =
2606 getStepVector(SplatStart, 0, Step, II.getInductionOpcode());
2608 // We create vector phi nodes for both integer and floating-point induction
2609 // variables. Here, we determine the kind of arithmetic we will perform.
2610 Instruction::BinaryOps AddOp;
2611 Instruction::BinaryOps MulOp;
2612 if (Step->getType()->isIntegerTy()) {
2613 AddOp = Instruction::Add;
2614 MulOp = Instruction::Mul;
2616 AddOp = II.getInductionOpcode();
2617 MulOp = Instruction::FMul;
2620 // Multiply the vectorization factor by the step using integer or
2621 // floating-point arithmetic as appropriate.
2622 Value *ConstVF = getSignedIntOrFpConstant(Step->getType(), VF);
2623 Value *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, Step, ConstVF));
2625 // Create a vector splat to use in the induction update.
2627 // FIXME: If the step is non-constant, we create the vector splat with
2628 // IRBuilder. IRBuilder can constant-fold the multiply, but it doesn't
2629 // handle a constant vector splat.
2630 Value *SplatVF = isa<Constant>(Mul)
2631 ? ConstantVector::getSplat(VF, cast<Constant>(Mul))
2632 : Builder.CreateVectorSplat(VF, Mul);
2633 Builder.restoreIP(CurrIP);
2635 // We may need to add the step a number of times, depending on the unroll
2636 // factor. The last of those goes into the PHI.
2637 PHINode *VecInd = PHINode::Create(SteppedStart->getType(), 2, "vec.ind",
2638 &*LoopVectorBody->getFirstInsertionPt());
2639 Instruction *LastInduction = VecInd;
2640 for (unsigned Part = 0; Part < UF; ++Part) {
2641 VectorLoopValueMap.setVectorValue(EntryVal, Part, LastInduction);
2643 if (isa<TruncInst>(EntryVal))
2644 addMetadata(LastInduction, EntryVal);
2646 recordVectorLoopValueForInductionCast(II, LastInduction, Part);
2648 LastInduction = cast<Instruction>(addFastMathFlag(
2649 Builder.CreateBinOp(AddOp, LastInduction, SplatVF, "step.add")));
2652 // Move the last step to the end of the latch block. This ensures consistent
2653 // placement of all induction updates.
2654 auto *LoopVectorLatch = LI->getLoopFor(LoopVectorBody)->getLoopLatch();
2655 auto *Br = cast<BranchInst>(LoopVectorLatch->getTerminator());
2656 auto *ICmp = cast<Instruction>(Br->getCondition());
2657 LastInduction->moveBefore(ICmp);
2658 LastInduction->setName("vec.ind.next");
2660 VecInd->addIncoming(SteppedStart, LoopVectorPreHeader);
2661 VecInd->addIncoming(LastInduction, LoopVectorLatch);
2664 bool InnerLoopVectorizer::shouldScalarizeInstruction(Instruction *I) const {
2665 return Cost->isScalarAfterVectorization(I, VF) ||
2666 Cost->isProfitableToScalarize(I, VF);
2669 bool InnerLoopVectorizer::needsScalarInduction(Instruction *IV) const {
2670 if (shouldScalarizeInstruction(IV))
2672 auto isScalarInst = [&](User *U) -> bool {
2673 auto *I = cast<Instruction>(U);
2674 return (OrigLoop->contains(I) && shouldScalarizeInstruction(I));
2676 return llvm::any_of(IV->users(), isScalarInst);
2679 void InnerLoopVectorizer::recordVectorLoopValueForInductionCast(
2680 const InductionDescriptor &ID, Value *VectorLoopVal, unsigned Part,
2682 const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts();
2685 // Only the first Cast instruction in the Casts vector is of interest.
2686 // The rest of the Casts (if exist) have no uses outside the
2687 // induction update chain itself.
2688 Instruction *CastInst = *Casts.begin();
2689 if (Lane < UINT_MAX)
2690 VectorLoopValueMap.setScalarValue(CastInst, {Part, Lane}, VectorLoopVal);
2692 VectorLoopValueMap.setVectorValue(CastInst, Part, VectorLoopVal);
2695 void InnerLoopVectorizer::widenIntOrFpInduction(PHINode *IV, TruncInst *Trunc) {
2696 assert((IV->getType()->isIntegerTy() || IV != OldInduction) &&
2697 "Primary induction variable must have an integer type");
2699 auto II = Legal->getInductionVars()->find(IV);
2700 assert(II != Legal->getInductionVars()->end() && "IV is not an induction");
2702 auto ID = II->second;
2703 assert(IV->getType() == ID.getStartValue()->getType() && "Types must match");
2705 // The scalar value to broadcast. This will be derived from the canonical
2706 // induction variable.
2707 Value *ScalarIV = nullptr;
2709 // The value from the original loop to which we are mapping the new induction
2711 Instruction *EntryVal = Trunc ? cast<Instruction>(Trunc) : IV;
2713 // True if we have vectorized the induction variable.
2714 auto VectorizedIV = false;
2716 // Determine if we want a scalar version of the induction variable. This is
2717 // true if the induction variable itself is not widened, or if it has at
2718 // least one user in the loop that is not widened.
2719 auto NeedsScalarIV = VF > 1 && needsScalarInduction(EntryVal);
2721 // Generate code for the induction step. Note that induction steps are
2722 // required to be loop-invariant
2723 assert(PSE.getSE()->isLoopInvariant(ID.getStep(), OrigLoop) &&
2724 "Induction step should be loop invariant");
2725 auto &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
2726 Value *Step = nullptr;
2727 if (PSE.getSE()->isSCEVable(IV->getType())) {
2728 SCEVExpander Exp(*PSE.getSE(), DL, "induction");
2729 Step = Exp.expandCodeFor(ID.getStep(), ID.getStep()->getType(),
2730 LoopVectorPreHeader->getTerminator());
2732 Step = cast<SCEVUnknown>(ID.getStep())->getValue();
2735 // Try to create a new independent vector induction variable. If we can't
2736 // create the phi node, we will splat the scalar induction variable in each
2738 if (VF > 1 && !shouldScalarizeInstruction(EntryVal)) {
2739 createVectorIntOrFpInductionPHI(ID, Step, EntryVal);
2740 VectorizedIV = true;
2743 // If we haven't yet vectorized the induction variable, or if we will create
2744 // a scalar one, we need to define the scalar induction variable and step
2745 // values. If we were given a truncation type, truncate the canonical
2746 // induction variable and step. Otherwise, derive these values from the
2747 // induction descriptor.
2748 if (!VectorizedIV || NeedsScalarIV) {
2749 ScalarIV = Induction;
2750 if (IV != OldInduction) {
2751 ScalarIV = IV->getType()->isIntegerTy()
2752 ? Builder.CreateSExtOrTrunc(Induction, IV->getType())
2753 : Builder.CreateCast(Instruction::SIToFP, Induction,
2755 ScalarIV = ID.transform(Builder, ScalarIV, PSE.getSE(), DL);
2756 ScalarIV->setName("offset.idx");
2759 auto *TruncType = cast<IntegerType>(Trunc->getType());
2760 assert(Step->getType()->isIntegerTy() &&
2761 "Truncation requires an integer step");
2762 ScalarIV = Builder.CreateTrunc(ScalarIV, TruncType);
2763 Step = Builder.CreateTrunc(Step, TruncType);
2767 // If we haven't yet vectorized the induction variable, splat the scalar
2768 // induction variable, and build the necessary step vectors.
2769 // TODO: Don't do it unless the vectorized IV is really required.
2770 if (!VectorizedIV) {
2771 Value *Broadcasted = getBroadcastInstrs(ScalarIV);
2772 for (unsigned Part = 0; Part < UF; ++Part) {
2774 getStepVector(Broadcasted, VF * Part, Step, ID.getInductionOpcode());
2775 VectorLoopValueMap.setVectorValue(EntryVal, Part, EntryPart);
2777 addMetadata(EntryPart, Trunc);
2779 recordVectorLoopValueForInductionCast(ID, EntryPart, Part);
2783 // If an induction variable is only used for counting loop iterations or
2784 // calculating addresses, it doesn't need to be widened. Create scalar steps
2785 // that can be used by instructions we will later scalarize. Note that the
2786 // addition of the scalar steps will not increase the number of instructions
2787 // in the loop in the common case prior to InstCombine. We will be trading
2788 // one vector extract for each scalar step.
2790 buildScalarSteps(ScalarIV, Step, EntryVal, ID);
2793 Value *InnerLoopVectorizer::getStepVector(Value *Val, int StartIdx, Value *Step,
2794 Instruction::BinaryOps BinOp) {
2795 // Create and check the types.
2796 assert(Val->getType()->isVectorTy() && "Must be a vector");
2797 int VLen = Val->getType()->getVectorNumElements();
2799 Type *STy = Val->getType()->getScalarType();
2800 assert((STy->isIntegerTy() || STy->isFloatingPointTy()) &&
2801 "Induction Step must be an integer or FP");
2802 assert(Step->getType() == STy && "Step has wrong type");
2804 SmallVector<Constant *, 8> Indices;
2806 if (STy->isIntegerTy()) {
2807 // Create a vector of consecutive numbers from zero to VF.
2808 for (int i = 0; i < VLen; ++i)
2809 Indices.push_back(ConstantInt::get(STy, StartIdx + i));
2811 // Add the consecutive indices to the vector value.
2812 Constant *Cv = ConstantVector::get(Indices);
2813 assert(Cv->getType() == Val->getType() && "Invalid consecutive vec");
2814 Step = Builder.CreateVectorSplat(VLen, Step);
2815 assert(Step->getType() == Val->getType() && "Invalid step vec");
2816 // FIXME: The newly created binary instructions should contain nsw/nuw flags,
2817 // which can be found from the original scalar operations.
2818 Step = Builder.CreateMul(Cv, Step);
2819 return Builder.CreateAdd(Val, Step, "induction");
2822 // Floating point induction.
2823 assert((BinOp == Instruction::FAdd || BinOp == Instruction::FSub) &&
2824 "Binary Opcode should be specified for FP induction");
2825 // Create a vector of consecutive numbers from zero to VF.
2826 for (int i = 0; i < VLen; ++i)
2827 Indices.push_back(ConstantFP::get(STy, (double)(StartIdx + i)));
2829 // Add the consecutive indices to the vector value.
2830 Constant *Cv = ConstantVector::get(Indices);
2832 Step = Builder.CreateVectorSplat(VLen, Step);
2834 // Floating point operations had to be 'fast' to enable the induction.
2835 FastMathFlags Flags;
2838 Value *MulOp = Builder.CreateFMul(Cv, Step);
2839 if (isa<Instruction>(MulOp))
2840 // Have to check, MulOp may be a constant
2841 cast<Instruction>(MulOp)->setFastMathFlags(Flags);
2843 Value *BOp = Builder.CreateBinOp(BinOp, Val, MulOp, "induction");
2844 if (isa<Instruction>(BOp))
2845 cast<Instruction>(BOp)->setFastMathFlags(Flags);
2849 void InnerLoopVectorizer::buildScalarSteps(Value *ScalarIV, Value *Step,
2851 const InductionDescriptor &ID) {
2852 // We shouldn't have to build scalar steps if we aren't vectorizing.
2853 assert(VF > 1 && "VF should be greater than one");
2855 // Get the value type and ensure it and the step have the same integer type.
2856 Type *ScalarIVTy = ScalarIV->getType()->getScalarType();
2857 assert(ScalarIVTy == Step->getType() &&
2858 "Val and Step should have the same type");
2860 // We build scalar steps for both integer and floating-point induction
2861 // variables. Here, we determine the kind of arithmetic we will perform.
2862 Instruction::BinaryOps AddOp;
2863 Instruction::BinaryOps MulOp;
2864 if (ScalarIVTy->isIntegerTy()) {
2865 AddOp = Instruction::Add;
2866 MulOp = Instruction::Mul;
2868 AddOp = ID.getInductionOpcode();
2869 MulOp = Instruction::FMul;
2872 // Determine the number of scalars we need to generate for each unroll
2873 // iteration. If EntryVal is uniform, we only need to generate the first
2874 // lane. Otherwise, we generate all VF values.
2876 Cost->isUniformAfterVectorization(cast<Instruction>(EntryVal), VF) ? 1
2878 // Compute the scalar steps and save the results in VectorLoopValueMap.
2879 for (unsigned Part = 0; Part < UF; ++Part) {
2880 for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
2881 auto *StartIdx = getSignedIntOrFpConstant(ScalarIVTy, VF * Part + Lane);
2882 auto *Mul = addFastMathFlag(Builder.CreateBinOp(MulOp, StartIdx, Step));
2883 auto *Add = addFastMathFlag(Builder.CreateBinOp(AddOp, ScalarIV, Mul));
2884 VectorLoopValueMap.setScalarValue(EntryVal, {Part, Lane}, Add);
2885 recordVectorLoopValueForInductionCast(ID, Add, Part, Lane);
2890 int LoopVectorizationLegality::isConsecutivePtr(Value *Ptr) {
2891 const ValueToValueMap &Strides = getSymbolicStrides() ? *getSymbolicStrides() :
2894 int Stride = getPtrStride(PSE, Ptr, TheLoop, Strides, true, false);
2895 if (Stride == 1 || Stride == -1)
2900 bool LoopVectorizationLegality::isUniform(Value *V) {
2901 return LAI->isUniform(V);
2904 Value *InnerLoopVectorizer::getOrCreateVectorValue(Value *V, unsigned Part) {
2905 assert(V != Induction && "The new induction variable should not be used.");
2906 assert(!V->getType()->isVectorTy() && "Can't widen a vector");
2907 assert(!V->getType()->isVoidTy() && "Type does not produce a value");
2909 // If we have a stride that is replaced by one, do it here.
2910 if (Legal->hasStride(V))
2911 V = ConstantInt::get(V->getType(), 1);
2913 // If we have a vector mapped to this value, return it.
2914 if (VectorLoopValueMap.hasVectorValue(V, Part))
2915 return VectorLoopValueMap.getVectorValue(V, Part);
2917 // If the value has not been vectorized, check if it has been scalarized
2918 // instead. If it has been scalarized, and we actually need the value in
2919 // vector form, we will construct the vector values on demand.
2920 if (VectorLoopValueMap.hasAnyScalarValue(V)) {
2921 Value *ScalarValue = VectorLoopValueMap.getScalarValue(V, {Part, 0});
2923 // If we've scalarized a value, that value should be an instruction.
2924 auto *I = cast<Instruction>(V);
2926 // If we aren't vectorizing, we can just copy the scalar map values over to
2929 VectorLoopValueMap.setVectorValue(V, Part, ScalarValue);
2933 // Get the last scalar instruction we generated for V and Part. If the value
2934 // is known to be uniform after vectorization, this corresponds to lane zero
2935 // of the Part unroll iteration. Otherwise, the last instruction is the one
2936 // we created for the last vector lane of the Part unroll iteration.
2937 unsigned LastLane = Cost->isUniformAfterVectorization(I, VF) ? 0 : VF - 1;
2938 auto *LastInst = cast<Instruction>(
2939 VectorLoopValueMap.getScalarValue(V, {Part, LastLane}));
2941 // Set the insert point after the last scalarized instruction. This ensures
2942 // the insertelement sequence will directly follow the scalar definitions.
2943 auto OldIP = Builder.saveIP();
2944 auto NewIP = std::next(BasicBlock::iterator(LastInst));
2945 Builder.SetInsertPoint(&*NewIP);
2947 // However, if we are vectorizing, we need to construct the vector values.
2948 // If the value is known to be uniform after vectorization, we can just
2949 // broadcast the scalar value corresponding to lane zero for each unroll
2950 // iteration. Otherwise, we construct the vector values using insertelement
2951 // instructions. Since the resulting vectors are stored in
2952 // VectorLoopValueMap, we will only generate the insertelements once.
2953 Value *VectorValue = nullptr;
2954 if (Cost->isUniformAfterVectorization(I, VF)) {
2955 VectorValue = getBroadcastInstrs(ScalarValue);
2956 VectorLoopValueMap.setVectorValue(V, Part, VectorValue);
2958 // Initialize packing with insertelements to start from undef.
2959 Value *Undef = UndefValue::get(VectorType::get(V->getType(), VF));
2960 VectorLoopValueMap.setVectorValue(V, Part, Undef);
2961 for (unsigned Lane = 0; Lane < VF; ++Lane)
2962 packScalarIntoVectorValue(V, {Part, Lane});
2963 VectorValue = VectorLoopValueMap.getVectorValue(V, Part);
2965 Builder.restoreIP(OldIP);
2969 // If this scalar is unknown, assume that it is a constant or that it is
2970 // loop invariant. Broadcast V and save the value for future uses.
2971 Value *B = getBroadcastInstrs(V);
2972 VectorLoopValueMap.setVectorValue(V, Part, B);
2977 InnerLoopVectorizer::getOrCreateScalarValue(Value *V,
2978 const VPIteration &Instance) {
2979 // If the value is not an instruction contained in the loop, it should
2980 // already be scalar.
2981 if (OrigLoop->isLoopInvariant(V))
2984 assert(Instance.Lane > 0
2985 ? !Cost->isUniformAfterVectorization(cast<Instruction>(V), VF)
2986 : true && "Uniform values only have lane zero");
2988 // If the value from the original loop has not been vectorized, it is
2989 // represented by UF x VF scalar values in the new loop. Return the requested
2991 if (VectorLoopValueMap.hasScalarValue(V, Instance))
2992 return VectorLoopValueMap.getScalarValue(V, Instance);
2994 // If the value has not been scalarized, get its entry in VectorLoopValueMap
2995 // for the given unroll part. If this entry is not a vector type (i.e., the
2996 // vectorization factor is one), there is no need to generate an
2997 // extractelement instruction.
2998 auto *U = getOrCreateVectorValue(V, Instance.Part);
2999 if (!U->getType()->isVectorTy()) {
3000 assert(VF == 1 && "Value not scalarized has non-vector type");
3004 // Otherwise, the value from the original loop has been vectorized and is
3005 // represented by UF vector values. Extract and return the requested scalar
3006 // value from the appropriate vector lane.
3007 return Builder.CreateExtractElement(U, Builder.getInt32(Instance.Lane));
3010 void InnerLoopVectorizer::packScalarIntoVectorValue(
3011 Value *V, const VPIteration &Instance) {
3012 assert(V != Induction && "The new induction variable should not be used.");
3013 assert(!V->getType()->isVectorTy() && "Can't pack a vector");
3014 assert(!V->getType()->isVoidTy() && "Type does not produce a value");
3016 Value *ScalarInst = VectorLoopValueMap.getScalarValue(V, Instance);
3017 Value *VectorValue = VectorLoopValueMap.getVectorValue(V, Instance.Part);
3018 VectorValue = Builder.CreateInsertElement(VectorValue, ScalarInst,
3019 Builder.getInt32(Instance.Lane));
3020 VectorLoopValueMap.resetVectorValue(V, Instance.Part, VectorValue);
3023 Value *InnerLoopVectorizer::reverseVector(Value *Vec) {
3024 assert(Vec->getType()->isVectorTy() && "Invalid type");
3025 SmallVector<Constant *, 8> ShuffleMask;
3026 for (unsigned i = 0; i < VF; ++i)
3027 ShuffleMask.push_back(Builder.getInt32(VF - i - 1));
3029 return Builder.CreateShuffleVector(Vec, UndefValue::get(Vec->getType()),
3030 ConstantVector::get(ShuffleMask),
3034 // Try to vectorize the interleave group that \p Instr belongs to.
3036 // E.g. Translate following interleaved load group (factor = 3):
3037 // for (i = 0; i < N; i+=3) {
3038 // R = Pic[i]; // Member of index 0
3039 // G = Pic[i+1]; // Member of index 1
3040 // B = Pic[i+2]; // Member of index 2
3041 // ... // do something to R, G, B
3044 // %wide.vec = load <12 x i32> ; Read 4 tuples of R,G,B
3045 // %R.vec = shuffle %wide.vec, undef, <0, 3, 6, 9> ; R elements
3046 // %G.vec = shuffle %wide.vec, undef, <1, 4, 7, 10> ; G elements
3047 // %B.vec = shuffle %wide.vec, undef, <2, 5, 8, 11> ; B elements
3049 // Or translate following interleaved store group (factor = 3):
3050 // for (i = 0; i < N; i+=3) {
3051 // ... do something to R, G, B
3052 // Pic[i] = R; // Member of index 0
3053 // Pic[i+1] = G; // Member of index 1
3054 // Pic[i+2] = B; // Member of index 2
3057 // %R_G.vec = shuffle %R.vec, %G.vec, <0, 1, 2, ..., 7>
3058 // %B_U.vec = shuffle %B.vec, undef, <0, 1, 2, 3, u, u, u, u>
3059 // %interleaved.vec = shuffle %R_G.vec, %B_U.vec,
3060 // <0, 4, 8, 1, 5, 9, 2, 6, 10, 3, 7, 11> ; Interleave R,G,B elements
3061 // store <12 x i32> %interleaved.vec ; Write 4 tuples of R,G,B
3062 void InnerLoopVectorizer::vectorizeInterleaveGroup(Instruction *Instr) {
3063 const InterleaveGroup *Group = Legal->getInterleavedAccessGroup(Instr);
3064 assert(Group && "Fail to get an interleaved access group.");
3066 // Skip if current instruction is not the insert position.
3067 if (Instr != Group->getInsertPos())
3070 const DataLayout &DL = Instr->getModule()->getDataLayout();
3071 Value *Ptr = getPointerOperand(Instr);
3073 // Prepare for the vector type of the interleaved load/store.
3074 Type *ScalarTy = getMemInstValueType(Instr);
3075 unsigned InterleaveFactor = Group->getFactor();
3076 Type *VecTy = VectorType::get(ScalarTy, InterleaveFactor * VF);
3077 Type *PtrTy = VecTy->getPointerTo(getMemInstAddressSpace(Instr));
3079 // Prepare for the new pointers.
3080 setDebugLocFromInst(Builder, Ptr);
3081 SmallVector<Value *, 2> NewPtrs;
3082 unsigned Index = Group->getIndex(Instr);
3084 // If the group is reverse, adjust the index to refer to the last vector lane
3085 // instead of the first. We adjust the index from the first vector lane,
3086 // rather than directly getting the pointer for lane VF - 1, because the
3087 // pointer operand of the interleaved access is supposed to be uniform. For
3088 // uniform instructions, we're only required to generate a value for the
3089 // first vector lane in each unroll iteration.
3090 if (Group->isReverse())
3091 Index += (VF - 1) * Group->getFactor();
3093 for (unsigned Part = 0; Part < UF; Part++) {
3094 Value *NewPtr = getOrCreateScalarValue(Ptr, {Part, 0});
3096 // Notice current instruction could be any index. Need to adjust the address
3097 // to the member of index 0.
3099 // E.g. a = A[i+1]; // Member of index 1 (Current instruction)
3100 // b = A[i]; // Member of index 0
3101 // Current pointer is pointed to A[i+1], adjust it to A[i].
3103 // E.g. A[i+1] = a; // Member of index 1
3104 // A[i] = b; // Member of index 0
3105 // A[i+2] = c; // Member of index 2 (Current instruction)
3106 // Current pointer is pointed to A[i+2], adjust it to A[i].
3107 NewPtr = Builder.CreateGEP(NewPtr, Builder.getInt32(-Index));
3109 // Cast to the vector pointer type.
3110 NewPtrs.push_back(Builder.CreateBitCast(NewPtr, PtrTy));
3113 setDebugLocFromInst(Builder, Instr);
3114 Value *UndefVec = UndefValue::get(VecTy);
3116 // Vectorize the interleaved load group.
3117 if (isa<LoadInst>(Instr)) {
3118 // For each unroll part, create a wide load for the group.
3119 SmallVector<Value *, 2> NewLoads;
3120 for (unsigned Part = 0; Part < UF; Part++) {
3121 auto *NewLoad = Builder.CreateAlignedLoad(
3122 NewPtrs[Part], Group->getAlignment(), "wide.vec");
3123 Group->addMetadata(NewLoad);
3124 NewLoads.push_back(NewLoad);
3127 // For each member in the group, shuffle out the appropriate data from the
3129 for (unsigned I = 0; I < InterleaveFactor; ++I) {
3130 Instruction *Member = Group->getMember(I);
3132 // Skip the gaps in the group.
3136 Constant *StrideMask = createStrideMask(Builder, I, InterleaveFactor, VF);
3137 for (unsigned Part = 0; Part < UF; Part++) {
3138 Value *StridedVec = Builder.CreateShuffleVector(
3139 NewLoads[Part], UndefVec, StrideMask, "strided.vec");
3141 // If this member has different type, cast the result type.
3142 if (Member->getType() != ScalarTy) {
3143 VectorType *OtherVTy = VectorType::get(Member->getType(), VF);
3144 StridedVec = createBitOrPointerCast(StridedVec, OtherVTy, DL);
3147 if (Group->isReverse())
3148 StridedVec = reverseVector(StridedVec);
3150 VectorLoopValueMap.setVectorValue(Member, Part, StridedVec);
3156 // The sub vector type for current instruction.
3157 VectorType *SubVT = VectorType::get(ScalarTy, VF);
3159 // Vectorize the interleaved store group.
3160 for (unsigned Part = 0; Part < UF; Part++) {
3161 // Collect the stored vector from each member.
3162 SmallVector<Value *, 4> StoredVecs;
3163 for (unsigned i = 0; i < InterleaveFactor; i++) {
3164 // Interleaved store group doesn't allow a gap, so each index has a member
3165 Instruction *Member = Group->getMember(i);
3166 assert(Member && "Fail to get a member from an interleaved store group");
3168 Value *StoredVec = getOrCreateVectorValue(
3169 cast<StoreInst>(Member)->getValueOperand(), Part);
3170 if (Group->isReverse())
3171 StoredVec = reverseVector(StoredVec);
3173 // If this member has different type, cast it to a unified type.
3175 if (StoredVec->getType() != SubVT)
3176 StoredVec = createBitOrPointerCast(StoredVec, SubVT, DL);
3178 StoredVecs.push_back(StoredVec);
3181 // Concatenate all vectors into a wide vector.
3182 Value *WideVec = concatenateVectors(Builder, StoredVecs);
3184 // Interleave the elements in the wide vector.
3185 Constant *IMask = createInterleaveMask(Builder, VF, InterleaveFactor);
3186 Value *IVec = Builder.CreateShuffleVector(WideVec, UndefVec, IMask,
3189 Instruction *NewStoreInstr =
3190 Builder.CreateAlignedStore(IVec, NewPtrs[Part], Group->getAlignment());
3192 Group->addMetadata(NewStoreInstr);
3196 void InnerLoopVectorizer::vectorizeMemoryInstruction(Instruction *Instr,
3197 VectorParts *BlockInMask) {
3198 // Attempt to issue a wide load.
3199 LoadInst *LI = dyn_cast<LoadInst>(Instr);
3200 StoreInst *SI = dyn_cast<StoreInst>(Instr);
3202 assert((LI || SI) && "Invalid Load/Store instruction");
3204 LoopVectorizationCostModel::InstWidening Decision =
3205 Cost->getWideningDecision(Instr, VF);
3206 assert(Decision != LoopVectorizationCostModel::CM_Unknown &&
3207 "CM decision should be taken at this point");
3208 if (Decision == LoopVectorizationCostModel::CM_Interleave)
3209 return vectorizeInterleaveGroup(Instr);
3211 Type *ScalarDataTy = getMemInstValueType(Instr);
3212 Type *DataTy = VectorType::get(ScalarDataTy, VF);
3213 Value *Ptr = getPointerOperand(Instr);
3214 unsigned Alignment = getMemInstAlignment(Instr);
3215 // An alignment of 0 means target abi alignment. We need to use the scalar's
3216 // target abi alignment in such a case.
3217 const DataLayout &DL = Instr->getModule()->getDataLayout();
3219 Alignment = DL.getABITypeAlignment(ScalarDataTy);
3220 unsigned AddressSpace = getMemInstAddressSpace(Instr);
3222 // Determine if the pointer operand of the access is either consecutive or
3223 // reverse consecutive.
3224 bool Reverse = (Decision == LoopVectorizationCostModel::CM_Widen_Reverse);
3225 bool ConsecutiveStride =
3226 Reverse || (Decision == LoopVectorizationCostModel::CM_Widen);
3227 bool CreateGatherScatter =
3228 (Decision == LoopVectorizationCostModel::CM_GatherScatter);
3230 // Either Ptr feeds a vector load/store, or a vector GEP should feed a vector
3231 // gather/scatter. Otherwise Decision should have been to Scalarize.
3232 assert((ConsecutiveStride || CreateGatherScatter) &&
3233 "The instruction should be scalarized");
3235 // Handle consecutive loads/stores.
3236 if (ConsecutiveStride)
3237 Ptr = getOrCreateScalarValue(Ptr, {0, 0});
3240 bool isMaskRequired = BlockInMask;
3242 Mask = *BlockInMask;
3246 assert(!Legal->isUniform(SI->getPointerOperand()) &&
3247 "We do not allow storing to uniform addresses");
3248 setDebugLocFromInst(Builder, SI);
3250 for (unsigned Part = 0; Part < UF; ++Part) {
3251 Instruction *NewSI = nullptr;
3252 Value *StoredVal = getOrCreateVectorValue(SI->getValueOperand(), Part);
3253 if (CreateGatherScatter) {
3254 Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
3255 Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
3256 NewSI = Builder.CreateMaskedScatter(StoredVal, VectorGep, Alignment,
3259 // Calculate the pointer for the specific unroll-part.
3261 Builder.CreateGEP(nullptr, Ptr, Builder.getInt32(Part * VF));
3264 // If we store to reverse consecutive memory locations, then we need
3265 // to reverse the order of elements in the stored value.
3266 StoredVal = reverseVector(StoredVal);
3267 // We don't want to update the value in the map as it might be used in
3268 // another expression. So don't call resetVectorValue(StoredVal).
3270 // If the address is consecutive but reversed, then the
3271 // wide store needs to start at the last vector element.
3273 Builder.CreateGEP(nullptr, Ptr, Builder.getInt32(-Part * VF));
3275 Builder.CreateGEP(nullptr, PartPtr, Builder.getInt32(1 - VF));
3276 if (isMaskRequired) // Reverse of a null all-one mask is a null mask.
3277 Mask[Part] = reverseVector(Mask[Part]);
3281 Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace));
3284 NewSI = Builder.CreateMaskedStore(StoredVal, VecPtr, Alignment,
3287 NewSI = Builder.CreateAlignedStore(StoredVal, VecPtr, Alignment);
3289 addMetadata(NewSI, SI);
3295 assert(LI && "Must have a load instruction");
3296 setDebugLocFromInst(Builder, LI);
3297 for (unsigned Part = 0; Part < UF; ++Part) {
3299 if (CreateGatherScatter) {
3300 Value *MaskPart = isMaskRequired ? Mask[Part] : nullptr;
3301 Value *VectorGep = getOrCreateVectorValue(Ptr, Part);
3302 NewLI = Builder.CreateMaskedGather(VectorGep, Alignment, MaskPart,
3303 nullptr, "wide.masked.gather");
3304 addMetadata(NewLI, LI);
3306 // Calculate the pointer for the specific unroll-part.
3308 Builder.CreateGEP(nullptr, Ptr, Builder.getInt32(Part * VF));
3311 // If the address is consecutive but reversed, then the
3312 // wide load needs to start at the last vector element.
3313 PartPtr = Builder.CreateGEP(nullptr, Ptr, Builder.getInt32(-Part * VF));
3314 PartPtr = Builder.CreateGEP(nullptr, PartPtr, Builder.getInt32(1 - VF));
3315 if (isMaskRequired) // Reverse of a null all-one mask is a null mask.
3316 Mask[Part] = reverseVector(Mask[Part]);
3320 Builder.CreateBitCast(PartPtr, DataTy->getPointerTo(AddressSpace));
3322 NewLI = Builder.CreateMaskedLoad(VecPtr, Alignment, Mask[Part],
3323 UndefValue::get(DataTy),
3324 "wide.masked.load");
3326 NewLI = Builder.CreateAlignedLoad(VecPtr, Alignment, "wide.load");
3328 // Add metadata to the load, but setVectorValue to the reverse shuffle.
3329 addMetadata(NewLI, LI);
3331 NewLI = reverseVector(NewLI);
3333 VectorLoopValueMap.setVectorValue(Instr, Part, NewLI);
3337 void InnerLoopVectorizer::scalarizeInstruction(Instruction *Instr,
3338 const VPIteration &Instance,
3339 bool IfPredicateInstr) {
3340 assert(!Instr->getType()->isAggregateType() && "Can't handle vectors");
3342 setDebugLocFromInst(Builder, Instr);
3344 // Does this instruction return a value ?
3345 bool IsVoidRetTy = Instr->getType()->isVoidTy();
3347 Instruction *Cloned = Instr->clone();
3349 Cloned->setName(Instr->getName() + ".cloned");
3351 // Replace the operands of the cloned instructions with their scalar
3352 // equivalents in the new loop.
3353 for (unsigned op = 0, e = Instr->getNumOperands(); op != e; ++op) {
3354 auto *NewOp = getOrCreateScalarValue(Instr->getOperand(op), Instance);
3355 Cloned->setOperand(op, NewOp);
3357 addNewMetadata(Cloned, Instr);
3359 // Place the cloned scalar in the new loop.
3360 Builder.Insert(Cloned);
3362 // Add the cloned scalar to the scalar map entry.
3363 VectorLoopValueMap.setScalarValue(Instr, Instance, Cloned);
3365 // If we just cloned a new assumption, add it the assumption cache.
3366 if (auto *II = dyn_cast<IntrinsicInst>(Cloned))
3367 if (II->getIntrinsicID() == Intrinsic::assume)
3368 AC->registerAssumption(II);
3371 if (IfPredicateInstr)
3372 PredicatedInstructions.push_back(Cloned);
3375 PHINode *InnerLoopVectorizer::createInductionVariable(Loop *L, Value *Start,
3376 Value *End, Value *Step,
3378 BasicBlock *Header = L->getHeader();
3379 BasicBlock *Latch = L->getLoopLatch();
3380 // As we're just creating this loop, it's possible no latch exists
3381 // yet. If so, use the header as this will be a single block loop.
3385 IRBuilder<> Builder(&*Header->getFirstInsertionPt());
3386 Instruction *OldInst = getDebugLocFromInstOrOperands(OldInduction);
3387 setDebugLocFromInst(Builder, OldInst);
3388 auto *Induction = Builder.CreatePHI(Start->getType(), 2, "index");
3390 Builder.SetInsertPoint(Latch->getTerminator());
3391 setDebugLocFromInst(Builder, OldInst);
3393 // Create i+1 and fill the PHINode.
3394 Value *Next = Builder.CreateAdd(Induction, Step, "index.next");
3395 Induction->addIncoming(Start, L->getLoopPreheader());
3396 Induction->addIncoming(Next, Latch);
3397 // Create the compare.
3398 Value *ICmp = Builder.CreateICmpEQ(Next, End);
3399 Builder.CreateCondBr(ICmp, L->getExitBlock(), Header);
3401 // Now we have two terminators. Remove the old one from the block.
3402 Latch->getTerminator()->eraseFromParent();
3407 Value *InnerLoopVectorizer::getOrCreateTripCount(Loop *L) {
3411 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator());
3412 // Find the loop boundaries.
3413 ScalarEvolution *SE = PSE.getSE();
3414 const SCEV *BackedgeTakenCount = PSE.getBackedgeTakenCount();
3415 assert(BackedgeTakenCount != SE->getCouldNotCompute() &&
3416 "Invalid loop count");
3418 Type *IdxTy = Legal->getWidestInductionType();
3420 // The exit count might have the type of i64 while the phi is i32. This can
3421 // happen if we have an induction variable that is sign extended before the
3422 // compare. The only way that we get a backedge taken count is that the
3423 // induction variable was signed and as such will not overflow. In such a case
3424 // truncation is legal.
3425 if (BackedgeTakenCount->getType()->getPrimitiveSizeInBits() >
3426 IdxTy->getPrimitiveSizeInBits())
3427 BackedgeTakenCount = SE->getTruncateOrNoop(BackedgeTakenCount, IdxTy);
3428 BackedgeTakenCount = SE->getNoopOrZeroExtend(BackedgeTakenCount, IdxTy);
3430 // Get the total trip count from the count by adding 1.
3431 const SCEV *ExitCount = SE->getAddExpr(
3432 BackedgeTakenCount, SE->getOne(BackedgeTakenCount->getType()));
3434 const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
3436 // Expand the trip count and place the new instructions in the preheader.
3437 // Notice that the pre-header does not change, only the loop body.
3438 SCEVExpander Exp(*SE, DL, "induction");
3440 // Count holds the overall loop count (N).
3441 TripCount = Exp.expandCodeFor(ExitCount, ExitCount->getType(),
3442 L->getLoopPreheader()->getTerminator());
3444 if (TripCount->getType()->isPointerTy())
3446 CastInst::CreatePointerCast(TripCount, IdxTy, "exitcount.ptrcnt.to.int",
3447 L->getLoopPreheader()->getTerminator());
3452 Value *InnerLoopVectorizer::getOrCreateVectorTripCount(Loop *L) {
3453 if (VectorTripCount)
3454 return VectorTripCount;
3456 Value *TC = getOrCreateTripCount(L);
3457 IRBuilder<> Builder(L->getLoopPreheader()->getTerminator());
3459 // Now we need to generate the expression for the part of the loop that the
3460 // vectorized body will execute. This is equal to N - (N % Step) if scalar
3461 // iterations are not required for correctness, or N - Step, otherwise. Step
3462 // is equal to the vectorization factor (number of SIMD elements) times the
3463 // unroll factor (number of SIMD instructions).
3464 Constant *Step = ConstantInt::get(TC->getType(), VF * UF);
3465 Value *R = Builder.CreateURem(TC, Step, "n.mod.vf");
3467 // If there is a non-reversed interleaved group that may speculatively access
3468 // memory out-of-bounds, we need to ensure that there will be at least one
3469 // iteration of the scalar epilogue loop. Thus, if the step evenly divides
3470 // the trip count, we set the remainder to be equal to the step. If the step
3471 // does not evenly divide the trip count, no adjustment is necessary since
3472 // there will already be scalar iterations. Note that the minimum iterations
3473 // check ensures that N >= Step.
3474 if (VF > 1 && Legal->requiresScalarEpilogue()) {
3475 auto *IsZero = Builder.CreateICmpEQ(R, ConstantInt::get(R->getType(), 0));
3476 R = Builder.CreateSelect(IsZero, Step, R);
3479 VectorTripCount = Builder.CreateSub(TC, R, "n.vec");
3481 return VectorTripCount;
3484 Value *InnerLoopVectorizer::createBitOrPointerCast(Value *V, VectorType *DstVTy,
3485 const DataLayout &DL) {
3486 // Verify that V is a vector type with same number of elements as DstVTy.
3487 unsigned VF = DstVTy->getNumElements();
3488 VectorType *SrcVecTy = cast<VectorType>(V->getType());
3489 assert((VF == SrcVecTy->getNumElements()) && "Vector dimensions do not match");
3490 Type *SrcElemTy = SrcVecTy->getElementType();
3491 Type *DstElemTy = DstVTy->getElementType();
3492 assert((DL.getTypeSizeInBits(SrcElemTy) == DL.getTypeSizeInBits(DstElemTy)) &&
3493 "Vector elements must have same size");
3495 // Do a direct cast if element types are castable.
3496 if (CastInst::isBitOrNoopPointerCastable(SrcElemTy, DstElemTy, DL)) {
3497 return Builder.CreateBitOrPointerCast(V, DstVTy);
3499 // V cannot be directly casted to desired vector type.
3500 // May happen when V is a floating point vector but DstVTy is a vector of
3501 // pointers or vice-versa. Handle this using a two-step bitcast using an
3502 // intermediate Integer type for the bitcast i.e. Ptr <-> Int <-> Float.
3503 assert((DstElemTy->isPointerTy() != SrcElemTy->isPointerTy()) &&
3504 "Only one type should be a pointer type");
3505 assert((DstElemTy->isFloatingPointTy() != SrcElemTy->isFloatingPointTy()) &&
3506 "Only one type should be a floating point type");
3508 IntegerType::getIntNTy(V->getContext(), DL.getTypeSizeInBits(SrcElemTy));
3509 VectorType *VecIntTy = VectorType::get(IntTy, VF);
3510 Value *CastVal = Builder.CreateBitOrPointerCast(V, VecIntTy);
3511 return Builder.CreateBitOrPointerCast(CastVal, DstVTy);
3514 void InnerLoopVectorizer::emitMinimumIterationCountCheck(Loop *L,
3515 BasicBlock *Bypass) {
3516 Value *Count = getOrCreateTripCount(L);
3517 BasicBlock *BB = L->getLoopPreheader();
3518 IRBuilder<> Builder(BB->getTerminator());
3520 // Generate code to check if the loop's trip count is less than VF * UF, or
3521 // equal to it in case a scalar epilogue is required; this implies that the
3522 // vector trip count is zero. This check also covers the case where adding one
3523 // to the backedge-taken count overflowed leading to an incorrect trip count
3524 // of zero. In this case we will also jump to the scalar loop.
3525 auto P = Legal->requiresScalarEpilogue() ? ICmpInst::ICMP_ULE
3526 : ICmpInst::ICMP_ULT;
3527 Value *CheckMinIters = Builder.CreateICmp(
3528 P, Count, ConstantInt::get(Count->getType(), VF * UF), "min.iters.check");
3530 BasicBlock *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
3531 // Update dominator tree immediately if the generated block is a
3532 // LoopBypassBlock because SCEV expansions to generate loop bypass
3533 // checks may query it before the current function is finished.
3534 DT->addNewBlock(NewBB, BB);
3535 if (L->getParentLoop())
3536 L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
3537 ReplaceInstWithInst(BB->getTerminator(),
3538 BranchInst::Create(Bypass, NewBB, CheckMinIters));
3539 LoopBypassBlocks.push_back(BB);
3542 void InnerLoopVectorizer::emitSCEVChecks(Loop *L, BasicBlock *Bypass) {
3543 BasicBlock *BB = L->getLoopPreheader();
3545 // Generate the code to check that the SCEV assumptions that we made.
3546 // We want the new basic block to start at the first instruction in a
3547 // sequence of instructions that form a check.
3548 SCEVExpander Exp(*PSE.getSE(), Bypass->getModule()->getDataLayout(),
3551 Exp.expandCodeForPredicate(&PSE.getUnionPredicate(), BB->getTerminator());
3553 if (auto *C = dyn_cast<ConstantInt>(SCEVCheck))
3557 // Create a new block containing the stride check.
3558 BB->setName("vector.scevcheck");
3559 auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
3560 // Update dominator tree immediately if the generated block is a
3561 // LoopBypassBlock because SCEV expansions to generate loop bypass
3562 // checks may query it before the current function is finished.
3563 DT->addNewBlock(NewBB, BB);
3564 if (L->getParentLoop())
3565 L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
3566 ReplaceInstWithInst(BB->getTerminator(),
3567 BranchInst::Create(Bypass, NewBB, SCEVCheck));
3568 LoopBypassBlocks.push_back(BB);
3569 AddedSafetyChecks = true;
3572 void InnerLoopVectorizer::emitMemRuntimeChecks(Loop *L, BasicBlock *Bypass) {
3573 BasicBlock *BB = L->getLoopPreheader();
3575 // Generate the code that checks in runtime if arrays overlap. We put the
3576 // checks into a separate block to make the more common case of few elements
3578 Instruction *FirstCheckInst;
3579 Instruction *MemRuntimeCheck;
3580 std::tie(FirstCheckInst, MemRuntimeCheck) =
3581 Legal->getLAI()->addRuntimeChecks(BB->getTerminator());
3582 if (!MemRuntimeCheck)
3585 // Create a new block containing the memory check.
3586 BB->setName("vector.memcheck");
3587 auto *NewBB = BB->splitBasicBlock(BB->getTerminator(), "vector.ph");
3588 // Update dominator tree immediately if the generated block is a
3589 // LoopBypassBlock because SCEV expansions to generate loop bypass
3590 // checks may query it before the current function is finished.
3591 DT->addNewBlock(NewBB, BB);
3592 if (L->getParentLoop())
3593 L->getParentLoop()->addBasicBlockToLoop(NewBB, *LI);
3594 ReplaceInstWithInst(BB->getTerminator(),
3595 BranchInst::Create(Bypass, NewBB, MemRuntimeCheck));
3596 LoopBypassBlocks.push_back(BB);
3597 AddedSafetyChecks = true;
3599 // We currently don't use LoopVersioning for the actual loop cloning but we
3600 // still use it to add the noalias metadata.
3601 LVer = llvm::make_unique<LoopVersioning>(*Legal->getLAI(), OrigLoop, LI, DT,
3603 LVer->prepareNoAliasMetadata();
3606 BasicBlock *InnerLoopVectorizer::createVectorizedLoopSkeleton() {
3608 In this function we generate a new loop. The new loop will contain
3609 the vectorized instructions while the old loop will continue to run the
3612 [ ] <-- loop iteration number check.
3615 | [ ] <-- vector loop bypass (may consist of multiple blocks).
3618 || [ ] <-- vector pre header.
3622 | [ ]_| <-- vector loop.
3625 | -[ ] <--- middle-block.
3628 -|- >[ ] <--- new preheader.
3632 | [ ]_| <-- old scalar loop to handle remainder.
3635 >[ ] <-- exit block.
3639 BasicBlock *OldBasicBlock = OrigLoop->getHeader();
3640 BasicBlock *VectorPH = OrigLoop->getLoopPreheader();
3641 BasicBlock *ExitBlock = OrigLoop->getExitBlock();
3642 assert(VectorPH && "Invalid loop structure");
3643 assert(ExitBlock && "Must have an exit block");
3645 // Some loops have a single integer induction variable, while other loops
3646 // don't. One example is c++ iterators that often have multiple pointer
3647 // induction variables. In the code below we also support a case where we
3648 // don't have a single induction variable.
3650 // We try to obtain an induction variable from the original loop as hard
3651 // as possible. However if we don't find one that:
3653 // - counts from zero, stepping by one
3654 // - is the size of the widest induction variable type
3655 // then we create a new one.
3656 OldInduction = Legal->getPrimaryInduction();
3657 Type *IdxTy = Legal->getWidestInductionType();
3659 // Split the single block loop into the two loop structure described above.
3660 BasicBlock *VecBody =
3661 VectorPH->splitBasicBlock(VectorPH->getTerminator(), "vector.body");
3662 BasicBlock *MiddleBlock =
3663 VecBody->splitBasicBlock(VecBody->getTerminator(), "middle.block");
3664 BasicBlock *ScalarPH =
3665 MiddleBlock->splitBasicBlock(MiddleBlock->getTerminator(), "scalar.ph");
3667 // Create and register the new vector loop.
3668 Loop *Lp = LI->AllocateLoop();
3669 Loop *ParentLoop = OrigLoop->getParentLoop();
3671 // Insert the new loop into the loop nest and register the new basic blocks
3672 // before calling any utilities such as SCEV that require valid LoopInfo.
3674 ParentLoop->addChildLoop(Lp);
3675 ParentLoop->addBasicBlockToLoop(ScalarPH, *LI);
3676 ParentLoop->addBasicBlockToLoop(MiddleBlock, *LI);
3678 LI->addTopLevelLoop(Lp);
3680 Lp->addBasicBlockToLoop(VecBody, *LI);
3682 // Find the loop boundaries.
3683 Value *Count = getOrCreateTripCount(Lp);
3685 Value *StartIdx = ConstantInt::get(IdxTy, 0);
3687 // Now, compare the new count to zero. If it is zero skip the vector loop and
3688 // jump to the scalar loop. This check also covers the case where the
3689 // backedge-taken count is uint##_max: adding one to it will overflow leading
3690 // to an incorrect trip count of zero. In this (rare) case we will also jump
3691 // to the scalar loop.
3692 emitMinimumIterationCountCheck(Lp, ScalarPH);
3694 // Generate the code to check any assumptions that we've made for SCEV
3696 emitSCEVChecks(Lp, ScalarPH);
3698 // Generate the code that checks in runtime if arrays overlap. We put the
3699 // checks into a separate block to make the more common case of few elements
3701 emitMemRuntimeChecks(Lp, ScalarPH);
3703 // Generate the induction variable.
3704 // The loop step is equal to the vectorization factor (num of SIMD elements)
3705 // times the unroll factor (num of SIMD instructions).
3706 Value *CountRoundDown = getOrCreateVectorTripCount(Lp);
3707 Constant *Step = ConstantInt::get(IdxTy, VF * UF);
3709 createInductionVariable(Lp, StartIdx, CountRoundDown, Step,
3710 getDebugLocFromInstOrOperands(OldInduction));
3712 // We are going to resume the execution of the scalar loop.
3713 // Go over all of the induction variables that we found and fix the
3714 // PHIs that are left in the scalar version of the loop.
3715 // The starting values of PHI nodes depend on the counter of the last
3716 // iteration in the vectorized loop.
3717 // If we come from a bypass edge then we need to start from the original
3720 // This variable saves the new starting index for the scalar loop. It is used
3721 // to test if there are any tail iterations left once the vector loop has
3723 LoopVectorizationLegality::InductionList *List = Legal->getInductionVars();
3724 for (auto &InductionEntry : *List) {
3725 PHINode *OrigPhi = InductionEntry.first;
3726 InductionDescriptor II = InductionEntry.second;
3728 // Create phi nodes to merge from the backedge-taken check block.
3729 PHINode *BCResumeVal = PHINode::Create(
3730 OrigPhi->getType(), 3, "bc.resume.val", ScalarPH->getTerminator());
3731 Value *&EndValue = IVEndValues[OrigPhi];
3732 if (OrigPhi == OldInduction) {
3733 // We know what the end value is.
3734 EndValue = CountRoundDown;
3736 IRBuilder<> B(Lp->getLoopPreheader()->getTerminator());
3737 Type *StepType = II.getStep()->getType();
3738 Instruction::CastOps CastOp =
3739 CastInst::getCastOpcode(CountRoundDown, true, StepType, true);
3740 Value *CRD = B.CreateCast(CastOp, CountRoundDown, StepType, "cast.crd");
3741 const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
3742 EndValue = II.transform(B, CRD, PSE.getSE(), DL);
3743 EndValue->setName("ind.end");
3746 // The new PHI merges the original incoming value, in case of a bypass,
3747 // or the value at the end of the vectorized loop.
3748 BCResumeVal->addIncoming(EndValue, MiddleBlock);
3750 // Fix the scalar body counter (PHI node).
3751 unsigned BlockIdx = OrigPhi->getBasicBlockIndex(ScalarPH);
3753 // The old induction's phi node in the scalar body needs the truncated
3755 for (BasicBlock *BB : LoopBypassBlocks)
3756 BCResumeVal->addIncoming(II.getStartValue(), BB);
3757 OrigPhi->setIncomingValue(BlockIdx, BCResumeVal);
3760 // Add a check in the middle block to see if we have completed
3761 // all of the iterations in the first vector loop.
3762 // If (N - N%VF) == N, then we *don't* need to run the remainder.
3764 CmpInst::Create(Instruction::ICmp, CmpInst::ICMP_EQ, Count,
3765 CountRoundDown, "cmp.n", MiddleBlock->getTerminator());
3766 ReplaceInstWithInst(MiddleBlock->getTerminator(),
3767 BranchInst::Create(ExitBlock, ScalarPH, CmpN));
3769 // Get ready to start creating new instructions into the vectorized body.
3770 Builder.SetInsertPoint(&*VecBody->getFirstInsertionPt());
3773 LoopVectorPreHeader = Lp->getLoopPreheader();
3774 LoopScalarPreHeader = ScalarPH;
3775 LoopMiddleBlock = MiddleBlock;
3776 LoopExitBlock = ExitBlock;
3777 LoopVectorBody = VecBody;
3778 LoopScalarBody = OldBasicBlock;
3780 // Keep all loop hints from the original loop on the vector loop (we'll
3781 // replace the vectorizer-specific hints below).
3782 if (MDNode *LID = OrigLoop->getLoopID())
3785 LoopVectorizeHints Hints(Lp, true, *ORE);
3786 Hints.setAlreadyVectorized();
3788 return LoopVectorPreHeader;
3791 // Fix up external users of the induction variable. At this point, we are
3792 // in LCSSA form, with all external PHIs that use the IV having one input value,
3793 // coming from the remainder loop. We need those PHIs to also have a correct
3794 // value for the IV when arriving directly from the middle block.
3795 void InnerLoopVectorizer::fixupIVUsers(PHINode *OrigPhi,
3796 const InductionDescriptor &II,
3797 Value *CountRoundDown, Value *EndValue,
3798 BasicBlock *MiddleBlock) {
3799 // There are two kinds of external IV usages - those that use the value
3800 // computed in the last iteration (the PHI) and those that use the penultimate
3801 // value (the value that feeds into the phi from the loop latch).
3802 // We allow both, but they, obviously, have different values.
3804 assert(OrigLoop->getExitBlock() && "Expected a single exit block");
3806 DenseMap<Value *, Value *> MissingVals;
3808 // An external user of the last iteration's value should see the value that
3809 // the remainder loop uses to initialize its own IV.
3810 Value *PostInc = OrigPhi->getIncomingValueForBlock(OrigLoop->getLoopLatch());
3811 for (User *U : PostInc->users()) {
3812 Instruction *UI = cast<Instruction>(U);
3813 if (!OrigLoop->contains(UI)) {
3814 assert(isa<PHINode>(UI) && "Expected LCSSA form");
3815 MissingVals[UI] = EndValue;
3819 // An external user of the penultimate value need to see EndValue - Step.
3820 // The simplest way to get this is to recompute it from the constituent SCEVs,
3821 // that is Start + (Step * (CRD - 1)).
3822 for (User *U : OrigPhi->users()) {
3823 auto *UI = cast<Instruction>(U);
3824 if (!OrigLoop->contains(UI)) {
3825 const DataLayout &DL =
3826 OrigLoop->getHeader()->getModule()->getDataLayout();
3827 assert(isa<PHINode>(UI) && "Expected LCSSA form");
3829 IRBuilder<> B(MiddleBlock->getTerminator());
3830 Value *CountMinusOne = B.CreateSub(
3831 CountRoundDown, ConstantInt::get(CountRoundDown->getType(), 1));
3833 !II.getStep()->getType()->isIntegerTy()
3834 ? B.CreateCast(Instruction::SIToFP, CountMinusOne,
3835 II.getStep()->getType())
3836 : B.CreateSExtOrTrunc(CountMinusOne, II.getStep()->getType());
3837 CMO->setName("cast.cmo");
3838 Value *Escape = II.transform(B, CMO, PSE.getSE(), DL);
3839 Escape->setName("ind.escape");
3840 MissingVals[UI] = Escape;
3844 for (auto &I : MissingVals) {
3845 PHINode *PHI = cast<PHINode>(I.first);
3846 // One corner case we have to handle is two IVs "chasing" each-other,
3847 // that is %IV2 = phi [...], [ %IV1, %latch ]
3848 // In this case, if IV1 has an external use, we need to avoid adding both
3849 // "last value of IV1" and "penultimate value of IV2". So, verify that we
3850 // don't already have an incoming value for the middle block.
3851 if (PHI->getBasicBlockIndex(MiddleBlock) == -1)
3852 PHI->addIncoming(I.second, MiddleBlock);
3858 struct CSEDenseMapInfo {
3859 static bool canHandle(const Instruction *I) {
3860 return isa<InsertElementInst>(I) || isa<ExtractElementInst>(I) ||
3861 isa<ShuffleVectorInst>(I) || isa<GetElementPtrInst>(I);
3864 static inline Instruction *getEmptyKey() {
3865 return DenseMapInfo<Instruction *>::getEmptyKey();
3868 static inline Instruction *getTombstoneKey() {
3869 return DenseMapInfo<Instruction *>::getTombstoneKey();
3872 static unsigned getHashValue(const Instruction *I) {
3873 assert(canHandle(I) && "Unknown instruction!");
3874 return hash_combine(I->getOpcode(), hash_combine_range(I->value_op_begin(),
3875 I->value_op_end()));
3878 static bool isEqual(const Instruction *LHS, const Instruction *RHS) {
3879 if (LHS == getEmptyKey() || RHS == getEmptyKey() ||
3880 LHS == getTombstoneKey() || RHS == getTombstoneKey())
3882 return LHS->isIdenticalTo(RHS);
3886 } // end anonymous namespace
3888 ///\brief Perform cse of induction variable instructions.
3889 static void cse(BasicBlock *BB) {
3890 // Perform simple cse.
3891 SmallDenseMap<Instruction *, Instruction *, 4, CSEDenseMapInfo> CSEMap;
3892 for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) {
3893 Instruction *In = &*I++;
3895 if (!CSEDenseMapInfo::canHandle(In))
3898 // Check if we can replace this instruction with any of the
3899 // visited instructions.
3900 if (Instruction *V = CSEMap.lookup(In)) {
3901 In->replaceAllUsesWith(V);
3902 In->eraseFromParent();
3910 /// \brief Estimate the overhead of scalarizing an instruction. This is a
3911 /// convenience wrapper for the type-based getScalarizationOverhead API.
3912 static unsigned getScalarizationOverhead(Instruction *I, unsigned VF,
3913 const TargetTransformInfo &TTI) {
3918 Type *RetTy = ToVectorTy(I->getType(), VF);
3919 if (!RetTy->isVoidTy() &&
3920 (!isa<LoadInst>(I) ||
3921 !TTI.supportsEfficientVectorElementLoadStore()))
3922 Cost += TTI.getScalarizationOverhead(RetTy, true, false);
3924 if (CallInst *CI = dyn_cast<CallInst>(I)) {
3925 SmallVector<const Value *, 4> Operands(CI->arg_operands());
3926 Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3928 else if (!isa<StoreInst>(I) ||
3929 !TTI.supportsEfficientVectorElementLoadStore()) {
3930 SmallVector<const Value *, 4> Operands(I->operand_values());
3931 Cost += TTI.getOperandsScalarizationOverhead(Operands, VF);
3937 // Estimate cost of a call instruction CI if it were vectorized with factor VF.
3938 // Return the cost of the instruction, including scalarization overhead if it's
3939 // needed. The flag NeedToScalarize shows if the call needs to be scalarized -
3940 // i.e. either vector version isn't available, or is too expensive.
3941 static unsigned getVectorCallCost(CallInst *CI, unsigned VF,
3942 const TargetTransformInfo &TTI,
3943 const TargetLibraryInfo *TLI,
3944 bool &NeedToScalarize) {
3945 Function *F = CI->getCalledFunction();
3946 StringRef FnName = CI->getCalledFunction()->getName();
3947 Type *ScalarRetTy = CI->getType();
3948 SmallVector<Type *, 4> Tys, ScalarTys;
3949 for (auto &ArgOp : CI->arg_operands())
3950 ScalarTys.push_back(ArgOp->getType());
3952 // Estimate cost of scalarized vector call. The source operands are assumed
3953 // to be vectors, so we need to extract individual elements from there,
3954 // execute VF scalar calls, and then gather the result into the vector return
3956 unsigned ScalarCallCost = TTI.getCallInstrCost(F, ScalarRetTy, ScalarTys);
3958 return ScalarCallCost;
3960 // Compute corresponding vector type for return value and arguments.
3961 Type *RetTy = ToVectorTy(ScalarRetTy, VF);
3962 for (Type *ScalarTy : ScalarTys)
3963 Tys.push_back(ToVectorTy(ScalarTy, VF));
3965 // Compute costs of unpacking argument values for the scalar calls and
3966 // packing the return values to a vector.
3967 unsigned ScalarizationCost = getScalarizationOverhead(CI, VF, TTI);
3969 unsigned Cost = ScalarCallCost * VF + ScalarizationCost;
3971 // If we can't emit a vector call for this function, then the currently found
3972 // cost is the cost we need to return.
3973 NeedToScalarize = true;
3974 if (!TLI || !TLI->isFunctionVectorizable(FnName, VF) || CI->isNoBuiltin())
3977 // If the corresponding vector cost is cheaper, return its cost.
3978 unsigned VectorCallCost = TTI.getCallInstrCost(nullptr, RetTy, Tys);
3979 if (VectorCallCost < Cost) {
3980 NeedToScalarize = false;
3981 return VectorCallCost;
3986 // Estimate cost of an intrinsic call instruction CI if it were vectorized with
3987 // factor VF. Return the cost of the instruction, including scalarization
3988 // overhead if it's needed.
3989 static unsigned getVectorIntrinsicCost(CallInst *CI, unsigned VF,
3990 const TargetTransformInfo &TTI,
3991 const TargetLibraryInfo *TLI) {
3992 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
3993 assert(ID && "Expected intrinsic call!");
3996 if (auto *FPMO = dyn_cast<FPMathOperator>(CI))
3997 FMF = FPMO->getFastMathFlags();
3999 SmallVector<Value *, 4> Operands(CI->arg_operands());
4000 return TTI.getIntrinsicInstrCost(ID, CI->getType(), Operands, FMF, VF);
4003 static Type *smallestIntegerVectorType(Type *T1, Type *T2) {
4004 auto *I1 = cast<IntegerType>(T1->getVectorElementType());
4005 auto *I2 = cast<IntegerType>(T2->getVectorElementType());
4006 return I1->getBitWidth() < I2->getBitWidth() ? T1 : T2;
4008 static Type *largestIntegerVectorType(Type *T1, Type *T2) {
4009 auto *I1 = cast<IntegerType>(T1->getVectorElementType());
4010 auto *I2 = cast<IntegerType>(T2->getVectorElementType());
4011 return I1->getBitWidth() > I2->getBitWidth() ? T1 : T2;
4014 void InnerLoopVectorizer::truncateToMinimalBitwidths() {
4015 // For every instruction `I` in MinBWs, truncate the operands, create a
4016 // truncated version of `I` and reextend its result. InstCombine runs
4017 // later and will remove any ext/trunc pairs.
4018 SmallPtrSet<Value *, 4> Erased;
4019 for (const auto &KV : Cost->getMinimalBitwidths()) {
4020 // If the value wasn't vectorized, we must maintain the original scalar
4021 // type. The absence of the value from VectorLoopValueMap indicates that it
4022 // wasn't vectorized.
4023 if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
4025 for (unsigned Part = 0; Part < UF; ++Part) {
4026 Value *I = getOrCreateVectorValue(KV.first, Part);
4027 if (Erased.count(I) || I->use_empty() || !isa<Instruction>(I))
4029 Type *OriginalTy = I->getType();
4030 Type *ScalarTruncatedTy =
4031 IntegerType::get(OriginalTy->getContext(), KV.second);
4032 Type *TruncatedTy = VectorType::get(ScalarTruncatedTy,
4033 OriginalTy->getVectorNumElements());
4034 if (TruncatedTy == OriginalTy)
4037 IRBuilder<> B(cast<Instruction>(I));
4038 auto ShrinkOperand = [&](Value *V) -> Value * {
4039 if (auto *ZI = dyn_cast<ZExtInst>(V))
4040 if (ZI->getSrcTy() == TruncatedTy)
4041 return ZI->getOperand(0);
4042 return B.CreateZExtOrTrunc(V, TruncatedTy);
4045 // The actual instruction modification depends on the instruction type,
4047 Value *NewI = nullptr;
4048 if (auto *BO = dyn_cast<BinaryOperator>(I)) {
4049 NewI = B.CreateBinOp(BO->getOpcode(), ShrinkOperand(BO->getOperand(0)),
4050 ShrinkOperand(BO->getOperand(1)));
4052 // Any wrapping introduced by shrinking this operation shouldn't be
4053 // considered undefined behavior. So, we can't unconditionally copy
4054 // arithmetic wrapping flags to NewI.
4055 cast<BinaryOperator>(NewI)->copyIRFlags(I, /*IncludeWrapFlags=*/false);
4056 } else if (auto *CI = dyn_cast<ICmpInst>(I)) {
4058 B.CreateICmp(CI->getPredicate(), ShrinkOperand(CI->getOperand(0)),
4059 ShrinkOperand(CI->getOperand(1)));
4060 } else if (auto *SI = dyn_cast<SelectInst>(I)) {
4061 NewI = B.CreateSelect(SI->getCondition(),
4062 ShrinkOperand(SI->getTrueValue()),
4063 ShrinkOperand(SI->getFalseValue()));
4064 } else if (auto *CI = dyn_cast<CastInst>(I)) {
4065 switch (CI->getOpcode()) {
4067 llvm_unreachable("Unhandled cast!");
4068 case Instruction::Trunc:
4069 NewI = ShrinkOperand(CI->getOperand(0));
4071 case Instruction::SExt:
4072 NewI = B.CreateSExtOrTrunc(
4074 smallestIntegerVectorType(OriginalTy, TruncatedTy));
4076 case Instruction::ZExt:
4077 NewI = B.CreateZExtOrTrunc(
4079 smallestIntegerVectorType(OriginalTy, TruncatedTy));
4082 } else if (auto *SI = dyn_cast<ShuffleVectorInst>(I)) {
4083 auto Elements0 = SI->getOperand(0)->getType()->getVectorNumElements();
4084 auto *O0 = B.CreateZExtOrTrunc(
4085 SI->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements0));
4086 auto Elements1 = SI->getOperand(1)->getType()->getVectorNumElements();
4087 auto *O1 = B.CreateZExtOrTrunc(
4088 SI->getOperand(1), VectorType::get(ScalarTruncatedTy, Elements1));
4090 NewI = B.CreateShuffleVector(O0, O1, SI->getMask());
4091 } else if (isa<LoadInst>(I) || isa<PHINode>(I)) {
4092 // Don't do anything with the operands, just extend the result.
4094 } else if (auto *IE = dyn_cast<InsertElementInst>(I)) {
4095 auto Elements = IE->getOperand(0)->getType()->getVectorNumElements();
4096 auto *O0 = B.CreateZExtOrTrunc(
4097 IE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
4098 auto *O1 = B.CreateZExtOrTrunc(IE->getOperand(1), ScalarTruncatedTy);
4099 NewI = B.CreateInsertElement(O0, O1, IE->getOperand(2));
4100 } else if (auto *EE = dyn_cast<ExtractElementInst>(I)) {
4101 auto Elements = EE->getOperand(0)->getType()->getVectorNumElements();
4102 auto *O0 = B.CreateZExtOrTrunc(
4103 EE->getOperand(0), VectorType::get(ScalarTruncatedTy, Elements));
4104 NewI = B.CreateExtractElement(O0, EE->getOperand(2));
4106 // If we don't know what to do, be conservative and don't do anything.
4110 // Lastly, extend the result.
4111 NewI->takeName(cast<Instruction>(I));
4112 Value *Res = B.CreateZExtOrTrunc(NewI, OriginalTy);
4113 I->replaceAllUsesWith(Res);
4114 cast<Instruction>(I)->eraseFromParent();
4116 VectorLoopValueMap.resetVectorValue(KV.first, Part, Res);
4120 // We'll have created a bunch of ZExts that are now parentless. Clean up.
4121 for (const auto &KV : Cost->getMinimalBitwidths()) {
4122 // If the value wasn't vectorized, we must maintain the original scalar
4123 // type. The absence of the value from VectorLoopValueMap indicates that it
4124 // wasn't vectorized.
4125 if (!VectorLoopValueMap.hasAnyVectorValue(KV.first))
4127 for (unsigned Part = 0; Part < UF; ++Part) {
4128 Value *I = getOrCreateVectorValue(KV.first, Part);
4129 ZExtInst *Inst = dyn_cast<ZExtInst>(I);
4130 if (Inst && Inst->use_empty()) {
4131 Value *NewI = Inst->getOperand(0);
4132 Inst->eraseFromParent();
4133 VectorLoopValueMap.resetVectorValue(KV.first, Part, NewI);
4139 void InnerLoopVectorizer::fixVectorizedLoop() {
4140 // Insert truncates and extends for any truncated instructions as hints to
4143 truncateToMinimalBitwidths();
4145 // At this point every instruction in the original loop is widened to a
4146 // vector form. Now we need to fix the recurrences in the loop. These PHI
4147 // nodes are currently empty because we did not want to introduce cycles.
4148 // This is the second stage of vectorizing recurrences.
4149 fixCrossIterationPHIs();
4151 // Update the dominator tree.
4153 // FIXME: After creating the structure of the new loop, the dominator tree is
4154 // no longer up-to-date, and it remains that way until we update it
4155 // here. An out-of-date dominator tree is problematic for SCEV,
4156 // because SCEVExpander uses it to guide code generation. The
4157 // vectorizer use SCEVExpanders in several places. Instead, we should
4158 // keep the dominator tree up-to-date as we go.
4161 // Fix-up external users of the induction variables.
4162 for (auto &Entry : *Legal->getInductionVars())
4163 fixupIVUsers(Entry.first, Entry.second,
4164 getOrCreateVectorTripCount(LI->getLoopFor(LoopVectorBody)),
4165 IVEndValues[Entry.first], LoopMiddleBlock);
4168 for (Instruction *PI : PredicatedInstructions)
4169 sinkScalarOperands(&*PI);
4171 // Remove redundant induction instructions.
4172 cse(LoopVectorBody);
4175 void InnerLoopVectorizer::fixCrossIterationPHIs() {
4176 // In order to support recurrences we need to be able to vectorize Phi nodes.
4177 // Phi nodes have cycles, so we need to vectorize them in two stages. This is
4178 // stage #2: We now need to fix the recurrences by adding incoming edges to
4179 // the currently empty PHI nodes. At this point every instruction in the
4180 // original loop is widened to a vector form so we can use them to construct
4181 // the incoming edges.
4182 for (PHINode &Phi : OrigLoop->getHeader()->phis()) {
4183 // Handle first-order recurrences and reductions that need to be fixed.
4184 if (Legal->isFirstOrderRecurrence(&Phi))
4185 fixFirstOrderRecurrence(&Phi);
4186 else if (Legal->isReductionVariable(&Phi))
4191 void InnerLoopVectorizer::fixFirstOrderRecurrence(PHINode *Phi) {
4192 // This is the second phase of vectorizing first-order recurrences. An
4193 // overview of the transformation is described below. Suppose we have the
4196 // for (int i = 0; i < n; ++i)
4197 // b[i] = a[i] - a[i - 1];
4199 // There is a first-order recurrence on "a". For this loop, the shorthand
4200 // scalar IR looks like:
4207 // i = phi [0, scalar.ph], [i+1, scalar.body]
4208 // s1 = phi [s_init, scalar.ph], [s2, scalar.body]
4211 // br cond, scalar.body, ...
4213 // In this example, s1 is a recurrence because it's value depends on the
4214 // previous iteration. In the first phase of vectorization, we created a
4215 // temporary value for s1. We now complete the vectorization and produce the
4216 // shorthand vector IR shown below (for VF = 4, UF = 1).
4219 // v_init = vector(..., ..., ..., a[-1])
4223 // i = phi [0, vector.ph], [i+4, vector.body]
4224 // v1 = phi [v_init, vector.ph], [v2, vector.body]
4225 // v2 = a[i, i+1, i+2, i+3];
4226 // v3 = vector(v1(3), v2(0, 1, 2))
4227 // b[i, i+1, i+2, i+3] = v2 - v3
4228 // br cond, vector.body, middle.block
4235 // s_init = phi [x, middle.block], [a[-1], otherwise]
4238 // After execution completes the vector loop, we extract the next value of
4239 // the recurrence (x) to use as the initial value in the scalar loop.
4241 // Get the original loop preheader and single loop latch.
4242 auto *Preheader = OrigLoop->getLoopPreheader();
4243 auto *Latch = OrigLoop->getLoopLatch();
4245 // Get the initial and previous values of the scalar recurrence.
4246 auto *ScalarInit = Phi->getIncomingValueForBlock(Preheader);
4247 auto *Previous = Phi->getIncomingValueForBlock(Latch);
4249 // Create a vector from the initial value.
4250 auto *VectorInit = ScalarInit;
4252 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator());
4253 VectorInit = Builder.CreateInsertElement(
4254 UndefValue::get(VectorType::get(VectorInit->getType(), VF)), VectorInit,
4255 Builder.getInt32(VF - 1), "vector.recur.init");
4258 // We constructed a temporary phi node in the first phase of vectorization.
4259 // This phi node will eventually be deleted.
4260 Builder.SetInsertPoint(
4261 cast<Instruction>(VectorLoopValueMap.getVectorValue(Phi, 0)));
4263 // Create a phi node for the new recurrence. The current value will either be
4264 // the initial value inserted into a vector or loop-varying vector value.
4265 auto *VecPhi = Builder.CreatePHI(VectorInit->getType(), 2, "vector.recur");
4266 VecPhi->addIncoming(VectorInit, LoopVectorPreHeader);
4268 // Get the vectorized previous value of the last part UF - 1. It appears last
4269 // among all unrolled iterations, due to the order of their construction.
4270 Value *PreviousLastPart = getOrCreateVectorValue(Previous, UF - 1);
4272 // Set the insertion point after the previous value if it is an instruction.
4273 // Note that the previous value may have been constant-folded so it is not
4274 // guaranteed to be an instruction in the vector loop. Also, if the previous
4275 // value is a phi node, we should insert after all the phi nodes to avoid
4276 // breaking basic block verification.
4277 if (LI->getLoopFor(LoopVectorBody)->isLoopInvariant(PreviousLastPart) ||
4278 isa<PHINode>(PreviousLastPart))
4279 Builder.SetInsertPoint(&*LoopVectorBody->getFirstInsertionPt());
4281 Builder.SetInsertPoint(
4282 &*++BasicBlock::iterator(cast<Instruction>(PreviousLastPart)));
4284 // We will construct a vector for the recurrence by combining the values for
4285 // the current and previous iterations. This is the required shuffle mask.
4286 SmallVector<Constant *, 8> ShuffleMask(VF);
4287 ShuffleMask[0] = Builder.getInt32(VF - 1);
4288 for (unsigned I = 1; I < VF; ++I)
4289 ShuffleMask[I] = Builder.getInt32(I + VF - 1);
4291 // The vector from which to take the initial value for the current iteration
4292 // (actual or unrolled). Initially, this is the vector phi node.
4293 Value *Incoming = VecPhi;
4295 // Shuffle the current and previous vector and update the vector parts.
4296 for (unsigned Part = 0; Part < UF; ++Part) {
4297 Value *PreviousPart = getOrCreateVectorValue(Previous, Part);
4298 Value *PhiPart = VectorLoopValueMap.getVectorValue(Phi, Part);
4300 VF > 1 ? Builder.CreateShuffleVector(Incoming, PreviousPart,
4301 ConstantVector::get(ShuffleMask))
4303 PhiPart->replaceAllUsesWith(Shuffle);
4304 cast<Instruction>(PhiPart)->eraseFromParent();
4305 VectorLoopValueMap.resetVectorValue(Phi, Part, Shuffle);
4306 Incoming = PreviousPart;
4309 // Fix the latch value of the new recurrence in the vector loop.
4310 VecPhi->addIncoming(Incoming, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
4312 // Extract the last vector element in the middle block. This will be the
4313 // initial value for the recurrence when jumping to the scalar loop.
4314 auto *ExtractForScalar = Incoming;
4316 Builder.SetInsertPoint(LoopMiddleBlock->getTerminator());
4317 ExtractForScalar = Builder.CreateExtractElement(
4318 ExtractForScalar, Builder.getInt32(VF - 1), "vector.recur.extract");
4320 // Extract the second last element in the middle block if the
4321 // Phi is used outside the loop. We need to extract the phi itself
4322 // and not the last element (the phi update in the current iteration). This
4323 // will be the value when jumping to the exit block from the LoopMiddleBlock,
4324 // when the scalar loop is not run at all.
4325 Value *ExtractForPhiUsedOutsideLoop = nullptr;
4327 ExtractForPhiUsedOutsideLoop = Builder.CreateExtractElement(
4328 Incoming, Builder.getInt32(VF - 2), "vector.recur.extract.for.phi");
4329 // When loop is unrolled without vectorizing, initialize
4330 // ExtractForPhiUsedOutsideLoop with the value just prior to unrolled value of
4331 // `Incoming`. This is analogous to the vectorized case above: extracting the
4332 // second last element when VF > 1.
4334 ExtractForPhiUsedOutsideLoop = getOrCreateVectorValue(Previous, UF - 2);
4336 // Fix the initial value of the original recurrence in the scalar loop.
4337 Builder.SetInsertPoint(&*LoopScalarPreHeader->begin());
4338 auto *Start = Builder.CreatePHI(Phi->getType(), 2, "scalar.recur.init");
4339 for (auto *BB : predecessors(LoopScalarPreHeader)) {
4340 auto *Incoming = BB == LoopMiddleBlock ? ExtractForScalar : ScalarInit;
4341 Start->addIncoming(Incoming, BB);
4344 Phi->setIncomingValue(Phi->getBasicBlockIndex(LoopScalarPreHeader), Start);
4345 Phi->setName("scalar.recur");
4347 // Finally, fix users of the recurrence outside the loop. The users will need
4348 // either the last value of the scalar recurrence or the last value of the
4349 // vector recurrence we extracted in the middle block. Since the loop is in
4350 // LCSSA form, we just need to find the phi node for the original scalar
4351 // recurrence in the exit block, and then add an edge for the middle block.
4352 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
4353 if (LCSSAPhi.getIncomingValue(0) == Phi) {
4354 LCSSAPhi.addIncoming(ExtractForPhiUsedOutsideLoop, LoopMiddleBlock);
4360 void InnerLoopVectorizer::fixReduction(PHINode *Phi) {
4361 Constant *Zero = Builder.getInt32(0);
4363 // Get it's reduction variable descriptor.
4364 assert(Legal->isReductionVariable(Phi) &&
4365 "Unable to find the reduction variable");
4366 RecurrenceDescriptor RdxDesc = (*Legal->getReductionVars())[Phi];
4368 RecurrenceDescriptor::RecurrenceKind RK = RdxDesc.getRecurrenceKind();
4369 TrackingVH<Value> ReductionStartValue = RdxDesc.getRecurrenceStartValue();
4370 Instruction *LoopExitInst = RdxDesc.getLoopExitInstr();
4371 RecurrenceDescriptor::MinMaxRecurrenceKind MinMaxKind =
4372 RdxDesc.getMinMaxRecurrenceKind();
4373 setDebugLocFromInst(Builder, ReductionStartValue);
4375 // We need to generate a reduction vector from the incoming scalar.
4376 // To do so, we need to generate the 'identity' vector and override
4377 // one of the elements with the incoming scalar reduction. We need
4378 // to do it in the vector-loop preheader.
4379 Builder.SetInsertPoint(LoopVectorPreHeader->getTerminator());
4381 // This is the vector-clone of the value that leaves the loop.
4382 Type *VecTy = getOrCreateVectorValue(LoopExitInst, 0)->getType();
4384 // Find the reduction identity variable. Zero for addition, or, xor,
4385 // one for multiplication, -1 for And.
4388 if (RK == RecurrenceDescriptor::RK_IntegerMinMax ||
4389 RK == RecurrenceDescriptor::RK_FloatMinMax) {
4390 // MinMax reduction have the start value as their identify.
4392 VectorStart = Identity = ReductionStartValue;
4394 VectorStart = Identity =
4395 Builder.CreateVectorSplat(VF, ReductionStartValue, "minmax.ident");
4398 // Handle other reduction kinds:
4399 Constant *Iden = RecurrenceDescriptor::getRecurrenceIdentity(
4400 RK, VecTy->getScalarType());
4403 // This vector is the Identity vector where the first element is the
4404 // incoming scalar reduction.
4405 VectorStart = ReductionStartValue;
4407 Identity = ConstantVector::getSplat(VF, Iden);
4409 // This vector is the Identity vector where the first element is the
4410 // incoming scalar reduction.
4412 Builder.CreateInsertElement(Identity, ReductionStartValue, Zero);
4416 // Fix the vector-loop phi.
4418 // Reductions do not have to start at zero. They can start with
4419 // any loop invariant values.
4420 BasicBlock *Latch = OrigLoop->getLoopLatch();
4421 Value *LoopVal = Phi->getIncomingValueForBlock(Latch);
4422 for (unsigned Part = 0; Part < UF; ++Part) {
4423 Value *VecRdxPhi = getOrCreateVectorValue(Phi, Part);
4424 Value *Val = getOrCreateVectorValue(LoopVal, Part);
4425 // Make sure to add the reduction stat value only to the
4426 // first unroll part.
4427 Value *StartVal = (Part == 0) ? VectorStart : Identity;
4428 cast<PHINode>(VecRdxPhi)->addIncoming(StartVal, LoopVectorPreHeader);
4429 cast<PHINode>(VecRdxPhi)
4430 ->addIncoming(Val, LI->getLoopFor(LoopVectorBody)->getLoopLatch());
4433 // Before each round, move the insertion point right between
4434 // the PHIs and the values we are going to write.
4435 // This allows us to write both PHINodes and the extractelement
4437 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt());
4439 setDebugLocFromInst(Builder, LoopExitInst);
4441 // If the vector reduction can be performed in a smaller type, we truncate
4442 // then extend the loop exit value to enable InstCombine to evaluate the
4443 // entire expression in the smaller type.
4444 if (VF > 1 && Phi->getType() != RdxDesc.getRecurrenceType()) {
4445 Type *RdxVecTy = VectorType::get(RdxDesc.getRecurrenceType(), VF);
4446 Builder.SetInsertPoint(
4447 LI->getLoopFor(LoopVectorBody)->getLoopLatch()->getTerminator());
4448 VectorParts RdxParts(UF);
4449 for (unsigned Part = 0; Part < UF; ++Part) {
4450 RdxParts[Part] = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
4451 Value *Trunc = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
4452 Value *Extnd = RdxDesc.isSigned() ? Builder.CreateSExt(Trunc, VecTy)
4453 : Builder.CreateZExt(Trunc, VecTy);
4454 for (Value::user_iterator UI = RdxParts[Part]->user_begin();
4455 UI != RdxParts[Part]->user_end();)
4457 (*UI++)->replaceUsesOfWith(RdxParts[Part], Extnd);
4458 RdxParts[Part] = Extnd;
4463 Builder.SetInsertPoint(&*LoopMiddleBlock->getFirstInsertionPt());
4464 for (unsigned Part = 0; Part < UF; ++Part) {
4465 RdxParts[Part] = Builder.CreateTrunc(RdxParts[Part], RdxVecTy);
4466 VectorLoopValueMap.resetVectorValue(LoopExitInst, Part, RdxParts[Part]);
4470 // Reduce all of the unrolled parts into a single vector.
4471 Value *ReducedPartRdx = VectorLoopValueMap.getVectorValue(LoopExitInst, 0);
4472 unsigned Op = RecurrenceDescriptor::getRecurrenceBinOp(RK);
4473 setDebugLocFromInst(Builder, ReducedPartRdx);
4474 for (unsigned Part = 1; Part < UF; ++Part) {
4475 Value *RdxPart = VectorLoopValueMap.getVectorValue(LoopExitInst, Part);
4476 if (Op != Instruction::ICmp && Op != Instruction::FCmp)
4477 // Floating point operations had to be 'fast' to enable the reduction.
4478 ReducedPartRdx = addFastMathFlag(
4479 Builder.CreateBinOp((Instruction::BinaryOps)Op, RdxPart,
4480 ReducedPartRdx, "bin.rdx"));
4482 ReducedPartRdx = RecurrenceDescriptor::createMinMaxOp(
4483 Builder, MinMaxKind, ReducedPartRdx, RdxPart);
4487 bool NoNaN = Legal->hasFunNoNaNAttr();
4489 createTargetReduction(Builder, TTI, RdxDesc, ReducedPartRdx, NoNaN);
4490 // If the reduction can be performed in a smaller type, we need to extend
4491 // the reduction to the wider type before we branch to the original loop.
4492 if (Phi->getType() != RdxDesc.getRecurrenceType())
4495 ? Builder.CreateSExt(ReducedPartRdx, Phi->getType())
4496 : Builder.CreateZExt(ReducedPartRdx, Phi->getType());
4499 // Create a phi node that merges control-flow from the backedge-taken check
4500 // block and the middle block.
4501 PHINode *BCBlockPhi = PHINode::Create(Phi->getType(), 2, "bc.merge.rdx",
4502 LoopScalarPreHeader->getTerminator());
4503 for (unsigned I = 0, E = LoopBypassBlocks.size(); I != E; ++I)
4504 BCBlockPhi->addIncoming(ReductionStartValue, LoopBypassBlocks[I]);
4505 BCBlockPhi->addIncoming(ReducedPartRdx, LoopMiddleBlock);
4507 // Now, we need to fix the users of the reduction variable
4508 // inside and outside of the scalar remainder loop.
4509 // We know that the loop is in LCSSA form. We need to update the
4510 // PHI nodes in the exit blocks.
4511 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
4512 // All PHINodes need to have a single entry edge, or two if
4513 // we already fixed them.
4514 assert(LCSSAPhi.getNumIncomingValues() < 3 && "Invalid LCSSA PHI");
4516 // We found a reduction value exit-PHI. Update it with the
4517 // incoming bypass edge.
4518 if (LCSSAPhi.getIncomingValue(0) == LoopExitInst)
4519 LCSSAPhi.addIncoming(ReducedPartRdx, LoopMiddleBlock);
4520 } // end of the LCSSA phi scan.
4522 // Fix the scalar loop reduction variable with the incoming reduction sum
4523 // from the vector body and from the backedge value.
4524 int IncomingEdgeBlockIdx =
4525 Phi->getBasicBlockIndex(OrigLoop->getLoopLatch());
4526 assert(IncomingEdgeBlockIdx >= 0 && "Invalid block index");
4527 // Pick the other block.
4528 int SelfEdgeBlockIdx = (IncomingEdgeBlockIdx ? 0 : 1);
4529 Phi->setIncomingValue(SelfEdgeBlockIdx, BCBlockPhi);
4530 Phi->setIncomingValue(IncomingEdgeBlockIdx, LoopExitInst);
4533 void InnerLoopVectorizer::fixLCSSAPHIs() {
4534 for (PHINode &LCSSAPhi : LoopExitBlock->phis()) {
4535 if (LCSSAPhi.getNumIncomingValues() == 1) {
4536 assert(OrigLoop->isLoopInvariant(LCSSAPhi.getIncomingValue(0)) &&
4537 "Incoming value isn't loop invariant");
4538 LCSSAPhi.addIncoming(LCSSAPhi.getIncomingValue(0), LoopMiddleBlock);
4543 void InnerLoopVectorizer::sinkScalarOperands(Instruction *PredInst) {
4544 // The basic block and loop containing the predicated instruction.
4545 auto *PredBB = PredInst->getParent();
4546 auto *VectorLoop = LI->getLoopFor(PredBB);
4548 // Initialize a worklist with the operands of the predicated instruction.
4549 SetVector<Value *> Worklist(PredInst->op_begin(), PredInst->op_end());
4551 // Holds instructions that we need to analyze again. An instruction may be
4552 // reanalyzed if we don't yet know if we can sink it or not.
4553 SmallVector<Instruction *, 8> InstsToReanalyze;
4555 // Returns true if a given use occurs in the predicated block. Phi nodes use
4556 // their operands in their corresponding predecessor blocks.
4557 auto isBlockOfUsePredicated = [&](Use &U) -> bool {
4558 auto *I = cast<Instruction>(U.getUser());
4559 BasicBlock *BB = I->getParent();
4560 if (auto *Phi = dyn_cast<PHINode>(I))
4561 BB = Phi->getIncomingBlock(
4562 PHINode::getIncomingValueNumForOperand(U.getOperandNo()));
4563 return BB == PredBB;
4566 // Iteratively sink the scalarized operands of the predicated instruction
4567 // into the block we created for it. When an instruction is sunk, it's
4568 // operands are then added to the worklist. The algorithm ends after one pass
4569 // through the worklist doesn't sink a single instruction.
4572 // Add the instructions that need to be reanalyzed to the worklist, and
4573 // reset the changed indicator.
4574 Worklist.insert(InstsToReanalyze.begin(), InstsToReanalyze.end());
4575 InstsToReanalyze.clear();
4578 while (!Worklist.empty()) {
4579 auto *I = dyn_cast<Instruction>(Worklist.pop_back_val());
4581 // We can't sink an instruction if it is a phi node, is already in the
4582 // predicated block, is not in the loop, or may have side effects.
4583 if (!I || isa<PHINode>(I) || I->getParent() == PredBB ||
4584 !VectorLoop->contains(I) || I->mayHaveSideEffects())
4587 // It's legal to sink the instruction if all its uses occur in the
4588 // predicated block. Otherwise, there's nothing to do yet, and we may
4589 // need to reanalyze the instruction.
4590 if (!llvm::all_of(I->uses(), isBlockOfUsePredicated)) {
4591 InstsToReanalyze.push_back(I);
4595 // Move the instruction to the beginning of the predicated block, and add
4596 // it's operands to the worklist.
4597 I->moveBefore(&*PredBB->getFirstInsertionPt());
4598 Worklist.insert(I->op_begin(), I->op_end());
4600 // The sinking may have enabled other instructions to be sunk, so we will
4607 void InnerLoopVectorizer::widenPHIInstruction(Instruction *PN, unsigned UF,
4609 assert(PN->getParent() == OrigLoop->getHeader() &&
4610 "Non-header phis should have been handled elsewhere");
4612 PHINode *P = cast<PHINode>(PN);
4613 // In order to support recurrences we need to be able to vectorize Phi nodes.
4614 // Phi nodes have cycles, so we need to vectorize them in two stages. This is
4615 // stage #1: We create a new vector PHI node with no incoming edges. We'll use
4616 // this value when we vectorize all of the instructions that use the PHI.
4617 if (Legal->isReductionVariable(P) || Legal->isFirstOrderRecurrence(P)) {
4618 for (unsigned Part = 0; Part < UF; ++Part) {
4619 // This is phase one of vectorizing PHIs.
4621 (VF == 1) ? PN->getType() : VectorType::get(PN->getType(), VF);
4622 Value *EntryPart = PHINode::Create(
4623 VecTy, 2, "vec.phi", &*LoopVectorBody->getFirstInsertionPt());
4624 VectorLoopValueMap.setVectorValue(P, Part, EntryPart);
4629 setDebugLocFromInst(Builder, P);
4631 // This PHINode must be an induction variable.
4632 // Make sure that we know about it.
4633 assert(Legal->getInductionVars()->count(P) && "Not an induction variable");
4635 InductionDescriptor II = Legal->getInductionVars()->lookup(P);
4636 const DataLayout &DL = OrigLoop->getHeader()->getModule()->getDataLayout();
4638 // FIXME: The newly created binary instructions should contain nsw/nuw flags,
4639 // which can be found from the original scalar operations.
4640 switch (II.getKind()) {
4641 case InductionDescriptor::IK_NoInduction:
4642 llvm_unreachable("Unknown induction");
4643 case InductionDescriptor::IK_IntInduction:
4644 case InductionDescriptor::IK_FpInduction:
4645 llvm_unreachable("Integer/fp induction is handled elsewhere.");
4646 case InductionDescriptor::IK_PtrInduction: {
4647 // Handle the pointer induction variable case.
4648 assert(P->getType()->isPointerTy() && "Unexpected type.");
4649 // This is the normalized GEP that starts counting at zero.
4650 Value *PtrInd = Induction;
4651 PtrInd = Builder.CreateSExtOrTrunc(PtrInd, II.getStep()->getType());
4652 // Determine the number of scalars we need to generate for each unroll
4653 // iteration. If the instruction is uniform, we only need to generate the
4654 // first lane. Otherwise, we generate all VF values.
4655 unsigned Lanes = Cost->isUniformAfterVectorization(P, VF) ? 1 : VF;
4656 // These are the scalar results. Notice that we don't generate vector GEPs
4657 // because scalar GEPs result in better code.
4658 for (unsigned Part = 0; Part < UF; ++Part) {
4659 for (unsigned Lane = 0; Lane < Lanes; ++Lane) {
4660 Constant *Idx = ConstantInt::get(PtrInd->getType(), Lane + Part * VF);
4661 Value *GlobalIdx = Builder.CreateAdd(PtrInd, Idx);
4662 Value *SclrGep = II.transform(Builder, GlobalIdx, PSE.getSE(), DL);
4663 SclrGep->setName("next.gep");
4664 VectorLoopValueMap.setScalarValue(P, {Part, Lane}, SclrGep);
4672 /// A helper function for checking whether an integer division-related
4673 /// instruction may divide by zero (in which case it must be predicated if
4674 /// executed conditionally in the scalar code).
4675 /// TODO: It may be worthwhile to generalize and check isKnownNonZero().
4676 /// Non-zero divisors that are non compile-time constants will not be
4677 /// converted into multiplication, so we will still end up scalarizing
4678 /// the division, but can do so w/o predication.
4679 static bool mayDivideByZero(Instruction &I) {
4680 assert((I.getOpcode() == Instruction::UDiv ||
4681 I.getOpcode() == Instruction::SDiv ||
4682 I.getOpcode() == Instruction::URem ||
4683 I.getOpcode() == Instruction::SRem) &&
4684 "Unexpected instruction");
4685 Value *Divisor = I.getOperand(1);
4686 auto *CInt = dyn_cast<ConstantInt>(Divisor);
4687 return !CInt || CInt->isZero();
4690 void InnerLoopVectorizer::widenInstruction(Instruction &I) {
4691 switch (I.getOpcode()) {
4692 case Instruction::Br:
4693 case Instruction::PHI:
4694 llvm_unreachable("This instruction is handled by a different recipe.");
4695 case Instruction::GetElementPtr: {
4696 // Construct a vector GEP by widening the operands of the scalar GEP as
4697 // necessary. We mark the vector GEP 'inbounds' if appropriate. A GEP
4698 // results in a vector of pointers when at least one operand of the GEP
4699 // is vector-typed. Thus, to keep the representation compact, we only use
4700 // vector-typed operands for loop-varying values.
4701 auto *GEP = cast<GetElementPtrInst>(&I);
4703 if (VF > 1 && OrigLoop->hasLoopInvariantOperands(GEP)) {
4704 // If we are vectorizing, but the GEP has only loop-invariant operands,
4705 // the GEP we build (by only using vector-typed operands for
4706 // loop-varying values) would be a scalar pointer. Thus, to ensure we
4707 // produce a vector of pointers, we need to either arbitrarily pick an
4708 // operand to broadcast, or broadcast a clone of the original GEP.
4709 // Here, we broadcast a clone of the original.
4711 // TODO: If at some point we decide to scalarize instructions having
4712 // loop-invariant operands, this special case will no longer be
4713 // required. We would add the scalarization decision to
4714 // collectLoopScalars() and teach getVectorValue() to broadcast
4715 // the lane-zero scalar value.
4716 auto *Clone = Builder.Insert(GEP->clone());
4717 for (unsigned Part = 0; Part < UF; ++Part) {
4718 Value *EntryPart = Builder.CreateVectorSplat(VF, Clone);
4719 VectorLoopValueMap.setVectorValue(&I, Part, EntryPart);
4720 addMetadata(EntryPart, GEP);
4723 // If the GEP has at least one loop-varying operand, we are sure to
4724 // produce a vector of pointers. But if we are only unrolling, we want
4725 // to produce a scalar GEP for each unroll part. Thus, the GEP we
4726 // produce with the code below will be scalar (if VF == 1) or vector
4727 // (otherwise). Note that for the unroll-only case, we still maintain
4728 // values in the vector mapping with initVector, as we do for other
4730 for (unsigned Part = 0; Part < UF; ++Part) {
4731 // The pointer operand of the new GEP. If it's loop-invariant, we
4732 // won't broadcast it.
4734 OrigLoop->isLoopInvariant(GEP->getPointerOperand())
4735 ? GEP->getPointerOperand()
4736 : getOrCreateVectorValue(GEP->getPointerOperand(), Part);
4738 // Collect all the indices for the new GEP. If any index is
4739 // loop-invariant, we won't broadcast it.
4740 SmallVector<Value *, 4> Indices;
4741 for (auto &U : make_range(GEP->idx_begin(), GEP->idx_end())) {
4742 if (OrigLoop->isLoopInvariant(U.get()))
4743 Indices.push_back(U.get());
4745 Indices.push_back(getOrCreateVectorValue(U.get(), Part));
4748 // Create the new GEP. Note that this GEP may be a scalar if VF == 1,
4749 // but it should be a vector, otherwise.
4750 auto *NewGEP = GEP->isInBounds()
4751 ? Builder.CreateInBoundsGEP(Ptr, Indices)
4752 : Builder.CreateGEP(Ptr, Indices);
4753 assert((VF == 1 || NewGEP->getType()->isVectorTy()) &&
4754 "NewGEP is not a pointer vector");
4755 VectorLoopValueMap.setVectorValue(&I, Part, NewGEP);
4756 addMetadata(NewGEP, GEP);
4762 case Instruction::UDiv:
4763 case Instruction::SDiv:
4764 case Instruction::SRem:
4765 case Instruction::URem:
4766 case Instruction::Add:
4767 case Instruction::FAdd:
4768 case Instruction::Sub:
4769 case Instruction::FSub:
4770 case Instruction::Mul:
4771 case Instruction::FMul:
4772 case Instruction::FDiv:
4773 case Instruction::FRem:
4774 case Instruction::Shl:
4775 case Instruction::LShr:
4776 case Instruction::AShr:
4777 case Instruction::And:
4778 case Instruction::Or:
4779 case Instruction::Xor: {
4780 // Just widen binops.
4781 auto *BinOp = cast<BinaryOperator>(&I);
4782 setDebugLocFromInst(Builder, BinOp);
4784 for (unsigned Part = 0; Part < UF; ++Part) {
4785 Value *A = getOrCreateVectorValue(BinOp->getOperand(0), Part);
4786 Value *B = getOrCreateVectorValue(BinOp->getOperand(1), Part);
4787 Value *V = Builder.CreateBinOp(BinOp->getOpcode(), A, B);
4789 if (BinaryOperator *VecOp = dyn_cast<BinaryOperator>(V))
4790 VecOp->copyIRFlags(BinOp);
4792 // Use this vector value for all users of the original instruction.
4793 VectorLoopValueMap.setVectorValue(&I, Part, V);
4794 addMetadata(V, BinOp);
4799 case Instruction::Select: {
4801 // If the selector is loop invariant we can create a select
4802 // instruction with a scalar condition. Otherwise, use vector-select.
4803 auto *SE = PSE.getSE();
4804 bool InvariantCond =
4805 SE->isLoopInvariant(PSE.getSCEV(I.getOperand(0)), OrigLoop);
4806 setDebugLocFromInst(Builder, &I);
4808 // The condition can be loop invariant but still defined inside the
4809 // loop. This means that we can't just use the original 'cond' value.
4810 // We have to take the 'vectorized' value and pick the first lane.
4811 // Instcombine will make this a no-op.
4813 auto *ScalarCond = getOrCreateScalarValue(I.getOperand(0), {0, 0});
4815 for (unsigned Part = 0; Part < UF; ++Part) {
4816 Value *Cond = getOrCreateVectorValue(I.getOperand(0), Part);
4817 Value *Op0 = getOrCreateVectorValue(I.getOperand(1), Part);
4818 Value *Op1 = getOrCreateVectorValue(I.getOperand(2), Part);
4820 Builder.CreateSelect(InvariantCond ? ScalarCond : Cond, Op0, Op1);
4821 VectorLoopValueMap.setVectorValue(&I, Part, Sel);
4822 addMetadata(Sel, &I);
4828 case Instruction::ICmp:
4829 case Instruction::FCmp: {
4830 // Widen compares. Generate vector compares.
4831 bool FCmp = (I.getOpcode() == Instruction::FCmp);
4832 auto *Cmp = dyn_cast<CmpInst>(&I);
4833 setDebugLocFromInst(Builder, Cmp);
4834 for (unsigned Part = 0; Part < UF; ++Part) {
4835 Value *A = getOrCreateVectorValue(Cmp->getOperand(0), Part);
4836 Value *B = getOrCreateVectorValue(Cmp->getOperand(1), Part);
4839 // Propagate fast math flags.
4840 IRBuilder<>::FastMathFlagGuard FMFG(Builder);
4841 Builder.setFastMathFlags(Cmp->getFastMathFlags());
4842 C = Builder.CreateFCmp(Cmp->getPredicate(), A, B);
4844 C = Builder.CreateICmp(Cmp->getPredicate(), A, B);
4846 VectorLoopValueMap.setVectorValue(&I, Part, C);
4853 case Instruction::ZExt:
4854 case Instruction::SExt:
4855 case Instruction::FPToUI:
4856 case Instruction::FPToSI:
4857 case Instruction::FPExt:
4858 case Instruction::PtrToInt:
4859 case Instruction::IntToPtr:
4860 case Instruction::SIToFP:
4861 case Instruction::UIToFP:
4862 case Instruction::Trunc:
4863 case Instruction::FPTrunc:
4864 case Instruction::BitCast: {
4865 auto *CI = dyn_cast<CastInst>(&I);
4866 setDebugLocFromInst(Builder, CI);
4868 /// Vectorize casts.
4870 (VF == 1) ? CI->getType() : VectorType::get(CI->getType(), VF);
4872 for (unsigned Part = 0; Part < UF; ++Part) {
4873 Value *A = getOrCreateVectorValue(CI->getOperand(0), Part);
4874 Value *Cast = Builder.CreateCast(CI->getOpcode(), A, DestTy);
4875 VectorLoopValueMap.setVectorValue(&I, Part, Cast);
4876 addMetadata(Cast, &I);
4881 case Instruction::Call: {
4882 // Ignore dbg intrinsics.
4883 if (isa<DbgInfoIntrinsic>(I))
4885 setDebugLocFromInst(Builder, &I);
4887 Module *M = I.getParent()->getParent()->getParent();
4888 auto *CI = cast<CallInst>(&I);
4890 StringRef FnName = CI->getCalledFunction()->getName();
4891 Function *F = CI->getCalledFunction();
4892 Type *RetTy = ToVectorTy(CI->getType(), VF);
4893 SmallVector<Type *, 4> Tys;
4894 for (Value *ArgOperand : CI->arg_operands())
4895 Tys.push_back(ToVectorTy(ArgOperand->getType(), VF));
4897 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
4899 // The flag shows whether we use Intrinsic or a usual Call for vectorized
4900 // version of the instruction.
4901 // Is it beneficial to perform intrinsic call compared to lib call?
4902 bool NeedToScalarize;
4903 unsigned CallCost = getVectorCallCost(CI, VF, *TTI, TLI, NeedToScalarize);
4904 bool UseVectorIntrinsic =
4905 ID && getVectorIntrinsicCost(CI, VF, *TTI, TLI) <= CallCost;
4906 assert((UseVectorIntrinsic || !NeedToScalarize) &&
4907 "Instruction should be scalarized elsewhere.");
4909 for (unsigned Part = 0; Part < UF; ++Part) {
4910 SmallVector<Value *, 4> Args;
4911 for (unsigned i = 0, ie = CI->getNumArgOperands(); i != ie; ++i) {
4912 Value *Arg = CI->getArgOperand(i);
4913 // Some intrinsics have a scalar argument - don't replace it with a
4915 if (!UseVectorIntrinsic || !hasVectorInstrinsicScalarOpd(ID, i))
4916 Arg = getOrCreateVectorValue(CI->getArgOperand(i), Part);
4917 Args.push_back(Arg);
4921 if (UseVectorIntrinsic) {
4922 // Use vector version of the intrinsic.
4923 Type *TysForDecl[] = {CI->getType()};
4925 TysForDecl[0] = VectorType::get(CI->getType()->getScalarType(), VF);
4926 VectorF = Intrinsic::getDeclaration(M, ID, TysForDecl);
4928 // Use vector version of the library call.
4929 StringRef VFnName = TLI->getVectorizedFunction(FnName, VF);
4930 assert(!VFnName.empty() && "Vector function name is empty.");
4931 VectorF = M->getFunction(VFnName);
4933 // Generate a declaration
4934 FunctionType *FTy = FunctionType::get(RetTy, Tys, false);
4936 Function::Create(FTy, Function::ExternalLinkage, VFnName, M);
4937 VectorF->copyAttributesFrom(F);
4940 assert(VectorF && "Can't create vector function.");
4942 SmallVector<OperandBundleDef, 1> OpBundles;
4943 CI->getOperandBundlesAsDefs(OpBundles);
4944 CallInst *V = Builder.CreateCall(VectorF, Args, OpBundles);
4946 if (isa<FPMathOperator>(V))
4947 V->copyFastMathFlags(CI);
4949 VectorLoopValueMap.setVectorValue(&I, Part, V);
4957 // This instruction is not vectorized by simple widening.
4958 DEBUG(dbgs() << "LV: Found an unhandled instruction: " << I);
4959 llvm_unreachable("Unhandled instruction!");
4963 void InnerLoopVectorizer::updateAnalysis() {
4964 // Forget the original basic block.
4965 PSE.getSE()->forgetLoop(OrigLoop);
4967 // Update the dominator tree information.
4968 assert(DT->properlyDominates(LoopBypassBlocks.front(), LoopExitBlock) &&
4969 "Entry does not dominate exit.");
4971 DT->addNewBlock(LoopMiddleBlock,
4972 LI->getLoopFor(LoopVectorBody)->getLoopLatch());
4973 DT->addNewBlock(LoopScalarPreHeader, LoopBypassBlocks[0]);
4974 DT->changeImmediateDominator(LoopScalarBody, LoopScalarPreHeader);
4975 DT->changeImmediateDominator(LoopExitBlock, LoopBypassBlocks[0]);
4976 DEBUG(DT->verifyDomTree());
4979 /// \brief Check whether it is safe to if-convert this phi node.
4981 /// Phi nodes with constant expressions that can trap are not safe to if
4983 static bool canIfConvertPHINodes(BasicBlock *BB) {
4984 for (PHINode &Phi : BB->phis()) {
4985 for (Value *V : Phi.incoming_values())
4986 if (auto *C = dyn_cast<Constant>(V))
4993 bool LoopVectorizationLegality::canVectorizeWithIfConvert() {
4994 if (!EnableIfConversion) {
4995 ORE->emit(createMissedAnalysis("IfConversionDisabled")
4996 << "if-conversion is disabled");
5000 assert(TheLoop->getNumBlocks() > 1 && "Single block loops are vectorizable");
5002 // A list of pointers that we can safely read and write to.
5003 SmallPtrSet<Value *, 8> SafePointes;
5005 // Collect safe addresses.
5006 for (BasicBlock *BB : TheLoop->blocks()) {
5007 if (blockNeedsPredication(BB))
5010 for (Instruction &I : *BB)
5011 if (auto *Ptr = getPointerOperand(&I))
5012 SafePointes.insert(Ptr);
5015 // Collect the blocks that need predication.
5016 BasicBlock *Header = TheLoop->getHeader();
5017 for (BasicBlock *BB : TheLoop->blocks()) {
5018 // We don't support switch statements inside loops.
5019 if (!isa<BranchInst>(BB->getTerminator())) {
5020 ORE->emit(createMissedAnalysis("LoopContainsSwitch", BB->getTerminator())
5021 << "loop contains a switch statement");
5025 // We must be able to predicate all blocks that need to be predicated.
5026 if (blockNeedsPredication(BB)) {
5027 if (!blockCanBePredicated(BB, SafePointes)) {
5028 ORE->emit(createMissedAnalysis("NoCFGForSelect", BB->getTerminator())
5029 << "control flow cannot be substituted for a select");
5032 } else if (BB != Header && !canIfConvertPHINodes(BB)) {
5033 ORE->emit(createMissedAnalysis("NoCFGForSelect", BB->getTerminator())
5034 << "control flow cannot be substituted for a select");
5039 // We can if-convert this loop.
5043 bool LoopVectorizationLegality::canVectorize() {
5044 // Store the result and return it at the end instead of exiting early, in case
5045 // allowExtraAnalysis is used to report multiple reasons for not vectorizing.
5048 bool DoExtraAnalysis = ORE->allowExtraAnalysis(DEBUG_TYPE);
5049 // We must have a loop in canonical form. Loops with indirectbr in them cannot
5050 // be canonicalized.
5051 if (!TheLoop->getLoopPreheader()) {
5052 DEBUG(dbgs() << "LV: Loop doesn't have a legal pre-header.\n");
5053 ORE->emit(createMissedAnalysis("CFGNotUnderstood")
5054 << "loop control flow is not understood by vectorizer");
5055 if (DoExtraAnalysis)
5061 // FIXME: The code is currently dead, since the loop gets sent to
5062 // LoopVectorizationLegality is already an innermost loop.
5064 // We can only vectorize innermost loops.
5065 if (!TheLoop->empty()) {
5066 ORE->emit(createMissedAnalysis("NotInnermostLoop")
5067 << "loop is not the innermost loop");
5068 if (DoExtraAnalysis)
5074 // We must have a single backedge.
5075 if (TheLoop->getNumBackEdges() != 1) {
5076 ORE->emit(createMissedAnalysis("CFGNotUnderstood")
5077 << "loop control flow is not understood by vectorizer");
5078 if (DoExtraAnalysis)
5084 // We must have a single exiting block.
5085 if (!TheLoop->getExitingBlock()) {
5086 ORE->emit(createMissedAnalysis("CFGNotUnderstood")
5087 << "loop control flow is not understood by vectorizer");
5088 if (DoExtraAnalysis)
5094 // We only handle bottom-tested loops, i.e. loop in which the condition is
5095 // checked at the end of each iteration. With that we can assume that all
5096 // instructions in the loop are executed the same number of times.
5097 if (TheLoop->getExitingBlock() != TheLoop->getLoopLatch()) {
5098 ORE->emit(createMissedAnalysis("CFGNotUnderstood")
5099 << "loop control flow is not understood by vectorizer");
5100 if (DoExtraAnalysis)
5106 // We need to have a loop header.
5107 DEBUG(dbgs() << "LV: Found a loop: " << TheLoop->getHeader()->getName()
5110 // Check if we can if-convert non-single-bb loops.
5111 unsigned NumBlocks = TheLoop->getNumBlocks();
5112 if (NumBlocks != 1 && !canVectorizeWithIfConvert()) {
5113 DEBUG(dbgs() << "LV: Can't if-convert the loop.\n");
5114 if (DoExtraAnalysis)
5120 // Check if we can vectorize the instructions and CFG in this loop.
5121 if (!canVectorizeInstrs()) {
5122 DEBUG(dbgs() << "LV: Can't vectorize the instructions or CFG\n");
5123 if (DoExtraAnalysis)
5129 // Go over each instruction and look at memory deps.
5130 if (!canVectorizeMemory()) {
5131 DEBUG(dbgs() << "LV: Can't vectorize due to memory conflicts\n");
5132 if (DoExtraAnalysis)
5138 DEBUG(dbgs() << "LV: We can vectorize this loop"
5139 << (LAI->getRuntimePointerChecking()->Need
5140 ? " (with a runtime bound check)"
5144 bool UseInterleaved = TTI->enableInterleavedAccessVectorization();
5146 // If an override option has been passed in for interleaved accesses, use it.
5147 if (EnableInterleavedMemAccesses.getNumOccurrences() > 0)
5148 UseInterleaved = EnableInterleavedMemAccesses;
5150 // Analyze interleaved memory accesses.
5152 InterleaveInfo.analyzeInterleaving(*getSymbolicStrides());
5154 unsigned SCEVThreshold = VectorizeSCEVCheckThreshold;
5155 if (Hints->getForce() == LoopVectorizeHints::FK_Enabled)
5156 SCEVThreshold = PragmaVectorizeSCEVCheckThreshold;
5158 if (PSE.getUnionPredicate().getComplexity() > SCEVThreshold) {
5159 ORE->emit(createMissedAnalysis("TooManySCEVRunTimeChecks")
5160 << "Too many SCEV assumptions need to be made and checked "
5162 DEBUG(dbgs() << "LV: Too many SCEV checks needed.\n");
5163 if (DoExtraAnalysis)
5169 // Okay! We've done all the tests. If any have failed, return false. Otherwise
5170 // we can vectorize, and at this point we don't have any other mem analysis
5171 // which may limit our maximum vectorization factor, so just return true with
5176 static Type *convertPointerToIntegerType(const DataLayout &DL, Type *Ty) {
5177 if (Ty->isPointerTy())
5178 return DL.getIntPtrType(Ty);
5180 // It is possible that char's or short's overflow when we ask for the loop's
5181 // trip count, work around this by changing the type size.
5182 if (Ty->getScalarSizeInBits() < 32)
5183 return Type::getInt32Ty(Ty->getContext());
5188 static Type *getWiderType(const DataLayout &DL, Type *Ty0, Type *Ty1) {
5189 Ty0 = convertPointerToIntegerType(DL, Ty0);
5190 Ty1 = convertPointerToIntegerType(DL, Ty1);
5191 if (Ty0->getScalarSizeInBits() > Ty1->getScalarSizeInBits())
5196 /// \brief Check that the instruction has outside loop users and is not an
5197 /// identified reduction variable.
5198 static bool hasOutsideLoopUser(const Loop *TheLoop, Instruction *Inst,
5199 SmallPtrSetImpl<Value *> &AllowedExit) {
5200 // Reduction and Induction instructions are allowed to have exit users. All
5201 // other instructions must not have external users.
5202 if (!AllowedExit.count(Inst))
5203 // Check that all of the users of the loop are inside the BB.
5204 for (User *U : Inst->users()) {
5205 Instruction *UI = cast<Instruction>(U);
5206 // This user may be a reduction exit value.
5207 if (!TheLoop->contains(UI)) {
5208 DEBUG(dbgs() << "LV: Found an outside user for : " << *UI << '\n');
5215 void LoopVectorizationLegality::addInductionPhi(
5216 PHINode *Phi, const InductionDescriptor &ID,
5217 SmallPtrSetImpl<Value *> &AllowedExit) {
5218 Inductions[Phi] = ID;
5220 // In case this induction also comes with casts that we know we can ignore
5221 // in the vectorized loop body, record them here. All casts could be recorded
5222 // here for ignoring, but suffices to record only the first (as it is the
5223 // only one that may bw used outside the cast sequence).
5224 const SmallVectorImpl<Instruction *> &Casts = ID.getCastInsts();
5226 InductionCastsToIgnore.insert(*Casts.begin());
5228 Type *PhiTy = Phi->getType();
5229 const DataLayout &DL = Phi->getModule()->getDataLayout();
5231 // Get the widest type.
5232 if (!PhiTy->isFloatingPointTy()) {
5234 WidestIndTy = convertPointerToIntegerType(DL, PhiTy);
5236 WidestIndTy = getWiderType(DL, PhiTy, WidestIndTy);
5239 // Int inductions are special because we only allow one IV.
5240 if (ID.getKind() == InductionDescriptor::IK_IntInduction &&
5241 ID.getConstIntStepValue() &&
5242 ID.getConstIntStepValue()->isOne() &&
5243 isa<Constant>(ID.getStartValue()) &&
5244 cast<Constant>(ID.getStartValue())->isNullValue()) {
5246 // Use the phi node with the widest type as induction. Use the last
5247 // one if there are multiple (no good reason for doing this other
5248 // than it is expedient). We've checked that it begins at zero and
5249 // steps by one, so this is a canonical induction variable.
5250 if (!PrimaryInduction || PhiTy == WidestIndTy)
5251 PrimaryInduction = Phi;
5254 // Both the PHI node itself, and the "post-increment" value feeding
5255 // back into the PHI node may have external users.
5256 // We can allow those uses, except if the SCEVs we have for them rely
5257 // on predicates that only hold within the loop, since allowing the exit
5258 // currently means re-using this SCEV outside the loop.
5259 if (PSE.getUnionPredicate().isAlwaysTrue()) {
5260 AllowedExit.insert(Phi);
5261 AllowedExit.insert(Phi->getIncomingValueForBlock(TheLoop->getLoopLatch()));
5264 DEBUG(dbgs() << "LV: Found an induction variable.\n");
5267 bool LoopVectorizationLegality::canVectorizeInstrs() {
5268 BasicBlock *Header = TheLoop->getHeader();
5270 // Look for the attribute signaling the absence of NaNs.
5271 Function &F = *Header->getParent();
5273 F.getFnAttribute("no-nans-fp-math").getValueAsString() == "true";
5275 // For each block in the loop.
5276 for (BasicBlock *BB : TheLoop->blocks()) {
5277 // Scan the instructions in the block and look for hazards.
5278 for (Instruction &I : *BB) {
5279 if (auto *Phi = dyn_cast<PHINode>(&I)) {
5280 Type *PhiTy = Phi->getType();
5281 // Check that this PHI type is allowed.
5282 if (!PhiTy->isIntegerTy() && !PhiTy->isFloatingPointTy() &&
5283 !PhiTy->isPointerTy()) {
5284 ORE->emit(createMissedAnalysis("CFGNotUnderstood", Phi)
5285 << "loop control flow is not understood by vectorizer");
5286 DEBUG(dbgs() << "LV: Found an non-int non-pointer PHI.\n");
5290 // If this PHINode is not in the header block, then we know that we
5291 // can convert it to select during if-conversion. No need to check if
5292 // the PHIs in this block are induction or reduction variables.
5294 // Check that this instruction has no outside users or is an
5295 // identified reduction value with an outside user.
5296 if (!hasOutsideLoopUser(TheLoop, Phi, AllowedExit))
5298 ORE->emit(createMissedAnalysis("NeitherInductionNorReduction", Phi)
5299 << "value could not be identified as "
5300 "an induction or reduction variable");
5304 // We only allow if-converted PHIs with exactly two incoming values.
5305 if (Phi->getNumIncomingValues() != 2) {
5306 ORE->emit(createMissedAnalysis("CFGNotUnderstood", Phi)
5307 << "control flow not understood by vectorizer");
5308 DEBUG(dbgs() << "LV: Found an invalid PHI.\n");
5312 RecurrenceDescriptor RedDes;
5313 if (RecurrenceDescriptor::isReductionPHI(Phi, TheLoop, RedDes, DB, AC,
5315 if (RedDes.hasUnsafeAlgebra())
5316 Requirements->addUnsafeAlgebraInst(RedDes.getUnsafeAlgebraInst());
5317 AllowedExit.insert(RedDes.getLoopExitInstr());
5318 Reductions[Phi] = RedDes;
5322 InductionDescriptor ID;
5323 if (InductionDescriptor::isInductionPHI(Phi, TheLoop, PSE, ID)) {
5324 addInductionPhi(Phi, ID, AllowedExit);
5325 if (ID.hasUnsafeAlgebra() && !HasFunNoNaNAttr)
5326 Requirements->addUnsafeAlgebraInst(ID.getUnsafeAlgebraInst());
5330 if (RecurrenceDescriptor::isFirstOrderRecurrence(Phi, TheLoop,
5332 FirstOrderRecurrences.insert(Phi);
5336 // As a last resort, coerce the PHI to a AddRec expression
5337 // and re-try classifying it a an induction PHI.
5338 if (InductionDescriptor::isInductionPHI(Phi, TheLoop, PSE, ID, true)) {
5339 addInductionPhi(Phi, ID, AllowedExit);
5343 ORE->emit(createMissedAnalysis("NonReductionValueUsedOutsideLoop", Phi)
5344 << "value that could not be identified as "
5345 "reduction is used outside the loop");
5346 DEBUG(dbgs() << "LV: Found an unidentified PHI." << *Phi << "\n");
5348 } // end of PHI handling
5350 // We handle calls that:
5351 // * Are debug info intrinsics.
5352 // * Have a mapping to an IR intrinsic.
5353 // * Have a vector version available.
5354 auto *CI = dyn_cast<CallInst>(&I);
5355 if (CI && !getVectorIntrinsicIDForCall(CI, TLI) &&
5356 !isa<DbgInfoIntrinsic>(CI) &&
5357 !(CI->getCalledFunction() && TLI &&
5358 TLI->isFunctionVectorizable(CI->getCalledFunction()->getName()))) {
5359 ORE->emit(createMissedAnalysis("CantVectorizeCall", CI)
5360 << "call instruction cannot be vectorized");
5361 DEBUG(dbgs() << "LV: Found a non-intrinsic, non-libfunc callsite.\n");
5365 // Intrinsics such as powi,cttz and ctlz are legal to vectorize if the
5366 // second argument is the same (i.e. loop invariant)
5367 if (CI && hasVectorInstrinsicScalarOpd(
5368 getVectorIntrinsicIDForCall(CI, TLI), 1)) {
5369 auto *SE = PSE.getSE();
5370 if (!SE->isLoopInvariant(PSE.getSCEV(CI->getOperand(1)), TheLoop)) {
5371 ORE->emit(createMissedAnalysis("CantVectorizeIntrinsic", CI)
5372 << "intrinsic instruction cannot be vectorized");
5373 DEBUG(dbgs() << "LV: Found unvectorizable intrinsic " << *CI << "\n");
5378 // Check that the instruction return type is vectorizable.
5379 // Also, we can't vectorize extractelement instructions.
5380 if ((!VectorType::isValidElementType(I.getType()) &&
5381 !I.getType()->isVoidTy()) ||
5382 isa<ExtractElementInst>(I)) {
5383 ORE->emit(createMissedAnalysis("CantVectorizeInstructionReturnType", &I)
5384 << "instruction return type cannot be vectorized");
5385 DEBUG(dbgs() << "LV: Found unvectorizable type.\n");
5389 // Check that the stored type is vectorizable.
5390 if (auto *ST = dyn_cast<StoreInst>(&I)) {
5391 Type *T = ST->getValueOperand()->getType();
5392 if (!VectorType::isValidElementType(T)) {
5393 ORE->emit(createMissedAnalysis("CantVectorizeStore", ST)
5394 << "store instruction cannot be vectorized");
5398 // FP instructions can allow unsafe algebra, thus vectorizable by
5399 // non-IEEE-754 compliant SIMD units.
5400 // This applies to floating-point math operations and calls, not memory
5401 // operations, shuffles, or casts, as they don't change precision or
5403 } else if (I.getType()->isFloatingPointTy() && (CI || I.isBinaryOp()) &&
5405 DEBUG(dbgs() << "LV: Found FP op with unsafe algebra.\n");
5406 Hints->setPotentiallyUnsafe();
5409 // Reduction instructions are allowed to have exit users.
5410 // All other instructions must not have external users.
5411 if (hasOutsideLoopUser(TheLoop, &I, AllowedExit)) {
5412 ORE->emit(createMissedAnalysis("ValueUsedOutsideLoop", &I)
5413 << "value cannot be used outside the loop");
5419 if (!PrimaryInduction) {
5420 DEBUG(dbgs() << "LV: Did not find one integer induction var.\n");
5421 if (Inductions.empty()) {
5422 ORE->emit(createMissedAnalysis("NoInductionVariable")
5423 << "loop induction variable could not be identified");
5428 // Now we know the widest induction type, check if our found induction
5429 // is the same size. If it's not, unset it here and InnerLoopVectorizer
5430 // will create another.
5431 if (PrimaryInduction && WidestIndTy != PrimaryInduction->getType())
5432 PrimaryInduction = nullptr;
5437 void LoopVectorizationCostModel::collectLoopScalars(unsigned VF) {
5438 // We should not collect Scalars more than once per VF. Right now, this
5439 // function is called from collectUniformsAndScalars(), which already does
5440 // this check. Collecting Scalars for VF=1 does not make any sense.
5441 assert(VF >= 2 && !Scalars.count(VF) &&
5442 "This function should not be visited twice for the same VF");
5444 SmallSetVector<Instruction *, 8> Worklist;
5446 // These sets are used to seed the analysis with pointers used by memory
5447 // accesses that will remain scalar.
5448 SmallSetVector<Instruction *, 8> ScalarPtrs;
5449 SmallPtrSet<Instruction *, 8> PossibleNonScalarPtrs;
5451 // A helper that returns true if the use of Ptr by MemAccess will be scalar.
5452 // The pointer operands of loads and stores will be scalar as long as the
5453 // memory access is not a gather or scatter operation. The value operand of a
5454 // store will remain scalar if the store is scalarized.
5455 auto isScalarUse = [&](Instruction *MemAccess, Value *Ptr) {
5456 InstWidening WideningDecision = getWideningDecision(MemAccess, VF);
5457 assert(WideningDecision != CM_Unknown &&
5458 "Widening decision should be ready at this moment");
5459 if (auto *Store = dyn_cast<StoreInst>(MemAccess))
5460 if (Ptr == Store->getValueOperand())
5461 return WideningDecision == CM_Scalarize;
5462 assert(Ptr == getPointerOperand(MemAccess) &&
5463 "Ptr is neither a value or pointer operand");
5464 return WideningDecision != CM_GatherScatter;
5467 // A helper that returns true if the given value is a bitcast or
5468 // getelementptr instruction contained in the loop.
5469 auto isLoopVaryingBitCastOrGEP = [&](Value *V) {
5470 return ((isa<BitCastInst>(V) && V->getType()->isPointerTy()) ||
5471 isa<GetElementPtrInst>(V)) &&
5472 !TheLoop->isLoopInvariant(V);
5475 // A helper that evaluates a memory access's use of a pointer. If the use
5476 // will be a scalar use, and the pointer is only used by memory accesses, we
5477 // place the pointer in ScalarPtrs. Otherwise, the pointer is placed in
5478 // PossibleNonScalarPtrs.
5479 auto evaluatePtrUse = [&](Instruction *MemAccess, Value *Ptr) {
5480 // We only care about bitcast and getelementptr instructions contained in
5482 if (!isLoopVaryingBitCastOrGEP(Ptr))
5485 // If the pointer has already been identified as scalar (e.g., if it was
5486 // also identified as uniform), there's nothing to do.
5487 auto *I = cast<Instruction>(Ptr);
5488 if (Worklist.count(I))
5491 // If the use of the pointer will be a scalar use, and all users of the
5492 // pointer are memory accesses, place the pointer in ScalarPtrs. Otherwise,
5493 // place the pointer in PossibleNonScalarPtrs.
5494 if (isScalarUse(MemAccess, Ptr) && llvm::all_of(I->users(), [&](User *U) {
5495 return isa<LoadInst>(U) || isa<StoreInst>(U);
5497 ScalarPtrs.insert(I);
5499 PossibleNonScalarPtrs.insert(I);
5502 // We seed the scalars analysis with three classes of instructions: (1)
5503 // instructions marked uniform-after-vectorization, (2) bitcast and
5504 // getelementptr instructions used by memory accesses requiring a scalar use,
5505 // and (3) pointer induction variables and their update instructions (we
5506 // currently only scalarize these).
5508 // (1) Add to the worklist all instructions that have been identified as
5509 // uniform-after-vectorization.
5510 Worklist.insert(Uniforms[VF].begin(), Uniforms[VF].end());
5512 // (2) Add to the worklist all bitcast and getelementptr instructions used by
5513 // memory accesses requiring a scalar use. The pointer operands of loads and
5514 // stores will be scalar as long as the memory accesses is not a gather or
5515 // scatter operation. The value operand of a store will remain scalar if the
5516 // store is scalarized.
5517 for (auto *BB : TheLoop->blocks())
5518 for (auto &I : *BB) {
5519 if (auto *Load = dyn_cast<LoadInst>(&I)) {
5520 evaluatePtrUse(Load, Load->getPointerOperand());
5521 } else if (auto *Store = dyn_cast<StoreInst>(&I)) {
5522 evaluatePtrUse(Store, Store->getPointerOperand());
5523 evaluatePtrUse(Store, Store->getValueOperand());
5526 for (auto *I : ScalarPtrs)
5527 if (!PossibleNonScalarPtrs.count(I)) {
5528 DEBUG(dbgs() << "LV: Found scalar instruction: " << *I << "\n");
5532 // (3) Add to the worklist all pointer induction variables and their update
5535 // TODO: Once we are able to vectorize pointer induction variables we should
5536 // no longer insert them into the worklist here.
5537 auto *Latch = TheLoop->getLoopLatch();
5538 for (auto &Induction : *Legal->getInductionVars()) {
5539 auto *Ind = Induction.first;
5540 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
5541 if (Induction.second.getKind() != InductionDescriptor::IK_PtrInduction)
5543 Worklist.insert(Ind);
5544 Worklist.insert(IndUpdate);
5545 DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
5546 DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate << "\n");
5549 // Insert the forced scalars.
5550 // FIXME: Currently widenPHIInstruction() often creates a dead vector
5551 // induction variable when the PHI user is scalarized.
5552 if (ForcedScalars.count(VF))
5553 for (auto *I : ForcedScalars.find(VF)->second)
5556 // Expand the worklist by looking through any bitcasts and getelementptr
5557 // instructions we've already identified as scalar. This is similar to the
5558 // expansion step in collectLoopUniforms(); however, here we're only
5559 // expanding to include additional bitcasts and getelementptr instructions.
5561 while (Idx != Worklist.size()) {
5562 Instruction *Dst = Worklist[Idx++];
5563 if (!isLoopVaryingBitCastOrGEP(Dst->getOperand(0)))
5565 auto *Src = cast<Instruction>(Dst->getOperand(0));
5566 if (llvm::all_of(Src->users(), [&](User *U) -> bool {
5567 auto *J = cast<Instruction>(U);
5568 return !TheLoop->contains(J) || Worklist.count(J) ||
5569 ((isa<LoadInst>(J) || isa<StoreInst>(J)) &&
5570 isScalarUse(J, Src));
5572 Worklist.insert(Src);
5573 DEBUG(dbgs() << "LV: Found scalar instruction: " << *Src << "\n");
5577 // An induction variable will remain scalar if all users of the induction
5578 // variable and induction variable update remain scalar.
5579 for (auto &Induction : *Legal->getInductionVars()) {
5580 auto *Ind = Induction.first;
5581 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
5583 // We already considered pointer induction variables, so there's no reason
5584 // to look at their users again.
5586 // TODO: Once we are able to vectorize pointer induction variables we
5587 // should no longer skip over them here.
5588 if (Induction.second.getKind() == InductionDescriptor::IK_PtrInduction)
5591 // Determine if all users of the induction variable are scalar after
5593 auto ScalarInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
5594 auto *I = cast<Instruction>(U);
5595 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I);
5600 // Determine if all users of the induction variable update instruction are
5601 // scalar after vectorization.
5602 auto ScalarIndUpdate =
5603 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
5604 auto *I = cast<Instruction>(U);
5605 return I == Ind || !TheLoop->contains(I) || Worklist.count(I);
5607 if (!ScalarIndUpdate)
5610 // The induction variable and its update instruction will remain scalar.
5611 Worklist.insert(Ind);
5612 Worklist.insert(IndUpdate);
5613 DEBUG(dbgs() << "LV: Found scalar instruction: " << *Ind << "\n");
5614 DEBUG(dbgs() << "LV: Found scalar instruction: " << *IndUpdate << "\n");
5617 Scalars[VF].insert(Worklist.begin(), Worklist.end());
5620 bool LoopVectorizationLegality::isScalarWithPredication(Instruction *I) {
5621 if (!blockNeedsPredication(I->getParent()))
5623 switch(I->getOpcode()) {
5626 case Instruction::Store:
5627 return !isMaskRequired(I);
5628 case Instruction::UDiv:
5629 case Instruction::SDiv:
5630 case Instruction::SRem:
5631 case Instruction::URem:
5632 return mayDivideByZero(*I);
5637 bool LoopVectorizationLegality::memoryInstructionCanBeWidened(Instruction *I,
5639 // Get and ensure we have a valid memory instruction.
5640 LoadInst *LI = dyn_cast<LoadInst>(I);
5641 StoreInst *SI = dyn_cast<StoreInst>(I);
5642 assert((LI || SI) && "Invalid memory instruction");
5644 auto *Ptr = getPointerOperand(I);
5646 // In order to be widened, the pointer should be consecutive, first of all.
5647 if (!isConsecutivePtr(Ptr))
5650 // If the instruction is a store located in a predicated block, it will be
5652 if (isScalarWithPredication(I))
5655 // If the instruction's allocated size doesn't equal it's type size, it
5656 // requires padding and will be scalarized.
5657 auto &DL = I->getModule()->getDataLayout();
5658 auto *ScalarTy = LI ? LI->getType() : SI->getValueOperand()->getType();
5659 if (hasIrregularType(ScalarTy, DL, VF))
5665 void LoopVectorizationCostModel::collectLoopUniforms(unsigned VF) {
5666 // We should not collect Uniforms more than once per VF. Right now,
5667 // this function is called from collectUniformsAndScalars(), which
5668 // already does this check. Collecting Uniforms for VF=1 does not make any
5671 assert(VF >= 2 && !Uniforms.count(VF) &&
5672 "This function should not be visited twice for the same VF");
5674 // Visit the list of Uniforms. If we'll not find any uniform value, we'll
5675 // not analyze again. Uniforms.count(VF) will return 1.
5676 Uniforms[VF].clear();
5678 // We now know that the loop is vectorizable!
5679 // Collect instructions inside the loop that will remain uniform after
5682 // Global values, params and instructions outside of current loop are out of
5684 auto isOutOfScope = [&](Value *V) -> bool {
5685 Instruction *I = dyn_cast<Instruction>(V);
5686 return (!I || !TheLoop->contains(I));
5689 SetVector<Instruction *> Worklist;
5690 BasicBlock *Latch = TheLoop->getLoopLatch();
5692 // Start with the conditional branch. If the branch condition is an
5693 // instruction contained in the loop that is only used by the branch, it is
5695 auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0));
5696 if (Cmp && TheLoop->contains(Cmp) && Cmp->hasOneUse()) {
5697 Worklist.insert(Cmp);
5698 DEBUG(dbgs() << "LV: Found uniform instruction: " << *Cmp << "\n");
5701 // Holds consecutive and consecutive-like pointers. Consecutive-like pointers
5702 // are pointers that are treated like consecutive pointers during
5703 // vectorization. The pointer operands of interleaved accesses are an
5705 SmallSetVector<Instruction *, 8> ConsecutiveLikePtrs;
5707 // Holds pointer operands of instructions that are possibly non-uniform.
5708 SmallPtrSet<Instruction *, 8> PossibleNonUniformPtrs;
5710 auto isUniformDecision = [&](Instruction *I, unsigned VF) {
5711 InstWidening WideningDecision = getWideningDecision(I, VF);
5712 assert(WideningDecision != CM_Unknown &&
5713 "Widening decision should be ready at this moment");
5715 return (WideningDecision == CM_Widen ||
5716 WideningDecision == CM_Widen_Reverse ||
5717 WideningDecision == CM_Interleave);
5719 // Iterate over the instructions in the loop, and collect all
5720 // consecutive-like pointer operands in ConsecutiveLikePtrs. If it's possible
5721 // that a consecutive-like pointer operand will be scalarized, we collect it
5722 // in PossibleNonUniformPtrs instead. We use two sets here because a single
5723 // getelementptr instruction can be used by both vectorized and scalarized
5724 // memory instructions. For example, if a loop loads and stores from the same
5725 // location, but the store is conditional, the store will be scalarized, and
5726 // the getelementptr won't remain uniform.
5727 for (auto *BB : TheLoop->blocks())
5728 for (auto &I : *BB) {
5729 // If there's no pointer operand, there's nothing to do.
5730 auto *Ptr = dyn_cast_or_null<Instruction>(getPointerOperand(&I));
5734 // True if all users of Ptr are memory accesses that have Ptr as their
5736 auto UsersAreMemAccesses =
5737 llvm::all_of(Ptr->users(), [&](User *U) -> bool {
5738 return getPointerOperand(U) == Ptr;
5741 // Ensure the memory instruction will not be scalarized or used by
5742 // gather/scatter, making its pointer operand non-uniform. If the pointer
5743 // operand is used by any instruction other than a memory access, we
5744 // conservatively assume the pointer operand may be non-uniform.
5745 if (!UsersAreMemAccesses || !isUniformDecision(&I, VF))
5746 PossibleNonUniformPtrs.insert(Ptr);
5748 // If the memory instruction will be vectorized and its pointer operand
5749 // is consecutive-like, or interleaving - the pointer operand should
5752 ConsecutiveLikePtrs.insert(Ptr);
5755 // Add to the Worklist all consecutive and consecutive-like pointers that
5756 // aren't also identified as possibly non-uniform.
5757 for (auto *V : ConsecutiveLikePtrs)
5758 if (!PossibleNonUniformPtrs.count(V)) {
5759 DEBUG(dbgs() << "LV: Found uniform instruction: " << *V << "\n");
5763 // Expand Worklist in topological order: whenever a new instruction
5764 // is added , its users should be either already inside Worklist, or
5765 // out of scope. It ensures a uniform instruction will only be used
5766 // by uniform instructions or out of scope instructions.
5768 while (idx != Worklist.size()) {
5769 Instruction *I = Worklist[idx++];
5771 for (auto OV : I->operand_values()) {
5772 if (isOutOfScope(OV))
5774 auto *OI = cast<Instruction>(OV);
5775 if (llvm::all_of(OI->users(), [&](User *U) -> bool {
5776 auto *J = cast<Instruction>(U);
5777 return !TheLoop->contains(J) || Worklist.count(J) ||
5778 (OI == getPointerOperand(J) && isUniformDecision(J, VF));
5780 Worklist.insert(OI);
5781 DEBUG(dbgs() << "LV: Found uniform instruction: " << *OI << "\n");
5786 // Returns true if Ptr is the pointer operand of a memory access instruction
5787 // I, and I is known to not require scalarization.
5788 auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool {
5789 return getPointerOperand(I) == Ptr && isUniformDecision(I, VF);
5792 // For an instruction to be added into Worklist above, all its users inside
5793 // the loop should also be in Worklist. However, this condition cannot be
5794 // true for phi nodes that form a cyclic dependence. We must process phi
5795 // nodes separately. An induction variable will remain uniform if all users
5796 // of the induction variable and induction variable update remain uniform.
5797 // The code below handles both pointer and non-pointer induction variables.
5798 for (auto &Induction : *Legal->getInductionVars()) {
5799 auto *Ind = Induction.first;
5800 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
5802 // Determine if all users of the induction variable are uniform after
5804 auto UniformInd = llvm::all_of(Ind->users(), [&](User *U) -> bool {
5805 auto *I = cast<Instruction>(U);
5806 return I == IndUpdate || !TheLoop->contains(I) || Worklist.count(I) ||
5807 isVectorizedMemAccessUse(I, Ind);
5812 // Determine if all users of the induction variable update instruction are
5813 // uniform after vectorization.
5814 auto UniformIndUpdate =
5815 llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
5816 auto *I = cast<Instruction>(U);
5817 return I == Ind || !TheLoop->contains(I) || Worklist.count(I) ||
5818 isVectorizedMemAccessUse(I, IndUpdate);
5820 if (!UniformIndUpdate)
5823 // The induction variable and its update instruction will remain uniform.
5824 Worklist.insert(Ind);
5825 Worklist.insert(IndUpdate);
5826 DEBUG(dbgs() << "LV: Found uniform instruction: " << *Ind << "\n");
5827 DEBUG(dbgs() << "LV: Found uniform instruction: " << *IndUpdate << "\n");
5830 Uniforms[VF].insert(Worklist.begin(), Worklist.end());
5833 bool LoopVectorizationLegality::canVectorizeMemory() {
5834 LAI = &(*GetLAA)(*TheLoop);
5835 InterleaveInfo.setLAI(LAI);
5836 const OptimizationRemarkAnalysis *LAR = LAI->getReport();
5839 return OptimizationRemarkAnalysis(Hints->vectorizeAnalysisPassName(),
5840 "loop not vectorized: ", *LAR);
5843 if (!LAI->canVectorizeMemory())
5846 if (LAI->hasStoreToLoopInvariantAddress()) {
5847 ORE->emit(createMissedAnalysis("CantVectorizeStoreToLoopInvariantAddress")
5848 << "write to a loop invariant address could not be vectorized");
5849 DEBUG(dbgs() << "LV: We don't allow storing to uniform addresses\n");
5853 Requirements->addRuntimePointerChecks(LAI->getNumRuntimePointerChecks());
5854 PSE.addPredicate(LAI->getPSE().getUnionPredicate());
5859 bool LoopVectorizationLegality::isInductionPhi(const Value *V) {
5860 Value *In0 = const_cast<Value *>(V);
5861 PHINode *PN = dyn_cast_or_null<PHINode>(In0);
5865 return Inductions.count(PN);
5868 bool LoopVectorizationLegality::isCastedInductionVariable(const Value *V) {
5869 auto *Inst = dyn_cast<Instruction>(V);
5870 return (Inst && InductionCastsToIgnore.count(Inst));
5873 bool LoopVectorizationLegality::isInductionVariable(const Value *V) {
5874 return isInductionPhi(V) || isCastedInductionVariable(V);
5877 bool LoopVectorizationLegality::isFirstOrderRecurrence(const PHINode *Phi) {
5878 return FirstOrderRecurrences.count(Phi);
5881 bool LoopVectorizationLegality::blockNeedsPredication(BasicBlock *BB) {
5882 return LoopAccessInfo::blockNeedsPredication(BB, TheLoop, DT);
5885 bool LoopVectorizationLegality::blockCanBePredicated(
5886 BasicBlock *BB, SmallPtrSetImpl<Value *> &SafePtrs) {
5887 const bool IsAnnotatedParallel = TheLoop->isAnnotatedParallel();
5889 for (Instruction &I : *BB) {
5890 // Check that we don't have a constant expression that can trap as operand.
5891 for (Value *Operand : I.operands()) {
5892 if (auto *C = dyn_cast<Constant>(Operand))
5896 // We might be able to hoist the load.
5897 if (I.mayReadFromMemory()) {
5898 auto *LI = dyn_cast<LoadInst>(&I);
5901 if (!SafePtrs.count(LI->getPointerOperand())) {
5902 if (isLegalMaskedLoad(LI->getType(), LI->getPointerOperand()) ||
5903 isLegalMaskedGather(LI->getType())) {
5904 MaskedOp.insert(LI);
5907 // !llvm.mem.parallel_loop_access implies if-conversion safety.
5908 if (IsAnnotatedParallel)
5914 if (I.mayWriteToMemory()) {
5915 auto *SI = dyn_cast<StoreInst>(&I);
5916 // We only support predication of stores in basic blocks with one
5921 // Build a masked store if it is legal for the target.
5922 if (isLegalMaskedStore(SI->getValueOperand()->getType(),
5923 SI->getPointerOperand()) ||
5924 isLegalMaskedScatter(SI->getValueOperand()->getType())) {
5925 MaskedOp.insert(SI);
5929 bool isSafePtr = (SafePtrs.count(SI->getPointerOperand()) != 0);
5930 bool isSinglePredecessor = SI->getParent()->getSinglePredecessor();
5932 if (++NumPredStores > NumberOfStoresToPredicate || !isSafePtr ||
5933 !isSinglePredecessor)
5943 void InterleavedAccessInfo::collectConstStrideAccesses(
5944 MapVector<Instruction *, StrideDescriptor> &AccessStrideInfo,
5945 const ValueToValueMap &Strides) {
5946 auto &DL = TheLoop->getHeader()->getModule()->getDataLayout();
5948 // Since it's desired that the load/store instructions be maintained in
5949 // "program order" for the interleaved access analysis, we have to visit the
5950 // blocks in the loop in reverse postorder (i.e., in a topological order).
5951 // Such an ordering will ensure that any load/store that may be executed
5952 // before a second load/store will precede the second load/store in
5953 // AccessStrideInfo.
5954 LoopBlocksDFS DFS(TheLoop);
5956 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))
5957 for (auto &I : *BB) {
5958 auto *LI = dyn_cast<LoadInst>(&I);
5959 auto *SI = dyn_cast<StoreInst>(&I);
5963 Value *Ptr = getPointerOperand(&I);
5964 // We don't check wrapping here because we don't know yet if Ptr will be
5965 // part of a full group or a group with gaps. Checking wrapping for all
5966 // pointers (even those that end up in groups with no gaps) will be overly
5967 // conservative. For full groups, wrapping should be ok since if we would
5968 // wrap around the address space we would do a memory access at nullptr
5969 // even without the transformation. The wrapping checks are therefore
5970 // deferred until after we've formed the interleaved groups.
5971 int64_t Stride = getPtrStride(PSE, Ptr, TheLoop, Strides,
5972 /*Assume=*/true, /*ShouldCheckWrap=*/false);
5974 const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);
5975 PointerType *PtrTy = dyn_cast<PointerType>(Ptr->getType());
5976 uint64_t Size = DL.getTypeAllocSize(PtrTy->getElementType());
5978 // An alignment of 0 means target ABI alignment.
5979 unsigned Align = getMemInstAlignment(&I);
5981 Align = DL.getABITypeAlignment(PtrTy->getElementType());
5983 AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size, Align);
5987 // Analyze interleaved accesses and collect them into interleaved load and
5990 // When generating code for an interleaved load group, we effectively hoist all
5991 // loads in the group to the location of the first load in program order. When
5992 // generating code for an interleaved store group, we sink all stores to the
5993 // location of the last store. This code motion can change the order of load
5994 // and store instructions and may break dependences.
5996 // The code generation strategy mentioned above ensures that we won't violate
5997 // any write-after-read (WAR) dependences.
5999 // E.g., for the WAR dependence: a = A[i]; // (1)
6002 // The store group of (2) is always inserted at or below (2), and the load
6003 // group of (1) is always inserted at or above (1). Thus, the instructions will
6004 // never be reordered. All other dependences are checked to ensure the
6005 // correctness of the instruction reordering.
6007 // The algorithm visits all memory accesses in the loop in bottom-up program
6008 // order. Program order is established by traversing the blocks in the loop in
6009 // reverse postorder when collecting the accesses.
6011 // We visit the memory accesses in bottom-up order because it can simplify the
6012 // construction of store groups in the presence of write-after-write (WAW)
6015 // E.g., for the WAW dependence: A[i] = a; // (1)
6017 // A[i + 1] = c; // (3)
6019 // We will first create a store group with (3) and (2). (1) can't be added to
6020 // this group because it and (2) are dependent. However, (1) can be grouped
6021 // with other accesses that may precede it in program order. Note that a
6022 // bottom-up order does not imply that WAW dependences should not be checked.
6023 void InterleavedAccessInfo::analyzeInterleaving(
6024 const ValueToValueMap &Strides) {
6025 DEBUG(dbgs() << "LV: Analyzing interleaved accesses...\n");
6027 // Holds all accesses with a constant stride.
6028 MapVector<Instruction *, StrideDescriptor> AccessStrideInfo;
6029 collectConstStrideAccesses(AccessStrideInfo, Strides);
6031 if (AccessStrideInfo.empty())
6034 // Collect the dependences in the loop.
6035 collectDependences();
6037 // Holds all interleaved store groups temporarily.
6038 SmallSetVector<InterleaveGroup *, 4> StoreGroups;
6039 // Holds all interleaved load groups temporarily.
6040 SmallSetVector<InterleaveGroup *, 4> LoadGroups;
6042 // Search in bottom-up program order for pairs of accesses (A and B) that can
6043 // form interleaved load or store groups. In the algorithm below, access A
6044 // precedes access B in program order. We initialize a group for B in the
6045 // outer loop of the algorithm, and then in the inner loop, we attempt to
6046 // insert each A into B's group if:
6048 // 1. A and B have the same stride,
6049 // 2. A and B have the same memory object size, and
6050 // 3. A belongs in B's group according to its distance from B.
6052 // Special care is taken to ensure group formation will not break any
6054 for (auto BI = AccessStrideInfo.rbegin(), E = AccessStrideInfo.rend();
6056 Instruction *B = BI->first;
6057 StrideDescriptor DesB = BI->second;
6059 // Initialize a group for B if it has an allowable stride. Even if we don't
6060 // create a group for B, we continue with the bottom-up algorithm to ensure
6061 // we don't break any of B's dependences.
6062 InterleaveGroup *Group = nullptr;
6063 if (isStrided(DesB.Stride)) {
6064 Group = getInterleaveGroup(B);
6066 DEBUG(dbgs() << "LV: Creating an interleave group with:" << *B << '\n');
6067 Group = createInterleaveGroup(B, DesB.Stride, DesB.Align);
6069 if (B->mayWriteToMemory())
6070 StoreGroups.insert(Group);
6072 LoadGroups.insert(Group);
6075 for (auto AI = std::next(BI); AI != E; ++AI) {
6076 Instruction *A = AI->first;
6077 StrideDescriptor DesA = AI->second;
6079 // Our code motion strategy implies that we can't have dependences
6080 // between accesses in an interleaved group and other accesses located
6081 // between the first and last member of the group. Note that this also
6082 // means that a group can't have more than one member at a given offset.
6083 // The accesses in a group can have dependences with other accesses, but
6084 // we must ensure we don't extend the boundaries of the group such that
6085 // we encompass those dependent accesses.
6087 // For example, assume we have the sequence of accesses shown below in a
6090 // (1, 2) is a group | A[i] = a; // (1)
6091 // | A[i-1] = b; // (2) |
6092 // A[i-3] = c; // (3)
6093 // A[i] = d; // (4) | (2, 4) is not a group
6095 // Because accesses (2) and (3) are dependent, we can group (2) with (1)
6096 // but not with (4). If we did, the dependent access (3) would be within
6097 // the boundaries of the (2, 4) group.
6098 if (!canReorderMemAccessesForInterleavedGroups(&*AI, &*BI)) {
6099 // If a dependence exists and A is already in a group, we know that A
6100 // must be a store since A precedes B and WAR dependences are allowed.
6101 // Thus, A would be sunk below B. We release A's group to prevent this
6102 // illegal code motion. A will then be free to form another group with
6103 // instructions that precede it.
6104 if (isInterleaved(A)) {
6105 InterleaveGroup *StoreGroup = getInterleaveGroup(A);
6106 StoreGroups.remove(StoreGroup);
6107 releaseGroup(StoreGroup);
6110 // If a dependence exists and A is not already in a group (or it was
6111 // and we just released it), B might be hoisted above A (if B is a
6112 // load) or another store might be sunk below A (if B is a store). In
6113 // either case, we can't add additional instructions to B's group. B
6114 // will only form a group with instructions that it precedes.
6118 // At this point, we've checked for illegal code motion. If either A or B
6119 // isn't strided, there's nothing left to do.
6120 if (!isStrided(DesA.Stride) || !isStrided(DesB.Stride))
6123 // Ignore A if it's already in a group or isn't the same kind of memory
6125 if (isInterleaved(A) || A->mayReadFromMemory() != B->mayReadFromMemory())
6128 // Check rules 1 and 2. Ignore A if its stride or size is different from
6130 if (DesA.Stride != DesB.Stride || DesA.Size != DesB.Size)
6133 // Ignore A if the memory object of A and B don't belong to the same
6135 if (getMemInstAddressSpace(A) != getMemInstAddressSpace(B))
6138 // Calculate the distance from A to B.
6139 const SCEVConstant *DistToB = dyn_cast<SCEVConstant>(
6140 PSE.getSE()->getMinusSCEV(DesA.Scev, DesB.Scev));
6143 int64_t DistanceToB = DistToB->getAPInt().getSExtValue();
6145 // Check rule 3. Ignore A if its distance to B is not a multiple of the
6147 if (DistanceToB % static_cast<int64_t>(DesB.Size))
6150 // Ignore A if either A or B is in a predicated block. Although we
6151 // currently prevent group formation for predicated accesses, we may be
6152 // able to relax this limitation in the future once we handle more
6153 // complicated blocks.
6154 if (isPredicated(A->getParent()) || isPredicated(B->getParent()))
6157 // The index of A is the index of B plus A's distance to B in multiples
6160 Group->getIndex(B) + DistanceToB / static_cast<int64_t>(DesB.Size);
6162 // Try to insert A into B's group.
6163 if (Group->insertMember(A, IndexA, DesA.Align)) {
6164 DEBUG(dbgs() << "LV: Inserted:" << *A << '\n'
6165 << " into the interleave group with" << *B << '\n');
6166 InterleaveGroupMap[A] = Group;
6168 // Set the first load in program order as the insert position.
6169 if (A->mayReadFromMemory())
6170 Group->setInsertPos(A);
6172 } // Iteration over A accesses.
6173 } // Iteration over B accesses.
6175 // Remove interleaved store groups with gaps.
6176 for (InterleaveGroup *Group : StoreGroups)
6177 if (Group->getNumMembers() != Group->getFactor()) {
6178 DEBUG(dbgs() << "LV: Invalidate candidate interleaved store group due "
6180 releaseGroup(Group);
6182 // Remove interleaved groups with gaps (currently only loads) whose memory
6183 // accesses may wrap around. We have to revisit the getPtrStride analysis,
6184 // this time with ShouldCheckWrap=true, since collectConstStrideAccesses does
6185 // not check wrapping (see documentation there).
6186 // FORNOW we use Assume=false;
6187 // TODO: Change to Assume=true but making sure we don't exceed the threshold
6188 // of runtime SCEV assumptions checks (thereby potentially failing to
6189 // vectorize altogether).
6190 // Additional optional optimizations:
6191 // TODO: If we are peeling the loop and we know that the first pointer doesn't
6192 // wrap then we can deduce that all pointers in the group don't wrap.
6193 // This means that we can forcefully peel the loop in order to only have to
6194 // check the first pointer for no-wrap. When we'll change to use Assume=true
6195 // we'll only need at most one runtime check per interleaved group.
6196 for (InterleaveGroup *Group : LoadGroups) {
6197 // Case 1: A full group. Can Skip the checks; For full groups, if the wide
6198 // load would wrap around the address space we would do a memory access at
6199 // nullptr even without the transformation.
6200 if (Group->getNumMembers() == Group->getFactor())
6203 // Case 2: If first and last members of the group don't wrap this implies
6204 // that all the pointers in the group don't wrap.
6205 // So we check only group member 0 (which is always guaranteed to exist),
6206 // and group member Factor - 1; If the latter doesn't exist we rely on
6207 // peeling (if it is a non-reveresed accsess -- see Case 3).
6208 Value *FirstMemberPtr = getPointerOperand(Group->getMember(0));
6209 if (!getPtrStride(PSE, FirstMemberPtr, TheLoop, Strides, /*Assume=*/false,
6210 /*ShouldCheckWrap=*/true)) {
6211 DEBUG(dbgs() << "LV: Invalidate candidate interleaved group due to "
6212 "first group member potentially pointer-wrapping.\n");
6213 releaseGroup(Group);
6216 Instruction *LastMember = Group->getMember(Group->getFactor() - 1);
6218 Value *LastMemberPtr = getPointerOperand(LastMember);
6219 if (!getPtrStride(PSE, LastMemberPtr, TheLoop, Strides, /*Assume=*/false,
6220 /*ShouldCheckWrap=*/true)) {
6221 DEBUG(dbgs() << "LV: Invalidate candidate interleaved group due to "
6222 "last group member potentially pointer-wrapping.\n");
6223 releaseGroup(Group);
6226 // Case 3: A non-reversed interleaved load group with gaps: We need
6227 // to execute at least one scalar epilogue iteration. This will ensure
6228 // we don't speculatively access memory out-of-bounds. We only need
6229 // to look for a member at index factor - 1, since every group must have
6230 // a member at index zero.
6231 if (Group->isReverse()) {
6232 DEBUG(dbgs() << "LV: Invalidate candidate interleaved group due to "
6233 "a reverse access with gaps.\n");
6234 releaseGroup(Group);
6237 DEBUG(dbgs() << "LV: Interleaved group requires epilogue iteration.\n");
6238 RequiresScalarEpilogue = true;
6243 Optional<unsigned> LoopVectorizationCostModel::computeMaxVF(bool OptForSize) {
6244 if (!EnableCondStoresVectorization && Legal->getNumPredStores()) {
6245 ORE->emit(createMissedAnalysis("ConditionalStore")
6246 << "store that is conditionally executed prevents vectorization");
6247 DEBUG(dbgs() << "LV: No vectorization. There are conditional stores.\n");
6251 if (Legal->getRuntimePointerChecking()->Need && TTI.hasBranchDivergence()) {
6252 // TODO: It may by useful to do since it's still likely to be dynamically
6253 // uniform if the target can skip.
6254 DEBUG(dbgs() << "LV: Not inserting runtime ptr check for divergent target");
6257 createMissedAnalysis("CantVersionLoopWithDivergentTarget")
6258 << "runtime pointer checks needed. Not enabled for divergent target");
6263 unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
6264 if (!OptForSize) // Remaining checks deal with scalar loop when OptForSize.
6265 return computeFeasibleMaxVF(OptForSize, TC);
6267 if (Legal->getRuntimePointerChecking()->Need) {
6268 ORE->emit(createMissedAnalysis("CantVersionLoopWithOptForSize")
6269 << "runtime pointer checks needed. Enable vectorization of this "
6270 "loop with '#pragma clang loop vectorize(enable)' when "
6271 "compiling with -Os/-Oz");
6273 << "LV: Aborting. Runtime ptr check is required with -Os/-Oz.\n");
6277 // If we optimize the program for size, avoid creating the tail loop.
6278 DEBUG(dbgs() << "LV: Found trip count: " << TC << '\n');
6280 // If we don't know the precise trip count, don't try to vectorize.
6283 createMissedAnalysis("UnknownLoopCountComplexCFG")
6284 << "unable to calculate the loop count due to complex control flow");
6285 DEBUG(dbgs() << "LV: Aborting. A tail loop is required with -Os/-Oz.\n");
6289 unsigned MaxVF = computeFeasibleMaxVF(OptForSize, TC);
6291 if (TC % MaxVF != 0) {
6292 // If the trip count that we found modulo the vectorization factor is not
6293 // zero then we require a tail.
6294 // FIXME: look for a smaller MaxVF that does divide TC rather than give up.
6295 // FIXME: return None if loop requiresScalarEpilog(<MaxVF>), or look for a
6296 // smaller MaxVF that does not require a scalar epilog.
6298 ORE->emit(createMissedAnalysis("NoTailLoopWithOptForSize")
6299 << "cannot optimize for size and vectorize at the "
6300 "same time. Enable vectorization of this loop "
6301 "with '#pragma clang loop vectorize(enable)' "
6302 "when compiling with -Os/-Oz");
6303 DEBUG(dbgs() << "LV: Aborting. A tail loop is required with -Os/-Oz.\n");
6311 LoopVectorizationCostModel::computeFeasibleMaxVF(bool OptForSize,
6312 unsigned ConstTripCount) {
6313 MinBWs = computeMinimumValueSizes(TheLoop->getBlocks(), *DB, &TTI);
6314 unsigned SmallestType, WidestType;
6315 std::tie(SmallestType, WidestType) = getSmallestAndWidestTypes();
6316 unsigned WidestRegister = TTI.getRegisterBitWidth(true);
6318 // Get the maximum safe dependence distance in bits computed by LAA.
6319 // It is computed by MaxVF * sizeOf(type) * 8, where type is taken from
6320 // the memory accesses that is most restrictive (involved in the smallest
6321 // dependence distance).
6322 unsigned MaxSafeRegisterWidth = Legal->getMaxSafeRegisterWidth();
6324 WidestRegister = std::min(WidestRegister, MaxSafeRegisterWidth);
6326 unsigned MaxVectorSize = WidestRegister / WidestType;
6328 DEBUG(dbgs() << "LV: The Smallest and Widest types: " << SmallestType << " / "
6329 << WidestType << " bits.\n");
6330 DEBUG(dbgs() << "LV: The Widest register safe to use is: " << WidestRegister
6333 assert(MaxVectorSize <= 64 && "Did not expect to pack so many elements"
6334 " into one vector!");
6335 if (MaxVectorSize == 0) {
6336 DEBUG(dbgs() << "LV: The target has no vector registers.\n");
6338 return MaxVectorSize;
6339 } else if (ConstTripCount && ConstTripCount < MaxVectorSize &&
6340 isPowerOf2_32(ConstTripCount)) {
6341 // We need to clamp the VF to be the ConstTripCount. There is no point in
6342 // choosing a higher viable VF as done in the loop below.
6343 DEBUG(dbgs() << "LV: Clamping the MaxVF to the constant trip count: "
6344 << ConstTripCount << "\n");
6345 MaxVectorSize = ConstTripCount;
6346 return MaxVectorSize;
6349 unsigned MaxVF = MaxVectorSize;
6350 if (MaximizeBandwidth && !OptForSize) {
6351 // Collect all viable vectorization factors larger than the default MaxVF
6352 // (i.e. MaxVectorSize).
6353 SmallVector<unsigned, 8> VFs;
6354 unsigned NewMaxVectorSize = WidestRegister / SmallestType;
6355 for (unsigned VS = MaxVectorSize * 2; VS <= NewMaxVectorSize; VS *= 2)
6358 // For each VF calculate its register usage.
6359 auto RUs = calculateRegisterUsage(VFs);
6361 // Select the largest VF which doesn't require more registers than existing
6363 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(true);
6364 for (int i = RUs.size() - 1; i >= 0; --i) {
6365 if (RUs[i].MaxLocalUsers <= TargetNumRegisters) {
6374 LoopVectorizationCostModel::VectorizationFactor
6375 LoopVectorizationCostModel::selectVectorizationFactor(unsigned MaxVF) {
6376 float Cost = expectedCost(1).first;
6378 const float ScalarCost = Cost;
6381 DEBUG(dbgs() << "LV: Scalar loop costs: " << (int)ScalarCost << ".\n");
6383 bool ForceVectorization = Hints->getForce() == LoopVectorizeHints::FK_Enabled;
6384 // Ignore scalar width, because the user explicitly wants vectorization.
6385 if (ForceVectorization && MaxVF > 1) {
6387 Cost = expectedCost(Width).first / (float)Width;
6390 for (unsigned i = 2; i <= MaxVF; i *= 2) {
6391 // Notice that the vector loop needs to be executed less times, so
6392 // we need to divide the cost of the vector loops by the width of
6393 // the vector elements.
6394 VectorizationCostTy C = expectedCost(i);
6395 float VectorCost = C.first / (float)i;
6396 DEBUG(dbgs() << "LV: Vector loop of width " << i
6397 << " costs: " << (int)VectorCost << ".\n");
6398 if (!C.second && !ForceVectorization) {
6400 dbgs() << "LV: Not considering vector loop of width " << i
6401 << " because it will not generate any vector instructions.\n");
6404 if (VectorCost < Cost) {
6410 DEBUG(if (ForceVectorization && Width > 1 && Cost >= ScalarCost) dbgs()
6411 << "LV: Vectorization seems to be not beneficial, "
6412 << "but was forced by a user.\n");
6413 DEBUG(dbgs() << "LV: Selecting VF: " << Width << ".\n");
6414 VectorizationFactor Factor = {Width, (unsigned)(Width * Cost)};
6418 std::pair<unsigned, unsigned>
6419 LoopVectorizationCostModel::getSmallestAndWidestTypes() {
6420 unsigned MinWidth = -1U;
6421 unsigned MaxWidth = 8;
6422 const DataLayout &DL = TheFunction->getParent()->getDataLayout();
6425 for (BasicBlock *BB : TheLoop->blocks()) {
6426 // For each instruction in the loop.
6427 for (Instruction &I : *BB) {
6428 Type *T = I.getType();
6430 // Skip ignored values.
6431 if (ValuesToIgnore.count(&I))
6434 // Only examine Loads, Stores and PHINodes.
6435 if (!isa<LoadInst>(I) && !isa<StoreInst>(I) && !isa<PHINode>(I))
6438 // Examine PHI nodes that are reduction variables. Update the type to
6439 // account for the recurrence type.
6440 if (auto *PN = dyn_cast<PHINode>(&I)) {
6441 if (!Legal->isReductionVariable(PN))
6443 RecurrenceDescriptor RdxDesc = (*Legal->getReductionVars())[PN];
6444 T = RdxDesc.getRecurrenceType();
6447 // Examine the stored values.
6448 if (auto *ST = dyn_cast<StoreInst>(&I))
6449 T = ST->getValueOperand()->getType();
6451 // Ignore loaded pointer types and stored pointer types that are not
6454 // FIXME: The check here attempts to predict whether a load or store will
6455 // be vectorized. We only know this for certain after a VF has
6456 // been selected. Here, we assume that if an access can be
6457 // vectorized, it will be. We should also look at extending this
6458 // optimization to non-pointer types.
6460 if (T->isPointerTy() && !isConsecutiveLoadOrStore(&I) &&
6461 !Legal->isAccessInterleaved(&I) && !Legal->isLegalGatherOrScatter(&I))
6464 MinWidth = std::min(MinWidth,
6465 (unsigned)DL.getTypeSizeInBits(T->getScalarType()));
6466 MaxWidth = std::max(MaxWidth,
6467 (unsigned)DL.getTypeSizeInBits(T->getScalarType()));
6471 return {MinWidth, MaxWidth};
6474 unsigned LoopVectorizationCostModel::selectInterleaveCount(bool OptForSize,
6476 unsigned LoopCost) {
6477 // -- The interleave heuristics --
6478 // We interleave the loop in order to expose ILP and reduce the loop overhead.
6479 // There are many micro-architectural considerations that we can't predict
6480 // at this level. For example, frontend pressure (on decode or fetch) due to
6481 // code size, or the number and capabilities of the execution ports.
6483 // We use the following heuristics to select the interleave count:
6484 // 1. If the code has reductions, then we interleave to break the cross
6485 // iteration dependency.
6486 // 2. If the loop is really small, then we interleave to reduce the loop
6488 // 3. We don't interleave if we think that we will spill registers to memory
6489 // due to the increased register pressure.
6491 // When we optimize for size, we don't interleave.
6495 // We used the distance for the interleave count.
6496 if (Legal->getMaxSafeDepDistBytes() != -1U)
6499 // Do not interleave loops with a relatively small trip count.
6500 unsigned TC = PSE.getSE()->getSmallConstantTripCount(TheLoop);
6501 if (TC > 1 && TC < TinyTripCountInterleaveThreshold)
6504 unsigned TargetNumRegisters = TTI.getNumberOfRegisters(VF > 1);
6505 DEBUG(dbgs() << "LV: The target has " << TargetNumRegisters
6509 if (ForceTargetNumScalarRegs.getNumOccurrences() > 0)
6510 TargetNumRegisters = ForceTargetNumScalarRegs;
6512 if (ForceTargetNumVectorRegs.getNumOccurrences() > 0)
6513 TargetNumRegisters = ForceTargetNumVectorRegs;
6516 RegisterUsage R = calculateRegisterUsage({VF})[0];
6517 // We divide by these constants so assume that we have at least one
6518 // instruction that uses at least one register.
6519 R.MaxLocalUsers = std::max(R.MaxLocalUsers, 1U);
6520 R.NumInstructions = std::max(R.NumInstructions, 1U);
6522 // We calculate the interleave count using the following formula.
6523 // Subtract the number of loop invariants from the number of available
6524 // registers. These registers are used by all of the interleaved instances.
6525 // Next, divide the remaining registers by the number of registers that is
6526 // required by the loop, in order to estimate how many parallel instances
6527 // fit without causing spills. All of this is rounded down if necessary to be
6528 // a power of two. We want power of two interleave count to simplify any
6529 // addressing operations or alignment considerations.
6530 unsigned IC = PowerOf2Floor((TargetNumRegisters - R.LoopInvariantRegs) /
6533 // Don't count the induction variable as interleaved.
6534 if (EnableIndVarRegisterHeur)
6535 IC = PowerOf2Floor((TargetNumRegisters - R.LoopInvariantRegs - 1) /
6536 std::max(1U, (R.MaxLocalUsers - 1)));
6538 // Clamp the interleave ranges to reasonable counts.
6539 unsigned MaxInterleaveCount = TTI.getMaxInterleaveFactor(VF);
6541 // Check if the user has overridden the max.
6543 if (ForceTargetMaxScalarInterleaveFactor.getNumOccurrences() > 0)
6544 MaxInterleaveCount = ForceTargetMaxScalarInterleaveFactor;
6546 if (ForceTargetMaxVectorInterleaveFactor.getNumOccurrences() > 0)
6547 MaxInterleaveCount = ForceTargetMaxVectorInterleaveFactor;
6550 // If we did not calculate the cost for VF (because the user selected the VF)
6551 // then we calculate the cost of VF here.
6553 LoopCost = expectedCost(VF).first;
6555 // Clamp the calculated IC to be between the 1 and the max interleave count
6556 // that the target allows.
6557 if (IC > MaxInterleaveCount)
6558 IC = MaxInterleaveCount;
6562 // Interleave if we vectorized this loop and there is a reduction that could
6563 // benefit from interleaving.
6564 if (VF > 1 && !Legal->getReductionVars()->empty()) {
6565 DEBUG(dbgs() << "LV: Interleaving because of reductions.\n");
6569 // Note that if we've already vectorized the loop we will have done the
6570 // runtime check and so interleaving won't require further checks.
6571 bool InterleavingRequiresRuntimePointerCheck =
6572 (VF == 1 && Legal->getRuntimePointerChecking()->Need);
6574 // We want to interleave small loops in order to reduce the loop overhead and
6575 // potentially expose ILP opportunities.
6576 DEBUG(dbgs() << "LV: Loop cost is " << LoopCost << '\n');
6577 if (!InterleavingRequiresRuntimePointerCheck && LoopCost < SmallLoopCost) {
6578 // We assume that the cost overhead is 1 and we use the cost model
6579 // to estimate the cost of the loop and interleave until the cost of the
6580 // loop overhead is about 5% of the cost of the loop.
6582 std::min(IC, (unsigned)PowerOf2Floor(SmallLoopCost / LoopCost));
6584 // Interleave until store/load ports (estimated by max interleave count) are
6586 unsigned NumStores = Legal->getNumStores();
6587 unsigned NumLoads = Legal->getNumLoads();
6588 unsigned StoresIC = IC / (NumStores ? NumStores : 1);
6589 unsigned LoadsIC = IC / (NumLoads ? NumLoads : 1);
6591 // If we have a scalar reduction (vector reductions are already dealt with
6592 // by this point), we can increase the critical path length if the loop
6593 // we're interleaving is inside another loop. Limit, by default to 2, so the
6594 // critical path only gets increased by one reduction operation.
6595 if (!Legal->getReductionVars()->empty() && TheLoop->getLoopDepth() > 1) {
6596 unsigned F = static_cast<unsigned>(MaxNestedScalarReductionIC);
6597 SmallIC = std::min(SmallIC, F);
6598 StoresIC = std::min(StoresIC, F);
6599 LoadsIC = std::min(LoadsIC, F);
6602 if (EnableLoadStoreRuntimeInterleave &&
6603 std::max(StoresIC, LoadsIC) > SmallIC) {
6604 DEBUG(dbgs() << "LV: Interleaving to saturate store or load ports.\n");
6605 return std::max(StoresIC, LoadsIC);
6608 DEBUG(dbgs() << "LV: Interleaving to reduce branch cost.\n");
6612 // Interleave if this is a large loop (small loops are already dealt with by
6613 // this point) that could benefit from interleaving.
6614 bool HasReductions = !Legal->getReductionVars()->empty();
6615 if (TTI.enableAggressiveInterleaving(HasReductions)) {
6616 DEBUG(dbgs() << "LV: Interleaving to expose ILP.\n");
6620 DEBUG(dbgs() << "LV: Not Interleaving.\n");
6624 SmallVector<LoopVectorizationCostModel::RegisterUsage, 8>
6625 LoopVectorizationCostModel::calculateRegisterUsage(ArrayRef<unsigned> VFs) {
6626 // This function calculates the register usage by measuring the highest number
6627 // of values that are alive at a single location. Obviously, this is a very
6628 // rough estimation. We scan the loop in a topological order in order and
6629 // assign a number to each instruction. We use RPO to ensure that defs are
6630 // met before their users. We assume that each instruction that has in-loop
6631 // users starts an interval. We record every time that an in-loop value is
6632 // used, so we have a list of the first and last occurrences of each
6633 // instruction. Next, we transpose this data structure into a multi map that
6634 // holds the list of intervals that *end* at a specific location. This multi
6635 // map allows us to perform a linear search. We scan the instructions linearly
6636 // and record each time that a new interval starts, by placing it in a set.
6637 // If we find this value in the multi-map then we remove it from the set.
6638 // The max register usage is the maximum size of the set.
6639 // We also search for instructions that are defined outside the loop, but are
6640 // used inside the loop. We need this number separately from the max-interval
6641 // usage number because when we unroll, loop-invariant values do not take
6643 LoopBlocksDFS DFS(TheLoop);
6647 RU.NumInstructions = 0;
6649 // Each 'key' in the map opens a new interval. The values
6650 // of the map are the index of the 'last seen' usage of the
6651 // instruction that is the key.
6652 using IntervalMap = DenseMap<Instruction *, unsigned>;
6654 // Maps instruction to its index.
6655 DenseMap<unsigned, Instruction *> IdxToInstr;
6656 // Marks the end of each interval.
6657 IntervalMap EndPoint;
6658 // Saves the list of instruction indices that are used in the loop.
6659 SmallSet<Instruction *, 8> Ends;
6660 // Saves the list of values that are used in the loop but are
6661 // defined outside the loop, such as arguments and constants.
6662 SmallPtrSet<Value *, 8> LoopInvariants;
6665 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) {
6666 RU.NumInstructions += BB->size();
6667 for (Instruction &I : *BB) {
6668 IdxToInstr[Index++] = &I;
6670 // Save the end location of each USE.
6671 for (Value *U : I.operands()) {
6672 auto *Instr = dyn_cast<Instruction>(U);
6674 // Ignore non-instruction values such as arguments, constants, etc.
6678 // If this instruction is outside the loop then record it and continue.
6679 if (!TheLoop->contains(Instr)) {
6680 LoopInvariants.insert(Instr);
6684 // Overwrite previous end points.
6685 EndPoint[Instr] = Index;
6691 // Saves the list of intervals that end with the index in 'key'.
6692 using InstrList = SmallVector<Instruction *, 2>;
6693 DenseMap<unsigned, InstrList> TransposeEnds;
6695 // Transpose the EndPoints to a list of values that end at each index.
6696 for (auto &Interval : EndPoint)
6697 TransposeEnds[Interval.second].push_back(Interval.first);
6699 SmallSet<Instruction *, 8> OpenIntervals;
6701 // Get the size of the widest register.
6702 unsigned MaxSafeDepDist = -1U;
6703 if (Legal->getMaxSafeDepDistBytes() != -1U)
6704 MaxSafeDepDist = Legal->getMaxSafeDepDistBytes() * 8;
6705 unsigned WidestRegister =
6706 std::min(TTI.getRegisterBitWidth(true), MaxSafeDepDist);
6707 const DataLayout &DL = TheFunction->getParent()->getDataLayout();
6709 SmallVector<RegisterUsage, 8> RUs(VFs.size());
6710 SmallVector<unsigned, 8> MaxUsages(VFs.size(), 0);
6712 DEBUG(dbgs() << "LV(REG): Calculating max register usage:\n");
6714 // A lambda that gets the register usage for the given type and VF.
6715 auto GetRegUsage = [&DL, WidestRegister](Type *Ty, unsigned VF) {
6716 if (Ty->isTokenTy())
6718 unsigned TypeSize = DL.getTypeSizeInBits(Ty->getScalarType());
6719 return std::max<unsigned>(1, VF * TypeSize / WidestRegister);
6722 for (unsigned int i = 0; i < Index; ++i) {
6723 Instruction *I = IdxToInstr[i];
6725 // Remove all of the instructions that end at this location.
6726 InstrList &List = TransposeEnds[i];
6727 for (Instruction *ToRemove : List)
6728 OpenIntervals.erase(ToRemove);
6730 // Ignore instructions that are never used within the loop.
6734 // Skip ignored values.
6735 if (ValuesToIgnore.count(I))
6738 // For each VF find the maximum usage of registers.
6739 for (unsigned j = 0, e = VFs.size(); j < e; ++j) {
6741 MaxUsages[j] = std::max(MaxUsages[j], OpenIntervals.size());
6744 collectUniformsAndScalars(VFs[j]);
6745 // Count the number of live intervals.
6746 unsigned RegUsage = 0;
6747 for (auto Inst : OpenIntervals) {
6748 // Skip ignored values for VF > 1.
6749 if (VecValuesToIgnore.count(Inst) ||
6750 isScalarAfterVectorization(Inst, VFs[j]))
6752 RegUsage += GetRegUsage(Inst->getType(), VFs[j]);
6754 MaxUsages[j] = std::max(MaxUsages[j], RegUsage);
6757 DEBUG(dbgs() << "LV(REG): At #" << i << " Interval # "
6758 << OpenIntervals.size() << '\n');
6760 // Add the current instruction to the list of open intervals.
6761 OpenIntervals.insert(I);
6764 for (unsigned i = 0, e = VFs.size(); i < e; ++i) {
6765 unsigned Invariant = 0;
6767 Invariant = LoopInvariants.size();
6769 for (auto Inst : LoopInvariants)
6770 Invariant += GetRegUsage(Inst->getType(), VFs[i]);
6773 DEBUG(dbgs() << "LV(REG): VF = " << VFs[i] << '\n');
6774 DEBUG(dbgs() << "LV(REG): Found max usage: " << MaxUsages[i] << '\n');
6775 DEBUG(dbgs() << "LV(REG): Found invariant usage: " << Invariant << '\n');
6776 DEBUG(dbgs() << "LV(REG): LoopSize: " << RU.NumInstructions << '\n');
6778 RU.LoopInvariantRegs = Invariant;
6779 RU.MaxLocalUsers = MaxUsages[i];
6786 void LoopVectorizationCostModel::collectInstsToScalarize(unsigned VF) {
6787 // If we aren't vectorizing the loop, or if we've already collected the
6788 // instructions to scalarize, there's nothing to do. Collection may already
6789 // have occurred if we have a user-selected VF and are now computing the
6790 // expected cost for interleaving.
6791 if (VF < 2 || InstsToScalarize.count(VF))
6794 // Initialize a mapping for VF in InstsToScalalarize. If we find that it's
6795 // not profitable to scalarize any instructions, the presence of VF in the
6796 // map will indicate that we've analyzed it already.
6797 ScalarCostsTy &ScalarCostsVF = InstsToScalarize[VF];
6799 // Find all the instructions that are scalar with predication in the loop and
6800 // determine if it would be better to not if-convert the blocks they are in.
6801 // If so, we also record the instructions to scalarize.
6802 for (BasicBlock *BB : TheLoop->blocks()) {
6803 if (!Legal->blockNeedsPredication(BB))
6805 for (Instruction &I : *BB)
6806 if (Legal->isScalarWithPredication(&I)) {
6807 ScalarCostsTy ScalarCosts;
6808 if (computePredInstDiscount(&I, ScalarCosts, VF) >= 0)
6809 ScalarCostsVF.insert(ScalarCosts.begin(), ScalarCosts.end());
6811 // Remember that BB will remain after vectorization.
6812 PredicatedBBsAfterVectorization.insert(BB);
6817 int LoopVectorizationCostModel::computePredInstDiscount(
6818 Instruction *PredInst, DenseMap<Instruction *, unsigned> &ScalarCosts,
6820 assert(!isUniformAfterVectorization(PredInst, VF) &&
6821 "Instruction marked uniform-after-vectorization will be predicated");
6823 // Initialize the discount to zero, meaning that the scalar version and the
6824 // vector version cost the same.
6827 // Holds instructions to analyze. The instructions we visit are mapped in
6828 // ScalarCosts. Those instructions are the ones that would be scalarized if
6829 // we find that the scalar version costs less.
6830 SmallVector<Instruction *, 8> Worklist;
6832 // Returns true if the given instruction can be scalarized.
6833 auto canBeScalarized = [&](Instruction *I) -> bool {
6834 // We only attempt to scalarize instructions forming a single-use chain
6835 // from the original predicated block that would otherwise be vectorized.
6836 // Although not strictly necessary, we give up on instructions we know will
6837 // already be scalar to avoid traversing chains that are unlikely to be
6839 if (!I->hasOneUse() || PredInst->getParent() != I->getParent() ||
6840 isScalarAfterVectorization(I, VF))
6843 // If the instruction is scalar with predication, it will be analyzed
6844 // separately. We ignore it within the context of PredInst.
6845 if (Legal->isScalarWithPredication(I))
6848 // If any of the instruction's operands are uniform after vectorization,
6849 // the instruction cannot be scalarized. This prevents, for example, a
6850 // masked load from being scalarized.
6852 // We assume we will only emit a value for lane zero of an instruction
6853 // marked uniform after vectorization, rather than VF identical values.
6854 // Thus, if we scalarize an instruction that uses a uniform, we would
6855 // create uses of values corresponding to the lanes we aren't emitting code
6856 // for. This behavior can be changed by allowing getScalarValue to clone
6857 // the lane zero values for uniforms rather than asserting.
6858 for (Use &U : I->operands())
6859 if (auto *J = dyn_cast<Instruction>(U.get()))
6860 if (isUniformAfterVectorization(J, VF))
6863 // Otherwise, we can scalarize the instruction.
6867 // Returns true if an operand that cannot be scalarized must be extracted
6868 // from a vector. We will account for this scalarization overhead below. Note
6869 // that the non-void predicated instructions are placed in their own blocks,
6870 // and their return values are inserted into vectors. Thus, an extract would
6871 // still be required.
6872 auto needsExtract = [&](Instruction *I) -> bool {
6873 return TheLoop->contains(I) && !isScalarAfterVectorization(I, VF);
6876 // Compute the expected cost discount from scalarizing the entire expression
6877 // feeding the predicated instruction. We currently only consider expressions
6878 // that are single-use instruction chains.
6879 Worklist.push_back(PredInst);
6880 while (!Worklist.empty()) {
6881 Instruction *I = Worklist.pop_back_val();
6883 // If we've already analyzed the instruction, there's nothing to do.
6884 if (ScalarCosts.count(I))
6887 // Compute the cost of the vector instruction. Note that this cost already
6888 // includes the scalarization overhead of the predicated instruction.
6889 unsigned VectorCost = getInstructionCost(I, VF).first;
6891 // Compute the cost of the scalarized instruction. This cost is the cost of
6892 // the instruction as if it wasn't if-converted and instead remained in the
6893 // predicated block. We will scale this cost by block probability after
6894 // computing the scalarization overhead.
6895 unsigned ScalarCost = VF * getInstructionCost(I, 1).first;
6897 // Compute the scalarization overhead of needed insertelement instructions
6899 if (Legal->isScalarWithPredication(I) && !I->getType()->isVoidTy()) {
6900 ScalarCost += TTI.getScalarizationOverhead(ToVectorTy(I->getType(), VF),
6902 ScalarCost += VF * TTI.getCFInstrCost(Instruction::PHI);
6905 // Compute the scalarization overhead of needed extractelement
6906 // instructions. For each of the instruction's operands, if the operand can
6907 // be scalarized, add it to the worklist; otherwise, account for the
6909 for (Use &U : I->operands())
6910 if (auto *J = dyn_cast<Instruction>(U.get())) {
6911 assert(VectorType::isValidElementType(J->getType()) &&
6912 "Instruction has non-scalar type");
6913 if (canBeScalarized(J))
6914 Worklist.push_back(J);
6915 else if (needsExtract(J))
6916 ScalarCost += TTI.getScalarizationOverhead(
6917 ToVectorTy(J->getType(),VF), false, true);
6920 // Scale the total scalar cost by block probability.
6921 ScalarCost /= getReciprocalPredBlockProb();
6923 // Compute the discount. A non-negative discount means the vector version
6924 // of the instruction costs more, and scalarizing would be beneficial.
6925 Discount += VectorCost - ScalarCost;
6926 ScalarCosts[I] = ScalarCost;
6932 LoopVectorizationCostModel::VectorizationCostTy
6933 LoopVectorizationCostModel::expectedCost(unsigned VF) {
6934 VectorizationCostTy Cost;
6937 for (BasicBlock *BB : TheLoop->blocks()) {
6938 VectorizationCostTy BlockCost;
6940 // For each instruction in the old loop.
6941 for (Instruction &I : *BB) {
6942 // Skip dbg intrinsics.
6943 if (isa<DbgInfoIntrinsic>(I))
6946 // Skip ignored values.
6947 if (ValuesToIgnore.count(&I) ||
6948 (VF > 1 && VecValuesToIgnore.count(&I)))
6951 VectorizationCostTy C = getInstructionCost(&I, VF);
6953 // Check if we should override the cost.
6954 if (ForceTargetInstructionCost.getNumOccurrences() > 0)
6955 C.first = ForceTargetInstructionCost;
6957 BlockCost.first += C.first;
6958 BlockCost.second |= C.second;
6959 DEBUG(dbgs() << "LV: Found an estimated cost of " << C.first << " for VF "
6960 << VF << " For instruction: " << I << '\n');
6963 // If we are vectorizing a predicated block, it will have been
6964 // if-converted. This means that the block's instructions (aside from
6965 // stores and instructions that may divide by zero) will now be
6966 // unconditionally executed. For the scalar case, we may not always execute
6967 // the predicated block. Thus, scale the block's cost by the probability of
6969 if (VF == 1 && Legal->blockNeedsPredication(BB))
6970 BlockCost.first /= getReciprocalPredBlockProb();
6972 Cost.first += BlockCost.first;
6973 Cost.second |= BlockCost.second;
6979 /// \brief Gets Address Access SCEV after verifying that the access pattern
6980 /// is loop invariant except the induction variable dependence.
6982 /// This SCEV can be sent to the Target in order to estimate the address
6983 /// calculation cost.
6984 static const SCEV *getAddressAccessSCEV(
6986 LoopVectorizationLegality *Legal,
6987 PredicatedScalarEvolution &PSE,
6988 const Loop *TheLoop) {
6990 auto *Gep = dyn_cast<GetElementPtrInst>(Ptr);
6994 // We are looking for a gep with all loop invariant indices except for one
6995 // which should be an induction variable.
6996 auto SE = PSE.getSE();
6997 unsigned NumOperands = Gep->getNumOperands();
6998 for (unsigned i = 1; i < NumOperands; ++i) {
6999 Value *Opd = Gep->getOperand(i);
7000 if (!SE->isLoopInvariant(SE->getSCEV(Opd), TheLoop) &&
7001 !Legal->isInductionVariable(Opd))
7005 // Now we know we have a GEP ptr, %inv, %ind, %inv. return the Ptr SCEV.
7006 return PSE.getSCEV(Ptr);
7009 static bool isStrideMul(Instruction *I, LoopVectorizationLegality *Legal) {
7010 return Legal->hasStride(I->getOperand(0)) ||
7011 Legal->hasStride(I->getOperand(1));
7014 unsigned LoopVectorizationCostModel::getMemInstScalarizationCost(Instruction *I,
7016 Type *ValTy = getMemInstValueType(I);
7017 auto SE = PSE.getSE();
7019 unsigned Alignment = getMemInstAlignment(I);
7020 unsigned AS = getMemInstAddressSpace(I);
7021 Value *Ptr = getPointerOperand(I);
7022 Type *PtrTy = ToVectorTy(Ptr->getType(), VF);
7024 // Figure out whether the access is strided and get the stride value
7025 // if it's known in compile time
7026 const SCEV *PtrSCEV = getAddressAccessSCEV(Ptr, Legal, PSE, TheLoop);
7028 // Get the cost of the scalar memory instruction and address computation.
7029 unsigned Cost = VF * TTI.getAddressComputationCost(PtrTy, SE, PtrSCEV);
7032 TTI.getMemoryOpCost(I->getOpcode(), ValTy->getScalarType(), Alignment,
7035 // Get the overhead of the extractelement and insertelement instructions
7036 // we might create due to scalarization.
7037 Cost += getScalarizationOverhead(I, VF, TTI);
7039 // If we have a predicated store, it may not be executed for each vector
7040 // lane. Scale the cost by the probability of executing the predicated
7042 if (Legal->isScalarWithPredication(I))
7043 Cost /= getReciprocalPredBlockProb();
7048 unsigned LoopVectorizationCostModel::getConsecutiveMemOpCost(Instruction *I,
7050 Type *ValTy = getMemInstValueType(I);
7051 Type *VectorTy = ToVectorTy(ValTy, VF);
7052 unsigned Alignment = getMemInstAlignment(I);
7053 Value *Ptr = getPointerOperand(I);
7054 unsigned AS = getMemInstAddressSpace(I);
7055 int ConsecutiveStride = Legal->isConsecutivePtr(Ptr);
7057 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) &&
7058 "Stride should be 1 or -1 for consecutive memory access");
7060 if (Legal->isMaskRequired(I))
7061 Cost += TTI.getMaskedMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS);
7063 Cost += TTI.getMemoryOpCost(I->getOpcode(), VectorTy, Alignment, AS, I);
7065 bool Reverse = ConsecutiveStride < 0;
7067 Cost += TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, 0);
7071 unsigned LoopVectorizationCostModel::getUniformMemOpCost(Instruction *I,
7073 LoadInst *LI = cast<LoadInst>(I);
7074 Type *ValTy = LI->getType();
7075 Type *VectorTy = ToVectorTy(ValTy, VF);
7076 unsigned Alignment = LI->getAlignment();
7077 unsigned AS = LI->getPointerAddressSpace();
7079 return TTI.getAddressComputationCost(ValTy) +
7080 TTI.getMemoryOpCost(Instruction::Load, ValTy, Alignment, AS) +
7081 TTI.getShuffleCost(TargetTransformInfo::SK_Broadcast, VectorTy);
7084 unsigned LoopVectorizationCostModel::getGatherScatterCost(Instruction *I,
7086 Type *ValTy = getMemInstValueType(I);
7087 Type *VectorTy = ToVectorTy(ValTy, VF);
7088 unsigned Alignment = getMemInstAlignment(I);
7089 Value *Ptr = getPointerOperand(I);
7091 return TTI.getAddressComputationCost(VectorTy) +
7092 TTI.getGatherScatterOpCost(I->getOpcode(), VectorTy, Ptr,
7093 Legal->isMaskRequired(I), Alignment);
7096 unsigned LoopVectorizationCostModel::getInterleaveGroupCost(Instruction *I,
7098 Type *ValTy = getMemInstValueType(I);
7099 Type *VectorTy = ToVectorTy(ValTy, VF);
7100 unsigned AS = getMemInstAddressSpace(I);
7102 auto Group = Legal->getInterleavedAccessGroup(I);
7103 assert(Group && "Fail to get an interleaved access group.");
7105 unsigned InterleaveFactor = Group->getFactor();
7106 Type *WideVecTy = VectorType::get(ValTy, VF * InterleaveFactor);
7108 // Holds the indices of existing members in an interleaved load group.
7109 // An interleaved store group doesn't need this as it doesn't allow gaps.
7110 SmallVector<unsigned, 4> Indices;
7111 if (isa<LoadInst>(I)) {
7112 for (unsigned i = 0; i < InterleaveFactor; i++)
7113 if (Group->getMember(i))
7114 Indices.push_back(i);
7117 // Calculate the cost of the whole interleaved group.
7118 unsigned Cost = TTI.getInterleavedMemoryOpCost(I->getOpcode(), WideVecTy,
7119 Group->getFactor(), Indices,
7120 Group->getAlignment(), AS);
7122 if (Group->isReverse())
7123 Cost += Group->getNumMembers() *
7124 TTI.getShuffleCost(TargetTransformInfo::SK_Reverse, VectorTy, 0);
7128 unsigned LoopVectorizationCostModel::getMemoryInstructionCost(Instruction *I,
7130 // Calculate scalar cost only. Vectorization cost should be ready at this
7133 Type *ValTy = getMemInstValueType(I);
7134 unsigned Alignment = getMemInstAlignment(I);
7135 unsigned AS = getMemInstAddressSpace(I);
7137 return TTI.getAddressComputationCost(ValTy) +
7138 TTI.getMemoryOpCost(I->getOpcode(), ValTy, Alignment, AS, I);
7140 return getWideningCost(I, VF);
7143 LoopVectorizationCostModel::VectorizationCostTy
7144 LoopVectorizationCostModel::getInstructionCost(Instruction *I, unsigned VF) {
7145 // If we know that this instruction will remain uniform, check the cost of
7146 // the scalar version.
7147 if (isUniformAfterVectorization(I, VF))
7150 if (VF > 1 && isProfitableToScalarize(I, VF))
7151 return VectorizationCostTy(InstsToScalarize[VF][I], false);
7153 // Forced scalars do not have any scalarization overhead.
7154 if (VF > 1 && ForcedScalars.count(VF) &&
7155 ForcedScalars.find(VF)->second.count(I))
7156 return VectorizationCostTy((getInstructionCost(I, 1).first * VF), false);
7159 unsigned C = getInstructionCost(I, VF, VectorTy);
7161 bool TypeNotScalarized =
7162 VF > 1 && VectorTy->isVectorTy() && TTI.getNumberOfParts(VectorTy) < VF;
7163 return VectorizationCostTy(C, TypeNotScalarized);
7166 void LoopVectorizationCostModel::setCostBasedWideningDecision(unsigned VF) {
7169 for (BasicBlock *BB : TheLoop->blocks()) {
7170 // For each instruction in the old loop.
7171 for (Instruction &I : *BB) {
7172 Value *Ptr = getPointerOperand(&I);
7176 if (isa<LoadInst>(&I) && Legal->isUniform(Ptr)) {
7177 // Scalar load + broadcast
7178 unsigned Cost = getUniformMemOpCost(&I, VF);
7179 setWideningDecision(&I, VF, CM_Scalarize, Cost);
7183 // We assume that widening is the best solution when possible.
7184 if (Legal->memoryInstructionCanBeWidened(&I, VF)) {
7185 unsigned Cost = getConsecutiveMemOpCost(&I, VF);
7186 int ConsecutiveStride = Legal->isConsecutivePtr(getPointerOperand(&I));
7187 assert((ConsecutiveStride == 1 || ConsecutiveStride == -1) &&
7188 "Expected consecutive stride.");
7189 InstWidening Decision =
7190 ConsecutiveStride == 1 ? CM_Widen : CM_Widen_Reverse;
7191 setWideningDecision(&I, VF, Decision, Cost);
7195 // Choose between Interleaving, Gather/Scatter or Scalarization.
7196 unsigned InterleaveCost = std::numeric_limits<unsigned>::max();
7197 unsigned NumAccesses = 1;
7198 if (Legal->isAccessInterleaved(&I)) {
7199 auto Group = Legal->getInterleavedAccessGroup(&I);
7200 assert(Group && "Fail to get an interleaved access group.");
7202 // Make one decision for the whole group.
7203 if (getWideningDecision(&I, VF) != CM_Unknown)
7206 NumAccesses = Group->getNumMembers();
7207 InterleaveCost = getInterleaveGroupCost(&I, VF);
7210 unsigned GatherScatterCost =
7211 Legal->isLegalGatherOrScatter(&I)
7212 ? getGatherScatterCost(&I, VF) * NumAccesses
7213 : std::numeric_limits<unsigned>::max();
7215 unsigned ScalarizationCost =
7216 getMemInstScalarizationCost(&I, VF) * NumAccesses;
7218 // Choose better solution for the current VF,
7219 // write down this decision and use it during vectorization.
7221 InstWidening Decision;
7222 if (InterleaveCost <= GatherScatterCost &&
7223 InterleaveCost < ScalarizationCost) {
7224 Decision = CM_Interleave;
7225 Cost = InterleaveCost;
7226 } else if (GatherScatterCost < ScalarizationCost) {
7227 Decision = CM_GatherScatter;
7228 Cost = GatherScatterCost;
7230 Decision = CM_Scalarize;
7231 Cost = ScalarizationCost;
7233 // If the instructions belongs to an interleave group, the whole group
7234 // receives the same decision. The whole group receives the cost, but
7235 // the cost will actually be assigned to one instruction.
7236 if (auto Group = Legal->getInterleavedAccessGroup(&I))
7237 setWideningDecision(Group, VF, Decision, Cost);
7239 setWideningDecision(&I, VF, Decision, Cost);
7243 // Make sure that any load of address and any other address computation
7244 // remains scalar unless there is gather/scatter support. This avoids
7245 // inevitable extracts into address registers, and also has the benefit of
7246 // activating LSR more, since that pass can't optimize vectorized
7248 if (TTI.prefersVectorizedAddressing())
7251 // Start with all scalar pointer uses.
7252 SmallPtrSet<Instruction *, 8> AddrDefs;
7253 for (BasicBlock *BB : TheLoop->blocks())
7254 for (Instruction &I : *BB) {
7255 Instruction *PtrDef =
7256 dyn_cast_or_null<Instruction>(getPointerOperand(&I));
7257 if (PtrDef && TheLoop->contains(PtrDef) &&
7258 getWideningDecision(&I, VF) != CM_GatherScatter)
7259 AddrDefs.insert(PtrDef);
7262 // Add all instructions used to generate the addresses.
7263 SmallVector<Instruction *, 4> Worklist;
7264 for (auto *I : AddrDefs)
7265 Worklist.push_back(I);
7266 while (!Worklist.empty()) {
7267 Instruction *I = Worklist.pop_back_val();
7268 for (auto &Op : I->operands())
7269 if (auto *InstOp = dyn_cast<Instruction>(Op))
7270 if ((InstOp->getParent() == I->getParent()) && !isa<PHINode>(InstOp) &&
7271 AddrDefs.insert(InstOp).second)
7272 Worklist.push_back(InstOp);
7275 for (auto *I : AddrDefs) {
7276 if (isa<LoadInst>(I)) {
7277 // Setting the desired widening decision should ideally be handled in
7278 // by cost functions, but since this involves the task of finding out
7279 // if the loaded register is involved in an address computation, it is
7280 // instead changed here when we know this is the case.
7281 InstWidening Decision = getWideningDecision(I, VF);
7282 if (Decision == CM_Widen || Decision == CM_Widen_Reverse)
7283 // Scalarize a widened load of address.
7284 setWideningDecision(I, VF, CM_Scalarize,
7285 (VF * getMemoryInstructionCost(I, 1)));
7286 else if (auto Group = Legal->getInterleavedAccessGroup(I)) {
7287 // Scalarize an interleave group of address loads.
7288 for (unsigned I = 0; I < Group->getFactor(); ++I) {
7289 if (Instruction *Member = Group->getMember(I))
7290 setWideningDecision(Member, VF, CM_Scalarize,
7291 (VF * getMemoryInstructionCost(Member, 1)));
7295 // Make sure I gets scalarized and a cost estimate without
7296 // scalarization overhead.
7297 ForcedScalars[VF].insert(I);
7301 unsigned LoopVectorizationCostModel::getInstructionCost(Instruction *I,
7304 Type *RetTy = I->getType();
7305 if (canTruncateToMinimalBitwidth(I, VF))
7306 RetTy = IntegerType::get(RetTy->getContext(), MinBWs[I]);
7307 VectorTy = isScalarAfterVectorization(I, VF) ? RetTy : ToVectorTy(RetTy, VF);
7308 auto SE = PSE.getSE();
7310 // TODO: We need to estimate the cost of intrinsic calls.
7311 switch (I->getOpcode()) {
7312 case Instruction::GetElementPtr:
7313 // We mark this instruction as zero-cost because the cost of GEPs in
7314 // vectorized code depends on whether the corresponding memory instruction
7315 // is scalarized or not. Therefore, we handle GEPs with the memory
7316 // instruction cost.
7318 case Instruction::Br: {
7319 // In cases of scalarized and predicated instructions, there will be VF
7320 // predicated blocks in the vectorized loop. Each branch around these
7321 // blocks requires also an extract of its vector compare i1 element.
7322 bool ScalarPredicatedBB = false;
7323 BranchInst *BI = cast<BranchInst>(I);
7324 if (VF > 1 && BI->isConditional() &&
7325 (PredicatedBBsAfterVectorization.count(BI->getSuccessor(0)) ||
7326 PredicatedBBsAfterVectorization.count(BI->getSuccessor(1))))
7327 ScalarPredicatedBB = true;
7329 if (ScalarPredicatedBB) {
7330 // Return cost for branches around scalarized and predicated blocks.
7332 VectorType::get(IntegerType::getInt1Ty(RetTy->getContext()), VF);
7333 return (TTI.getScalarizationOverhead(Vec_i1Ty, false, true) +
7334 (TTI.getCFInstrCost(Instruction::Br) * VF));
7335 } else if (I->getParent() == TheLoop->getLoopLatch() || VF == 1)
7336 // The back-edge branch will remain, as will all scalar branches.
7337 return TTI.getCFInstrCost(Instruction::Br);
7339 // This branch will be eliminated by if-conversion.
7341 // Note: We currently assume zero cost for an unconditional branch inside
7342 // a predicated block since it will become a fall-through, although we
7343 // may decide in the future to call TTI for all branches.
7345 case Instruction::PHI: {
7346 auto *Phi = cast<PHINode>(I);
7348 // First-order recurrences are replaced by vector shuffles inside the loop.
7349 if (VF > 1 && Legal->isFirstOrderRecurrence(Phi))
7350 return TTI.getShuffleCost(TargetTransformInfo::SK_ExtractSubvector,
7351 VectorTy, VF - 1, VectorTy);
7353 // Phi nodes in non-header blocks (not inductions, reductions, etc.) are
7354 // converted into select instructions. We require N - 1 selects per phi
7355 // node, where N is the number of incoming values.
7356 if (VF > 1 && Phi->getParent() != TheLoop->getHeader())
7357 return (Phi->getNumIncomingValues() - 1) *
7358 TTI.getCmpSelInstrCost(
7359 Instruction::Select, ToVectorTy(Phi->getType(), VF),
7360 ToVectorTy(Type::getInt1Ty(Phi->getContext()), VF));
7362 return TTI.getCFInstrCost(Instruction::PHI);
7364 case Instruction::UDiv:
7365 case Instruction::SDiv:
7366 case Instruction::URem:
7367 case Instruction::SRem:
7368 // If we have a predicated instruction, it may not be executed for each
7369 // vector lane. Get the scalarization cost and scale this amount by the
7370 // probability of executing the predicated block. If the instruction is not
7371 // predicated, we fall through to the next case.
7372 if (VF > 1 && Legal->isScalarWithPredication(I)) {
7375 // These instructions have a non-void type, so account for the phi nodes
7376 // that we will create. This cost is likely to be zero. The phi node
7377 // cost, if any, should be scaled by the block probability because it
7378 // models a copy at the end of each predicated block.
7379 Cost += VF * TTI.getCFInstrCost(Instruction::PHI);
7381 // The cost of the non-predicated instruction.
7382 Cost += VF * TTI.getArithmeticInstrCost(I->getOpcode(), RetTy);
7384 // The cost of insertelement and extractelement instructions needed for
7386 Cost += getScalarizationOverhead(I, VF, TTI);
7388 // Scale the cost by the probability of executing the predicated blocks.
7389 // This assumes the predicated block for each vector lane is equally
7391 return Cost / getReciprocalPredBlockProb();
7394 case Instruction::Add:
7395 case Instruction::FAdd:
7396 case Instruction::Sub:
7397 case Instruction::FSub:
7398 case Instruction::Mul:
7399 case Instruction::FMul:
7400 case Instruction::FDiv:
7401 case Instruction::FRem:
7402 case Instruction::Shl:
7403 case Instruction::LShr:
7404 case Instruction::AShr:
7405 case Instruction::And:
7406 case Instruction::Or:
7407 case Instruction::Xor: {
7408 // Since we will replace the stride by 1 the multiplication should go away.
7409 if (I->getOpcode() == Instruction::Mul && isStrideMul(I, Legal))
7411 // Certain instructions can be cheaper to vectorize if they have a constant
7412 // second vector operand. One example of this are shifts on x86.
7413 TargetTransformInfo::OperandValueKind Op1VK =
7414 TargetTransformInfo::OK_AnyValue;
7415 TargetTransformInfo::OperandValueKind Op2VK =
7416 TargetTransformInfo::OK_AnyValue;
7417 TargetTransformInfo::OperandValueProperties Op1VP =
7418 TargetTransformInfo::OP_None;
7419 TargetTransformInfo::OperandValueProperties Op2VP =
7420 TargetTransformInfo::OP_None;
7421 Value *Op2 = I->getOperand(1);
7423 // Check for a splat or for a non uniform vector of constants.
7424 if (isa<ConstantInt>(Op2)) {
7425 ConstantInt *CInt = cast<ConstantInt>(Op2);
7426 if (CInt && CInt->getValue().isPowerOf2())
7427 Op2VP = TargetTransformInfo::OP_PowerOf2;
7428 Op2VK = TargetTransformInfo::OK_UniformConstantValue;
7429 } else if (isa<ConstantVector>(Op2) || isa<ConstantDataVector>(Op2)) {
7430 Op2VK = TargetTransformInfo::OK_NonUniformConstantValue;
7431 Constant *SplatValue = cast<Constant>(Op2)->getSplatValue();
7433 ConstantInt *CInt = dyn_cast<ConstantInt>(SplatValue);
7434 if (CInt && CInt->getValue().isPowerOf2())
7435 Op2VP = TargetTransformInfo::OP_PowerOf2;
7436 Op2VK = TargetTransformInfo::OK_UniformConstantValue;
7438 } else if (Legal->isUniform(Op2)) {
7439 Op2VK = TargetTransformInfo::OK_UniformValue;
7441 SmallVector<const Value *, 4> Operands(I->operand_values());
7442 unsigned N = isScalarAfterVectorization(I, VF) ? VF : 1;
7443 return N * TTI.getArithmeticInstrCost(I->getOpcode(), VectorTy, Op1VK,
7444 Op2VK, Op1VP, Op2VP, Operands);
7446 case Instruction::Select: {
7447 SelectInst *SI = cast<SelectInst>(I);
7448 const SCEV *CondSCEV = SE->getSCEV(SI->getCondition());
7449 bool ScalarCond = (SE->isLoopInvariant(CondSCEV, TheLoop));
7450 Type *CondTy = SI->getCondition()->getType();
7452 CondTy = VectorType::get(CondTy, VF);
7454 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, CondTy, I);
7456 case Instruction::ICmp:
7457 case Instruction::FCmp: {
7458 Type *ValTy = I->getOperand(0)->getType();
7459 Instruction *Op0AsInstruction = dyn_cast<Instruction>(I->getOperand(0));
7460 if (canTruncateToMinimalBitwidth(Op0AsInstruction, VF))
7461 ValTy = IntegerType::get(ValTy->getContext(), MinBWs[Op0AsInstruction]);
7462 VectorTy = ToVectorTy(ValTy, VF);
7463 return TTI.getCmpSelInstrCost(I->getOpcode(), VectorTy, nullptr, I);
7465 case Instruction::Store:
7466 case Instruction::Load: {
7467 unsigned Width = VF;
7469 InstWidening Decision = getWideningDecision(I, Width);
7470 assert(Decision != CM_Unknown &&
7471 "CM decision should be taken at this point");
7472 if (Decision == CM_Scalarize)
7475 VectorTy = ToVectorTy(getMemInstValueType(I), Width);
7476 return getMemoryInstructionCost(I, VF);
7478 case Instruction::ZExt:
7479 case Instruction::SExt:
7480 case Instruction::FPToUI:
7481 case Instruction::FPToSI:
7482 case Instruction::FPExt:
7483 case Instruction::PtrToInt:
7484 case Instruction::IntToPtr:
7485 case Instruction::SIToFP:
7486 case Instruction::UIToFP:
7487 case Instruction::Trunc:
7488 case Instruction::FPTrunc:
7489 case Instruction::BitCast: {
7490 // We optimize the truncation of induction variables having constant
7491 // integer steps. The cost of these truncations is the same as the scalar
7493 if (isOptimizableIVTruncate(I, VF)) {
7494 auto *Trunc = cast<TruncInst>(I);
7495 return TTI.getCastInstrCost(Instruction::Trunc, Trunc->getDestTy(),
7496 Trunc->getSrcTy(), Trunc);
7499 Type *SrcScalarTy = I->getOperand(0)->getType();
7501 VectorTy->isVectorTy() ? ToVectorTy(SrcScalarTy, VF) : SrcScalarTy;
7502 if (canTruncateToMinimalBitwidth(I, VF)) {
7503 // This cast is going to be shrunk. This may remove the cast or it might
7504 // turn it into slightly different cast. For example, if MinBW == 16,
7505 // "zext i8 %1 to i32" becomes "zext i8 %1 to i16".
7507 // Calculate the modified src and dest types.
7508 Type *MinVecTy = VectorTy;
7509 if (I->getOpcode() == Instruction::Trunc) {
7510 SrcVecTy = smallestIntegerVectorType(SrcVecTy, MinVecTy);
7512 largestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy);
7513 } else if (I->getOpcode() == Instruction::ZExt ||
7514 I->getOpcode() == Instruction::SExt) {
7515 SrcVecTy = largestIntegerVectorType(SrcVecTy, MinVecTy);
7517 smallestIntegerVectorType(ToVectorTy(I->getType(), VF), MinVecTy);
7521 unsigned N = isScalarAfterVectorization(I, VF) ? VF : 1;
7522 return N * TTI.getCastInstrCost(I->getOpcode(), VectorTy, SrcVecTy, I);
7524 case Instruction::Call: {
7525 bool NeedToScalarize;
7526 CallInst *CI = cast<CallInst>(I);
7527 unsigned CallCost = getVectorCallCost(CI, VF, TTI, TLI, NeedToScalarize);
7528 if (getVectorIntrinsicIDForCall(CI, TLI))
7529 return std::min(CallCost, getVectorIntrinsicCost(CI, VF, TTI, TLI));
7533 // The cost of executing VF copies of the scalar instruction. This opcode
7534 // is unknown. Assume that it is the same as 'mul'.
7535 return VF * TTI.getArithmeticInstrCost(Instruction::Mul, VectorTy) +
7536 getScalarizationOverhead(I, VF, TTI);
7540 char LoopVectorize::ID = 0;
7542 static const char lv_name[] = "Loop Vectorization";
7544 INITIALIZE_PASS_BEGIN(LoopVectorize, LV_NAME, lv_name, false, false)
7545 INITIALIZE_PASS_DEPENDENCY(TargetTransformInfoWrapperPass)
7546 INITIALIZE_PASS_DEPENDENCY(BasicAAWrapperPass)
7547 INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
7548 INITIALIZE_PASS_DEPENDENCY(GlobalsAAWrapperPass)
7549 INITIALIZE_PASS_DEPENDENCY(AssumptionCacheTracker)
7550 INITIALIZE_PASS_DEPENDENCY(BlockFrequencyInfoWrapperPass)
7551 INITIALIZE_PASS_DEPENDENCY(DominatorTreeWrapperPass)
7552 INITIALIZE_PASS_DEPENDENCY(ScalarEvolutionWrapperPass)
7553 INITIALIZE_PASS_DEPENDENCY(LoopInfoWrapperPass)
7554 INITIALIZE_PASS_DEPENDENCY(LoopAccessLegacyAnalysis)
7555 INITIALIZE_PASS_DEPENDENCY(DemandedBitsWrapperPass)
7556 INITIALIZE_PASS_DEPENDENCY(OptimizationRemarkEmitterWrapperPass)
7557 INITIALIZE_PASS_END(LoopVectorize, LV_NAME, lv_name, false, false)
7561 Pass *createLoopVectorizePass(bool NoUnrolling, bool AlwaysVectorize) {
7562 return new LoopVectorize(NoUnrolling, AlwaysVectorize);
7565 } // end namespace llvm
7567 bool LoopVectorizationCostModel::isConsecutiveLoadOrStore(Instruction *Inst) {
7568 // Check if the pointer operand of a load or store instruction is
7570 if (auto *Ptr = getPointerOperand(Inst))
7571 return Legal->isConsecutivePtr(Ptr);
7575 void LoopVectorizationCostModel::collectValuesToIgnore() {
7576 // Ignore ephemeral values.
7577 CodeMetrics::collectEphemeralValues(TheLoop, AC, ValuesToIgnore);
7579 // Ignore type-promoting instructions we identified during reduction
7581 for (auto &Reduction : *Legal->getReductionVars()) {
7582 RecurrenceDescriptor &RedDes = Reduction.second;
7583 SmallPtrSetImpl<Instruction *> &Casts = RedDes.getCastInsts();
7584 VecValuesToIgnore.insert(Casts.begin(), Casts.end());
7586 // Ignore type-casting instructions we identified during induction
7588 for (auto &Induction : *Legal->getInductionVars()) {
7589 InductionDescriptor &IndDes = Induction.second;
7590 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts();
7591 VecValuesToIgnore.insert(Casts.begin(), Casts.end());
7595 LoopVectorizationCostModel::VectorizationFactor
7596 LoopVectorizationPlanner::plan(bool OptForSize, unsigned UserVF) {
7597 // Width 1 means no vectorize, cost 0 means uncomputed cost.
7598 const LoopVectorizationCostModel::VectorizationFactor NoVectorization = {1U,
7600 Optional<unsigned> MaybeMaxVF = CM.computeMaxVF(OptForSize);
7601 if (!MaybeMaxVF.hasValue()) // Cases considered too costly to vectorize.
7602 return NoVectorization;
7605 DEBUG(dbgs() << "LV: Using user VF " << UserVF << ".\n");
7606 assert(isPowerOf2_32(UserVF) && "VF needs to be a power of two");
7607 // Collect the instructions (and their associated costs) that will be more
7608 // profitable to scalarize.
7609 CM.selectUserVectorizationFactor(UserVF);
7610 buildVPlans(UserVF, UserVF);
7611 DEBUG(printPlans(dbgs()));
7615 unsigned MaxVF = MaybeMaxVF.getValue();
7616 assert(MaxVF != 0 && "MaxVF is zero.");
7618 for (unsigned VF = 1; VF <= MaxVF; VF *= 2) {
7619 // Collect Uniform and Scalar instructions after vectorization with VF.
7620 CM.collectUniformsAndScalars(VF);
7622 // Collect the instructions (and their associated costs) that will be more
7623 // profitable to scalarize.
7625 CM.collectInstsToScalarize(VF);
7628 buildVPlans(1, MaxVF);
7629 DEBUG(printPlans(dbgs()));
7631 return NoVectorization;
7633 // Select the optimal vectorization factor.
7634 return CM.selectVectorizationFactor(MaxVF);
7637 void LoopVectorizationPlanner::setBestPlan(unsigned VF, unsigned UF) {
7638 DEBUG(dbgs() << "Setting best plan to VF=" << VF << ", UF=" << UF << '\n');
7642 erase_if(VPlans, [VF](const VPlanPtr &Plan) {
7643 return !Plan->hasVF(VF);
7645 assert(VPlans.size() == 1 && "Best VF has not a single VPlan.");
7648 void LoopVectorizationPlanner::executePlan(InnerLoopVectorizer &ILV,
7649 DominatorTree *DT) {
7650 // Perform the actual loop transformation.
7652 // 1. Create a new empty loop. Unlink the old loop and connect the new one.
7653 VPCallbackILV CallbackILV(ILV);
7655 VPTransformState State{BestVF, BestUF, LI,
7656 DT, ILV.Builder, ILV.VectorLoopValueMap,
7658 State.CFG.PrevBB = ILV.createVectorizedLoopSkeleton();
7660 //===------------------------------------------------===//
7662 // Notice: any optimization or new instruction that go
7663 // into the code below should also be implemented in
7666 //===------------------------------------------------===//
7668 // 2. Copy and widen instructions from the old loop into the new loop.
7669 assert(VPlans.size() == 1 && "Not a single VPlan to execute.");
7670 VPlans.front()->execute(&State);
7672 // 3. Fix the vectorized code: take care of header phi's, live-outs,
7673 // predication, updating analyses.
7674 ILV.fixVectorizedLoop();
7677 void LoopVectorizationPlanner::collectTriviallyDeadInstructions(
7678 SmallPtrSetImpl<Instruction *> &DeadInstructions) {
7679 BasicBlock *Latch = OrigLoop->getLoopLatch();
7681 // We create new control-flow for the vectorized loop, so the original
7682 // condition will be dead after vectorization if it's only used by the
7684 auto *Cmp = dyn_cast<Instruction>(Latch->getTerminator()->getOperand(0));
7685 if (Cmp && Cmp->hasOneUse())
7686 DeadInstructions.insert(Cmp);
7688 // We create new "steps" for induction variable updates to which the original
7689 // induction variables map. An original update instruction will be dead if
7690 // all its users except the induction variable are dead.
7691 for (auto &Induction : *Legal->getInductionVars()) {
7692 PHINode *Ind = Induction.first;
7693 auto *IndUpdate = cast<Instruction>(Ind->getIncomingValueForBlock(Latch));
7694 if (llvm::all_of(IndUpdate->users(), [&](User *U) -> bool {
7695 return U == Ind || DeadInstructions.count(cast<Instruction>(U));
7697 DeadInstructions.insert(IndUpdate);
7699 // We record as "Dead" also the type-casting instructions we had identified
7700 // during induction analysis. We don't need any handling for them in the
7701 // vectorized loop because we have proven that, under a proper runtime
7702 // test guarding the vectorized loop, the value of the phi, and the casted
7703 // value of the phi, are the same. The last instruction in this casting chain
7704 // will get its scalar/vector/widened def from the scalar/vector/widened def
7705 // of the respective phi node. Any other casts in the induction def-use chain
7706 // have no other uses outside the phi update chain, and will be ignored.
7707 InductionDescriptor &IndDes = Induction.second;
7708 const SmallVectorImpl<Instruction *> &Casts = IndDes.getCastInsts();
7709 DeadInstructions.insert(Casts.begin(), Casts.end());
7713 Value *InnerLoopUnroller::reverseVector(Value *Vec) { return Vec; }
7715 Value *InnerLoopUnroller::getBroadcastInstrs(Value *V) { return V; }
7717 Value *InnerLoopUnroller::getStepVector(Value *Val, int StartIdx, Value *Step,
7718 Instruction::BinaryOps BinOp) {
7719 // When unrolling and the VF is 1, we only need to add a simple scalar.
7720 Type *Ty = Val->getType();
7721 assert(!Ty->isVectorTy() && "Val must be a scalar");
7723 if (Ty->isFloatingPointTy()) {
7724 Constant *C = ConstantFP::get(Ty, (double)StartIdx);
7726 // Floating point operations had to be 'fast' to enable the unrolling.
7727 Value *MulOp = addFastMathFlag(Builder.CreateFMul(C, Step));
7728 return addFastMathFlag(Builder.CreateBinOp(BinOp, Val, MulOp));
7730 Constant *C = ConstantInt::get(Ty, StartIdx);
7731 return Builder.CreateAdd(Val, Builder.CreateMul(C, Step), "induction");
7734 static void AddRuntimeUnrollDisableMetaData(Loop *L) {
7735 SmallVector<Metadata *, 4> MDs;
7736 // Reserve first location for self reference to the LoopID metadata node.
7737 MDs.push_back(nullptr);
7738 bool IsUnrollMetadata = false;
7739 MDNode *LoopID = L->getLoopID();
7741 // First find existing loop unrolling disable metadata.
7742 for (unsigned i = 1, ie = LoopID->getNumOperands(); i < ie; ++i) {
7743 auto *MD = dyn_cast<MDNode>(LoopID->getOperand(i));
7745 const auto *S = dyn_cast<MDString>(MD->getOperand(0));
7747 S && S->getString().startswith("llvm.loop.unroll.disable");
7749 MDs.push_back(LoopID->getOperand(i));
7753 if (!IsUnrollMetadata) {
7754 // Add runtime unroll disable metadata.
7755 LLVMContext &Context = L->getHeader()->getContext();
7756 SmallVector<Metadata *, 1> DisableOperands;
7757 DisableOperands.push_back(
7758 MDString::get(Context, "llvm.loop.unroll.runtime.disable"));
7759 MDNode *DisableNode = MDNode::get(Context, DisableOperands);
7760 MDs.push_back(DisableNode);
7761 MDNode *NewLoopID = MDNode::get(Context, MDs);
7762 // Set operand 0 to refer to the loop id itself.
7763 NewLoopID->replaceOperandWith(0, NewLoopID);
7764 L->setLoopID(NewLoopID);
7768 bool LoopVectorizationPlanner::getDecisionAndClampRange(
7769 const std::function<bool(unsigned)> &Predicate, VFRange &Range) {
7770 assert(Range.End > Range.Start && "Trying to test an empty VF range.");
7771 bool PredicateAtRangeStart = Predicate(Range.Start);
7773 for (unsigned TmpVF = Range.Start * 2; TmpVF < Range.End; TmpVF *= 2)
7774 if (Predicate(TmpVF) != PredicateAtRangeStart) {
7779 return PredicateAtRangeStart;
7782 /// Build VPlans for the full range of feasible VF's = {\p MinVF, 2 * \p MinVF,
7783 /// 4 * \p MinVF, ..., \p MaxVF} by repeatedly building a VPlan for a sub-range
7784 /// of VF's starting at a given VF and extending it as much as possible. Each
7785 /// vectorization decision can potentially shorten this sub-range during
7787 void LoopVectorizationPlanner::buildVPlans(unsigned MinVF, unsigned MaxVF) {
7789 // Collect conditions feeding internal conditional branches; they need to be
7790 // represented in VPlan for it to model masking.
7791 SmallPtrSet<Value *, 1> NeedDef;
7793 auto *Latch = OrigLoop->getLoopLatch();
7794 for (BasicBlock *BB : OrigLoop->blocks()) {
7797 BranchInst *Branch = dyn_cast<BranchInst>(BB->getTerminator());
7798 if (Branch && Branch->isConditional())
7799 NeedDef.insert(Branch->getCondition());
7802 for (unsigned VF = MinVF; VF < MaxVF + 1;) {
7803 VFRange SubRange = {VF, MaxVF + 1};
7804 VPlans.push_back(buildVPlan(SubRange, NeedDef));
7809 VPValue *LoopVectorizationPlanner::createEdgeMask(BasicBlock *Src,
7812 assert(is_contained(predecessors(Dst), Src) && "Invalid edge");
7814 // Look for cached value.
7815 std::pair<BasicBlock *, BasicBlock *> Edge(Src, Dst);
7816 EdgeMaskCacheTy::iterator ECEntryIt = EdgeMaskCache.find(Edge);
7817 if (ECEntryIt != EdgeMaskCache.end())
7818 return ECEntryIt->second;
7820 VPValue *SrcMask = createBlockInMask(Src, Plan);
7822 // The terminator has to be a branch inst!
7823 BranchInst *BI = dyn_cast<BranchInst>(Src->getTerminator());
7824 assert(BI && "Unexpected terminator found");
7826 if (!BI->isConditional())
7827 return EdgeMaskCache[Edge] = SrcMask;
7829 VPValue *EdgeMask = Plan->getVPValue(BI->getCondition());
7830 assert(EdgeMask && "No Edge Mask found for condition");
7832 if (BI->getSuccessor(0) != Dst)
7833 EdgeMask = Builder.createNot(EdgeMask);
7835 if (SrcMask) // Otherwise block in-mask is all-one, no need to AND.
7836 EdgeMask = Builder.createAnd(EdgeMask, SrcMask);
7838 return EdgeMaskCache[Edge] = EdgeMask;
7841 VPValue *LoopVectorizationPlanner::createBlockInMask(BasicBlock *BB,
7843 assert(OrigLoop->contains(BB) && "Block is not a part of a loop");
7845 // Look for cached value.
7846 BlockMaskCacheTy::iterator BCEntryIt = BlockMaskCache.find(BB);
7847 if (BCEntryIt != BlockMaskCache.end())
7848 return BCEntryIt->second;
7850 // All-one mask is modelled as no-mask following the convention for masked
7851 // load/store/gather/scatter. Initialize BlockMask to no-mask.
7852 VPValue *BlockMask = nullptr;
7854 // Loop incoming mask is all-one.
7855 if (OrigLoop->getHeader() == BB)
7856 return BlockMaskCache[BB] = BlockMask;
7858 // This is the block mask. We OR all incoming edges.
7859 for (auto *Predecessor : predecessors(BB)) {
7860 VPValue *EdgeMask = createEdgeMask(Predecessor, BB, Plan);
7861 if (!EdgeMask) // Mask of predecessor is all-one so mask of block is too.
7862 return BlockMaskCache[BB] = EdgeMask;
7864 if (!BlockMask) { // BlockMask has its initialized nullptr value.
7865 BlockMask = EdgeMask;
7869 BlockMask = Builder.createOr(BlockMask, EdgeMask);
7872 return BlockMaskCache[BB] = BlockMask;
7875 VPInterleaveRecipe *
7876 LoopVectorizationPlanner::tryToInterleaveMemory(Instruction *I,
7878 const InterleaveGroup *IG = Legal->getInterleavedAccessGroup(I);
7882 // Now check if IG is relevant for VF's in the given range.
7883 auto isIGMember = [&](Instruction *I) -> std::function<bool(unsigned)> {
7884 return [=](unsigned VF) -> bool {
7885 return (VF >= 2 && // Query is illegal for VF == 1
7886 CM.getWideningDecision(I, VF) ==
7887 LoopVectorizationCostModel::CM_Interleave);
7890 if (!getDecisionAndClampRange(isIGMember(I), Range))
7893 // I is a member of an InterleaveGroup for VF's in the (possibly trimmed)
7894 // range. If it's the primary member of the IG construct a VPInterleaveRecipe.
7895 // Otherwise, it's an adjunct member of the IG, do not construct any Recipe.
7896 assert(I == IG->getInsertPos() &&
7897 "Generating a recipe for an adjunct member of an interleave group");
7899 return new VPInterleaveRecipe(IG);
7902 VPWidenMemoryInstructionRecipe *
7903 LoopVectorizationPlanner::tryToWidenMemory(Instruction *I, VFRange &Range,
7905 if (!isa<LoadInst>(I) && !isa<StoreInst>(I))
7908 auto willWiden = [&](unsigned VF) -> bool {
7911 if (CM.isScalarAfterVectorization(I, VF) ||
7912 CM.isProfitableToScalarize(I, VF))
7914 LoopVectorizationCostModel::InstWidening Decision =
7915 CM.getWideningDecision(I, VF);
7916 assert(Decision != LoopVectorizationCostModel::CM_Unknown &&
7917 "CM decision should be taken at this point.");
7918 assert(Decision != LoopVectorizationCostModel::CM_Interleave &&
7919 "Interleave memory opportunity should be caught earlier.");
7920 return Decision != LoopVectorizationCostModel::CM_Scalarize;
7923 if (!getDecisionAndClampRange(willWiden, Range))
7926 VPValue *Mask = nullptr;
7927 if (Legal->isMaskRequired(I))
7928 Mask = createBlockInMask(I->getParent(), Plan);
7930 return new VPWidenMemoryInstructionRecipe(*I, Mask);
7933 VPWidenIntOrFpInductionRecipe *
7934 LoopVectorizationPlanner::tryToOptimizeInduction(Instruction *I,
7936 if (PHINode *Phi = dyn_cast<PHINode>(I)) {
7937 // Check if this is an integer or fp induction. If so, build the recipe that
7938 // produces its scalar and vector values.
7939 InductionDescriptor II = Legal->getInductionVars()->lookup(Phi);
7940 if (II.getKind() == InductionDescriptor::IK_IntInduction ||
7941 II.getKind() == InductionDescriptor::IK_FpInduction)
7942 return new VPWidenIntOrFpInductionRecipe(Phi);
7947 // Optimize the special case where the source is a constant integer
7948 // induction variable. Notice that we can only optimize the 'trunc' case
7949 // because (a) FP conversions lose precision, (b) sext/zext may wrap, and
7950 // (c) other casts depend on pointer size.
7952 // Determine whether \p K is a truncation based on an induction variable that
7953 // can be optimized.
7954 auto isOptimizableIVTruncate =
7955 [&](Instruction *K) -> std::function<bool(unsigned)> {
7957 [=](unsigned VF) -> bool { return CM.isOptimizableIVTruncate(K, VF); };
7960 if (isa<TruncInst>(I) &&
7961 getDecisionAndClampRange(isOptimizableIVTruncate(I), Range))
7962 return new VPWidenIntOrFpInductionRecipe(cast<PHINode>(I->getOperand(0)),
7963 cast<TruncInst>(I));
7968 LoopVectorizationPlanner::tryToBlend(Instruction *I, VPlanPtr &Plan) {
7969 PHINode *Phi = dyn_cast<PHINode>(I);
7970 if (!Phi || Phi->getParent() == OrigLoop->getHeader())
7973 // We know that all PHIs in non-header blocks are converted into selects, so
7974 // we don't have to worry about the insertion order and we can just use the
7975 // builder. At this point we generate the predication tree. There may be
7976 // duplications since this is a simple recursive scan, but future
7977 // optimizations will clean it up.
7979 SmallVector<VPValue *, 2> Masks;
7980 unsigned NumIncoming = Phi->getNumIncomingValues();
7981 for (unsigned In = 0; In < NumIncoming; In++) {
7983 createEdgeMask(Phi->getIncomingBlock(In), Phi->getParent(), Plan);
7984 assert((EdgeMask || NumIncoming == 1) &&
7985 "Multiple predecessors with one having a full mask");
7987 Masks.push_back(EdgeMask);
7989 return new VPBlendRecipe(Phi, Masks);
7992 bool LoopVectorizationPlanner::tryToWiden(Instruction *I, VPBasicBlock *VPBB,
7994 if (Legal->isScalarWithPredication(I))
7997 auto IsVectorizableOpcode = [](unsigned Opcode) {
7999 case Instruction::Add:
8000 case Instruction::And:
8001 case Instruction::AShr:
8002 case Instruction::BitCast:
8003 case Instruction::Br:
8004 case Instruction::Call:
8005 case Instruction::FAdd:
8006 case Instruction::FCmp:
8007 case Instruction::FDiv:
8008 case Instruction::FMul:
8009 case Instruction::FPExt:
8010 case Instruction::FPToSI:
8011 case Instruction::FPToUI:
8012 case Instruction::FPTrunc:
8013 case Instruction::FRem:
8014 case Instruction::FSub:
8015 case Instruction::GetElementPtr:
8016 case Instruction::ICmp:
8017 case Instruction::IntToPtr:
8018 case Instruction::Load:
8019 case Instruction::LShr:
8020 case Instruction::Mul:
8021 case Instruction::Or:
8022 case Instruction::PHI:
8023 case Instruction::PtrToInt:
8024 case Instruction::SDiv:
8025 case Instruction::Select:
8026 case Instruction::SExt:
8027 case Instruction::Shl:
8028 case Instruction::SIToFP:
8029 case Instruction::SRem:
8030 case Instruction::Store:
8031 case Instruction::Sub:
8032 case Instruction::Trunc:
8033 case Instruction::UDiv:
8034 case Instruction::UIToFP:
8035 case Instruction::URem:
8036 case Instruction::Xor:
8037 case Instruction::ZExt:
8043 if (!IsVectorizableOpcode(I->getOpcode()))
8046 if (CallInst *CI = dyn_cast<CallInst>(I)) {
8047 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
8048 if (ID && (ID == Intrinsic::assume || ID == Intrinsic::lifetime_end ||
8049 ID == Intrinsic::lifetime_start || ID == Intrinsic::sideeffect))
8053 auto willWiden = [&](unsigned VF) -> bool {
8054 if (!isa<PHINode>(I) && (CM.isScalarAfterVectorization(I, VF) ||
8055 CM.isProfitableToScalarize(I, VF)))
8057 if (CallInst *CI = dyn_cast<CallInst>(I)) {
8058 Intrinsic::ID ID = getVectorIntrinsicIDForCall(CI, TLI);
8059 // The following case may be scalarized depending on the VF.
8060 // The flag shows whether we use Intrinsic or a usual Call for vectorized
8061 // version of the instruction.
8062 // Is it beneficial to perform intrinsic call compared to lib call?
8063 bool NeedToScalarize;
8064 unsigned CallCost = getVectorCallCost(CI, VF, *TTI, TLI, NeedToScalarize);
8065 bool UseVectorIntrinsic =
8066 ID && getVectorIntrinsicCost(CI, VF, *TTI, TLI) <= CallCost;
8067 return UseVectorIntrinsic || !NeedToScalarize;
8069 if (isa<LoadInst>(I) || isa<StoreInst>(I)) {
8070 assert(CM.getWideningDecision(I, VF) ==
8071 LoopVectorizationCostModel::CM_Scalarize &&
8072 "Memory widening decisions should have been taken care by now");
8078 if (!getDecisionAndClampRange(willWiden, Range))
8081 // Success: widen this instruction. We optimize the common case where
8082 // consecutive instructions can be represented by a single recipe.
8083 if (!VPBB->empty()) {
8084 VPWidenRecipe *LastWidenRecipe = dyn_cast<VPWidenRecipe>(&VPBB->back());
8085 if (LastWidenRecipe && LastWidenRecipe->appendInstruction(I))
8089 VPBB->appendRecipe(new VPWidenRecipe(I));
8093 VPBasicBlock *LoopVectorizationPlanner::handleReplication(
8094 Instruction *I, VFRange &Range, VPBasicBlock *VPBB,
8095 DenseMap<Instruction *, VPReplicateRecipe *> &PredInst2Recipe,
8097 bool IsUniform = getDecisionAndClampRange(
8098 [&](unsigned VF) { return CM.isUniformAfterVectorization(I, VF); },
8101 bool IsPredicated = Legal->isScalarWithPredication(I);
8102 auto *Recipe = new VPReplicateRecipe(I, IsUniform, IsPredicated);
8104 // Find if I uses a predicated instruction. If so, it will use its scalar
8105 // value. Avoid hoisting the insert-element which packs the scalar value into
8106 // a vector value, as that happens iff all users use the vector value.
8107 for (auto &Op : I->operands())
8108 if (auto *PredInst = dyn_cast<Instruction>(Op))
8109 if (PredInst2Recipe.find(PredInst) != PredInst2Recipe.end())
8110 PredInst2Recipe[PredInst]->setAlsoPack(false);
8112 // Finalize the recipe for Instr, first if it is not predicated.
8113 if (!IsPredicated) {
8114 DEBUG(dbgs() << "LV: Scalarizing:" << *I << "\n");
8115 VPBB->appendRecipe(Recipe);
8118 DEBUG(dbgs() << "LV: Scalarizing and predicating:" << *I << "\n");
8119 assert(VPBB->getSuccessors().empty() &&
8120 "VPBB has successors when handling predicated replication.");
8121 // Record predicated instructions for above packing optimizations.
8122 PredInst2Recipe[I] = Recipe;
8123 VPBlockBase *Region =
8124 VPBB->setOneSuccessor(createReplicateRegion(I, Recipe, Plan));
8125 return cast<VPBasicBlock>(Region->setOneSuccessor(new VPBasicBlock()));
8129 LoopVectorizationPlanner::createReplicateRegion(Instruction *Instr,
8130 VPRecipeBase *PredRecipe,
8132 // Instructions marked for predication are replicated and placed under an
8133 // if-then construct to prevent side-effects.
8135 // Generate recipes to compute the block mask for this region.
8136 VPValue *BlockInMask = createBlockInMask(Instr->getParent(), Plan);
8138 // Build the triangular if-then region.
8139 std::string RegionName = (Twine("pred.") + Instr->getOpcodeName()).str();
8140 assert(Instr->getParent() && "Predicated instruction not in any basic block");
8141 auto *BOMRecipe = new VPBranchOnMaskRecipe(BlockInMask);
8142 auto *Entry = new VPBasicBlock(Twine(RegionName) + ".entry", BOMRecipe);
8144 Instr->getType()->isVoidTy() ? nullptr : new VPPredInstPHIRecipe(Instr);
8145 auto *Exit = new VPBasicBlock(Twine(RegionName) + ".continue", PHIRecipe);
8146 auto *Pred = new VPBasicBlock(Twine(RegionName) + ".if", PredRecipe);
8147 VPRegionBlock *Region = new VPRegionBlock(Entry, Exit, RegionName, true);
8149 // Note: first set Entry as region entry and then connect successors starting
8150 // from it in order, to propagate the "parent" of each VPBasicBlock.
8151 Entry->setTwoSuccessors(Pred, Exit);
8152 Pred->setOneSuccessor(Exit);
8157 LoopVectorizationPlanner::VPlanPtr
8158 LoopVectorizationPlanner::buildVPlan(VFRange &Range,
8159 const SmallPtrSetImpl<Value *> &NeedDef) {
8160 EdgeMaskCache.clear();
8161 BlockMaskCache.clear();
8162 DenseMap<Instruction *, Instruction *> &SinkAfter = Legal->getSinkAfter();
8163 DenseMap<Instruction *, Instruction *> SinkAfterInverse;
8165 // Collect instructions from the original loop that will become trivially dead
8166 // in the vectorized loop. We don't need to vectorize these instructions. For
8167 // example, original induction update instructions can become dead because we
8168 // separately emit induction "steps" when generating code for the new loop.
8169 // Similarly, we create a new latch condition when setting up the structure
8170 // of the new loop, so the old one can become dead.
8171 SmallPtrSet<Instruction *, 4> DeadInstructions;
8172 collectTriviallyDeadInstructions(DeadInstructions);
8174 // Hold a mapping from predicated instructions to their recipes, in order to
8175 // fix their AlsoPack behavior if a user is determined to replicate and use a
8176 // scalar instead of vector value.
8177 DenseMap<Instruction *, VPReplicateRecipe *> PredInst2Recipe;
8179 // Create a dummy pre-entry VPBasicBlock to start building the VPlan.
8180 VPBasicBlock *VPBB = new VPBasicBlock("Pre-Entry");
8181 auto Plan = llvm::make_unique<VPlan>(VPBB);
8183 // Represent values that will have defs inside VPlan.
8184 for (Value *V : NeedDef)
8185 Plan->addVPValue(V);
8187 // Scan the body of the loop in a topological order to visit each basic block
8188 // after having visited its predecessor basic blocks.
8189 LoopBlocksDFS DFS(OrigLoop);
8192 for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO())) {
8193 // Relevant instructions from basic block BB will be grouped into VPRecipe
8194 // ingredients and fill a new VPBasicBlock.
8195 unsigned VPBBsForBB = 0;
8196 auto *FirstVPBBForBB = new VPBasicBlock(BB->getName());
8197 VPBB->setOneSuccessor(FirstVPBBForBB);
8198 VPBB = FirstVPBBForBB;
8199 Builder.setInsertPoint(VPBB);
8201 std::vector<Instruction *> Ingredients;
8203 // Organize the ingredients to vectorize from current basic block in the
8205 for (Instruction &I : *BB) {
8206 Instruction *Instr = &I;
8208 // First filter out irrelevant instructions, to ensure no recipes are
8210 if (isa<BranchInst>(Instr) || isa<DbgInfoIntrinsic>(Instr) ||
8211 DeadInstructions.count(Instr))
8214 // I is a member of an InterleaveGroup for Range.Start. If it's an adjunct
8215 // member of the IG, do not construct any Recipe for it.
8216 const InterleaveGroup *IG = Legal->getInterleavedAccessGroup(Instr);
8217 if (IG && Instr != IG->getInsertPos() &&
8218 Range.Start >= 2 && // Query is illegal for VF == 1
8219 CM.getWideningDecision(Instr, Range.Start) ==
8220 LoopVectorizationCostModel::CM_Interleave) {
8221 if (SinkAfterInverse.count(Instr))
8222 Ingredients.push_back(SinkAfterInverse.find(Instr)->second);
8226 // Move instructions to handle first-order recurrences, step 1: avoid
8227 // handling this instruction until after we've handled the instruction it
8229 auto SAIt = SinkAfter.find(Instr);
8230 if (SAIt != SinkAfter.end()) {
8231 DEBUG(dbgs() << "Sinking" << *SAIt->first << " after" << *SAIt->second
8232 << " to vectorize a 1st order recurrence.\n");
8233 SinkAfterInverse[SAIt->second] = Instr;
8237 Ingredients.push_back(Instr);
8239 // Move instructions to handle first-order recurrences, step 2: push the
8240 // instruction to be sunk at its insertion point.
8241 auto SAInvIt = SinkAfterInverse.find(Instr);
8242 if (SAInvIt != SinkAfterInverse.end())
8243 Ingredients.push_back(SAInvIt->second);
8246 // Introduce each ingredient into VPlan.
8247 for (Instruction *Instr : Ingredients) {
8248 VPRecipeBase *Recipe = nullptr;
8250 // Check if Instr should belong to an interleave memory recipe, or already
8251 // does. In the latter case Instr is irrelevant.
8252 if ((Recipe = tryToInterleaveMemory(Instr, Range))) {
8253 VPBB->appendRecipe(Recipe);
8257 // Check if Instr is a memory operation that should be widened.
8258 if ((Recipe = tryToWidenMemory(Instr, Range, Plan))) {
8259 VPBB->appendRecipe(Recipe);
8263 // Check if Instr should form some PHI recipe.
8264 if ((Recipe = tryToOptimizeInduction(Instr, Range))) {
8265 VPBB->appendRecipe(Recipe);
8268 if ((Recipe = tryToBlend(Instr, Plan))) {
8269 VPBB->appendRecipe(Recipe);
8272 if (PHINode *Phi = dyn_cast<PHINode>(Instr)) {
8273 VPBB->appendRecipe(new VPWidenPHIRecipe(Phi));
8277 // Check if Instr is to be widened by a general VPWidenRecipe, after
8278 // having first checked for specific widening recipes that deal with
8279 // Interleave Groups, Inductions and Phi nodes.
8280 if (tryToWiden(Instr, VPBB, Range))
8283 // Otherwise, if all widening options failed, Instruction is to be
8284 // replicated. This may create a successor for VPBB.
8285 VPBasicBlock *NextVPBB =
8286 handleReplication(Instr, Range, VPBB, PredInst2Recipe, Plan);
8287 if (NextVPBB != VPBB) {
8289 VPBB->setName(BB->hasName() ? BB->getName() + "." + Twine(VPBBsForBB++)
8295 // Discard empty dummy pre-entry VPBasicBlock. Note that other VPBasicBlocks
8296 // may also be empty, such as the last one VPBB, reflecting original
8297 // basic-blocks with no recipes.
8298 VPBasicBlock *PreEntry = cast<VPBasicBlock>(Plan->getEntry());
8299 assert(PreEntry->empty() && "Expecting empty pre-entry block.");
8300 VPBlockBase *Entry = Plan->setEntry(PreEntry->getSingleSuccessor());
8301 PreEntry->disconnectSuccessor(Entry);
8304 std::string PlanName;
8305 raw_string_ostream RSO(PlanName);
8306 unsigned VF = Range.Start;
8308 RSO << "Initial VPlan for VF={" << VF;
8309 for (VF *= 2; VF < Range.End; VF *= 2) {
8315 Plan->setName(PlanName);
8320 void VPInterleaveRecipe::print(raw_ostream &O, const Twine &Indent) const {
8322 << Indent << "\"INTERLEAVE-GROUP with factor " << IG->getFactor() << " at ";
8323 IG->getInsertPos()->printAsOperand(O, false);
8325 for (unsigned i = 0; i < IG->getFactor(); ++i)
8326 if (Instruction *I = IG->getMember(i))
8328 << Indent << "\" " << VPlanIngredient(I) << " " << i << "\\l\"";
8331 void VPWidenRecipe::execute(VPTransformState &State) {
8332 for (auto &Instr : make_range(Begin, End))
8333 State.ILV->widenInstruction(Instr);
8336 void VPWidenIntOrFpInductionRecipe::execute(VPTransformState &State) {
8337 assert(!State.Instance && "Int or FP induction being replicated.");
8338 State.ILV->widenIntOrFpInduction(IV, Trunc);
8341 void VPWidenPHIRecipe::execute(VPTransformState &State) {
8342 State.ILV->widenPHIInstruction(Phi, State.UF, State.VF);
8345 void VPBlendRecipe::execute(VPTransformState &State) {
8346 State.ILV->setDebugLocFromInst(State.Builder, Phi);
8347 // We know that all PHIs in non-header blocks are converted into
8348 // selects, so we don't have to worry about the insertion order and we
8349 // can just use the builder.
8350 // At this point we generate the predication tree. There may be
8351 // duplications since this is a simple recursive scan, but future
8352 // optimizations will clean it up.
8354 unsigned NumIncoming = Phi->getNumIncomingValues();
8356 assert((User || NumIncoming == 1) &&
8357 "Multiple predecessors with predecessors having a full mask");
8358 // Generate a sequence of selects of the form:
8359 // SELECT(Mask3, In3,
8360 // SELECT(Mask2, In2,
8362 InnerLoopVectorizer::VectorParts Entry(State.UF);
8363 for (unsigned In = 0; In < NumIncoming; ++In) {
8364 for (unsigned Part = 0; Part < State.UF; ++Part) {
8365 // We might have single edge PHIs (blocks) - use an identity
8366 // 'select' for the first PHI operand.
8368 State.ILV->getOrCreateVectorValue(Phi->getIncomingValue(In), Part);
8370 Entry[Part] = In0; // Initialize with the first incoming value.
8372 // Select between the current value and the previous incoming edge
8373 // based on the incoming mask.
8374 Value *Cond = State.get(User->getOperand(In), Part);
8376 State.Builder.CreateSelect(Cond, In0, Entry[Part], "predphi");
8380 for (unsigned Part = 0; Part < State.UF; ++Part)
8381 State.ValueMap.setVectorValue(Phi, Part, Entry[Part]);
8384 void VPInterleaveRecipe::execute(VPTransformState &State) {
8385 assert(!State.Instance && "Interleave group being replicated.");
8386 State.ILV->vectorizeInterleaveGroup(IG->getInsertPos());
8389 void VPReplicateRecipe::execute(VPTransformState &State) {
8390 if (State.Instance) { // Generate a single instance.
8391 State.ILV->scalarizeInstruction(Ingredient, *State.Instance, IsPredicated);
8392 // Insert scalar instance packing it into a vector.
8393 if (AlsoPack && State.VF > 1) {
8394 // If we're constructing lane 0, initialize to start from undef.
8395 if (State.Instance->Lane == 0) {
8397 UndefValue::get(VectorType::get(Ingredient->getType(), State.VF));
8398 State.ValueMap.setVectorValue(Ingredient, State.Instance->Part, Undef);
8400 State.ILV->packScalarIntoVectorValue(Ingredient, *State.Instance);
8405 // Generate scalar instances for all VF lanes of all UF parts, unless the
8406 // instruction is uniform inwhich case generate only the first lane for each
8408 unsigned EndLane = IsUniform ? 1 : State.VF;
8409 for (unsigned Part = 0; Part < State.UF; ++Part)
8410 for (unsigned Lane = 0; Lane < EndLane; ++Lane)
8411 State.ILV->scalarizeInstruction(Ingredient, {Part, Lane}, IsPredicated);
8414 void VPBranchOnMaskRecipe::execute(VPTransformState &State) {
8415 assert(State.Instance && "Branch on Mask works only on single instance.");
8417 unsigned Part = State.Instance->Part;
8418 unsigned Lane = State.Instance->Lane;
8420 Value *ConditionBit = nullptr;
8421 if (!User) // Block in mask is all-one.
8422 ConditionBit = State.Builder.getTrue();
8424 VPValue *BlockInMask = User->getOperand(0);
8425 ConditionBit = State.get(BlockInMask, Part);
8426 if (ConditionBit->getType()->isVectorTy())
8427 ConditionBit = State.Builder.CreateExtractElement(
8428 ConditionBit, State.Builder.getInt32(Lane));
8431 // Replace the temporary unreachable terminator with a new conditional branch,
8432 // whose two destinations will be set later when they are created.
8433 auto *CurrentTerminator = State.CFG.PrevBB->getTerminator();
8434 assert(isa<UnreachableInst>(CurrentTerminator) &&
8435 "Expected to replace unreachable terminator with conditional branch.");
8436 auto *CondBr = BranchInst::Create(State.CFG.PrevBB, nullptr, ConditionBit);
8437 CondBr->setSuccessor(0, nullptr);
8438 ReplaceInstWithInst(CurrentTerminator, CondBr);
8441 void VPPredInstPHIRecipe::execute(VPTransformState &State) {
8442 assert(State.Instance && "Predicated instruction PHI works per instance.");
8443 Instruction *ScalarPredInst = cast<Instruction>(
8444 State.ValueMap.getScalarValue(PredInst, *State.Instance));
8445 BasicBlock *PredicatedBB = ScalarPredInst->getParent();
8446 BasicBlock *PredicatingBB = PredicatedBB->getSinglePredecessor();
8447 assert(PredicatingBB && "Predicated block has no single predecessor.");
8449 // By current pack/unpack logic we need to generate only a single phi node: if
8450 // a vector value for the predicated instruction exists at this point it means
8451 // the instruction has vector users only, and a phi for the vector value is
8452 // needed. In this case the recipe of the predicated instruction is marked to
8453 // also do that packing, thereby "hoisting" the insert-element sequence.
8454 // Otherwise, a phi node for the scalar value is needed.
8455 unsigned Part = State.Instance->Part;
8456 if (State.ValueMap.hasVectorValue(PredInst, Part)) {
8457 Value *VectorValue = State.ValueMap.getVectorValue(PredInst, Part);
8458 InsertElementInst *IEI = cast<InsertElementInst>(VectorValue);
8459 PHINode *VPhi = State.Builder.CreatePHI(IEI->getType(), 2);
8460 VPhi->addIncoming(IEI->getOperand(0), PredicatingBB); // Unmodified vector.
8461 VPhi->addIncoming(IEI, PredicatedBB); // New vector with inserted element.
8462 State.ValueMap.resetVectorValue(PredInst, Part, VPhi); // Update cache.
8464 Type *PredInstType = PredInst->getType();
8465 PHINode *Phi = State.Builder.CreatePHI(PredInstType, 2);
8466 Phi->addIncoming(UndefValue::get(ScalarPredInst->getType()), PredicatingBB);
8467 Phi->addIncoming(ScalarPredInst, PredicatedBB);
8468 State.ValueMap.resetScalarValue(PredInst, *State.Instance, Phi);
8472 void VPWidenMemoryInstructionRecipe::execute(VPTransformState &State) {
8474 return State.ILV->vectorizeMemoryInstruction(&Instr);
8476 // Last (and currently only) operand is a mask.
8477 InnerLoopVectorizer::VectorParts MaskValues(State.UF);
8478 VPValue *Mask = User->getOperand(User->getNumOperands() - 1);
8479 for (unsigned Part = 0; Part < State.UF; ++Part)
8480 MaskValues[Part] = State.get(Mask, Part);
8481 State.ILV->vectorizeMemoryInstruction(&Instr, &MaskValues);
8484 bool LoopVectorizePass::processLoop(Loop *L) {
8485 assert(L->empty() && "Only process inner loops.");
8488 const std::string DebugLocStr = getDebugLocString(L);
8491 DEBUG(dbgs() << "\nLV: Checking a loop in \""
8492 << L->getHeader()->getParent()->getName() << "\" from "
8493 << DebugLocStr << "\n");
8495 LoopVectorizeHints Hints(L, DisableUnrolling, *ORE);
8497 DEBUG(dbgs() << "LV: Loop hints:"
8499 << (Hints.getForce() == LoopVectorizeHints::FK_Disabled
8501 : (Hints.getForce() == LoopVectorizeHints::FK_Enabled
8504 << " width=" << Hints.getWidth()
8505 << " unroll=" << Hints.getInterleave() << "\n");
8507 // Function containing loop
8508 Function *F = L->getHeader()->getParent();
8510 // Looking at the diagnostic output is the only way to determine if a loop
8511 // was vectorized (other than looking at the IR or machine code), so it
8512 // is important to generate an optimization remark for each loop. Most of
8513 // these messages are generated as OptimizationRemarkAnalysis. Remarks
8514 // generated as OptimizationRemark and OptimizationRemarkMissed are
8515 // less verbose reporting vectorized loops and unvectorized loops that may
8516 // benefit from vectorization, respectively.
8518 if (!Hints.allowVectorization(F, L, AlwaysVectorize)) {
8519 DEBUG(dbgs() << "LV: Loop hints prevent vectorization.\n");
8523 PredicatedScalarEvolution PSE(*SE, *L);
8525 // Check if it is legal to vectorize the loop.
8526 LoopVectorizationRequirements Requirements(*ORE);
8527 LoopVectorizationLegality LVL(L, PSE, DT, TLI, AA, F, TTI, GetLAA, LI, ORE,
8528 &Requirements, &Hints, DB, AC);
8529 if (!LVL.canVectorize()) {
8530 DEBUG(dbgs() << "LV: Not vectorizing: Cannot prove legality.\n");
8531 emitMissedWarning(F, L, Hints, ORE);
8535 // Check the function attributes to find out if this function should be
8536 // optimized for size.
8538 Hints.getForce() != LoopVectorizeHints::FK_Enabled && F->optForSize();
8540 // Check the loop for a trip count threshold: vectorize loops with a tiny trip
8541 // count by optimizing for size, to minimize overheads.
8542 unsigned ExpectedTC = SE->getSmallConstantMaxTripCount(L);
8543 bool HasExpectedTC = (ExpectedTC > 0);
8545 if (!HasExpectedTC && LoopVectorizeWithBlockFrequency) {
8546 auto EstimatedTC = getLoopEstimatedTripCount(L);
8548 ExpectedTC = *EstimatedTC;
8549 HasExpectedTC = true;
8553 if (HasExpectedTC && ExpectedTC < TinyTripCountVectorThreshold) {
8554 DEBUG(dbgs() << "LV: Found a loop with a very small trip count. "
8555 << "This loop is worth vectorizing only if no scalar "
8556 << "iteration overheads are incurred.");
8557 if (Hints.getForce() == LoopVectorizeHints::FK_Enabled)
8558 DEBUG(dbgs() << " But vectorizing was explicitly forced.\n");
8560 DEBUG(dbgs() << "\n");
8561 // Loops with a very small trip count are considered for vectorization
8562 // under OptForSize, thereby making sure the cost of their loop body is
8563 // dominant, free of runtime guards and scalar iteration overheads.
8568 // Check the function attributes to see if implicit floats are allowed.
8569 // FIXME: This check doesn't seem possibly correct -- what if the loop is
8570 // an integer loop and the vector instructions selected are purely integer
8571 // vector instructions?
8572 if (F->hasFnAttribute(Attribute::NoImplicitFloat)) {
8573 DEBUG(dbgs() << "LV: Can't vectorize when the NoImplicitFloat"
8574 "attribute is used.\n");
8575 ORE->emit(createMissedAnalysis(Hints.vectorizeAnalysisPassName(),
8576 "NoImplicitFloat", L)
8577 << "loop not vectorized due to NoImplicitFloat attribute");
8578 emitMissedWarning(F, L, Hints, ORE);
8582 // Check if the target supports potentially unsafe FP vectorization.
8583 // FIXME: Add a check for the type of safety issue (denormal, signaling)
8584 // for the target we're vectorizing for, to make sure none of the
8585 // additional fp-math flags can help.
8586 if (Hints.isPotentiallyUnsafe() &&
8587 TTI->isFPVectorizationPotentiallyUnsafe()) {
8588 DEBUG(dbgs() << "LV: Potentially unsafe FP op prevents vectorization.\n");
8590 createMissedAnalysis(Hints.vectorizeAnalysisPassName(), "UnsafeFP", L)
8591 << "loop not vectorized due to unsafe FP support.");
8592 emitMissedWarning(F, L, Hints, ORE);
8596 // Use the cost model.
8597 LoopVectorizationCostModel CM(L, PSE, LI, &LVL, *TTI, TLI, DB, AC, ORE, F,
8599 CM.collectValuesToIgnore();
8601 // Use the planner for vectorization.
8602 LoopVectorizationPlanner LVP(L, LI, TLI, TTI, &LVL, CM);
8604 // Get user vectorization factor.
8605 unsigned UserVF = Hints.getWidth();
8607 // Plan how to best vectorize, return the best VF and its cost.
8608 LoopVectorizationCostModel::VectorizationFactor VF =
8609 LVP.plan(OptForSize, UserVF);
8611 // Select the interleave count.
8612 unsigned IC = CM.selectInterleaveCount(OptForSize, VF.Width, VF.Cost);
8614 // Get user interleave count.
8615 unsigned UserIC = Hints.getInterleave();
8617 // Identify the diagnostic messages that should be produced.
8618 std::pair<StringRef, std::string> VecDiagMsg, IntDiagMsg;
8619 bool VectorizeLoop = true, InterleaveLoop = true;
8620 if (Requirements.doesNotMeet(F, L, Hints)) {
8621 DEBUG(dbgs() << "LV: Not vectorizing: loop did not meet vectorization "
8623 emitMissedWarning(F, L, Hints, ORE);
8627 if (VF.Width == 1) {
8628 DEBUG(dbgs() << "LV: Vectorization is possible but not beneficial.\n");
8629 VecDiagMsg = std::make_pair(
8630 "VectorizationNotBeneficial",
8631 "the cost-model indicates that vectorization is not beneficial");
8632 VectorizeLoop = false;
8635 if (IC == 1 && UserIC <= 1) {
8636 // Tell the user interleaving is not beneficial.
8637 DEBUG(dbgs() << "LV: Interleaving is not beneficial.\n");
8638 IntDiagMsg = std::make_pair(
8639 "InterleavingNotBeneficial",
8640 "the cost-model indicates that interleaving is not beneficial");
8641 InterleaveLoop = false;
8643 IntDiagMsg.first = "InterleavingNotBeneficialAndDisabled";
8644 IntDiagMsg.second +=
8645 " and is explicitly disabled or interleave count is set to 1";
8647 } else if (IC > 1 && UserIC == 1) {
8648 // Tell the user interleaving is beneficial, but it explicitly disabled.
8650 << "LV: Interleaving is beneficial but is explicitly disabled.");
8651 IntDiagMsg = std::make_pair(
8652 "InterleavingBeneficialButDisabled",
8653 "the cost-model indicates that interleaving is beneficial "
8654 "but is explicitly disabled or interleave count is set to 1");
8655 InterleaveLoop = false;
8658 // Override IC if user provided an interleave count.
8659 IC = UserIC > 0 ? UserIC : IC;
8661 // Emit diagnostic messages, if any.
8662 const char *VAPassName = Hints.vectorizeAnalysisPassName();
8663 if (!VectorizeLoop && !InterleaveLoop) {
8664 // Do not vectorize or interleaving the loop.
8666 return OptimizationRemarkMissed(VAPassName, VecDiagMsg.first,
8667 L->getStartLoc(), L->getHeader())
8668 << VecDiagMsg.second;
8671 return OptimizationRemarkMissed(LV_NAME, IntDiagMsg.first,
8672 L->getStartLoc(), L->getHeader())
8673 << IntDiagMsg.second;
8676 } else if (!VectorizeLoop && InterleaveLoop) {
8677 DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
8679 return OptimizationRemarkAnalysis(VAPassName, VecDiagMsg.first,
8680 L->getStartLoc(), L->getHeader())
8681 << VecDiagMsg.second;
8683 } else if (VectorizeLoop && !InterleaveLoop) {
8684 DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width << ") in "
8685 << DebugLocStr << '\n');
8687 return OptimizationRemarkAnalysis(LV_NAME, IntDiagMsg.first,
8688 L->getStartLoc(), L->getHeader())
8689 << IntDiagMsg.second;
8691 } else if (VectorizeLoop && InterleaveLoop) {
8692 DEBUG(dbgs() << "LV: Found a vectorizable loop (" << VF.Width << ") in "
8693 << DebugLocStr << '\n');
8694 DEBUG(dbgs() << "LV: Interleave Count is " << IC << '\n');
8697 LVP.setBestPlan(VF.Width, IC);
8699 using namespace ore;
8701 if (!VectorizeLoop) {
8702 assert(IC > 1 && "interleave count should not be 1 or 0");
8703 // If we decided that it is not legal to vectorize the loop, then
8705 InnerLoopUnroller Unroller(L, PSE, LI, DT, TLI, TTI, AC, ORE, IC, &LVL,
8707 LVP.executePlan(Unroller, DT);
8710 return OptimizationRemark(LV_NAME, "Interleaved", L->getStartLoc(),
8712 << "interleaved loop (interleaved count: "
8713 << NV("InterleaveCount", IC) << ")";
8716 // If we decided that it is *legal* to vectorize the loop, then do it.
8717 InnerLoopVectorizer LB(L, PSE, LI, DT, TLI, TTI, AC, ORE, VF.Width, IC,
8719 LVP.executePlan(LB, DT);
8722 // Add metadata to disable runtime unrolling a scalar loop when there are
8723 // no runtime checks about strides and memory. A scalar loop that is
8724 // rarely used is not worth unrolling.
8725 if (!LB.areSafetyChecksAdded())
8726 AddRuntimeUnrollDisableMetaData(L);
8728 // Report the vectorization decision.
8730 return OptimizationRemark(LV_NAME, "Vectorized", L->getStartLoc(),
8732 << "vectorized loop (vectorization width: "
8733 << NV("VectorizationFactor", VF.Width)
8734 << ", interleaved count: " << NV("InterleaveCount", IC) << ")";
8738 // Mark the loop as already vectorized to avoid vectorizing again.
8739 Hints.setAlreadyVectorized();
8741 DEBUG(verifyFunction(*L->getHeader()->getParent()));
8745 bool LoopVectorizePass::runImpl(
8746 Function &F, ScalarEvolution &SE_, LoopInfo &LI_, TargetTransformInfo &TTI_,
8747 DominatorTree &DT_, BlockFrequencyInfo &BFI_, TargetLibraryInfo *TLI_,
8748 DemandedBits &DB_, AliasAnalysis &AA_, AssumptionCache &AC_,
8749 std::function<const LoopAccessInfo &(Loop &)> &GetLAA_,
8750 OptimizationRemarkEmitter &ORE_) {
8764 // 1. the target claims to have no vector registers, and
8765 // 2. interleaving won't help ILP.
8767 // The second condition is necessary because, even if the target has no
8768 // vector registers, loop vectorization may still enable scalar
8770 if (!TTI->getNumberOfRegisters(true) && TTI->getMaxInterleaveFactor(1) < 2)
8773 bool Changed = false;
8775 // The vectorizer requires loops to be in simplified form.
8776 // Since simplification may add new inner loops, it has to run before the
8777 // legality and profitability checks. This means running the loop vectorizer
8778 // will simplify all loops, regardless of whether anything end up being
8781 Changed |= simplifyLoop(L, DT, LI, SE, AC, false /* PreserveLCSSA */);
8783 // Build up a worklist of inner-loops to vectorize. This is necessary as
8784 // the act of vectorizing or partially unrolling a loop creates new loops
8785 // and can invalidate iterators across the loops.
8786 SmallVector<Loop *, 8> Worklist;
8789 addAcyclicInnerLoop(*L, Worklist);
8791 LoopsAnalyzed += Worklist.size();
8793 // Now walk the identified inner loops.
8794 while (!Worklist.empty()) {
8795 Loop *L = Worklist.pop_back_val();
8797 // For the inner loops we actually process, form LCSSA to simplify the
8799 Changed |= formLCSSARecursively(*L, *DT, LI, SE);
8801 Changed |= processLoop(L);
8804 // Process each loop nest in the function.
8808 PreservedAnalyses LoopVectorizePass::run(Function &F,
8809 FunctionAnalysisManager &AM) {
8810 auto &SE = AM.getResult<ScalarEvolutionAnalysis>(F);
8811 auto &LI = AM.getResult<LoopAnalysis>(F);
8812 auto &TTI = AM.getResult<TargetIRAnalysis>(F);
8813 auto &DT = AM.getResult<DominatorTreeAnalysis>(F);
8814 auto &BFI = AM.getResult<BlockFrequencyAnalysis>(F);
8815 auto &TLI = AM.getResult<TargetLibraryAnalysis>(F);
8816 auto &AA = AM.getResult<AAManager>(F);
8817 auto &AC = AM.getResult<AssumptionAnalysis>(F);
8818 auto &DB = AM.getResult<DemandedBitsAnalysis>(F);
8819 auto &ORE = AM.getResult<OptimizationRemarkEmitterAnalysis>(F);
8821 auto &LAM = AM.getResult<LoopAnalysisManagerFunctionProxy>(F).getManager();
8822 std::function<const LoopAccessInfo &(Loop &)> GetLAA =
8823 [&](Loop &L) -> const LoopAccessInfo & {
8824 LoopStandardAnalysisResults AR = {AA, AC, DT, LI, SE, TLI, TTI, nullptr};
8825 return LAM.getResult<LoopAccessAnalysis>(L, AR);
8828 runImpl(F, SE, LI, TTI, DT, BFI, &TLI, DB, AA, AC, GetLAA, ORE);
8830 return PreservedAnalyses::all();
8831 PreservedAnalyses PA;
8832 PA.preserve<LoopAnalysis>();
8833 PA.preserve<DominatorTreeAnalysis>();
8834 PA.preserve<BasicAA>();
8835 PA.preserve<GlobalsAA>();