1 Pull in r199974 from upstream llvm trunk (by Venkatraman Govindaraju):
3 [Sparc] Correct quad register list in the asm parser.
4 Add test cases to check parsing of v9 double registers and their aliased quad registers.
6 Introduced here: http://svn.freebsd.org/changeset/base/262261
8 Index: test/MC/Disassembler/Sparc/sparc-fp.txt
9 ===================================================================
10 --- test/MC/Disassembler/Sparc/sparc-fp.txt
11 +++ test/MC/Disassembler/Sparc/sparc-fp.txt
13 # CHECK: faddq %f0, %f4, %f8
16 +# CHECK: faddd %f32, %f34, %f62
19 +# CHECK: faddq %f32, %f36, %f60
22 # CHECK: fsubs %f0, %f4, %f8
25 Index: test/MC/Sparc/sparc-fp-instructions.s
26 ===================================================================
27 --- test/MC/Sparc/sparc-fp-instructions.s
28 +++ test/MC/Sparc/sparc-fp-instructions.s
33 + ! make sure we can handle V9 double registers and their aliased quad registers.
34 + ! CHECK: faddd %f32, %f34, %f62 ! encoding: [0xbf,0xa0,0x48,0x43]
35 + ! CHECK: faddq %f32, %f36, %f60 ! encoding: [0xbb,0xa0,0x48,0x65]
36 + faddd %f32, %f34, %f62
37 + faddq %f32, %f36, %f60
39 ! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4]
40 ! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4]
41 ! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4]
42 Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
43 ===================================================================
44 --- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
45 +++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
46 @@ -117,7 +117,7 @@ class SparcAsmParser : public MCTargetAsmParser {
47 static unsigned QuadFPRegs[32] = {
48 Sparc::Q0, Sparc::Q1, Sparc::Q2, Sparc::Q3,
49 Sparc::Q4, Sparc::Q5, Sparc::Q6, Sparc::Q7,
50 - Sparc::Q8, Sparc::Q7, Sparc::Q8, Sparc::Q9,
51 + Sparc::Q8, Sparc::Q9, Sparc::Q10, Sparc::Q11,
52 Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 };