1 //===---------------------------- libunwind.h -----------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is dual licensed under the MIT and the University of Illinois Open
6 // Source Licenses. See LICENSE.TXT for details.
9 // Compatible with libunwind API documented at:
10 // http://www.nongnu.org/libunwind/man/libunwind(3).html
12 //===----------------------------------------------------------------------===//
17 #include <__libunwind_config.h>
23 #include <Availability.h>
25 #define LIBUNWIND_AVAIL __attribute__((unavailable))
27 #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0)
30 #define LIBUNWIND_AVAIL
35 UNW_ESUCCESS = 0, /* no error */
36 UNW_EUNSPEC = -6540, /* unspecified (general) error */
37 UNW_ENOMEM = -6541, /* out of memory */
38 UNW_EBADREG = -6542, /* bad register number */
39 UNW_EREADONLYREG = -6543, /* attempt to write read-only register */
40 UNW_ESTOPUNWIND = -6544, /* stop unwinding */
41 UNW_EINVALIDIP = -6545, /* invalid IP */
42 UNW_EBADFRAME = -6546, /* bad frame */
43 UNW_EINVAL = -6547, /* unsupported operation or bad value */
44 UNW_EBADVERSION = -6548, /* unwind info has unsupported version */
45 UNW_ENOINFO = -6549 /* no unwind info found */
48 struct unw_context_t {
49 uint64_t data[_LIBUNWIND_CONTEXT_SIZE];
51 typedef struct unw_context_t unw_context_t;
54 uint64_t data[_LIBUNWIND_CURSOR_SIZE];
56 typedef struct unw_cursor_t unw_cursor_t;
58 typedef struct unw_addr_space *unw_addr_space_t;
60 typedef int unw_regnum_t;
61 #if _LIBUNWIND_ARM_EHABI
62 typedef uint32_t unw_word_t;
63 typedef uint64_t unw_fpreg_t;
65 typedef uint64_t unw_word_t;
66 typedef double unw_fpreg_t;
69 struct unw_proc_info_t {
70 unw_word_t start_ip; /* start address of function */
71 unw_word_t end_ip; /* address after end of function */
72 unw_word_t lsda; /* address of language specific data area, */
73 /* or zero if not used */
74 unw_word_t handler; /* personality routine, or zero if not used */
75 unw_word_t gp; /* not used */
76 unw_word_t flags; /* not used */
77 uint32_t format; /* compact unwind encoding, or zero if none */
78 uint32_t unwind_info_size; /* size of dwarf unwind info, or zero if none */
79 unw_word_t unwind_info; /* address of dwarf unwind info, or zero */
80 unw_word_t extra; /* mach_header of mach-o image containing func */
82 typedef struct unw_proc_info_t unw_proc_info_t;
88 extern int unw_getcontext(unw_context_t *) LIBUNWIND_AVAIL;
89 extern int unw_init_local(unw_cursor_t *, unw_context_t *) LIBUNWIND_AVAIL;
90 extern int unw_step(unw_cursor_t *) LIBUNWIND_AVAIL;
91 extern int unw_get_reg(unw_cursor_t *, unw_regnum_t, unw_word_t *) LIBUNWIND_AVAIL;
92 extern int unw_get_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t *) LIBUNWIND_AVAIL;
93 extern int unw_set_reg(unw_cursor_t *, unw_regnum_t, unw_word_t) LIBUNWIND_AVAIL;
94 extern int unw_set_fpreg(unw_cursor_t *, unw_regnum_t, unw_fpreg_t) LIBUNWIND_AVAIL;
95 extern int unw_resume(unw_cursor_t *) LIBUNWIND_AVAIL;
98 /* Save VFP registers in FSTMX format (instead of FSTMD). */
99 extern void unw_save_vfp_as_X(unw_cursor_t *) LIBUNWIND_AVAIL;
103 extern const char *unw_regname(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
104 extern int unw_get_proc_info(unw_cursor_t *, unw_proc_info_t *) LIBUNWIND_AVAIL;
105 extern int unw_is_fpreg(unw_cursor_t *, unw_regnum_t) LIBUNWIND_AVAIL;
106 extern int unw_is_signal_frame(unw_cursor_t *) LIBUNWIND_AVAIL;
107 extern int unw_get_proc_name(unw_cursor_t *, char *, size_t, unw_word_t *) LIBUNWIND_AVAIL;
108 //extern int unw_get_save_loc(unw_cursor_t*, int, unw_save_loc_t*);
110 extern unw_addr_space_t unw_local_addr_space;
114 * Mac OS X "remote" API for unwinding other processes on same machine
117 extern unw_addr_space_t unw_create_addr_space_for_task(task_t);
118 extern void unw_destroy_addr_space(unw_addr_space_t);
119 extern int unw_init_remote_thread(unw_cursor_t *, unw_addr_space_t, thread_t *);
120 #endif /* UNW_REMOTE */
123 * traditional libunwind "remote" API
124 * NOT IMPLEMENTED on Mac OS X
126 * extern int unw_init_remote(unw_cursor_t*, unw_addr_space_t,
128 * extern unw_accessors_t unw_get_accessors(unw_addr_space_t);
129 * extern unw_addr_space_t unw_create_addr_space(unw_accessors_t, int);
130 * extern void unw_flush_cache(unw_addr_space_t, unw_word_t,
132 * extern int unw_set_caching_policy(unw_addr_space_t,
133 * unw_caching_policy_t);
134 * extern void _U_dyn_register(unw_dyn_info_t*);
135 * extern void _U_dyn_cancel(unw_dyn_info_t*);
142 // architecture independent register numbers
144 UNW_REG_IP = -1, // instruction pointer
145 UNW_REG_SP = -2, // stack pointer
148 // 32-bit x86 registers
160 // 64-bit x86_64 registers
181 // 32-bit ppc register numbers
292 UNW_PPC_VRSAVE = 109,
294 UNW_PPC_SPE_ACC = 111,
295 UNW_PPC_SPEFSCR = 112
298 // 64-bit ARM64 registers
370 // 32-bit ARM registers. Numbers match DWARF for ARM spec #3.1 Table 1.
371 // Naming scheme uses recommendations given in Note 4 for VFP-v2 and VFP-v3.
372 // In this scheme, even though the 64-bit floating point registers D0-D31
373 // overlap physically with the 32-bit floating pointer registers S0-S31,
374 // they are given a non-overlapping range of register numbers.
376 // Commented out ranges are not preserved during unwinding.
391 UNW_ARM_SP = 13, // Logical alias for UNW_REG_SP
395 UNW_ARM_IP = 15, // Logical alias for UNW_REG_IP
397 // 16-63 -- OBSOLETE. Used in VFP1 to represent both S0-S31 and D0-D31.
430 // 96-103 -- OBSOLETE. F0-F7. Used by the FPA system. Superseded by VFP.
431 // 104-111 -- wCGR0-wCGR7, ACC0-ACC7 (Intel wireless MMX)
448 // 128-133 -- SPSR, SPSR_{FIQ|IRQ|ABT|UND|SVC}
449 // 134-143 -- Reserved
450 // 144-150 -- R8_USR-R14_USR
451 // 151-157 -- R8_FIQ-R14_FIQ
452 // 158-159 -- R13_IRQ-R14_IRQ
453 // 160-161 -- R13_ABT-R14_ABT
454 // 162-163 -- R13_UND-R14_UND
455 // 164-165 -- R13_SVC-R14_SVC
456 // 166-191 -- Reserved
461 // 196-199 -- wC4-wC7 (Intel wireless MMX control)
462 // 200-255 -- Reserved
495 // 288-319 -- Reserved for VFP/Neon
496 // 320-8191 -- Reserved
497 // 8192-16383 -- Unspecified vendor co-processor register.
500 // OpenRISC1000 register numbers
536 // 64-bit RISC-V registers