1 //===--- SystemZ.cpp - Implement SystemZ target feature support -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements SystemZ TargetInfo objects.
12 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/Builtins.h"
16 #include "clang/Basic/LangOptions.h"
17 #include "clang/Basic/MacroBuilder.h"
18 #include "clang/Basic/TargetBuiltins.h"
19 #include "llvm/ADT/StringSwitch.h"
21 using namespace clang;
22 using namespace clang::targets;
24 const Builtin::Info SystemZTargetInfo::BuiltinInfo[] = {
25 #define BUILTIN(ID, TYPE, ATTRS) \
26 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
27 #define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE) \
28 {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
29 #include "clang/Basic/BuiltinsSystemZ.def"
32 const char *const SystemZTargetInfo::GCCRegNames[] = {
33 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
34 "r11", "r12", "r13", "r14", "r15", "f0", "f2", "f4", "f6", "f1", "f3",
35 "f5", "f7", "f8", "f10", "f12", "f14", "f9", "f11", "f13", "f15"
38 ArrayRef<const char *> SystemZTargetInfo::getGCCRegNames() const {
39 return llvm::makeArrayRef(GCCRegNames);
42 bool SystemZTargetInfo::validateAsmConstraint(
43 const char *&Name, TargetInfo::ConstraintInfo &Info) const {
48 case 'a': // Address register
49 case 'd': // Data register (equivalent to 'r')
50 case 'f': // Floating-point register
51 Info.setAllowsRegister();
54 case 'I': // Unsigned 8-bit constant
55 case 'J': // Unsigned 12-bit constant
56 case 'K': // Signed 16-bit constant
57 case 'L': // Signed 20-bit displacement (on all targets we support)
58 case 'M': // 0x7fffffff
61 case 'Q': // Memory with base and unsigned 12-bit displacement
62 case 'R': // Likewise, plus an index
63 case 'S': // Memory with base and signed 20-bit displacement
64 case 'T': // Likewise, plus an index
65 Info.setAllowsMemory();
70 int SystemZTargetInfo::getISARevision(const StringRef &Name) const {
71 return llvm::StringSwitch<int>(Name)
72 .Cases("arch8", "z10", 8)
73 .Cases("arch9", "z196", 9)
74 .Cases("arch10", "zEC12", 10)
75 .Cases("arch11", "z13", 11)
76 .Cases("arch12", "z14", 12)
80 bool SystemZTargetInfo::hasFeature(StringRef Feature) const {
81 return llvm::StringSwitch<bool>(Feature)
82 .Case("systemz", true)
83 .Case("arch8", ISARevision >= 8)
84 .Case("arch9", ISARevision >= 9)
85 .Case("arch10", ISARevision >= 10)
86 .Case("arch11", ISARevision >= 11)
87 .Case("arch12", ISARevision >= 12)
88 .Case("htm", HasTransactionalExecution)
89 .Case("vx", HasVector)
93 void SystemZTargetInfo::getTargetDefines(const LangOptions &Opts,
94 MacroBuilder &Builder) const {
95 Builder.defineMacro("__s390__");
96 Builder.defineMacro("__s390x__");
97 Builder.defineMacro("__zarch__");
98 Builder.defineMacro("__LONG_DOUBLE_128__");
100 Builder.defineMacro("__ARCH__", Twine(ISARevision));
102 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");
103 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");
104 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");
105 Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");
107 if (HasTransactionalExecution)
108 Builder.defineMacro("__HTM__");
110 Builder.defineMacro("__VX__");
112 Builder.defineMacro("__VEC__", "10302");
115 ArrayRef<Builtin::Info> SystemZTargetInfo::getTargetBuiltins() const {
116 return llvm::makeArrayRef(BuiltinInfo, clang::SystemZ::LastTSBuiltin -
117 Builtin::FirstTSBuiltin);