1 //===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares X86 TargetInfo objects.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
15 #define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
17 #include "OSTargets.h"
18 #include "clang/Basic/TargetInfo.h"
19 #include "clang/Basic/TargetOptions.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/Support/Compiler.h"
26 // X86 target abstract base class; x86-32 and x86-64 are very close, so
27 // most of the implementation can be shared.
28 class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
47 } MMX3DNowLevel = NoMMX3DNow;
48 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
51 bool HasPCLMUL = false;
52 bool HasLZCNT = false;
53 bool HasRDRND = false;
54 bool HasFSGSBASE = false;
57 bool HasPOPCNT = false;
59 bool HasPRFCHW = false;
60 bool HasRDSEED = false;
66 bool HasAVX512CD = false;
67 bool HasAVX512VPOPCNTDQ = false;
68 bool HasAVX512ER = false;
69 bool HasAVX512PF = false;
70 bool HasAVX512DQ = false;
71 bool HasAVX512BW = false;
72 bool HasAVX512VL = false;
73 bool HasAVX512VBMI = false;
74 bool HasAVX512IFMA = false;
77 bool HasSHSTK = false;
82 bool HasXSAVE = false;
83 bool HasXSAVEOPT = false;
84 bool HasXSAVEC = false;
85 bool HasXSAVES = false;
86 bool HasMWAITX = false;
87 bool HasCLZERO = false;
89 bool HasCLFLUSHOPT = false;
91 bool HasMOVBE = false;
92 bool HasPREFETCHWT1 = false;
94 /// \brief Enumeration of all of the X86 CPUs supported by Clang.
96 /// Each enumeration represents a particular CPU supported by Clang. These
97 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
100 #define PROC(ENUM, STRING, IS64BIT) CK_##ENUM,
101 #include "clang/Basic/X86Target.def"
104 bool checkCPUKind(CPUKind Kind) const;
106 CPUKind getCPUKind(StringRef CPU) const;
108 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
111 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
112 : TargetInfo(Triple) {
113 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
116 unsigned getFloatEvalMethod() const override {
117 // X87 evaluates with 80 bits "long double" precision.
118 return SSELevel == NoSSE ? 2 : 0;
121 ArrayRef<const char *> getGCCRegNames() const override;
123 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
127 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
129 bool validateCpuSupports(StringRef Name) const override;
131 bool validateCpuIs(StringRef Name) const override;
133 bool validateAsmConstraint(const char *&Name,
134 TargetInfo::ConstraintInfo &info) const override;
136 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
137 bool &HasSizeMismatch) const override {
138 // esp and ebp are the only 32-bit registers the x86 backend can currently
140 if (RegName.equals("esp") || RegName.equals("ebp")) {
141 // Check that the register size is 32-bit.
142 HasSizeMismatch = RegSize != 32;
149 bool validateOutputSize(StringRef Constraint, unsigned Size) const override;
151 bool validateInputSize(StringRef Constraint, unsigned Size) const override;
153 virtual bool validateOperandSize(StringRef Constraint, unsigned Size) const;
155 std::string convertConstraint(const char *&Constraint) const override;
156 const char *getClobbers() const override {
157 return "~{dirflag},~{fpsr},~{flags}";
160 StringRef getConstraintRegister(const StringRef &Constraint,
161 const StringRef &Expression) const override {
162 StringRef::iterator I, E;
163 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
170 // For the register constraints, return the matching register name
183 // In case the constraint is 'r' we need to return Expression
186 // Double letters Y<x> constraints
188 if ((++I != E) && ((*I == '0') || (*I == 'z')))
196 bool useFP16ConversionIntrinsics() const override {
200 void getTargetDefines(const LangOptions &Opts,
201 MacroBuilder &Builder) const override;
203 static void setSSELevel(llvm::StringMap<bool> &Features, X86SSEEnum Level,
206 static void setMMXLevel(llvm::StringMap<bool> &Features, MMX3DNowEnum Level,
209 static void setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
212 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
213 bool Enabled) const override {
214 setFeatureEnabledImpl(Features, Name, Enabled);
217 // This exists purely to cut down on the number of virtual calls in
218 // initFeatureMap which calls this repeatedly.
219 static void setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
220 StringRef Name, bool Enabled);
223 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
225 const std::vector<std::string> &FeaturesVec) const override;
227 bool isValidFeatureName(StringRef Name) const override;
229 bool hasFeature(StringRef Feature) const override;
231 bool handleTargetFeatures(std::vector<std::string> &Features,
232 DiagnosticsEngine &Diags) override;
234 StringRef getABI() const override {
235 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
237 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
239 if (getTriple().getArch() == llvm::Triple::x86 &&
240 MMX3DNowLevel == NoMMX3DNow)
245 bool isValidCPUName(StringRef Name) const override {
246 return checkCPUKind(getCPUKind(Name));
249 bool setCPU(const std::string &Name) override {
250 return checkCPUKind(CPU = getCPUKind(Name));
253 bool setFPMath(StringRef Name) override;
255 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
256 // Most of the non-ARM calling conventions are i386 conventions.
261 case CC_X86VectorCall:
266 case CC_IntelOclBicc:
267 case CC_OpenCLKernel:
274 CallingConv getDefaultCallingConv(CallingConvMethodType MT) const override {
275 return MT == CCMT_Member ? CC_X86ThisCall : CC_C;
278 bool hasSjLjLowering() const override { return true; }
280 void setSupportedOpenCLOpts() override {
281 getSupportedOpenCLOpts().supportAll();
285 // X86-32 generic target
286 class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
288 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
289 : X86TargetInfo(Triple, Opts) {
290 DoubleAlign = LongLongAlign = 32;
291 LongDoubleWidth = 96;
292 LongDoubleAlign = 32;
294 resetDataLayout("e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128");
295 SizeType = UnsignedInt;
296 PtrDiffType = SignedInt;
297 IntPtrType = SignedInt;
300 // Use fpret for all types.
301 RealTypeUsesObjCFPRet =
302 ((1 << TargetInfo::Float) | (1 << TargetInfo::Double) |
303 (1 << TargetInfo::LongDouble));
305 // x86-32 has atomics up to 8 bytes
306 // FIXME: Check that we actually have cmpxchg8b before setting
307 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
308 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
311 BuiltinVaListKind getBuiltinVaListKind() const override {
312 return TargetInfo::CharPtrBuiltinVaList;
315 int getEHDataRegisterNumber(unsigned RegNo) const override {
323 bool validateOperandSize(StringRef Constraint, unsigned Size) const override {
324 switch (Constraint[0]) {
341 return X86TargetInfo::validateOperandSize(Constraint, Size);
344 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
347 class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
348 : public NetBSDTargetInfo<X86_32TargetInfo> {
350 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
351 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
353 unsigned getFloatEvalMethod() const override {
354 unsigned Major, Minor, Micro;
355 getTriple().getOSVersion(Major, Minor, Micro);
356 // New NetBSD uses the default rounding mode.
357 if (Major >= 7 || (Major == 6 && Minor == 99 && Micro >= 26) || Major == 0)
358 return X86_32TargetInfo::getFloatEvalMethod();
359 // NetBSD before 6.99.26 defaults to "double" rounding.
364 class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
365 : public OpenBSDTargetInfo<X86_32TargetInfo> {
367 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
368 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
369 SizeType = UnsignedLong;
370 IntPtrType = SignedLong;
371 PtrDiffType = SignedLong;
375 class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
376 : public DarwinTargetInfo<X86_32TargetInfo> {
378 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
379 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
380 LongDoubleWidth = 128;
381 LongDoubleAlign = 128;
383 MaxVectorAlign = 256;
384 // The watchOS simulator uses the builtin bool type for Objective-C.
385 llvm::Triple T = llvm::Triple(Triple);
387 UseSignedCharForObjCBool = false;
388 SizeType = UnsignedLong;
389 IntPtrType = SignedLong;
390 resetDataLayout("e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128");
391 HasAlignMac68kSupport = true;
394 bool handleTargetFeatures(std::vector<std::string> &Features,
395 DiagnosticsEngine &Diags) override {
396 if (!DarwinTargetInfo<X86_32TargetInfo>::handleTargetFeatures(Features,
399 // We now know the features we have: we can decide how to align vectors.
401 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
406 // x86-32 Windows target
407 class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
408 : public WindowsTargetInfo<X86_32TargetInfo> {
410 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
411 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
412 DoubleAlign = LongLongAlign = 64;
414 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
415 resetDataLayout(IsWinCOFF
416 ? "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
417 : "e-m:e-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
421 // x86-32 Windows Visual Studio target
422 class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
423 : public WindowsX86_32TargetInfo {
425 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
426 const TargetOptions &Opts)
427 : WindowsX86_32TargetInfo(Triple, Opts) {
428 LongDoubleWidth = LongDoubleAlign = 64;
429 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
432 void getTargetDefines(const LangOptions &Opts,
433 MacroBuilder &Builder) const override {
434 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
435 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
436 // The value of the following reflects processor type.
437 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
438 // We lost the original triple, so we use the default.
439 Builder.defineMacro("_M_IX86", "600");
443 // x86-32 MinGW target
444 class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
445 : public WindowsX86_32TargetInfo {
447 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
448 : WindowsX86_32TargetInfo(Triple, Opts) {
452 void getTargetDefines(const LangOptions &Opts,
453 MacroBuilder &Builder) const override {
454 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
455 Builder.defineMacro("_X86_");
459 // x86-32 Cygwin target
460 class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
462 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
463 : X86_32TargetInfo(Triple, Opts) {
464 this->WCharType = TargetInfo::UnsignedShort;
465 DoubleAlign = LongLongAlign = 64;
466 resetDataLayout("e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
469 void getTargetDefines(const LangOptions &Opts,
470 MacroBuilder &Builder) const override {
471 X86_32TargetInfo::getTargetDefines(Opts, Builder);
472 Builder.defineMacro("_X86_");
473 Builder.defineMacro("__CYGWIN__");
474 Builder.defineMacro("__CYGWIN32__");
475 addCygMingDefines(Opts, Builder);
476 DefineStd(Builder, "unix", Opts);
478 Builder.defineMacro("_GNU_SOURCE");
482 // x86-32 Haiku target
483 class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
484 : public HaikuTargetInfo<X86_32TargetInfo> {
486 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
487 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
489 void getTargetDefines(const LangOptions &Opts,
490 MacroBuilder &Builder) const override {
491 HaikuTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
492 Builder.defineMacro("__INTEL__");
497 class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
499 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
500 : X86_32TargetInfo(Triple, Opts) {
501 LongDoubleWidth = 64;
502 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
503 resetDataLayout("e-m:e-p:32:32-i64:32-f64:32-f128:32-n8:16:32-a:0:32-S32");
504 WIntType = UnsignedInt;
507 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
508 // On MCU we support only C calling convention.
509 return CC == CC_C ? CCCR_OK : CCCR_Warning;
512 void getTargetDefines(const LangOptions &Opts,
513 MacroBuilder &Builder) const override {
514 X86_32TargetInfo::getTargetDefines(Opts, Builder);
515 Builder.defineMacro("__iamcu");
516 Builder.defineMacro("__iamcu__");
519 bool allowsLargerPreferedTypeAlignment() const override { return false; }
522 // x86-32 RTEMS target
523 class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
525 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
526 : X86_32TargetInfo(Triple, Opts) {
527 SizeType = UnsignedLong;
528 IntPtrType = SignedLong;
529 PtrDiffType = SignedLong;
532 void getTargetDefines(const LangOptions &Opts,
533 MacroBuilder &Builder) const override {
534 X86_32TargetInfo::getTargetDefines(Opts, Builder);
535 Builder.defineMacro("__INTEL__");
536 Builder.defineMacro("__rtems__");
540 // x86-64 generic target
541 class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
543 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
544 : X86TargetInfo(Triple, Opts) {
545 const bool IsX32 = getTriple().getEnvironment() == llvm::Triple::GNUX32;
547 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
548 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
549 LongDoubleWidth = 128;
550 LongDoubleAlign = 128;
551 LargeArrayMinWidth = 128;
552 LargeArrayAlign = 128;
554 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
555 PtrDiffType = IsX32 ? SignedInt : SignedLong;
556 IntPtrType = IsX32 ? SignedInt : SignedLong;
557 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
558 Int64Type = IsX32 ? SignedLongLong : SignedLong;
561 // Pointers are 32-bit in x32.
562 resetDataLayout(IsX32
563 ? "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
564 : IsWinCOFF ? "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
565 : "e-m:e-i64:64-f80:128-n8:16:32:64-S128");
567 // Use fpret only for long double.
568 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
570 // Use fp2ret for _Complex long double.
571 ComplexLongDoubleUsesFP2Ret = true;
573 // Make __builtin_ms_va_list available.
574 HasBuiltinMSVaList = true;
576 // x86-64 has atomics up to 16 bytes.
577 MaxAtomicPromoteWidth = 128;
578 MaxAtomicInlineWidth = 64;
581 BuiltinVaListKind getBuiltinVaListKind() const override {
582 return TargetInfo::X86_64ABIBuiltinVaList;
585 int getEHDataRegisterNumber(unsigned RegNo) const override {
593 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
597 case CC_X86VectorCall:
598 case CC_IntelOclBicc:
600 case CC_PreserveMost:
603 case CC_OpenCLKernel:
610 CallingConv getDefaultCallingConv(CallingConvMethodType MT) const override {
614 // for x32 we need it here explicitly
615 bool hasInt128Type() const override { return true; }
617 unsigned getUnwindWordWidth() const override { return 64; }
619 unsigned getRegisterWidth() const override { return 64; }
621 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
622 bool &HasSizeMismatch) const override {
623 // rsp and rbp are the only 64-bit registers the x86 backend can currently
625 if (RegName.equals("rsp") || RegName.equals("rbp")) {
626 // Check that the register size is 64-bit.
627 HasSizeMismatch = RegSize != 64;
631 // Check if the register is a 32-bit register the backend can handle.
632 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
636 void setMaxAtomicWidth() override {
637 if (hasFeature("cx16"))
638 MaxAtomicInlineWidth = 128;
641 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
644 // x86-64 Windows target
645 class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
646 : public WindowsTargetInfo<X86_64TargetInfo> {
648 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
649 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
650 LongWidth = LongAlign = 32;
651 DoubleAlign = LongLongAlign = 64;
652 IntMaxType = SignedLongLong;
653 Int64Type = SignedLongLong;
654 SizeType = UnsignedLongLong;
655 PtrDiffType = SignedLongLong;
656 IntPtrType = SignedLongLong;
659 BuiltinVaListKind getBuiltinVaListKind() const override {
660 return TargetInfo::CharPtrBuiltinVaList;
663 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
670 case CC_X86VectorCall:
671 case CC_IntelOclBicc:
672 case CC_PreserveMost:
677 case CC_OpenCLKernel:
685 // x86-64 Windows Visual Studio target
686 class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
687 : public WindowsX86_64TargetInfo {
689 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
690 const TargetOptions &Opts)
691 : WindowsX86_64TargetInfo(Triple, Opts) {
692 LongDoubleWidth = LongDoubleAlign = 64;
693 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
696 void getTargetDefines(const LangOptions &Opts,
697 MacroBuilder &Builder) const override {
698 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
699 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
700 Builder.defineMacro("_M_X64", "100");
701 Builder.defineMacro("_M_AMD64", "100");
705 // x86-64 MinGW target
706 class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
707 : public WindowsX86_64TargetInfo {
709 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
710 : WindowsX86_64TargetInfo(Triple, Opts) {
711 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
712 // with x86 FP ops. Weird.
713 LongDoubleWidth = LongDoubleAlign = 128;
714 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
719 // x86-64 Cygwin target
720 class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
722 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
723 : X86_64TargetInfo(Triple, Opts) {
724 this->WCharType = TargetInfo::UnsignedShort;
725 TLSSupported = false;
728 void getTargetDefines(const LangOptions &Opts,
729 MacroBuilder &Builder) const override {
730 X86_64TargetInfo::getTargetDefines(Opts, Builder);
731 Builder.defineMacro("__x86_64__");
732 Builder.defineMacro("__CYGWIN__");
733 Builder.defineMacro("__CYGWIN64__");
734 addCygMingDefines(Opts, Builder);
735 DefineStd(Builder, "unix", Opts);
737 Builder.defineMacro("_GNU_SOURCE");
741 class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
742 : public DarwinTargetInfo<X86_64TargetInfo> {
744 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
745 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
746 Int64Type = SignedLongLong;
747 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
748 llvm::Triple T = llvm::Triple(Triple);
750 UseSignedCharForObjCBool = false;
751 resetDataLayout("e-m:o-i64:64-f80:128-n8:16:32:64-S128");
754 bool handleTargetFeatures(std::vector<std::string> &Features,
755 DiagnosticsEngine &Diags) override {
756 if (!DarwinTargetInfo<X86_64TargetInfo>::handleTargetFeatures(Features,
759 // We now know the features we have: we can decide how to align vectors.
761 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
766 class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
767 : public OpenBSDTargetInfo<X86_64TargetInfo> {
769 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
770 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
771 IntMaxType = SignedLongLong;
772 Int64Type = SignedLongLong;
776 // x86_32 Android target
777 class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
778 : public LinuxTargetInfo<X86_32TargetInfo> {
780 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
781 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
783 LongDoubleWidth = 64;
784 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
788 // x86_64 Android target
789 class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
790 : public LinuxTargetInfo<X86_64TargetInfo> {
792 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
793 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
794 LongDoubleFormat = &llvm::APFloat::IEEEquad();
797 bool useFloat128ManglingForLongDouble() const override { return true; }
799 } // namespace targets
801 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H