1 //===--- X86.h - Declare X86 target feature support -------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares X86 TargetInfo objects.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_X86_H
16 #include "OSTargets.h"
17 #include "clang/Basic/TargetInfo.h"
18 #include "clang/Basic/TargetOptions.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/Compiler.h"
25 // X86 target abstract base class; x86-32 and x86-64 are very close, so
26 // most of the implementation can be shared.
27 class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
46 } MMX3DNowLevel = NoMMX3DNow;
47 enum XOPEnum { NoXOP, SSE4A, FMA4, XOP } XOPLevel = NoXOP;
51 bool HasPCLMUL = false;
52 bool HasVPCLMULQDQ = false;
54 bool HasLZCNT = false;
55 bool HasRDRND = false;
56 bool HasFSGSBASE = false;
59 bool HasPOPCNT = false;
61 bool HasPRFCHW = false;
62 bool HasRDSEED = false;
68 bool HasAVX512CD = false;
69 bool HasAVX512VPOPCNTDQ = false;
70 bool HasAVX512VNNI = false;
71 bool HasAVX512BF16 = false;
72 bool HasAVX512ER = false;
73 bool HasAVX512PF = false;
74 bool HasAVX512DQ = false;
75 bool HasAVX512BITALG = false;
76 bool HasAVX512BW = false;
77 bool HasAVX512VL = false;
78 bool HasAVX512VBMI = false;
79 bool HasAVX512VBMI2 = false;
80 bool HasAVX512IFMA = false;
81 bool HasAVX512VP2INTERSECT = false;
84 bool HasSHSTK = false;
89 bool HasXSAVE = false;
90 bool HasXSAVEOPT = false;
91 bool HasXSAVEC = false;
92 bool HasXSAVES = false;
93 bool HasMWAITX = false;
94 bool HasCLZERO = false;
95 bool HasCLDEMOTE = false;
96 bool HasPCONFIG = false;
98 bool HasCLFLUSHOPT = false;
100 bool HasMOVBE = false;
101 bool HasPREFETCHWT1 = false;
102 bool HasRDPID = false;
103 bool HasRetpolineExternalThunk = false;
104 bool HasLAHFSAHF = false;
105 bool HasWBNOINVD = false;
106 bool HasWAITPKG = false;
107 bool HasMOVDIRI = false;
108 bool HasMOVDIR64B = false;
109 bool HasPTWRITE = false;
110 bool HasINVPCID = false;
111 bool HasENQCMD = false;
114 /// Enumeration of all of the X86 CPUs supported by Clang.
116 /// Each enumeration represents a particular CPU supported by Clang. These
117 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
120 #define PROC(ENUM, STRING, IS64BIT) CK_##ENUM,
121 #include "clang/Basic/X86Target.def"
124 bool checkCPUKind(CPUKind Kind) const;
126 CPUKind getCPUKind(StringRef CPU) const;
128 enum FPMathKind { FP_Default, FP_SSE, FP_387 } FPMath = FP_Default;
131 X86TargetInfo(const llvm::Triple &Triple, const TargetOptions &)
132 : TargetInfo(Triple) {
133 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
136 const char *getLongDoubleMangling() const override {
137 return LongDoubleFormat == &llvm::APFloat::IEEEquad() ? "g" : "e";
140 unsigned getFloatEvalMethod() const override {
141 // X87 evaluates with 80 bits "long double" precision.
142 return SSELevel == NoSSE ? 2 : 0;
145 ArrayRef<const char *> getGCCRegNames() const override;
147 ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
151 ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
153 bool validateCpuSupports(StringRef Name) const override;
155 bool validateCpuIs(StringRef Name) const override;
157 bool validateCPUSpecificCPUDispatch(StringRef Name) const override;
159 char CPUSpecificManglingCharacter(StringRef Name) const override;
161 void getCPUSpecificCPUDispatchFeatures(
163 llvm::SmallVectorImpl<StringRef> &Features) const override;
165 bool validateAsmConstraint(const char *&Name,
166 TargetInfo::ConstraintInfo &info) const override;
168 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
169 bool &HasSizeMismatch) const override {
170 // esp and ebp are the only 32-bit registers the x86 backend can currently
172 if (RegName.equals("esp") || RegName.equals("ebp")) {
173 // Check that the register size is 32-bit.
174 HasSizeMismatch = RegSize != 32;
181 bool validateOutputSize(StringRef Constraint, unsigned Size) const override;
183 bool validateInputSize(StringRef Constraint, unsigned Size) const override;
186 checkCFProtectionReturnSupported(DiagnosticsEngine &Diags) const override {
191 checkCFProtectionBranchSupported(DiagnosticsEngine &Diags) const override {
196 virtual bool validateOperandSize(StringRef Constraint, unsigned Size) const;
198 std::string convertConstraint(const char *&Constraint) const override;
199 const char *getClobbers() const override {
200 return "~{dirflag},~{fpsr},~{flags}";
203 StringRef getConstraintRegister(StringRef Constraint,
204 StringRef Expression) const override {
205 StringRef::iterator I, E;
206 for (I = Constraint.begin(), E = Constraint.end(); I != E; ++I) {
207 if (isalpha(*I) || *I == '@')
213 // For the register constraints, return the matching register name
226 // In case the constraint is 'r' we need to return Expression
229 // Double letters Y<x> constraints
231 if ((++I != E) && ((*I == '0') || (*I == 'z')))
240 bool useFP16ConversionIntrinsics() const override {
244 void getTargetDefines(const LangOptions &Opts,
245 MacroBuilder &Builder) const override;
247 static void setSSELevel(llvm::StringMap<bool> &Features, X86SSEEnum Level,
250 static void setMMXLevel(llvm::StringMap<bool> &Features, MMX3DNowEnum Level,
253 static void setXOPLevel(llvm::StringMap<bool> &Features, XOPEnum Level,
256 void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name,
257 bool Enabled) const override {
258 setFeatureEnabledImpl(Features, Name, Enabled);
261 // This exists purely to cut down on the number of virtual calls in
262 // initFeatureMap which calls this repeatedly.
263 static void setFeatureEnabledImpl(llvm::StringMap<bool> &Features,
264 StringRef Name, bool Enabled);
267 initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
269 const std::vector<std::string> &FeaturesVec) const override;
271 bool isValidFeatureName(StringRef Name) const override;
273 bool hasFeature(StringRef Feature) const override;
275 bool handleTargetFeatures(std::vector<std::string> &Features,
276 DiagnosticsEngine &Diags) override;
278 StringRef getABI() const override {
279 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX512F)
281 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
283 if (getTriple().getArch() == llvm::Triple::x86 &&
284 MMX3DNowLevel == NoMMX3DNow)
289 bool isValidCPUName(StringRef Name) const override {
290 return checkCPUKind(getCPUKind(Name));
293 void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
295 bool setCPU(const std::string &Name) override {
296 return checkCPUKind(CPU = getCPUKind(Name));
299 unsigned multiVersionSortPriority(StringRef Name) const override;
301 bool setFPMath(StringRef Name) override;
303 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
304 // Most of the non-ARM calling conventions are i386 conventions.
309 case CC_X86VectorCall:
312 case CC_PreserveMost:
315 case CC_IntelOclBicc:
316 case CC_OpenCLKernel:
323 CallingConv getDefaultCallingConv() const override {
327 bool hasSjLjLowering() const override { return true; }
329 void setSupportedOpenCLOpts() override {
330 getSupportedOpenCLOpts().supportAll();
334 // X86-32 generic target
335 class LLVM_LIBRARY_VISIBILITY X86_32TargetInfo : public X86TargetInfo {
337 X86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
338 : X86TargetInfo(Triple, Opts) {
339 DoubleAlign = LongLongAlign = 32;
340 LongDoubleWidth = 96;
341 LongDoubleAlign = 32;
343 resetDataLayout("e-m:e-p:32:32-f64:32:64-f80:32-n8:16:32-S128");
344 SizeType = UnsignedInt;
345 PtrDiffType = SignedInt;
346 IntPtrType = SignedInt;
349 // Use fpret for all types.
350 RealTypeUsesObjCFPRet =
351 ((1 << TargetInfo::Float) | (1 << TargetInfo::Double) |
352 (1 << TargetInfo::LongDouble));
354 // x86-32 has atomics up to 8 bytes
355 MaxAtomicPromoteWidth = 64;
356 MaxAtomicInlineWidth = 32;
359 BuiltinVaListKind getBuiltinVaListKind() const override {
360 return TargetInfo::CharPtrBuiltinVaList;
363 int getEHDataRegisterNumber(unsigned RegNo) const override {
371 bool validateOperandSize(StringRef Constraint, unsigned Size) const override {
372 switch (Constraint[0]) {
389 return X86TargetInfo::validateOperandSize(Constraint, Size);
392 void setMaxAtomicWidth() override {
393 if (hasFeature("cx8"))
394 MaxAtomicInlineWidth = 64;
397 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
400 class LLVM_LIBRARY_VISIBILITY NetBSDI386TargetInfo
401 : public NetBSDTargetInfo<X86_32TargetInfo> {
403 NetBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
404 : NetBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
406 unsigned getFloatEvalMethod() const override {
407 unsigned Major, Minor, Micro;
408 getTriple().getOSVersion(Major, Minor, Micro);
409 // New NetBSD uses the default rounding mode.
410 if (Major >= 7 || (Major == 6 && Minor == 99 && Micro >= 26) || Major == 0)
411 return X86_32TargetInfo::getFloatEvalMethod();
412 // NetBSD before 6.99.26 defaults to "double" rounding.
417 class LLVM_LIBRARY_VISIBILITY OpenBSDI386TargetInfo
418 : public OpenBSDTargetInfo<X86_32TargetInfo> {
420 OpenBSDI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
421 : OpenBSDTargetInfo<X86_32TargetInfo>(Triple, Opts) {
422 SizeType = UnsignedLong;
423 IntPtrType = SignedLong;
424 PtrDiffType = SignedLong;
428 class LLVM_LIBRARY_VISIBILITY DarwinI386TargetInfo
429 : public DarwinTargetInfo<X86_32TargetInfo> {
431 DarwinI386TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
432 : DarwinTargetInfo<X86_32TargetInfo>(Triple, Opts) {
433 LongDoubleWidth = 128;
434 LongDoubleAlign = 128;
436 MaxVectorAlign = 256;
437 // The watchOS simulator uses the builtin bool type for Objective-C.
438 llvm::Triple T = llvm::Triple(Triple);
440 UseSignedCharForObjCBool = false;
441 SizeType = UnsignedLong;
442 IntPtrType = SignedLong;
443 resetDataLayout("e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128");
444 HasAlignMac68kSupport = true;
447 bool handleTargetFeatures(std::vector<std::string> &Features,
448 DiagnosticsEngine &Diags) override {
449 if (!DarwinTargetInfo<X86_32TargetInfo>::handleTargetFeatures(Features,
452 // We now know the features we have: we can decide how to align vectors.
454 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
459 // x86-32 Windows target
460 class LLVM_LIBRARY_VISIBILITY WindowsX86_32TargetInfo
461 : public WindowsTargetInfo<X86_32TargetInfo> {
463 WindowsX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
464 : WindowsTargetInfo<X86_32TargetInfo>(Triple, Opts) {
465 DoubleAlign = LongLongAlign = 64;
467 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
468 resetDataLayout(IsWinCOFF
469 ? "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
470 : "e-m:e-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
474 // x86-32 Windows Visual Studio target
475 class LLVM_LIBRARY_VISIBILITY MicrosoftX86_32TargetInfo
476 : public WindowsX86_32TargetInfo {
478 MicrosoftX86_32TargetInfo(const llvm::Triple &Triple,
479 const TargetOptions &Opts)
480 : WindowsX86_32TargetInfo(Triple, Opts) {
481 LongDoubleWidth = LongDoubleAlign = 64;
482 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
485 void getTargetDefines(const LangOptions &Opts,
486 MacroBuilder &Builder) const override {
487 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
488 // The value of the following reflects processor type.
489 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
490 // We lost the original triple, so we use the default.
491 Builder.defineMacro("_M_IX86", "600");
495 // x86-32 MinGW target
496 class LLVM_LIBRARY_VISIBILITY MinGWX86_32TargetInfo
497 : public WindowsX86_32TargetInfo {
499 MinGWX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
500 : WindowsX86_32TargetInfo(Triple, Opts) {
504 void getTargetDefines(const LangOptions &Opts,
505 MacroBuilder &Builder) const override {
506 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
507 Builder.defineMacro("_X86_");
511 // x86-32 Cygwin target
512 class LLVM_LIBRARY_VISIBILITY CygwinX86_32TargetInfo : public X86_32TargetInfo {
514 CygwinX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
515 : X86_32TargetInfo(Triple, Opts) {
516 this->WCharType = TargetInfo::UnsignedShort;
517 DoubleAlign = LongLongAlign = 64;
518 resetDataLayout("e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32");
521 void getTargetDefines(const LangOptions &Opts,
522 MacroBuilder &Builder) const override {
523 X86_32TargetInfo::getTargetDefines(Opts, Builder);
524 Builder.defineMacro("_X86_");
525 Builder.defineMacro("__CYGWIN__");
526 Builder.defineMacro("__CYGWIN32__");
527 addCygMingDefines(Opts, Builder);
528 DefineStd(Builder, "unix", Opts);
530 Builder.defineMacro("_GNU_SOURCE");
534 // x86-32 Haiku target
535 class LLVM_LIBRARY_VISIBILITY HaikuX86_32TargetInfo
536 : public HaikuTargetInfo<X86_32TargetInfo> {
538 HaikuX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
539 : HaikuTargetInfo<X86_32TargetInfo>(Triple, Opts) {}
541 void getTargetDefines(const LangOptions &Opts,
542 MacroBuilder &Builder) const override {
543 HaikuTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
544 Builder.defineMacro("__INTEL__");
549 class LLVM_LIBRARY_VISIBILITY MCUX86_32TargetInfo : public X86_32TargetInfo {
551 MCUX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
552 : X86_32TargetInfo(Triple, Opts) {
553 LongDoubleWidth = 64;
554 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
555 resetDataLayout("e-m:e-p:32:32-i64:32-f64:32-f128:32-n8:16:32-a:0:32-S32");
556 WIntType = UnsignedInt;
559 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
560 // On MCU we support only C calling convention.
561 return CC == CC_C ? CCCR_OK : CCCR_Warning;
564 void getTargetDefines(const LangOptions &Opts,
565 MacroBuilder &Builder) const override {
566 X86_32TargetInfo::getTargetDefines(Opts, Builder);
567 Builder.defineMacro("__iamcu");
568 Builder.defineMacro("__iamcu__");
571 bool allowsLargerPreferedTypeAlignment() const override { return false; }
574 // x86-32 RTEMS target
575 class LLVM_LIBRARY_VISIBILITY RTEMSX86_32TargetInfo : public X86_32TargetInfo {
577 RTEMSX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
578 : X86_32TargetInfo(Triple, Opts) {
579 SizeType = UnsignedLong;
580 IntPtrType = SignedLong;
581 PtrDiffType = SignedLong;
584 void getTargetDefines(const LangOptions &Opts,
585 MacroBuilder &Builder) const override {
586 X86_32TargetInfo::getTargetDefines(Opts, Builder);
587 Builder.defineMacro("__INTEL__");
588 Builder.defineMacro("__rtems__");
592 // x86-64 generic target
593 class LLVM_LIBRARY_VISIBILITY X86_64TargetInfo : public X86TargetInfo {
595 X86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
596 : X86TargetInfo(Triple, Opts) {
597 const bool IsX32 = getTriple().getEnvironment() == llvm::Triple::GNUX32;
599 getTriple().isOSWindows() && getTriple().isOSBinFormatCOFF();
600 LongWidth = LongAlign = PointerWidth = PointerAlign = IsX32 ? 32 : 64;
601 LongDoubleWidth = 128;
602 LongDoubleAlign = 128;
603 LargeArrayMinWidth = 128;
604 LargeArrayAlign = 128;
606 SizeType = IsX32 ? UnsignedInt : UnsignedLong;
607 PtrDiffType = IsX32 ? SignedInt : SignedLong;
608 IntPtrType = IsX32 ? SignedInt : SignedLong;
609 IntMaxType = IsX32 ? SignedLongLong : SignedLong;
610 Int64Type = IsX32 ? SignedLongLong : SignedLong;
613 // Pointers are 32-bit in x32.
614 resetDataLayout(IsX32
615 ? "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
616 : IsWinCOFF ? "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
617 : "e-m:e-i64:64-f80:128-n8:16:32:64-S128");
619 // Use fpret only for long double.
620 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
622 // Use fp2ret for _Complex long double.
623 ComplexLongDoubleUsesFP2Ret = true;
625 // Make __builtin_ms_va_list available.
626 HasBuiltinMSVaList = true;
628 // x86-64 has atomics up to 16 bytes.
629 MaxAtomicPromoteWidth = 128;
630 MaxAtomicInlineWidth = 64;
633 BuiltinVaListKind getBuiltinVaListKind() const override {
634 return TargetInfo::X86_64ABIBuiltinVaList;
637 int getEHDataRegisterNumber(unsigned RegNo) const override {
645 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
649 case CC_X86VectorCall:
650 case CC_IntelOclBicc:
652 case CC_PreserveMost:
655 case CC_OpenCLKernel:
662 CallingConv getDefaultCallingConv() const override {
666 // for x32 we need it here explicitly
667 bool hasInt128Type() const override { return true; }
669 unsigned getUnwindWordWidth() const override { return 64; }
671 unsigned getRegisterWidth() const override { return 64; }
673 bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize,
674 bool &HasSizeMismatch) const override {
675 // rsp and rbp are the only 64-bit registers the x86 backend can currently
677 if (RegName.equals("rsp") || RegName.equals("rbp")) {
678 // Check that the register size is 64-bit.
679 HasSizeMismatch = RegSize != 64;
683 // Check if the register is a 32-bit register the backend can handle.
684 return X86TargetInfo::validateGlobalRegisterVariable(RegName, RegSize,
688 void setMaxAtomicWidth() override {
689 if (hasFeature("cx16"))
690 MaxAtomicInlineWidth = 128;
693 ArrayRef<Builtin::Info> getTargetBuiltins() const override;
696 // x86-64 Windows target
697 class LLVM_LIBRARY_VISIBILITY WindowsX86_64TargetInfo
698 : public WindowsTargetInfo<X86_64TargetInfo> {
700 WindowsX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
701 : WindowsTargetInfo<X86_64TargetInfo>(Triple, Opts) {
702 LongWidth = LongAlign = 32;
703 DoubleAlign = LongLongAlign = 64;
704 IntMaxType = SignedLongLong;
705 Int64Type = SignedLongLong;
706 SizeType = UnsignedLongLong;
707 PtrDiffType = SignedLongLong;
708 IntPtrType = SignedLongLong;
711 BuiltinVaListKind getBuiltinVaListKind() const override {
712 return TargetInfo::CharPtrBuiltinVaList;
715 CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
722 case CC_X86VectorCall:
723 case CC_IntelOclBicc:
724 case CC_PreserveMost:
729 case CC_OpenCLKernel:
737 // x86-64 Windows Visual Studio target
738 class LLVM_LIBRARY_VISIBILITY MicrosoftX86_64TargetInfo
739 : public WindowsX86_64TargetInfo {
741 MicrosoftX86_64TargetInfo(const llvm::Triple &Triple,
742 const TargetOptions &Opts)
743 : WindowsX86_64TargetInfo(Triple, Opts) {
744 LongDoubleWidth = LongDoubleAlign = 64;
745 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
748 void getTargetDefines(const LangOptions &Opts,
749 MacroBuilder &Builder) const override {
750 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
751 Builder.defineMacro("_M_X64", "100");
752 Builder.defineMacro("_M_AMD64", "100");
755 TargetInfo::CallingConvKind
756 getCallingConvKind(bool ClangABICompat4) const override {
757 return CCK_MicrosoftWin64;
761 // x86-64 MinGW target
762 class LLVM_LIBRARY_VISIBILITY MinGWX86_64TargetInfo
763 : public WindowsX86_64TargetInfo {
765 MinGWX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
766 : WindowsX86_64TargetInfo(Triple, Opts) {
767 // Mingw64 rounds long double size and alignment up to 16 bytes, but sticks
768 // with x86 FP ops. Weird.
769 LongDoubleWidth = LongDoubleAlign = 128;
770 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended();
775 // x86-64 Cygwin target
776 class LLVM_LIBRARY_VISIBILITY CygwinX86_64TargetInfo : public X86_64TargetInfo {
778 CygwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
779 : X86_64TargetInfo(Triple, Opts) {
780 this->WCharType = TargetInfo::UnsignedShort;
781 TLSSupported = false;
784 void getTargetDefines(const LangOptions &Opts,
785 MacroBuilder &Builder) const override {
786 X86_64TargetInfo::getTargetDefines(Opts, Builder);
787 Builder.defineMacro("__x86_64__");
788 Builder.defineMacro("__CYGWIN__");
789 Builder.defineMacro("__CYGWIN64__");
790 addCygMingDefines(Opts, Builder);
791 DefineStd(Builder, "unix", Opts);
793 Builder.defineMacro("_GNU_SOURCE");
797 class LLVM_LIBRARY_VISIBILITY DarwinX86_64TargetInfo
798 : public DarwinTargetInfo<X86_64TargetInfo> {
800 DarwinX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
801 : DarwinTargetInfo<X86_64TargetInfo>(Triple, Opts) {
802 Int64Type = SignedLongLong;
803 // The 64-bit iOS simulator uses the builtin bool type for Objective-C.
804 llvm::Triple T = llvm::Triple(Triple);
806 UseSignedCharForObjCBool = false;
807 resetDataLayout("e-m:o-i64:64-f80:128-n8:16:32:64-S128");
810 bool handleTargetFeatures(std::vector<std::string> &Features,
811 DiagnosticsEngine &Diags) override {
812 if (!DarwinTargetInfo<X86_64TargetInfo>::handleTargetFeatures(Features,
815 // We now know the features we have: we can decide how to align vectors.
817 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
822 class LLVM_LIBRARY_VISIBILITY OpenBSDX86_64TargetInfo
823 : public OpenBSDTargetInfo<X86_64TargetInfo> {
825 OpenBSDX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
826 : OpenBSDTargetInfo<X86_64TargetInfo>(Triple, Opts) {
827 IntMaxType = SignedLongLong;
828 Int64Type = SignedLongLong;
832 // x86_32 Android target
833 class LLVM_LIBRARY_VISIBILITY AndroidX86_32TargetInfo
834 : public LinuxTargetInfo<X86_32TargetInfo> {
836 AndroidX86_32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
837 : LinuxTargetInfo<X86_32TargetInfo>(Triple, Opts) {
839 LongDoubleWidth = 64;
840 LongDoubleFormat = &llvm::APFloat::IEEEdouble();
844 // x86_64 Android target
845 class LLVM_LIBRARY_VISIBILITY AndroidX86_64TargetInfo
846 : public LinuxTargetInfo<X86_64TargetInfo> {
848 AndroidX86_64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
849 : LinuxTargetInfo<X86_64TargetInfo>(Triple, Opts) {
850 LongDoubleFormat = &llvm::APFloat::IEEEquad();
853 } // namespace targets
855 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_X86_H