1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements construction of a TargetInfo object from a
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Type.h"
32 using namespace clang;
34 //===----------------------------------------------------------------------===//
35 // Common code shared among targets.
36 //===----------------------------------------------------------------------===//
38 /// DefineStd - Define a macro name and standard variants. For example if
39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42 const LangOptions &Opts) {
43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46 // in the user's namespace.
48 Builder.defineMacro(MacroName);
51 Builder.defineMacro("__" + MacroName);
54 Builder.defineMacro("__" + MacroName + "__");
57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
59 Builder.defineMacro("__" + CPUName);
60 Builder.defineMacro("__" + CPUName + "__");
62 Builder.defineMacro("__tune_" + CPUName + "__");
65 //===----------------------------------------------------------------------===//
66 // Defines specific to certain operating systems.
67 //===----------------------------------------------------------------------===//
70 template<typename TgtInfo>
71 class OSTargetInfo : public TgtInfo {
73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74 MacroBuilder &Builder) const=0;
76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77 virtual void getTargetDefines(const LangOptions &Opts,
78 MacroBuilder &Builder) const {
79 TgtInfo::getTargetDefines(Opts, Builder);
80 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
84 } // end anonymous namespace
87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88 const llvm::Triple &Triple,
89 StringRef &PlatformName,
90 VersionTuple &PlatformMinVersion) {
91 Builder.defineMacro("__APPLE_CC__", "5621");
92 Builder.defineMacro("__APPLE__");
93 Builder.defineMacro("__MACH__");
94 Builder.defineMacro("OBJC_NEW_PROPERTIES");
95 // AddressSanitizer doesn't play well with source fortification, which is on
96 // by default on Darwin.
97 if (Opts.SanitizeAddress) Builder.defineMacro("_FORTIFY_SOURCE", "0");
99 if (!Opts.ObjCAutoRefCount) {
100 // __weak is always defined, for use in blocks and with objc pointers.
101 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
103 // Darwin defines __strong even in C mode (just to nothing).
104 if (Opts.getGC() != LangOptions::NonGC)
105 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
107 Builder.defineMacro("__strong", "");
109 // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110 // allow this in C, since one might have block pointers in structs that
111 // are used in pure C code and in Objective-C ARC.
112 Builder.defineMacro("__unsafe_unretained", "");
116 Builder.defineMacro("__STATIC__");
118 Builder.defineMacro("__DYNAMIC__");
120 if (Opts.POSIXThreads)
121 Builder.defineMacro("_REENTRANT");
123 // Get the platform type and version number from the triple.
124 unsigned Maj, Min, Rev;
125 if (Triple.isMacOSX()) {
126 Triple.getMacOSXVersion(Maj, Min, Rev);
127 PlatformName = "macosx";
129 Triple.getOSVersion(Maj, Min, Rev);
130 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
133 // If -target arch-pc-win32-macho option specified, we're
134 // generating code for Win32 ABI. No need to emit
135 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136 if (PlatformName == "win32") {
137 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
141 // Set the appropriate OS version define.
142 if (Triple.getOS() == llvm::Triple::IOS) {
143 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
146 Str[1] = '0' + (Min / 10);
147 Str[2] = '0' + (Min % 10);
148 Str[3] = '0' + (Rev / 10);
149 Str[4] = '0' + (Rev % 10);
151 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
153 // Note that the Driver allows versions which aren't representable in the
154 // define (because we only get a single digit for the minor and micro
155 // revision numbers). So, we limit them to the maximum representable
157 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
160 Str[0] = '0' + (Maj / 10);
161 Str[1] = '0' + (Maj % 10);
162 Str[2] = '0' + std::min(Min, 9U);
163 Str[3] = '0' + std::min(Rev, 9U);
165 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
168 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
172 template<typename Target>
173 class DarwinTargetInfo : public OSTargetInfo<Target> {
175 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176 MacroBuilder &Builder) const {
177 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178 this->PlatformMinVersion);
182 DarwinTargetInfo(const std::string& triple) :
183 OSTargetInfo<Target>(triple) {
184 llvm::Triple T = llvm::Triple(triple);
185 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186 this->MCountName = "\01mcount";
189 virtual std::string isValidSectionSpecifier(StringRef SR) const {
190 // Let MCSectionMachO validate this.
191 StringRef Segment, Section;
192 unsigned TAA, StubSize;
194 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195 TAA, HasTAA, StubSize);
198 virtual const char *getStaticInitSectionSpecifier() const {
199 // FIXME: We should return 0 when building kexts.
200 return "__TEXT,__StaticInit,regular,pure_instructions";
203 /// Darwin does not support protected visibility. Darwin's "default"
204 /// is very similar to ELF's "protected"; Darwin requires a "weak"
205 /// attribute on declarations that can be dynamically replaced.
206 virtual bool hasProtectedVisibility() const {
212 // DragonFlyBSD Target
213 template<typename Target>
214 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
216 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217 MacroBuilder &Builder) const {
218 // DragonFly defines; list based off of gcc output
219 Builder.defineMacro("__DragonFly__");
220 Builder.defineMacro("__DragonFly_cc_version", "100001");
221 Builder.defineMacro("__ELF__");
222 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223 Builder.defineMacro("__tune_i386__");
224 DefineStd(Builder, "unix", Opts);
227 DragonFlyBSDTargetInfo(const std::string &triple)
228 : OSTargetInfo<Target>(triple) {
229 this->UserLabelPrefix = "";
231 llvm::Triple Triple(triple);
232 switch (Triple.getArch()) {
234 case llvm::Triple::x86:
235 case llvm::Triple::x86_64:
236 this->MCountName = ".mcount";
243 template<typename Target>
244 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247 MacroBuilder &Builder) const {
248 // FreeBSD defines; list based off of gcc output
250 unsigned Release = Triple.getOSMajorVersion();
254 Builder.defineMacro("__FreeBSD__", Twine(Release));
255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257 DefineStd(Builder, "unix", Opts);
258 Builder.defineMacro("__ELF__");
261 FreeBSDTargetInfo(const std::string &triple)
262 : OSTargetInfo<Target>(triple) {
263 this->UserLabelPrefix = "";
265 llvm::Triple Triple(triple);
266 switch (Triple.getArch()) {
268 case llvm::Triple::x86:
269 case llvm::Triple::x86_64:
270 this->MCountName = ".mcount";
272 case llvm::Triple::mips:
273 case llvm::Triple::mipsel:
274 case llvm::Triple::ppc:
275 case llvm::Triple::ppc64:
276 this->MCountName = "_mcount";
278 case llvm::Triple::arm:
279 this->MCountName = "__mcount";
287 template<typename Target>
288 class MinixTargetInfo : public OSTargetInfo<Target> {
290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291 MacroBuilder &Builder) const {
294 Builder.defineMacro("__minix", "3");
295 Builder.defineMacro("_EM_WSIZE", "4");
296 Builder.defineMacro("_EM_PSIZE", "4");
297 Builder.defineMacro("_EM_SSIZE", "2");
298 Builder.defineMacro("_EM_LSIZE", "4");
299 Builder.defineMacro("_EM_FSIZE", "4");
300 Builder.defineMacro("_EM_DSIZE", "8");
301 Builder.defineMacro("__ELF__");
302 DefineStd(Builder, "unix", Opts);
305 MinixTargetInfo(const std::string &triple)
306 : OSTargetInfo<Target>(triple) {
307 this->UserLabelPrefix = "";
312 template<typename Target>
313 class LinuxTargetInfo : public OSTargetInfo<Target> {
315 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
316 MacroBuilder &Builder) const {
317 // Linux defines; list based off of gcc output
318 DefineStd(Builder, "unix", Opts);
319 DefineStd(Builder, "linux", Opts);
320 Builder.defineMacro("__gnu_linux__");
321 Builder.defineMacro("__ELF__");
322 if (Triple.getEnvironment() == llvm::Triple::Android)
323 Builder.defineMacro("__ANDROID__", "1");
324 if (Opts.POSIXThreads)
325 Builder.defineMacro("_REENTRANT");
327 Builder.defineMacro("_GNU_SOURCE");
330 LinuxTargetInfo(const std::string& triple)
331 : OSTargetInfo<Target>(triple) {
332 this->UserLabelPrefix = "";
333 this->WIntType = TargetInfo::UnsignedInt;
336 virtual const char *getStaticInitSectionSpecifier() const {
337 return ".text.startup";
342 template<typename Target>
343 class NetBSDTargetInfo : public OSTargetInfo<Target> {
345 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
346 MacroBuilder &Builder) const {
347 // NetBSD defines; list based off of gcc output
348 Builder.defineMacro("__NetBSD__");
349 Builder.defineMacro("__unix__");
350 Builder.defineMacro("__ELF__");
351 if (Opts.POSIXThreads)
352 Builder.defineMacro("_POSIX_THREADS");
355 NetBSDTargetInfo(const std::string &triple)
356 : OSTargetInfo<Target>(triple) {
357 this->UserLabelPrefix = "";
362 template<typename Target>
363 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
365 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
366 MacroBuilder &Builder) const {
367 // OpenBSD defines; list based off of gcc output
369 Builder.defineMacro("__OpenBSD__");
370 DefineStd(Builder, "unix", Opts);
371 Builder.defineMacro("__ELF__");
372 if (Opts.POSIXThreads)
373 Builder.defineMacro("_REENTRANT");
376 OpenBSDTargetInfo(const std::string &triple)
377 : OSTargetInfo<Target>(triple) {
378 this->UserLabelPrefix = "";
379 this->TLSSupported = false;
381 llvm::Triple Triple(triple);
382 switch (Triple.getArch()) {
384 case llvm::Triple::x86:
385 case llvm::Triple::x86_64:
386 case llvm::Triple::arm:
387 case llvm::Triple::sparc:
388 this->MCountName = "__mcount";
390 case llvm::Triple::mips64:
391 case llvm::Triple::mips64el:
392 case llvm::Triple::ppc:
393 case llvm::Triple::sparcv9:
394 this->MCountName = "_mcount";
401 template<typename Target>
402 class BitrigTargetInfo : public OSTargetInfo<Target> {
404 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
405 MacroBuilder &Builder) const {
406 // Bitrig defines; list based off of gcc output
408 Builder.defineMacro("__Bitrig__");
409 DefineStd(Builder, "unix", Opts);
410 Builder.defineMacro("__ELF__");
411 if (Opts.POSIXThreads)
412 Builder.defineMacro("_REENTRANT");
415 BitrigTargetInfo(const std::string &triple)
416 : OSTargetInfo<Target>(triple) {
417 this->UserLabelPrefix = "";
418 this->TLSSupported = false;
419 this->MCountName = "__mcount";
424 template<typename Target>
425 class PSPTargetInfo : public OSTargetInfo<Target> {
427 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
428 MacroBuilder &Builder) const {
429 // PSP defines; list based on the output of the pspdev gcc toolchain.
430 Builder.defineMacro("PSP");
431 Builder.defineMacro("_PSP");
432 Builder.defineMacro("__psp__");
433 Builder.defineMacro("__ELF__");
436 PSPTargetInfo(const std::string& triple)
437 : OSTargetInfo<Target>(triple) {
438 this->UserLabelPrefix = "";
443 template<typename Target>
444 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
446 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
447 MacroBuilder &Builder) const {
449 Builder.defineMacro("__PPC__");
450 Builder.defineMacro("__PPU__");
451 Builder.defineMacro("__CELLOS_LV2__");
452 Builder.defineMacro("__ELF__");
453 Builder.defineMacro("__LP32__");
454 Builder.defineMacro("_ARCH_PPC64");
455 Builder.defineMacro("__powerpc64__");
458 PS3PPUTargetInfo(const std::string& triple)
459 : OSTargetInfo<Target>(triple) {
460 this->UserLabelPrefix = "";
461 this->LongWidth = this->LongAlign = 32;
462 this->PointerWidth = this->PointerAlign = 32;
463 this->IntMaxType = TargetInfo::SignedLongLong;
464 this->UIntMaxType = TargetInfo::UnsignedLongLong;
465 this->Int64Type = TargetInfo::SignedLongLong;
466 this->SizeType = TargetInfo::UnsignedInt;
467 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
468 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
472 // FIXME: Need a real SPU target.
474 template<typename Target>
475 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
477 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
478 MacroBuilder &Builder) const {
480 Builder.defineMacro("__SPU__");
481 Builder.defineMacro("__ELF__");
484 PS3SPUTargetInfo(const std::string& triple)
485 : OSTargetInfo<Target>(triple) {
486 this->UserLabelPrefix = "";
491 template<typename Target>
492 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
494 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
495 MacroBuilder &Builder) const {
496 DefineStd(Builder, "sun", Opts);
497 DefineStd(Builder, "unix", Opts);
498 Builder.defineMacro("__ELF__");
499 Builder.defineMacro("__svr4__");
500 Builder.defineMacro("__SVR4");
503 AuroraUXTargetInfo(const std::string& triple)
504 : OSTargetInfo<Target>(triple) {
505 this->UserLabelPrefix = "";
506 this->WCharType = this->SignedLong;
507 // FIXME: WIntType should be SignedLong
512 template<typename Target>
513 class SolarisTargetInfo : public OSTargetInfo<Target> {
515 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
516 MacroBuilder &Builder) const {
517 DefineStd(Builder, "sun", Opts);
518 DefineStd(Builder, "unix", Opts);
519 Builder.defineMacro("__ELF__");
520 Builder.defineMacro("__svr4__");
521 Builder.defineMacro("__SVR4");
522 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
523 // newer, but to 500 for everything else. feature_test.h has a check to
524 // ensure that you are not using C99 with an old version of X/Open or C89
525 // with a new version.
526 if (Opts.C99 || Opts.C11)
527 Builder.defineMacro("_XOPEN_SOURCE", "600");
529 Builder.defineMacro("_XOPEN_SOURCE", "500");
531 Builder.defineMacro("__C99FEATURES__");
532 Builder.defineMacro("_LARGEFILE_SOURCE");
533 Builder.defineMacro("_LARGEFILE64_SOURCE");
534 Builder.defineMacro("__EXTENSIONS__");
535 Builder.defineMacro("_REENTRANT");
538 SolarisTargetInfo(const std::string& triple)
539 : OSTargetInfo<Target>(triple) {
540 this->UserLabelPrefix = "";
541 this->WCharType = this->SignedInt;
542 // FIXME: WIntType should be SignedLong
547 template<typename Target>
548 class WindowsTargetInfo : public OSTargetInfo<Target> {
550 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
551 MacroBuilder &Builder) const {
552 Builder.defineMacro("_WIN32");
554 void getVisualStudioDefines(const LangOptions &Opts,
555 MacroBuilder &Builder) const {
556 if (Opts.CPlusPlus) {
558 Builder.defineMacro("_CPPRTTI");
561 Builder.defineMacro("_CPPUNWIND");
564 if (!Opts.CharIsSigned)
565 Builder.defineMacro("_CHAR_UNSIGNED");
567 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
568 // but it works for now.
569 if (Opts.POSIXThreads)
570 Builder.defineMacro("_MT");
572 if (Opts.MSCVersion != 0)
573 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
575 if (Opts.MicrosoftExt) {
576 Builder.defineMacro("_MSC_EXTENSIONS");
578 if (Opts.CPlusPlus0x) {
579 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
580 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
581 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
585 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
589 WindowsTargetInfo(const std::string &triple)
590 : OSTargetInfo<Target>(triple) {}
593 template <typename Target>
594 class NaClTargetInfo : public OSTargetInfo<Target> {
596 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
597 MacroBuilder &Builder) const {
598 if (Opts.POSIXThreads)
599 Builder.defineMacro("_REENTRANT");
601 Builder.defineMacro("_GNU_SOURCE");
603 DefineStd(Builder, "unix", Opts);
604 Builder.defineMacro("__ELF__");
605 Builder.defineMacro("__native_client__");
608 NaClTargetInfo(const std::string &triple)
609 : OSTargetInfo<Target>(triple) {
610 this->UserLabelPrefix = "";
611 this->LongAlign = 32;
612 this->LongWidth = 32;
613 this->PointerAlign = 32;
614 this->PointerWidth = 32;
615 this->IntMaxType = TargetInfo::SignedLongLong;
616 this->UIntMaxType = TargetInfo::UnsignedLongLong;
617 this->Int64Type = TargetInfo::SignedLongLong;
618 this->DoubleAlign = 64;
619 this->LongDoubleWidth = 64;
620 this->LongDoubleAlign = 64;
621 this->SizeType = TargetInfo::UnsignedInt;
622 this->PtrDiffType = TargetInfo::SignedInt;
623 this->IntPtrType = TargetInfo::SignedInt;
624 this->RegParmMax = 2;
625 this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
626 this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
627 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
629 virtual typename Target::CallingConvCheckResult checkCallingConvention(
630 CallingConv CC) const {
631 return CC == CC_PnaclCall ? Target::CCCR_OK :
632 Target::checkCallingConvention(CC);
635 } // end anonymous namespace.
637 //===----------------------------------------------------------------------===//
638 // Specific target implementations.
639 //===----------------------------------------------------------------------===//
642 // PPC abstract base class
643 class PPCTargetInfo : public TargetInfo {
644 static const Builtin::Info BuiltinInfo[];
645 static const char * const GCCRegNames[];
646 static const TargetInfo::GCCRegAlias GCCRegAliases[];
649 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
650 LongDoubleWidth = LongDoubleAlign = 128;
651 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
654 /// \brief Flags for architecture specific defines.
657 ArchDefineName = 1 << 0, // <name> is substituted for arch name.
658 ArchDefinePpcgr = 1 << 1,
659 ArchDefinePpcsq = 1 << 2,
660 ArchDefine440 = 1 << 3,
661 ArchDefine603 = 1 << 4,
662 ArchDefine604 = 1 << 5,
663 ArchDefinePwr4 = 1 << 6,
664 ArchDefinePwr6 = 1 << 7
667 virtual bool setCPU(const std::string &Name) {
668 bool CPUKnown = llvm::StringSwitch<bool>(Name)
669 .Case("generic", true)
689 .Case("e500mc", true)
703 virtual void getTargetBuiltins(const Builtin::Info *&Records,
704 unsigned &NumRecords) const {
705 Records = BuiltinInfo;
706 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
709 virtual bool isCLZForZeroUndef() const { return false; }
711 virtual void getTargetDefines(const LangOptions &Opts,
712 MacroBuilder &Builder) const;
714 virtual bool hasFeature(StringRef Feature) const;
716 virtual void getGCCRegNames(const char * const *&Names,
717 unsigned &NumNames) const;
718 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
719 unsigned &NumAliases) const;
720 virtual bool validateAsmConstraint(const char *&Name,
721 TargetInfo::ConstraintInfo &Info) const {
723 default: return false;
726 case 'b': // Base register
727 case 'f': // Floating point register
728 Info.setAllowsRegister();
730 // FIXME: The following are added to allow parsing.
731 // I just took a guess at what the actions should be.
732 // Also, is more specific checking needed? I.e. specific registers?
733 case 'd': // Floating point register (containing 64-bit value)
734 case 'v': // Altivec vector register
735 Info.setAllowsRegister();
739 case 'd':// VSX vector register to hold vector double data
740 case 'f':// VSX vector register to hold vector float data
741 case 's':// VSX vector register to hold scalar float data
742 case 'a':// Any VSX register
747 Info.setAllowsRegister();
748 Name++; // Skip over 'w'.
750 case 'h': // `MQ', `CTR', or `LINK' register
751 case 'q': // `MQ' register
752 case 'c': // `CTR' register
753 case 'l': // `LINK' register
754 case 'x': // `CR' register (condition register) number 0
755 case 'y': // `CR' register (condition register)
756 case 'z': // `XER[CA]' carry bit (part of the XER register)
757 Info.setAllowsRegister();
759 case 'I': // Signed 16-bit constant
760 case 'J': // Unsigned 16-bit constant shifted left 16 bits
761 // (use `L' instead for SImode constants)
762 case 'K': // Unsigned 16-bit constant
763 case 'L': // Signed 16-bit constant shifted left 16 bits
764 case 'M': // Constant larger than 31
765 case 'N': // Exact power of 2
766 case 'P': // Constant whose negation is a signed 16-bit constant
767 case 'G': // Floating point constant that can be loaded into a
768 // register with one instruction per word
769 case 'H': // Integer/Floating point constant that can be loaded
770 // into a register using three instructions
772 case 'm': // Memory operand. Note that on PowerPC targets, m can
773 // include addresses that update the base register. It
774 // is therefore only safe to use `m' in an asm statement
775 // if that asm statement accesses the operand exactly once.
776 // The asm statement must also use `%U<opno>' as a
777 // placeholder for the "update" flag in the corresponding
778 // load or store instruction. For example:
779 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
781 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
782 // is not. Use es rather than m if you don't want the base
783 // register to be updated.
787 // es: A "stable" memory operand; that is, one which does not
788 // include any automodification of the base register. Unlike
789 // `m', this constraint can be used in asm statements that
790 // might access the operand several times, or that might not
792 Info.setAllowsMemory();
793 Name++; // Skip over 'e'.
795 case 'Q': // Memory operand that is an offset from a register (it is
796 // usually better to use `m' or `es' in asm statements)
797 case 'Z': // Memory operand that is an indexed or indirect from a
798 // register (it is usually better to use `m' or `es' in
800 Info.setAllowsMemory();
801 Info.setAllowsRegister();
803 case 'R': // AIX TOC entry
804 case 'a': // Address operand that is an indexed or indirect from a
805 // register (`p' is preferable for asm statements)
806 case 'S': // Constant suitable as a 64-bit mask operand
807 case 'T': // Constant suitable as a 32-bit mask operand
808 case 'U': // System V Release 4 small data area reference
809 case 't': // AND masks that can be performed by two rldic{l, r}
811 case 'W': // Vector constant that does not require memory
812 case 'j': // Vector constant that is all zeros.
818 virtual const char *getClobbers() const {
823 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
824 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
825 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
827 #include "clang/Basic/BuiltinsPPC.def"
831 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
832 /// #defines that are not tied to a specific subtarget.
833 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
834 MacroBuilder &Builder) const {
835 // Target identification.
836 Builder.defineMacro("__ppc__");
837 Builder.defineMacro("_ARCH_PPC");
838 Builder.defineMacro("__powerpc__");
839 Builder.defineMacro("__POWERPC__");
840 if (PointerWidth == 64) {
841 Builder.defineMacro("_ARCH_PPC64");
842 Builder.defineMacro("__powerpc64__");
843 Builder.defineMacro("__ppc64__");
845 Builder.defineMacro("__ppc__");
848 // Target properties.
849 if (getTriple().getOS() != llvm::Triple::NetBSD &&
850 getTriple().getOS() != llvm::Triple::OpenBSD)
851 Builder.defineMacro("_BIG_ENDIAN");
852 Builder.defineMacro("__BIG_ENDIAN__");
854 // Subtarget options.
855 Builder.defineMacro("__NATURAL_ALIGNMENT__");
856 Builder.defineMacro("__REGISTER_PREFIX__", "");
858 // FIXME: Should be controlled by command line option.
859 Builder.defineMacro("__LONG_DOUBLE_128__");
862 Builder.defineMacro("__VEC__", "10206");
863 Builder.defineMacro("__ALTIVEC__");
866 // CPU identification.
867 ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
868 .Case("440", ArchDefineName)
869 .Case("450", ArchDefineName | ArchDefine440)
870 .Case("601", ArchDefineName)
871 .Case("602", ArchDefineName | ArchDefinePpcgr)
872 .Case("603", ArchDefineName | ArchDefinePpcgr)
873 .Case("603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
874 .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
875 .Case("604", ArchDefineName | ArchDefinePpcgr)
876 .Case("604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
877 .Case("620", ArchDefineName | ArchDefinePpcgr)
878 .Case("7400", ArchDefineName | ArchDefinePpcgr)
879 .Case("7450", ArchDefineName | ArchDefinePpcgr)
880 .Case("750", ArchDefineName | ArchDefinePpcgr)
881 .Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
883 .Case("pwr6", ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
884 .Case("pwr7", ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
886 .Default(ArchDefineNone);
888 if (defs & ArchDefineName)
889 Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
890 if (defs & ArchDefinePpcgr)
891 Builder.defineMacro("_ARCH_PPCGR");
892 if (defs & ArchDefinePpcsq)
893 Builder.defineMacro("_ARCH_PPCSQ");
894 if (defs & ArchDefine440)
895 Builder.defineMacro("_ARCH_440");
896 if (defs & ArchDefine603)
897 Builder.defineMacro("_ARCH_603");
898 if (defs & ArchDefine604)
899 Builder.defineMacro("_ARCH_604");
900 if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
901 Builder.defineMacro("_ARCH_PWR4");
902 if (defs & ArchDefinePwr6) {
903 Builder.defineMacro("_ARCH_PWR5");
904 Builder.defineMacro("_ARCH_PWR6");
908 bool PPCTargetInfo::hasFeature(StringRef Feature) const {
909 return Feature == "powerpc";
913 const char * const PPCTargetInfo::GCCRegNames[] = {
914 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
915 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
916 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
917 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
918 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
919 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
920 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
921 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
922 "mq", "lr", "ctr", "ap",
923 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
925 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
926 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
927 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
928 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
930 "spe_acc", "spefscr",
934 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
935 unsigned &NumNames) const {
937 NumNames = llvm::array_lengthof(GCCRegNames);
940 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
941 // While some of these aliases do map to different registers
942 // they still share the same register name.
985 { { "fr10" }, "f10" },
986 { { "fr11" }, "f11" },
987 { { "fr12" }, "f12" },
988 { { "fr13" }, "f13" },
989 { { "fr14" }, "f14" },
990 { { "fr15" }, "f15" },
991 { { "fr16" }, "f16" },
992 { { "fr17" }, "f17" },
993 { { "fr18" }, "f18" },
994 { { "fr19" }, "f19" },
995 { { "fr20" }, "f20" },
996 { { "fr21" }, "f21" },
997 { { "fr22" }, "f22" },
998 { { "fr23" }, "f23" },
999 { { "fr24" }, "f24" },
1000 { { "fr25" }, "f25" },
1001 { { "fr26" }, "f26" },
1002 { { "fr27" }, "f27" },
1003 { { "fr28" }, "f28" },
1004 { { "fr29" }, "f29" },
1005 { { "fr30" }, "f30" },
1006 { { "fr31" }, "f31" },
1007 { { "cc" }, "cr0" },
1010 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1011 unsigned &NumAliases) const {
1012 Aliases = GCCRegAliases;
1013 NumAliases = llvm::array_lengthof(GCCRegAliases);
1015 } // end anonymous namespace.
1018 class PPC32TargetInfo : public PPCTargetInfo {
1020 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1021 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1022 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1024 switch (getTriple().getOS()) {
1025 case llvm::Triple::Linux:
1026 case llvm::Triple::FreeBSD:
1027 case llvm::Triple::NetBSD:
1028 SizeType = UnsignedInt;
1029 PtrDiffType = SignedInt;
1030 IntPtrType = SignedInt;
1036 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1037 LongDoubleWidth = LongDoubleAlign = 64;
1038 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1041 // PPC32 supports atomics up to 4 bytes.
1042 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1045 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1046 // This is the ELF definition, and is overridden by the Darwin sub-target
1047 return TargetInfo::PowerABIBuiltinVaList;
1050 } // end anonymous namespace.
1053 class PPC64TargetInfo : public PPCTargetInfo {
1055 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1056 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1057 IntMaxType = SignedLong;
1058 UIntMaxType = UnsignedLong;
1059 Int64Type = SignedLong;
1061 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1062 LongDoubleWidth = LongDoubleAlign = 64;
1063 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1064 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1065 "i64:64:64-f32:32:32-f64:64:64-f128:64:64-"
1066 "v128:128:128-n32:64";
1068 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1069 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
1070 "v128:128:128-n32:64";
1072 // PPC64 supports atomics up to 8 bytes.
1073 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1075 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1076 return TargetInfo::CharPtrBuiltinVaList;
1079 } // end anonymous namespace.
1083 class DarwinPPC32TargetInfo :
1084 public DarwinTargetInfo<PPC32TargetInfo> {
1086 DarwinPPC32TargetInfo(const std::string& triple)
1087 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1088 HasAlignMac68kSupport = true;
1089 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1091 SuitableAlign = 128;
1092 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1093 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1095 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1096 return TargetInfo::CharPtrBuiltinVaList;
1100 class DarwinPPC64TargetInfo :
1101 public DarwinTargetInfo<PPC64TargetInfo> {
1103 DarwinPPC64TargetInfo(const std::string& triple)
1104 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1105 HasAlignMac68kSupport = true;
1106 SuitableAlign = 128;
1107 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1108 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1111 } // end anonymous namespace.
1114 static const unsigned NVPTXAddrSpaceMap[] = {
1117 4, // opencl_constant
1122 class NVPTXTargetInfo : public TargetInfo {
1123 static const char * const GCCRegNames[];
1124 static const Builtin::Info BuiltinInfo[];
1125 std::vector<llvm::StringRef> AvailableFeatures;
1127 NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1129 TLSSupported = false;
1130 LongWidth = LongAlign = 64;
1131 AddrSpaceMap = &NVPTXAddrSpaceMap;
1132 // Define available target features
1133 // These must be defined in sorted order!
1134 NoAsmVariants = true;
1136 virtual void getTargetDefines(const LangOptions &Opts,
1137 MacroBuilder &Builder) const {
1138 Builder.defineMacro("__PTX__");
1139 Builder.defineMacro("__NVPTX__");
1141 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1142 unsigned &NumRecords) const {
1143 Records = BuiltinInfo;
1144 NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1146 virtual bool hasFeature(StringRef Feature) const {
1147 return Feature == "ptx" || Feature == "nvptx";
1150 virtual void getGCCRegNames(const char * const *&Names,
1151 unsigned &NumNames) const;
1152 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1153 unsigned &NumAliases) const {
1158 virtual bool validateAsmConstraint(const char *&Name,
1159 TargetInfo::ConstraintInfo &info) const {
1163 virtual const char *getClobbers() const {
1164 // FIXME: Is this really right?
1167 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1169 return TargetInfo::CharPtrBuiltinVaList;
1171 virtual bool setCPU(const std::string &Name) {
1172 return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1174 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1176 bool Enabled) const;
1179 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1180 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1181 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1183 #include "clang/Basic/BuiltinsNVPTX.def"
1186 const char * const NVPTXTargetInfo::GCCRegNames[] = {
1190 void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1191 unsigned &NumNames) const {
1192 Names = GCCRegNames;
1193 NumNames = llvm::array_lengthof(GCCRegNames);
1196 bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1198 bool Enabled) const {
1199 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1201 Features[Name] = Enabled;
1208 class NVPTX32TargetInfo : public NVPTXTargetInfo {
1210 NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1211 PointerWidth = PointerAlign = 32;
1212 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1214 = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1215 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1220 class NVPTX64TargetInfo : public NVPTXTargetInfo {
1222 NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1223 PointerWidth = PointerAlign = 64;
1224 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1226 = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1227 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1235 static const unsigned R600AddrSpaceMap[] = {
1238 2, // opencl_constant
1244 class R600TargetInfo : public TargetInfo {
1246 R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1248 "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1249 "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1250 "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1251 "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1252 "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1254 AddrSpaceMap = &R600AddrSpaceMap;
1257 virtual const char * getClobbers() const {
1261 virtual void getGCCRegNames(const char * const *&Names,
1262 unsigned &numNames) const {
1267 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1268 unsigned &NumAliases) const {
1273 virtual bool validateAsmConstraint(const char *&Name,
1274 TargetInfo::ConstraintInfo &info) const {
1278 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1279 unsigned &NumRecords) const {
1285 virtual void getTargetDefines(const LangOptions &Opts,
1286 MacroBuilder &Builder) const {
1287 Builder.defineMacro("__R600__");
1290 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1291 return TargetInfo::CharPtrBuiltinVaList;
1296 } // end anonymous namespace
1299 // MBlaze abstract base class
1300 class MBlazeTargetInfo : public TargetInfo {
1301 static const char * const GCCRegNames[];
1302 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1305 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1306 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1309 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1310 unsigned &NumRecords) const {
1311 // FIXME: Implement.
1316 virtual void getTargetDefines(const LangOptions &Opts,
1317 MacroBuilder &Builder) const;
1319 virtual bool hasFeature(StringRef Feature) const {
1320 return Feature == "mblaze";
1323 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1324 return TargetInfo::CharPtrBuiltinVaList;
1326 virtual const char *getTargetPrefix() const {
1329 virtual void getGCCRegNames(const char * const *&Names,
1330 unsigned &NumNames) const;
1331 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1332 unsigned &NumAliases) const;
1333 virtual bool validateAsmConstraint(const char *&Name,
1334 TargetInfo::ConstraintInfo &Info) const {
1336 default: return false;
1339 case 'b': // Base register
1340 case 'f': // Floating point register
1341 Info.setAllowsRegister();
1345 virtual const char *getClobbers() const {
1350 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1351 /// #defines that are not tied to a specific subtarget.
1352 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1353 MacroBuilder &Builder) const {
1354 // Target identification.
1355 Builder.defineMacro("__microblaze__");
1356 Builder.defineMacro("_ARCH_MICROBLAZE");
1357 Builder.defineMacro("__MICROBLAZE__");
1359 // Target properties.
1360 Builder.defineMacro("_BIG_ENDIAN");
1361 Builder.defineMacro("__BIG_ENDIAN__");
1363 // Subtarget options.
1364 Builder.defineMacro("__REGISTER_PREFIX__", "");
1368 const char * const MBlazeTargetInfo::GCCRegNames[] = {
1369 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1370 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1371 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1372 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
1373 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
1374 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1375 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1376 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1377 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1378 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
1381 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1382 unsigned &NumNames) const {
1383 Names = GCCRegNames;
1384 NumNames = llvm::array_lengthof(GCCRegNames);
1387 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1422 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1423 unsigned &NumAliases) const {
1424 Aliases = GCCRegAliases;
1425 NumAliases = llvm::array_lengthof(GCCRegAliases);
1427 } // end anonymous namespace.
1430 // Namespace for x86 abstract base class
1431 const Builtin::Info BuiltinInfo[] = {
1432 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1433 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1435 #include "clang/Basic/BuiltinsX86.def"
1438 static const char* const GCCRegNames[] = {
1439 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1440 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1441 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1442 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1443 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1444 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1445 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1446 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1447 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1450 const TargetInfo::AddlRegName AddlRegNames[] = {
1451 { { "al", "ah", "eax", "rax" }, 0 },
1452 { { "bl", "bh", "ebx", "rbx" }, 3 },
1453 { { "cl", "ch", "ecx", "rcx" }, 2 },
1454 { { "dl", "dh", "edx", "rdx" }, 1 },
1455 { { "esi", "rsi" }, 4 },
1456 { { "edi", "rdi" }, 5 },
1457 { { "esp", "rsp" }, 7 },
1458 { { "ebp", "rbp" }, 6 },
1461 // X86 target abstract base class; x86-32 and x86-64 are very close, so
1462 // most of the implementation can be shared.
1463 class X86TargetInfo : public TargetInfo {
1465 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1468 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1485 /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1487 /// Each enumeration represents a particular CPU supported by Clang. These
1488 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1493 /// i386-generation processors.
1499 /// i486-generation processors.
1508 /// i586-generation processors, P5 microarchitecture based.
1516 /// i686-generation processors, P6 / Pentium M microarchitecture based.
1526 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1527 /// Clang however has some logic to suport this.
1528 // FIXME: Warn, deprecate, and potentially remove this.
1533 /// Netburst microarchitecture based processors.
1542 /// Core microarchitecture based processors.
1546 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1547 /// codename which GCC no longer accepts as an option to -march, but Clang
1548 /// has some logic for recognizing it.
1549 // FIXME: Warn, deprecate, and potentially remove this.
1560 /// Nehalem microarchitecture based processors.
1569 /// K6 architecture processors.
1577 /// K7 architecture processors.
1580 CK_AthlonThunderbird,
1587 /// K8 architecture processors.
1600 /// Bobcat architecture processors.
1606 /// Bulldozer architecture processors.
1612 /// This specification is deprecated and will be removed in the future.
1613 /// Users should prefer \see CK_K8.
1614 // FIXME: Warn on this when the CPU is set to it.
1619 /// Geode processors.
1626 X86TargetInfo(const std::string& triple)
1627 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1628 HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1629 HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false),
1630 HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false),
1631 HasF16C(false), CPU(CK_Generic) {
1633 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1635 virtual unsigned getFloatEvalMethod() const {
1636 // X87 evaluates with 80 bits "long double" precision.
1637 return SSELevel == NoSSE ? 2 : 0;
1639 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1640 unsigned &NumRecords) const {
1641 Records = BuiltinInfo;
1642 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1644 virtual void getGCCRegNames(const char * const *&Names,
1645 unsigned &NumNames) const {
1646 Names = GCCRegNames;
1647 NumNames = llvm::array_lengthof(GCCRegNames);
1649 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1650 unsigned &NumAliases) const {
1654 virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1655 unsigned &NumNames) const {
1656 Names = AddlRegNames;
1657 NumNames = llvm::array_lengthof(AddlRegNames);
1659 virtual bool validateAsmConstraint(const char *&Name,
1660 TargetInfo::ConstraintInfo &info) const;
1661 virtual std::string convertConstraint(const char *&Constraint) const;
1662 virtual const char *getClobbers() const {
1663 return "~{dirflag},~{fpsr},~{flags}";
1665 virtual void getTargetDefines(const LangOptions &Opts,
1666 MacroBuilder &Builder) const;
1667 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1669 bool Enabled) const;
1670 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1671 virtual bool hasFeature(StringRef Feature) const;
1672 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1673 virtual const char* getABI() const {
1674 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1676 else if (getTriple().getArch() == llvm::Triple::x86 &&
1677 MMX3DNowLevel == NoMMX3DNow)
1681 virtual bool setCPU(const std::string &Name) {
1682 CPU = llvm::StringSwitch<CPUKind>(Name)
1683 .Case("i386", CK_i386)
1684 .Case("i486", CK_i486)
1685 .Case("winchip-c6", CK_WinChipC6)
1686 .Case("winchip2", CK_WinChip2)
1688 .Case("i586", CK_i586)
1689 .Case("pentium", CK_Pentium)
1690 .Case("pentium-mmx", CK_PentiumMMX)
1691 .Case("i686", CK_i686)
1692 .Case("pentiumpro", CK_PentiumPro)
1693 .Case("pentium2", CK_Pentium2)
1694 .Case("pentium3", CK_Pentium3)
1695 .Case("pentium3m", CK_Pentium3M)
1696 .Case("pentium-m", CK_PentiumM)
1697 .Case("c3-2", CK_C3_2)
1698 .Case("yonah", CK_Yonah)
1699 .Case("pentium4", CK_Pentium4)
1700 .Case("pentium4m", CK_Pentium4M)
1701 .Case("prescott", CK_Prescott)
1702 .Case("nocona", CK_Nocona)
1703 .Case("core2", CK_Core2)
1704 .Case("penryn", CK_Penryn)
1705 .Case("atom", CK_Atom)
1706 .Case("corei7", CK_Corei7)
1707 .Case("corei7-avx", CK_Corei7AVX)
1708 .Case("core-avx-i", CK_CoreAVXi)
1709 .Case("core-avx2", CK_CoreAVX2)
1711 .Case("k6-2", CK_K6_2)
1712 .Case("k6-3", CK_K6_3)
1713 .Case("athlon", CK_Athlon)
1714 .Case("athlon-tbird", CK_AthlonThunderbird)
1715 .Case("athlon-4", CK_Athlon4)
1716 .Case("athlon-xp", CK_AthlonXP)
1717 .Case("athlon-mp", CK_AthlonMP)
1718 .Case("athlon64", CK_Athlon64)
1719 .Case("athlon64-sse3", CK_Athlon64SSE3)
1720 .Case("athlon-fx", CK_AthlonFX)
1722 .Case("k8-sse3", CK_K8SSE3)
1723 .Case("opteron", CK_Opteron)
1724 .Case("opteron-sse3", CK_OpteronSSE3)
1725 .Case("amdfam10", CK_AMDFAM10)
1726 .Case("btver1", CK_BTVER1)
1727 .Case("bdver1", CK_BDVER1)
1728 .Case("bdver2", CK_BDVER2)
1729 .Case("x86-64", CK_x86_64)
1730 .Case("geode", CK_Geode)
1731 .Default(CK_Generic);
1733 // Perform any per-CPU checks necessary to determine if this CPU is
1735 // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1736 // invalid without explaining *why*.
1739 // No processor selected!
1765 case CK_AthlonThunderbird:
1770 // Only accept certain architectures when compiling in 32-bit mode.
1771 if (getTriple().getArch() != llvm::Triple::x86)
1784 case CK_Athlon64SSE3:
1789 case CK_OpteronSSE3:
1797 llvm_unreachable("Unhandled CPU kind");
1800 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1801 // We accept all non-ARM calling conventions
1802 return (CC == CC_X86ThisCall ||
1803 CC == CC_X86FastCall ||
1804 CC == CC_X86StdCall ||
1806 CC == CC_X86Pascal) ? CCCR_OK : CCCR_Warning;
1809 virtual CallingConv getDefaultCallingConv() const {
1814 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1815 // FIXME: This should not be here.
1816 Features["3dnow"] = false;
1817 Features["3dnowa"] = false;
1818 Features["mmx"] = false;
1819 Features["sse"] = false;
1820 Features["sse2"] = false;
1821 Features["sse3"] = false;
1822 Features["ssse3"] = false;
1823 Features["sse41"] = false;
1824 Features["sse42"] = false;
1825 Features["sse4a"] = false;
1826 Features["aes"] = false;
1827 Features["pclmul"] = false;
1828 Features["avx"] = false;
1829 Features["avx2"] = false;
1830 Features["lzcnt"] = false;
1831 Features["rdrand"] = false;
1832 Features["bmi"] = false;
1833 Features["bmi2"] = false;
1834 Features["popcnt"] = false;
1835 Features["rtm"] = false;
1836 Features["fma4"] = false;
1837 Features["fma"] = false;
1838 Features["xop"] = false;
1839 Features["f16c"] = false;
1841 // FIXME: This *really* should not be here.
1843 // X86_64 always has SSE2.
1844 if (getTriple().getArch() == llvm::Triple::x86_64)
1845 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1858 setFeatureEnabled(Features, "mmx", true);
1862 setFeatureEnabled(Features, "mmx", true);
1863 setFeatureEnabled(Features, "sse", true);
1869 setFeatureEnabled(Features, "mmx", true);
1870 setFeatureEnabled(Features, "sse2", true);
1875 setFeatureEnabled(Features, "mmx", true);
1876 setFeatureEnabled(Features, "sse3", true);
1879 setFeatureEnabled(Features, "mmx", true);
1880 setFeatureEnabled(Features, "ssse3", true);
1883 setFeatureEnabled(Features, "mmx", true);
1884 setFeatureEnabled(Features, "sse4.1", true);
1887 setFeatureEnabled(Features, "mmx", true);
1888 setFeatureEnabled(Features, "ssse3", true);
1891 setFeatureEnabled(Features, "mmx", true);
1892 setFeatureEnabled(Features, "sse4", true);
1895 setFeatureEnabled(Features, "mmx", true);
1896 setFeatureEnabled(Features, "avx", true);
1897 setFeatureEnabled(Features, "aes", true);
1898 setFeatureEnabled(Features, "pclmul", true);
1901 setFeatureEnabled(Features, "mmx", true);
1902 setFeatureEnabled(Features, "avx", true);
1903 setFeatureEnabled(Features, "aes", true);
1904 setFeatureEnabled(Features, "pclmul", true);
1905 setFeatureEnabled(Features, "rdrnd", true);
1908 setFeatureEnabled(Features, "mmx", true);
1909 setFeatureEnabled(Features, "avx2", true);
1910 setFeatureEnabled(Features, "aes", true);
1911 setFeatureEnabled(Features, "pclmul", true);
1912 setFeatureEnabled(Features, "lzcnt", true);
1913 setFeatureEnabled(Features, "rdrnd", true);
1914 setFeatureEnabled(Features, "bmi", true);
1915 setFeatureEnabled(Features, "bmi2", true);
1916 setFeatureEnabled(Features, "rtm", true);
1917 setFeatureEnabled(Features, "fma", true);
1921 setFeatureEnabled(Features, "mmx", true);
1927 setFeatureEnabled(Features, "3dnow", true);
1930 case CK_AthlonThunderbird:
1932 setFeatureEnabled(Features, "3dnowa", true);
1937 setFeatureEnabled(Features, "sse", true);
1938 setFeatureEnabled(Features, "3dnowa", true);
1944 setFeatureEnabled(Features, "sse2", true);
1945 setFeatureEnabled(Features, "3dnowa", true);
1948 case CK_OpteronSSE3:
1949 case CK_Athlon64SSE3:
1950 setFeatureEnabled(Features, "sse3", true);
1951 setFeatureEnabled(Features, "3dnowa", true);
1954 setFeatureEnabled(Features, "sse3", true);
1955 setFeatureEnabled(Features, "sse4a", true);
1956 setFeatureEnabled(Features, "3dnowa", true);
1959 setFeatureEnabled(Features, "ssse3", true);
1960 setFeatureEnabled(Features, "sse4a", true);
1964 setFeatureEnabled(Features, "avx", true);
1965 setFeatureEnabled(Features, "xop", true);
1966 setFeatureEnabled(Features, "aes", true);
1967 setFeatureEnabled(Features, "pclmul", true);
1970 setFeatureEnabled(Features, "mmx", true);
1971 setFeatureEnabled(Features, "sse", true);
1976 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1978 bool Enabled) const {
1979 // FIXME: This *really* should not be here. We need some way of translating
1980 // options into llvm subtarget features.
1981 if (!Features.count(Name) &&
1982 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1986 // FIXME: this should probably use a switch with fall through.
1990 Features["mmx"] = true;
1991 else if (Name == "sse")
1992 Features["mmx"] = Features["sse"] = true;
1993 else if (Name == "sse2")
1994 Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1995 else if (Name == "sse3")
1996 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1998 else if (Name == "ssse3")
1999 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2000 Features["ssse3"] = true;
2001 else if (Name == "sse4" || Name == "sse4.2")
2002 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2003 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2004 Features["popcnt"] = true;
2005 else if (Name == "sse4.1")
2006 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2007 Features["ssse3"] = Features["sse41"] = true;
2008 else if (Name == "3dnow")
2009 Features["mmx"] = Features["3dnow"] = true;
2010 else if (Name == "3dnowa")
2011 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
2012 else if (Name == "aes")
2013 Features["sse"] = Features["sse2"] = Features["aes"] = true;
2014 else if (Name == "pclmul")
2015 Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2016 else if (Name == "avx")
2017 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2018 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2019 Features["popcnt"] = Features["avx"] = true;
2020 else if (Name == "avx2")
2021 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2022 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2023 Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2024 else if (Name == "fma")
2025 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2026 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2027 Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2028 else if (Name == "fma4")
2029 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2030 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2031 Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2032 Features["fma4"] = true;
2033 else if (Name == "xop")
2034 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2035 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2036 Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2037 Features["fma4"] = Features["xop"] = true;
2038 else if (Name == "sse4a")
2039 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2040 Features["sse4a"] = true;
2041 else if (Name == "lzcnt")
2042 Features["lzcnt"] = true;
2043 else if (Name == "rdrnd")
2044 Features["rdrand"] = true;
2045 else if (Name == "bmi")
2046 Features["bmi"] = true;
2047 else if (Name == "bmi2")
2048 Features["bmi2"] = true;
2049 else if (Name == "popcnt")
2050 Features["popcnt"] = true;
2051 else if (Name == "f16c")
2052 Features["f16c"] = true;
2053 else if (Name == "rtm")
2054 Features["rtm"] = true;
2057 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2058 else if (Name == "sse")
2059 Features["sse"] = Features["sse2"] = Features["sse3"] =
2060 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2061 Features["sse4a"] = Features["avx"] = Features["avx2"] =
2062 Features["fma"] = Features["fma4"] = Features["aes"] =
2063 Features["pclmul"] = Features["xop"] = false;
2064 else if (Name == "sse2")
2065 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2066 Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2067 Features["avx"] = Features["avx2"] = Features["fma"] =
2068 Features["fma4"] = Features["aes"] = Features["pclmul"] =
2069 Features["xop"] = false;
2070 else if (Name == "sse3")
2071 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2072 Features["sse42"] = Features["sse4a"] = Features["avx"] =
2073 Features["avx2"] = Features["fma"] = Features["fma4"] =
2074 Features["xop"] = false;
2075 else if (Name == "ssse3")
2076 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2077 Features["avx"] = Features["avx2"] = Features["fma"] = false;
2078 else if (Name == "sse4" || Name == "sse4.1")
2079 Features["sse41"] = Features["sse42"] = Features["avx"] =
2080 Features["avx2"] = Features["fma"] = false;
2081 else if (Name == "sse4.2")
2082 Features["sse42"] = Features["avx"] = Features["avx2"] =
2083 Features["fma"] = false;
2084 else if (Name == "3dnow")
2085 Features["3dnow"] = Features["3dnowa"] = false;
2086 else if (Name == "3dnowa")
2087 Features["3dnowa"] = false;
2088 else if (Name == "aes")
2089 Features["aes"] = false;
2090 else if (Name == "pclmul")
2091 Features["pclmul"] = false;
2092 else if (Name == "avx")
2093 Features["avx"] = Features["avx2"] = Features["fma"] =
2094 Features["fma4"] = Features["xop"] = false;
2095 else if (Name == "avx2")
2096 Features["avx2"] = false;
2097 else if (Name == "fma")
2098 Features["fma"] = false;
2099 else if (Name == "sse4a")
2100 Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2101 else if (Name == "lzcnt")
2102 Features["lzcnt"] = false;
2103 else if (Name == "rdrnd")
2104 Features["rdrand"] = false;
2105 else if (Name == "bmi")
2106 Features["bmi"] = false;
2107 else if (Name == "bmi2")
2108 Features["bmi2"] = false;
2109 else if (Name == "popcnt")
2110 Features["popcnt"] = false;
2111 else if (Name == "fma4")
2112 Features["fma4"] = Features["xop"] = false;
2113 else if (Name == "xop")
2114 Features["xop"] = false;
2115 else if (Name == "f16c")
2116 Features["f16c"] = false;
2117 else if (Name == "rtm")
2118 Features["rtm"] = false;
2124 /// HandleTargetOptions - Perform initialization based on the user
2125 /// configured set of features.
2126 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2127 // Remember the maximum enabled sselevel.
2128 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2129 // Ignore disabled features.
2130 if (Features[i][0] == '-')
2133 StringRef Feature = StringRef(Features[i]).substr(1);
2135 if (Feature == "aes") {
2140 if (Feature == "pclmul") {
2145 if (Feature == "lzcnt") {
2150 if (Feature == "rdrand") {
2155 if (Feature == "bmi") {
2160 if (Feature == "bmi2") {
2165 if (Feature == "popcnt") {
2170 if (Feature == "rtm") {
2175 if (Feature == "sse4a") {
2180 if (Feature == "fma4") {
2185 if (Feature == "fma") {
2190 if (Feature == "xop") {
2195 if (Feature == "f16c") {
2200 assert(Features[i][0] == '+' && "Invalid target feature!");
2201 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2204 .Case("sse42", SSE42)
2205 .Case("sse41", SSE41)
2206 .Case("ssse3", SSSE3)
2211 SSELevel = std::max(SSELevel, Level);
2213 MMX3DNowEnum ThreeDNowLevel =
2214 llvm::StringSwitch<MMX3DNowEnum>(Feature)
2215 .Case("3dnowa", AMD3DNowAthlon)
2216 .Case("3dnow", AMD3DNow)
2218 .Default(NoMMX3DNow);
2220 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2223 // Don't tell the backend if we're turning off mmx; it will end up disabling
2224 // SSE, which we don't want.
2225 std::vector<std::string>::iterator it;
2226 it = std::find(Features.begin(), Features.end(), "-mmx");
2227 if (it != Features.end())
2231 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2232 /// definitions for this particular subtarget.
2233 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2234 MacroBuilder &Builder) const {
2235 // Target identification.
2236 if (getTriple().getArch() == llvm::Triple::x86_64) {
2237 Builder.defineMacro("__amd64__");
2238 Builder.defineMacro("__amd64");
2239 Builder.defineMacro("__x86_64");
2240 Builder.defineMacro("__x86_64__");
2242 DefineStd(Builder, "i386", Opts);
2245 // Subtarget options.
2246 // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2247 // truly should be based on -mtune options.
2252 // The rest are coming from the i386 define above.
2253 Builder.defineMacro("__tune_i386__");
2259 defineCPUMacros(Builder, "i486");
2262 Builder.defineMacro("__pentium_mmx__");
2263 Builder.defineMacro("__tune_pentium_mmx__");
2267 defineCPUMacros(Builder, "i586");
2268 defineCPUMacros(Builder, "pentium");
2273 Builder.defineMacro("__tune_pentium3__");
2277 Builder.defineMacro("__tune_pentium2__");
2280 Builder.defineMacro("__tune_i686__");
2281 Builder.defineMacro("__tune_pentiumpro__");
2284 Builder.defineMacro("__i686");
2285 Builder.defineMacro("__i686__");
2286 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2287 Builder.defineMacro("__pentiumpro");
2288 Builder.defineMacro("__pentiumpro__");
2292 defineCPUMacros(Builder, "pentium4");
2297 defineCPUMacros(Builder, "nocona");
2301 defineCPUMacros(Builder, "core2");
2304 defineCPUMacros(Builder, "atom");
2310 defineCPUMacros(Builder, "corei7");
2313 Builder.defineMacro("__k6_2__");
2314 Builder.defineMacro("__tune_k6_2__");
2317 if (CPU != CK_K6_2) { // In case of fallthrough
2318 // FIXME: GCC may be enabling these in cases where some other k6
2319 // architecture is specified but -m3dnow is explicitly provided. The
2320 // exact semantics need to be determined and emulated here.
2321 Builder.defineMacro("__k6_3__");
2322 Builder.defineMacro("__tune_k6_3__");
2326 defineCPUMacros(Builder, "k6");
2329 case CK_AthlonThunderbird:
2333 defineCPUMacros(Builder, "athlon");
2334 if (SSELevel != NoSSE) {
2335 Builder.defineMacro("__athlon_sse__");
2336 Builder.defineMacro("__tune_athlon_sse__");
2343 case CK_OpteronSSE3:
2345 case CK_Athlon64SSE3:
2347 defineCPUMacros(Builder, "k8");
2350 defineCPUMacros(Builder, "amdfam10");
2353 defineCPUMacros(Builder, "btver1");
2356 defineCPUMacros(Builder, "bdver1");
2359 defineCPUMacros(Builder, "bdver2");
2362 defineCPUMacros(Builder, "geode");
2366 // Target properties.
2367 Builder.defineMacro("__LITTLE_ENDIAN__");
2368 Builder.defineMacro("__REGISTER_PREFIX__", "");
2370 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2371 // functions in glibc header files that use FP Stack inline asm which the
2372 // backend can't deal with (PR879).
2373 Builder.defineMacro("__NO_MATH_INLINES");
2376 Builder.defineMacro("__AES__");
2379 Builder.defineMacro("__PCLMUL__");
2382 Builder.defineMacro("__LZCNT__");
2385 Builder.defineMacro("__RDRND__");
2388 Builder.defineMacro("__BMI__");
2391 Builder.defineMacro("__BMI2__");
2394 Builder.defineMacro("__POPCNT__");
2397 Builder.defineMacro("__RTM__");
2400 Builder.defineMacro("__SSE4A__");
2403 Builder.defineMacro("__FMA4__");
2406 Builder.defineMacro("__FMA__");
2409 Builder.defineMacro("__XOP__");
2412 Builder.defineMacro("__F16C__");
2414 // Each case falls through to the previous one here.
2417 Builder.defineMacro("__AVX2__");
2419 Builder.defineMacro("__AVX__");
2421 Builder.defineMacro("__SSE4_2__");
2423 Builder.defineMacro("__SSE4_1__");
2425 Builder.defineMacro("__SSSE3__");
2427 Builder.defineMacro("__SSE3__");
2429 Builder.defineMacro("__SSE2__");
2430 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
2432 Builder.defineMacro("__SSE__");
2433 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
2438 if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2447 Builder.defineMacro("_M_IX86_FP", Twine(2));
2450 Builder.defineMacro("_M_IX86_FP", Twine(1));
2453 Builder.defineMacro("_M_IX86_FP", Twine(0));
2457 // Each case falls through to the previous one here.
2458 switch (MMX3DNowLevel) {
2459 case AMD3DNowAthlon:
2460 Builder.defineMacro("__3dNOW_A__");
2462 Builder.defineMacro("__3dNOW__");
2464 Builder.defineMacro("__MMX__");
2470 bool X86TargetInfo::hasFeature(StringRef Feature) const {
2471 return llvm::StringSwitch<bool>(Feature)
2472 .Case("aes", HasAES)
2473 .Case("avx", SSELevel >= AVX)
2474 .Case("avx2", SSELevel >= AVX2)
2475 .Case("bmi", HasBMI)
2476 .Case("bmi2", HasBMI2)
2477 .Case("fma", HasFMA)
2478 .Case("fma4", HasFMA4)
2479 .Case("lzcnt", HasLZCNT)
2480 .Case("rdrnd", HasRDRND)
2481 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2482 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2483 .Case("mmx", MMX3DNowLevel >= MMX)
2484 .Case("pclmul", HasPCLMUL)
2485 .Case("popcnt", HasPOPCNT)
2486 .Case("rtm", HasRTM)
2487 .Case("sse", SSELevel >= SSE1)
2488 .Case("sse2", SSELevel >= SSE2)
2489 .Case("sse3", SSELevel >= SSE3)
2490 .Case("ssse3", SSELevel >= SSSE3)
2491 .Case("sse41", SSELevel >= SSE41)
2492 .Case("sse42", SSELevel >= SSE42)
2493 .Case("sse4a", HasSSE4a)
2495 .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2496 .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2497 .Case("xop", HasXOP)
2498 .Case("f16c", HasF16C)
2503 X86TargetInfo::validateAsmConstraint(const char *&Name,
2504 TargetInfo::ConstraintInfo &Info) const {
2506 default: return false;
2507 case 'Y': // first letter of a pair:
2508 switch (*(Name+1)) {
2509 default: return false;
2510 case '0': // First SSE register.
2511 case 't': // Any SSE register, when SSE2 is enabled.
2512 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
2513 case 'm': // any MMX register, when inter-unit moves enabled.
2514 break; // falls through to setAllowsRegister.
2522 case 'A': // edx:eax.
2523 case 'f': // any x87 floating point stack register.
2524 case 't': // top of floating point stack.
2525 case 'u': // second from top of floating point stack.
2526 case 'q': // Any register accessible as [r]l: a, b, c, and d.
2527 case 'y': // Any MMX register.
2528 case 'x': // Any SSE register.
2529 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2530 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2531 case 'l': // "Index" registers: any general register that can be used as an
2532 // index in a base+index memory access.
2533 Info.setAllowsRegister();
2535 case 'C': // SSE floating point constant.
2536 case 'G': // x87 floating point constant.
2537 case 'e': // 32-bit signed integer constant for use with zero-extending
2538 // x86_64 instructions.
2539 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2540 // x86_64 instructions.
2547 X86TargetInfo::convertConstraint(const char *&Constraint) const {
2548 switch (*Constraint) {
2549 case 'a': return std::string("{ax}");
2550 case 'b': return std::string("{bx}");
2551 case 'c': return std::string("{cx}");
2552 case 'd': return std::string("{dx}");
2553 case 'S': return std::string("{si}");
2554 case 'D': return std::string("{di}");
2555 case 'p': // address
2556 return std::string("im");
2557 case 't': // top of floating point stack.
2558 return std::string("{st}");
2559 case 'u': // second from top of floating point stack.
2560 return std::string("{st(1)}"); // second from top of floating point stack.
2562 return std::string(1, *Constraint);
2565 } // end anonymous namespace
2568 // X86-32 generic target
2569 class X86_32TargetInfo : public X86TargetInfo {
2571 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2572 DoubleAlign = LongLongAlign = 32;
2573 LongDoubleWidth = 96;
2574 LongDoubleAlign = 32;
2575 SuitableAlign = 128;
2576 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2577 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2578 "a0:0:64-f80:32:32-n8:16:32-S128";
2579 SizeType = UnsignedInt;
2580 PtrDiffType = SignedInt;
2581 IntPtrType = SignedInt;
2584 // Use fpret for all types.
2585 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2586 (1 << TargetInfo::Double) |
2587 (1 << TargetInfo::LongDouble));
2589 // x86-32 has atomics up to 8 bytes
2590 // FIXME: Check that we actually have cmpxchg8b before setting
2591 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2592 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2594 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2595 return TargetInfo::CharPtrBuiltinVaList;
2598 int getEHDataRegisterNumber(unsigned RegNo) const {
2599 if (RegNo == 0) return 0;
2600 if (RegNo == 1) return 2;
2604 } // end anonymous namespace
2607 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2609 NetBSDI386TargetInfo(const std::string &triple) :
2610 NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2613 virtual unsigned getFloatEvalMethod() const {
2614 // NetBSD defaults to "double" rounding
2618 } // end anonymous namespace
2621 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2623 OpenBSDI386TargetInfo(const std::string& triple) :
2624 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2625 SizeType = UnsignedLong;
2626 IntPtrType = SignedLong;
2627 PtrDiffType = SignedLong;
2630 } // end anonymous namespace
2633 class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2635 BitrigI386TargetInfo(const std::string& triple) :
2636 BitrigTargetInfo<X86_32TargetInfo>(triple) {
2637 SizeType = UnsignedLong;
2638 IntPtrType = SignedLong;
2639 PtrDiffType = SignedLong;
2642 } // end anonymous namespace
2645 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2647 DarwinI386TargetInfo(const std::string& triple) :
2648 DarwinTargetInfo<X86_32TargetInfo>(triple) {
2649 LongDoubleWidth = 128;
2650 LongDoubleAlign = 128;
2651 SuitableAlign = 128;
2652 MaxVectorAlign = 256;
2653 SizeType = UnsignedLong;
2654 IntPtrType = SignedLong;
2655 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2656 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2657 "a0:0:64-f80:128:128-n8:16:32-S128";
2658 HasAlignMac68kSupport = true;
2662 } // end anonymous namespace
2665 // x86-32 Windows target
2666 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2668 WindowsX86_32TargetInfo(const std::string& triple)
2669 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2670 TLSSupported = false;
2671 WCharType = UnsignedShort;
2672 DoubleAlign = LongLongAlign = 64;
2673 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2674 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2675 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2677 virtual void getTargetDefines(const LangOptions &Opts,
2678 MacroBuilder &Builder) const {
2679 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2682 } // end anonymous namespace
2686 // x86-32 Windows Visual Studio target
2687 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2689 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2690 : WindowsX86_32TargetInfo(triple) {
2691 LongDoubleWidth = LongDoubleAlign = 64;
2692 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2694 virtual void getTargetDefines(const LangOptions &Opts,
2695 MacroBuilder &Builder) const {
2696 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2697 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2698 // The value of the following reflects processor type.
2699 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2700 // We lost the original triple, so we use the default.
2701 Builder.defineMacro("_M_IX86", "600");
2704 } // end anonymous namespace
2707 // x86-32 MinGW target
2708 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2710 MinGWX86_32TargetInfo(const std::string& triple)
2711 : WindowsX86_32TargetInfo(triple) {
2713 virtual void getTargetDefines(const LangOptions &Opts,
2714 MacroBuilder &Builder) const {
2715 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2716 DefineStd(Builder, "WIN32", Opts);
2717 DefineStd(Builder, "WINNT", Opts);
2718 Builder.defineMacro("_X86_");
2719 Builder.defineMacro("__MSVCRT__");
2720 Builder.defineMacro("__MINGW32__");
2722 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2723 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2724 if (Opts.MicrosoftExt)
2725 // Provide "as-is" __declspec.
2726 Builder.defineMacro("__declspec", "__declspec");
2728 // Provide alias of __attribute__ like mingw32-gcc.
2729 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2732 } // end anonymous namespace
2735 // x86-32 Cygwin target
2736 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2738 CygwinX86_32TargetInfo(const std::string& triple)
2739 : X86_32TargetInfo(triple) {
2740 TLSSupported = false;
2741 WCharType = UnsignedShort;
2742 DoubleAlign = LongLongAlign = 64;
2743 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2744 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2745 "a0:0:64-f80:32:32-n8:16:32-S32";
2747 virtual void getTargetDefines(const LangOptions &Opts,
2748 MacroBuilder &Builder) const {
2749 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2750 Builder.defineMacro("__CYGWIN__");
2751 Builder.defineMacro("__CYGWIN32__");
2752 DefineStd(Builder, "unix", Opts);
2754 Builder.defineMacro("_GNU_SOURCE");
2757 } // end anonymous namespace
2760 // x86-32 Haiku target
2761 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2763 HaikuX86_32TargetInfo(const std::string& triple)
2764 : X86_32TargetInfo(triple) {
2765 SizeType = UnsignedLong;
2766 IntPtrType = SignedLong;
2767 PtrDiffType = SignedLong;
2768 ProcessIDType = SignedLong;
2769 this->UserLabelPrefix = "";
2770 this->TLSSupported = false;
2772 virtual void getTargetDefines(const LangOptions &Opts,
2773 MacroBuilder &Builder) const {
2774 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2775 Builder.defineMacro("__INTEL__");
2776 Builder.defineMacro("__HAIKU__");
2779 } // end anonymous namespace
2782 template<typename Target>
2783 class RTEMSTargetInfo : public OSTargetInfo<Target> {
2785 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2786 MacroBuilder &Builder) const {
2787 // RTEMS defines; list based off of gcc output
2789 Builder.defineMacro("__rtems__");
2790 Builder.defineMacro("__ELF__");
2793 RTEMSTargetInfo(const std::string &triple)
2794 : OSTargetInfo<Target>(triple) {
2795 this->UserLabelPrefix = "";
2797 llvm::Triple Triple(triple);
2798 switch (Triple.getArch()) {
2800 case llvm::Triple::x86:
2801 // this->MCountName = ".mcount";
2803 case llvm::Triple::mips:
2804 case llvm::Triple::mipsel:
2805 case llvm::Triple::ppc:
2806 case llvm::Triple::ppc64:
2807 // this->MCountName = "_mcount";
2809 case llvm::Triple::arm:
2810 // this->MCountName = "__mcount";
2818 // x86-32 RTEMS target
2819 class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2821 RTEMSX86_32TargetInfo(const std::string& triple)
2822 : X86_32TargetInfo(triple) {
2823 SizeType = UnsignedLong;
2824 IntPtrType = SignedLong;
2825 PtrDiffType = SignedLong;
2826 this->UserLabelPrefix = "";
2828 virtual void getTargetDefines(const LangOptions &Opts,
2829 MacroBuilder &Builder) const {
2830 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2831 Builder.defineMacro("__INTEL__");
2832 Builder.defineMacro("__rtems__");
2835 } // end anonymous namespace
2838 // x86-64 generic target
2839 class X86_64TargetInfo : public X86TargetInfo {
2841 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2842 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2843 LongDoubleWidth = 128;
2844 LongDoubleAlign = 128;
2845 LargeArrayMinWidth = 128;
2846 LargeArrayAlign = 128;
2847 SuitableAlign = 128;
2848 IntMaxType = SignedLong;
2849 UIntMaxType = UnsignedLong;
2850 Int64Type = SignedLong;
2853 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2854 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2855 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2857 // Use fpret only for long double.
2858 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2860 // Use fp2ret for _Complex long double.
2861 ComplexLongDoubleUsesFP2Ret = true;
2863 // x86-64 has atomics up to 16 bytes.
2864 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2865 // on CPUs with cmpxchg16b
2866 MaxAtomicPromoteWidth = 128;
2867 MaxAtomicInlineWidth = 64;
2869 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2870 return TargetInfo::X86_64ABIBuiltinVaList;
2873 int getEHDataRegisterNumber(unsigned RegNo) const {
2874 if (RegNo == 0) return 0;
2875 if (RegNo == 1) return 1;
2879 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2880 return TargetInfo::checkCallingConvention(CC);
2883 virtual CallingConv getDefaultCallingConv() const {
2888 } // end anonymous namespace
2891 // x86-64 Windows target
2892 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2894 WindowsX86_64TargetInfo(const std::string& triple)
2895 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2896 TLSSupported = false;
2897 WCharType = UnsignedShort;
2898 LongWidth = LongAlign = 32;
2899 DoubleAlign = LongLongAlign = 64;
2900 IntMaxType = SignedLongLong;
2901 UIntMaxType = UnsignedLongLong;
2902 Int64Type = SignedLongLong;
2903 SizeType = UnsignedLongLong;
2904 PtrDiffType = SignedLongLong;
2905 IntPtrType = SignedLongLong;
2906 this->UserLabelPrefix = "";
2908 virtual void getTargetDefines(const LangOptions &Opts,
2909 MacroBuilder &Builder) const {
2910 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2911 Builder.defineMacro("_WIN64");
2913 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2914 return TargetInfo::CharPtrBuiltinVaList;
2917 } // end anonymous namespace
2920 // x86-64 Windows Visual Studio target
2921 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2923 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2924 : WindowsX86_64TargetInfo(triple) {
2925 LongDoubleWidth = LongDoubleAlign = 64;
2926 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2928 virtual void getTargetDefines(const LangOptions &Opts,
2929 MacroBuilder &Builder) const {
2930 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2931 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2932 Builder.defineMacro("_M_X64");
2933 Builder.defineMacro("_M_AMD64");
2936 } // end anonymous namespace
2939 // x86-64 MinGW target
2940 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2942 MinGWX86_64TargetInfo(const std::string& triple)
2943 : WindowsX86_64TargetInfo(triple) {
2945 virtual void getTargetDefines(const LangOptions &Opts,
2946 MacroBuilder &Builder) const {
2947 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2948 DefineStd(Builder, "WIN64", Opts);
2949 Builder.defineMacro("__MSVCRT__");
2950 Builder.defineMacro("__MINGW32__");
2951 Builder.defineMacro("__MINGW64__");
2953 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2954 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2955 if (Opts.MicrosoftExt)
2956 // Provide "as-is" __declspec.
2957 Builder.defineMacro("__declspec", "__declspec");
2959 // Provide alias of __attribute__ like mingw32-gcc.
2960 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2963 } // end anonymous namespace
2966 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2968 DarwinX86_64TargetInfo(const std::string& triple)
2969 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2970 Int64Type = SignedLongLong;
2971 MaxVectorAlign = 256;
2974 } // end anonymous namespace
2977 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2979 OpenBSDX86_64TargetInfo(const std::string& triple)
2980 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2981 IntMaxType = SignedLongLong;
2982 UIntMaxType = UnsignedLongLong;
2983 Int64Type = SignedLongLong;
2986 } // end anonymous namespace
2989 class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
2991 BitrigX86_64TargetInfo(const std::string& triple)
2992 : BitrigTargetInfo<X86_64TargetInfo>(triple) {
2993 IntMaxType = SignedLongLong;
2994 UIntMaxType = UnsignedLongLong;
2995 Int64Type = SignedLongLong;
2998 } // end anonymous namespace
3001 class ARMTargetInfo : public TargetInfo {
3002 // Possible FPU choices.
3010 static bool FPUModeIsVFP(FPUMode Mode) {
3011 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
3014 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3015 static const char * const GCCRegNames[];
3017 std::string ABI, CPU;
3021 unsigned IsAAPCS : 1;
3022 unsigned IsThumb : 1;
3024 // Initialized via features.
3025 unsigned SoftFloat : 1;
3026 unsigned SoftFloatABI : 1;
3028 static const Builtin::Info BuiltinInfo[];
3031 ARMTargetInfo(const std::string &TripleStr)
3032 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3035 SizeType = UnsignedInt;
3036 PtrDiffType = SignedInt;
3037 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3038 WCharType = UnsignedInt;
3040 // {} in inline assembly are neon specifiers, not assembly variant
3042 NoAsmVariants = true;
3044 // FIXME: Should we just treat this as a feature?
3045 IsThumb = getTriple().getArchName().startswith("thumb");
3047 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3048 // so set preferred for small types to 32.
3049 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3050 "i64:64:64-f32:32:32-f64:64:64-"
3051 "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3053 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3054 "i64:64:64-f32:32:32-f64:64:64-"
3055 "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3058 // ARM targets default to using the ARM C++ ABI.
3059 CXXABI = CXXABI_ARM;
3061 // ARM has atomics up to 8 bytes
3062 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3063 MaxAtomicPromoteWidth = 64;
3065 // Do force alignment of members that follow zero length bitfields. If
3066 // the alignment of the zero-length bitfield is greater than the member
3067 // that follows it, `bar', `bar' will be aligned as the type of the
3068 // zero length bitfield.
3069 UseZeroLengthBitfieldAlignment = true;
3071 virtual const char *getABI() const { return ABI.c_str(); }
3072 virtual bool setABI(const std::string &Name) {
3075 // The defaults (above) are for AAPCS, check if we need to change them.
3077 // FIXME: We need support for -meabi... we could just mangle it into the
3079 if (Name == "apcs-gnu") {
3080 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3081 SizeType = UnsignedLong;
3083 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3084 WCharType = SignedInt;
3086 // Do not respect the alignment of bit-field types when laying out
3087 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3088 UseBitFieldTypeAlignment = false;
3090 /// gcc forces the alignment to 4 bytes, regardless of the type of the
3091 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in
3093 ZeroLengthBitfieldBoundary = 32;
3098 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3099 // so set preferred for small types to 32.
3100 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3101 "i64:32:64-f32:32:32-f64:32:64-"
3102 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3104 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3105 "i64:32:64-f32:32:32-f64:32:64-"
3106 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3109 // FIXME: Override "preferred align" for double and long long.
3110 } else if (Name == "aapcs" || Name == "aapcs-vfp") {
3112 // FIXME: Enumerated types are variable width in straight AAPCS.
3113 } else if (Name == "aapcs-linux") {
3121 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3122 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3123 Features["vfp2"] = true;
3124 else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3125 CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3126 Features["neon"] = true;
3127 else if (CPU == "swift") {
3128 Features["vfp4"] = true;
3129 Features["neon"] = true;
3133 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3135 bool Enabled) const {
3136 if (Name == "soft-float" || Name == "soft-float-abi" ||
3137 Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3138 Name == "d16" || Name == "neonfp") {
3139 Features[Name] = Enabled;
3146 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3148 SoftFloat = SoftFloatABI = false;
3149 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3150 if (Features[i] == "+soft-float")
3152 else if (Features[i] == "+soft-float-abi")
3153 SoftFloatABI = true;
3154 else if (Features[i] == "+vfp2")
3156 else if (Features[i] == "+vfp3")
3158 else if (Features[i] == "+vfp4")
3160 else if (Features[i] == "+neon")
3164 // Remove front-end specific options which the backend handles differently.
3165 std::vector<std::string>::iterator it;
3166 it = std::find(Features.begin(), Features.end(), "+soft-float");
3167 if (it != Features.end())
3169 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3170 if (it != Features.end())
3174 virtual bool hasFeature(StringRef Feature) const {
3175 return llvm::StringSwitch<bool>(Feature)
3177 .Case("softfloat", SoftFloat)
3178 .Case("thumb", IsThumb)
3179 .Case("neon", FPU == NeonFPU && !SoftFloat &&
3180 StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3183 // FIXME: Should we actually have some table instead of these switches?
3184 static const char *getCPUDefineSuffix(StringRef Name) {
3185 return llvm::StringSwitch<const char*>(Name)
3186 .Cases("arm8", "arm810", "4")
3187 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3188 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3189 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3190 .Case("ep9312", "4T")
3191 .Cases("arm10tdmi", "arm1020t", "5T")
3192 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3193 .Case("arm926ej-s", "5TEJ")
3194 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3195 .Cases("xscale", "iwmmxt", "5TE")
3196 .Case("arm1136j-s", "6J")
3197 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3198 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3199 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3200 .Cases("cortex-a8", "cortex-a9", "cortex-a15", "7A")
3201 .Case("cortex-a9-mp", "7F")
3202 .Case("swift", "7S")
3203 .Cases("cortex-m3", "cortex-m4", "7M")
3204 .Case("cortex-m0", "6M")
3207 static const char *getCPUProfile(StringRef Name) {
3208 return llvm::StringSwitch<const char*>(Name)
3209 .Cases("cortex-a8", "cortex-a9", "A")
3210 .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3213 virtual bool setCPU(const std::string &Name) {
3214 if (!getCPUDefineSuffix(Name))
3220 virtual void getTargetDefines(const LangOptions &Opts,
3221 MacroBuilder &Builder) const {
3222 // Target identification.
3223 Builder.defineMacro("__arm");
3224 Builder.defineMacro("__arm__");
3226 // Target properties.
3227 Builder.defineMacro("__ARMEL__");
3228 Builder.defineMacro("__LITTLE_ENDIAN__");
3229 Builder.defineMacro("__REGISTER_PREFIX__", "");
3231 StringRef CPUArch = getCPUDefineSuffix(CPU);
3232 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3233 Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3234 StringRef CPUProfile = getCPUProfile(CPU);
3235 if (!CPUProfile.empty())
3236 Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3238 // Subtarget options.
3240 // FIXME: It's more complicated than this and we don't really support
3242 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3243 Builder.defineMacro("__THUMB_INTERWORK__");
3245 if (ABI == "aapcs" || ABI == "aapcs-linux" || ABI == "aapcs-vfp") {
3246 // M-class CPUs on Darwin follow AAPCS, but not EABI.
3247 if (!(getTriple().isOSDarwin() && CPUProfile == "M"))
3248 Builder.defineMacro("__ARM_EABI__");
3249 Builder.defineMacro("__ARM_PCS", "1");
3251 if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp")
3252 Builder.defineMacro("__ARM_PCS_VFP", "1");
3256 Builder.defineMacro("__SOFTFP__");
3258 if (CPU == "xscale")
3259 Builder.defineMacro("__XSCALE__");
3261 bool IsARMv7 = CPUArch.startswith("7");
3263 Builder.defineMacro("__THUMBEL__");
3264 Builder.defineMacro("__thumb__");
3265 if (CPUArch == "6T2" || IsARMv7)
3266 Builder.defineMacro("__thumb2__");
3269 // Note, this is always on in gcc, even though it doesn't make sense.
3270 Builder.defineMacro("__APCS_32__");
3272 if (FPUModeIsVFP((FPUMode) FPU)) {
3273 Builder.defineMacro("__VFP_FP__");
3275 Builder.defineMacro("__ARM_VFPV2__");
3277 Builder.defineMacro("__ARM_VFPV3__");
3279 Builder.defineMacro("__ARM_VFPV4__");
3282 // This only gets set when Neon instructions are actually available, unlike
3283 // the VFP define, hence the soft float and arch check. This is subtly
3284 // different from gcc, we follow the intent which was that it should be set
3285 // when Neon instructions are actually available.
3286 if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3287 Builder.defineMacro("__ARM_NEON__");
3289 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3290 unsigned &NumRecords) const {
3291 Records = BuiltinInfo;
3292 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3294 virtual bool isCLZForZeroUndef() const { return false; }
3295 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3296 return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3298 virtual void getGCCRegNames(const char * const *&Names,
3299 unsigned &NumNames) const;
3300 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3301 unsigned &NumAliases) const;
3302 virtual bool validateAsmConstraint(const char *&Name,
3303 TargetInfo::ConstraintInfo &Info) const {
3308 case 'w': // VFP Floating point register single precision
3309 case 'P': // VFP Floating point register double precision
3310 Info.setAllowsRegister();
3312 case 'Q': // A memory address that is a single base register.
3313 Info.setAllowsMemory();
3315 case 'U': // a memory reference...
3317 case 'q': // ...ARMV4 ldrsb
3318 case 'v': // ...VFP load/store (reg+constant offset)
3319 case 'y': // ...iWMMXt load/store
3320 case 't': // address valid for load/store opaque types wider
3322 case 'n': // valid address for Neon doubleword vector load/store
3323 case 'm': // valid address for Neon element and structure load/store
3324 case 's': // valid address for non-offset loads/stores of quad-word
3325 // values in four ARM registers
3326 Info.setAllowsMemory();
3333 virtual std::string convertConstraint(const char *&Constraint) const {
3335 switch (*Constraint) {
3336 case 'U': // Two-character constraint; add "^" hint for later parsing.
3337 R = std::string("^") + std::string(Constraint, 2);
3340 case 'p': // 'p' should be translated to 'r' by default.
3341 R = std::string("r");
3344 return std::string(1, *Constraint);
3348 virtual bool validateConstraintModifier(StringRef Constraint,
3349 const char Modifier,
3350 unsigned Size) const {
3351 // Strip off constraint modifiers.
3352 while (Constraint[0] == '=' ||
3353 Constraint[0] == '+' ||
3354 Constraint[0] == '&')
3355 Constraint = Constraint.substr(1);
3357 switch (Constraint[0]) {
3364 // A register of size 32 cannot fit a vector type.
3372 virtual const char *getClobbers() const {
3373 // FIXME: Is this really right?
3377 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3378 return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3382 const char * const ARMTargetInfo::GCCRegNames[] = {
3383 // Integer registers
3384 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3385 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3388 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3389 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3390 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3391 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3394 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3395 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3396 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3397 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3400 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3401 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3404 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3405 unsigned &NumNames) const {
3406 Names = GCCRegNames;
3407 NumNames = llvm::array_lengthof(GCCRegNames);
3410 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3420 { { "v6", "rfp" }, "r9" },
3421 { { "sl" }, "r10" },
3422 { { "fp" }, "r11" },
3423 { { "ip" }, "r12" },
3424 { { "r13" }, "sp" },
3425 { { "r14" }, "lr" },
3426 { { "r15" }, "pc" },
3427 // The S, D and Q registers overlap, but aren't really aliases; we
3428 // don't want to substitute one of these for a different-sized one.
3431 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3432 unsigned &NumAliases) const {
3433 Aliases = GCCRegAliases;
3434 NumAliases = llvm::array_lengthof(GCCRegAliases);
3437 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3438 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3439 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3441 #include "clang/Basic/BuiltinsARM.def"
3443 } // end anonymous namespace.
3446 class DarwinARMTargetInfo :
3447 public DarwinTargetInfo<ARMTargetInfo> {
3449 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3450 MacroBuilder &Builder) const {
3451 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3455 DarwinARMTargetInfo(const std::string& triple)
3456 : DarwinTargetInfo<ARMTargetInfo>(triple) {
3457 HasAlignMac68kSupport = true;
3458 // iOS always has 64-bit atomic instructions.
3459 // FIXME: This should be based off of the target features in ARMTargetInfo.
3460 MaxAtomicInlineWidth = 64;
3463 } // end anonymous namespace.
3467 // Hexagon abstract base class
3468 class HexagonTargetInfo : public TargetInfo {
3469 static const Builtin::Info BuiltinInfo[];
3470 static const char * const GCCRegNames[];
3471 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3474 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) {
3476 DescriptionString = ("e-p:32:32:32-"
3477 "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3478 "f64:64:64-f32:32:32-a0:0-n32");
3480 // {} in inline assembly are packet specifiers, not assembly variant
3482 NoAsmVariants = true;
3485 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3486 unsigned &NumRecords) const {
3487 Records = BuiltinInfo;
3488 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3491 virtual bool validateAsmConstraint(const char *&Name,
3492 TargetInfo::ConstraintInfo &Info) const {
3496 virtual void getTargetDefines(const LangOptions &Opts,
3497 MacroBuilder &Builder) const;
3499 virtual bool hasFeature(StringRef Feature) const {
3500 return Feature == "hexagon";
3503 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3504 return TargetInfo::CharPtrBuiltinVaList;
3506 virtual void getGCCRegNames(const char * const *&Names,
3507 unsigned &NumNames) const;
3508 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3509 unsigned &NumAliases) const;
3510 virtual const char *getClobbers() const {
3514 static const char *getHexagonCPUSuffix(StringRef Name) {
3515 return llvm::StringSwitch<const char*>(Name)
3516 .Case("hexagonv2", "2")
3517 .Case("hexagonv3", "3")
3518 .Case("hexagonv4", "4")
3519 .Case("hexagonv5", "5")
3523 virtual bool setCPU(const std::string &Name) {
3524 if (!getHexagonCPUSuffix(Name))
3532 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3533 MacroBuilder &Builder) const {
3534 Builder.defineMacro("qdsp6");
3535 Builder.defineMacro("__qdsp6", "1");
3536 Builder.defineMacro("__qdsp6__", "1");
3538 Builder.defineMacro("hexagon");
3539 Builder.defineMacro("__hexagon", "1");
3540 Builder.defineMacro("__hexagon__", "1");
3542 if(CPU == "hexagonv1") {
3543 Builder.defineMacro("__HEXAGON_V1__");
3544 Builder.defineMacro("__HEXAGON_ARCH__", "1");
3545 if(Opts.HexagonQdsp6Compat) {
3546 Builder.defineMacro("__QDSP6_V1__");
3547 Builder.defineMacro("__QDSP6_ARCH__", "1");
3550 else if(CPU == "hexagonv2") {
3551 Builder.defineMacro("__HEXAGON_V2__");
3552 Builder.defineMacro("__HEXAGON_ARCH__", "2");
3553 if(Opts.HexagonQdsp6Compat) {
3554 Builder.defineMacro("__QDSP6_V2__");
3555 Builder.defineMacro("__QDSP6_ARCH__", "2");
3558 else if(CPU == "hexagonv3") {
3559 Builder.defineMacro("__HEXAGON_V3__");
3560 Builder.defineMacro("__HEXAGON_ARCH__", "3");
3561 if(Opts.HexagonQdsp6Compat) {
3562 Builder.defineMacro("__QDSP6_V3__");
3563 Builder.defineMacro("__QDSP6_ARCH__", "3");
3566 else if(CPU == "hexagonv4") {
3567 Builder.defineMacro("__HEXAGON_V4__");
3568 Builder.defineMacro("__HEXAGON_ARCH__", "4");
3569 if(Opts.HexagonQdsp6Compat) {
3570 Builder.defineMacro("__QDSP6_V4__");
3571 Builder.defineMacro("__QDSP6_ARCH__", "4");
3574 else if(CPU == "hexagonv5") {
3575 Builder.defineMacro("__HEXAGON_V5__");
3576 Builder.defineMacro("__HEXAGON_ARCH__", "5");
3577 if(Opts.HexagonQdsp6Compat) {
3578 Builder.defineMacro("__QDSP6_V5__");
3579 Builder.defineMacro("__QDSP6_ARCH__", "5");
3584 const char * const HexagonTargetInfo::GCCRegNames[] = {
3585 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3586 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3587 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3588 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3589 "p0", "p1", "p2", "p3",
3590 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3593 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3594 unsigned &NumNames) const {
3595 Names = GCCRegNames;
3596 NumNames = llvm::array_lengthof(GCCRegNames);
3600 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3601 { { "sp" }, "r29" },
3602 { { "fp" }, "r30" },
3603 { { "lr" }, "r31" },
3606 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3607 unsigned &NumAliases) const {
3608 Aliases = GCCRegAliases;
3609 NumAliases = llvm::array_lengthof(GCCRegAliases);
3613 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3614 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3615 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3617 #include "clang/Basic/BuiltinsHexagon.def"
3623 class SparcV8TargetInfo : public TargetInfo {
3624 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3625 static const char * const GCCRegNames[];
3628 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3629 // FIXME: Support Sparc quad-precision long double?
3630 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3631 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3633 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3635 bool Enabled) const {
3636 if (Name == "soft-float")
3637 Features[Name] = Enabled;
3643 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3645 for (unsigned i = 0, e = Features.size(); i != e; ++i)
3646 if (Features[i] == "+soft-float")
3649 virtual void getTargetDefines(const LangOptions &Opts,
3650 MacroBuilder &Builder) const {
3651 DefineStd(Builder, "sparc", Opts);
3652 Builder.defineMacro("__sparcv8");
3653 Builder.defineMacro("__REGISTER_PREFIX__", "");
3656 Builder.defineMacro("SOFT_FLOAT", "1");
3659 virtual bool hasFeature(StringRef Feature) const {
3660 return llvm::StringSwitch<bool>(Feature)
3661 .Case("softfloat", SoftFloat)
3662 .Case("sparc", true)
3666 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3667 unsigned &NumRecords) const {
3668 // FIXME: Implement!
3670 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3671 return TargetInfo::VoidPtrBuiltinVaList;
3673 virtual void getGCCRegNames(const char * const *&Names,
3674 unsigned &NumNames) const;
3675 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3676 unsigned &NumAliases) const;
3677 virtual bool validateAsmConstraint(const char *&Name,
3678 TargetInfo::ConstraintInfo &info) const {
3679 // FIXME: Implement!
3682 virtual const char *getClobbers() const {
3683 // FIXME: Implement!
3688 const char * const SparcV8TargetInfo::GCCRegNames[] = {
3689 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3690 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3691 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3692 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3695 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3696 unsigned &NumNames) const {
3697 Names = GCCRegNames;
3698 NumNames = llvm::array_lengthof(GCCRegNames);
3701 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3712 { { "o2" }, "r10" },
3713 { { "o3" }, "r11" },
3714 { { "o4" }, "r12" },
3715 { { "o5" }, "r13" },
3716 { { "o6", "sp" }, "r14" },
3717 { { "o7" }, "r15" },
3718 { { "l0" }, "r16" },
3719 { { "l1" }, "r17" },
3720 { { "l2" }, "r18" },
3721 { { "l3" }, "r19" },
3722 { { "l4" }, "r20" },
3723 { { "l5" }, "r21" },
3724 { { "l6" }, "r22" },
3725 { { "l7" }, "r23" },
3726 { { "i0" }, "r24" },
3727 { { "i1" }, "r25" },
3728 { { "i2" }, "r26" },
3729 { { "i3" }, "r27" },
3730 { { "i4" }, "r28" },
3731 { { "i5" }, "r29" },
3732 { { "i6", "fp" }, "r30" },
3733 { { "i7" }, "r31" },
3736 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3737 unsigned &NumAliases) const {
3738 Aliases = GCCRegAliases;
3739 NumAliases = llvm::array_lengthof(GCCRegAliases);
3741 } // end anonymous namespace.
3744 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3746 AuroraUXSparcV8TargetInfo(const std::string& triple) :
3747 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3748 SizeType = UnsignedInt;
3749 PtrDiffType = SignedInt;
3752 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3754 SolarisSparcV8TargetInfo(const std::string& triple) :
3755 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3756 SizeType = UnsignedInt;
3757 PtrDiffType = SignedInt;
3760 } // end anonymous namespace.
3763 class MSP430TargetInfo : public TargetInfo {
3764 static const char * const GCCRegNames[];
3766 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3768 TLSSupported = false;
3769 IntWidth = 16; IntAlign = 16;
3770 LongWidth = 32; LongLongWidth = 64;
3771 LongAlign = LongLongAlign = 16;
3772 PointerWidth = 16; PointerAlign = 16;
3774 SizeType = UnsignedInt;
3775 IntMaxType = SignedLong;
3776 UIntMaxType = UnsignedLong;
3777 IntPtrType = SignedShort;
3778 PtrDiffType = SignedInt;
3779 SigAtomicType = SignedLong;
3780 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3782 virtual void getTargetDefines(const LangOptions &Opts,
3783 MacroBuilder &Builder) const {
3784 Builder.defineMacro("MSP430");
3785 Builder.defineMacro("__MSP430__");
3786 // FIXME: defines for different 'flavours' of MCU
3788 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3789 unsigned &NumRecords) const {
3790 // FIXME: Implement.
3794 virtual bool hasFeature(StringRef Feature) const {
3795 return Feature == "msp430";
3797 virtual void getGCCRegNames(const char * const *&Names,
3798 unsigned &NumNames) const;
3799 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3800 unsigned &NumAliases) const {
3805 virtual bool validateAsmConstraint(const char *&Name,
3806 TargetInfo::ConstraintInfo &info) const {
3807 // No target constraints for now.
3810 virtual const char *getClobbers() const {
3811 // FIXME: Is this really right?
3814 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3816 return TargetInfo::CharPtrBuiltinVaList;
3820 const char * const MSP430TargetInfo::GCCRegNames[] = {
3821 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3822 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3825 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3826 unsigned &NumNames) const {
3827 Names = GCCRegNames;
3828 NumNames = llvm::array_lengthof(GCCRegNames);
3834 // LLVM and Clang cannot be used directly to output native binaries for
3835 // target, but is used to compile C code to llvm bitcode with correct
3836 // type and alignment information.
3838 // TCE uses the llvm bitcode as input and uses it for generating customized
3839 // target processor and program binary. TCE co-design environment is
3840 // publicly available in http://tce.cs.tut.fi
3842 static const unsigned TCEOpenCLAddrSpaceMap[] = {
3845 5, // opencl_constant
3851 class TCETargetInfo : public TargetInfo{
3853 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3854 TLSSupported = false;
3856 LongWidth = LongLongWidth = 32;
3859 LongAlign = LongLongAlign = 32;
3862 SizeType = UnsignedInt;
3863 IntMaxType = SignedLong;
3864 UIntMaxType = UnsignedLong;
3865 IntPtrType = SignedInt;
3866 PtrDiffType = SignedInt;
3871 LongDoubleWidth = 32;
3872 LongDoubleAlign = 32;
3873 FloatFormat = &llvm::APFloat::IEEEsingle;
3874 DoubleFormat = &llvm::APFloat::IEEEsingle;
3875 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3876 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3877 "i16:16:32-i32:32:32-i64:32:32-"
3878 "f32:32:32-f64:32:32-v64:32:32-"
3879 "v128:32:32-a0:0:32-n32";
3880 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3883 virtual void getTargetDefines(const LangOptions &Opts,
3884 MacroBuilder &Builder) const {
3885 DefineStd(Builder, "tce", Opts);
3886 Builder.defineMacro("__TCE__");
3887 Builder.defineMacro("__TCE_V1__");
3889 virtual bool hasFeature(StringRef Feature) const {
3890 return Feature == "tce";
3893 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3894 unsigned &NumRecords) const {}
3895 virtual const char *getClobbers() const {
3898 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3899 return TargetInfo::VoidPtrBuiltinVaList;
3901 virtual void getGCCRegNames(const char * const *&Names,
3902 unsigned &NumNames) const {}
3903 virtual bool validateAsmConstraint(const char *&Name,
3904 TargetInfo::ConstraintInfo &info) const {
3907 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3908 unsigned &NumAliases) const {}
3913 class MipsTargetInfoBase : public TargetInfo {
3914 static const Builtin::Info BuiltinInfo[];
3918 HardFloat, SingleFloat, SoftFloat
3928 MipsTargetInfoBase(const std::string& triple,
3929 const std::string& ABIStr,
3930 const std::string& CPUStr)
3931 : TargetInfo(triple),
3934 FloatABI(HardFloat),
3939 virtual const char *getABI() const { return ABI.c_str(); }
3940 virtual bool setABI(const std::string &Name) = 0;
3941 virtual bool setCPU(const std::string &Name) {
3945 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3946 Features[ABI] = true;
3947 Features[CPU] = true;
3950 virtual void getTargetDefines(const LangOptions &Opts,
3951 MacroBuilder &Builder) const {
3952 DefineStd(Builder, "mips", Opts);
3953 Builder.defineMacro("_mips");
3954 Builder.defineMacro("__REGISTER_PREFIX__", "");
3958 Builder.defineMacro("__mips_hard_float", Twine(1));
3961 Builder.defineMacro("__mips_hard_float", Twine(1));
3962 Builder.defineMacro("__mips_single_float", Twine(1));
3965 Builder.defineMacro("__mips_soft_float", Twine(1));
3970 Builder.defineMacro("__mips16", Twine(1));
3976 Builder.defineMacro("__mips_dsp_rev", Twine(1));
3977 Builder.defineMacro("__mips_dsp", Twine(1));
3980 Builder.defineMacro("__mips_dsp_rev", Twine(2));
3981 Builder.defineMacro("__mips_dspr2", Twine(1));
3982 Builder.defineMacro("__mips_dsp", Twine(1));
3986 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3987 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3988 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3990 Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
3991 Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
3994 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3995 unsigned &NumRecords) const {
3996 Records = BuiltinInfo;
3997 NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
3999 virtual bool hasFeature(StringRef Feature) const {
4000 return Feature == "mips";
4002 virtual BuiltinVaListKind getBuiltinVaListKind() const {
4003 return TargetInfo::VoidPtrBuiltinVaList;
4005 virtual void getGCCRegNames(const char * const *&Names,
4006 unsigned &NumNames) const {
4007 static const char * const GCCRegNames[] = {
4008 // CPU register names
4009 // Must match second column of GCCRegAliases
4010 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
4011 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
4012 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
4013 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31",
4014 // Floating point register names
4015 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
4016 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
4017 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
4018 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
4019 // Hi/lo and condition register names
4020 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
4021 "$fcc5","$fcc6","$fcc7"
4023 Names = GCCRegNames;
4024 NumNames = llvm::array_lengthof(GCCRegNames);
4026 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4027 unsigned &NumAliases) const = 0;
4028 virtual bool validateAsmConstraint(const char *&Name,
4029 TargetInfo::ConstraintInfo &Info) const {
4034 case 'r': // CPU registers.
4035 case 'd': // Equivalent to "r" unless generating MIPS16 code.
4036 case 'y': // Equivalent to "r", backwards compatibility only.
4037 case 'f': // floating-point registers.
4038 case 'c': // $25 for indirect jumps
4039 case 'l': // lo register
4040 case 'x': // hilo register pair
4041 Info.setAllowsRegister();
4046 virtual const char *getClobbers() const {
4047 // FIXME: Implement!
4051 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
4053 bool Enabled) const {
4054 if (Name == "soft-float" || Name == "single-float" ||
4055 Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4056 Name == "mips32" || Name == "mips32r2" ||
4057 Name == "mips64" || Name == "mips64r2" ||
4058 Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4059 Features[Name] = Enabled;
4065 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4067 FloatABI = HardFloat;
4070 for (std::vector<std::string>::iterator it = Features.begin(),
4071 ie = Features.end(); it != ie; ++it) {
4072 if (*it == "+single-float")
4073 FloatABI = SingleFloat;
4074 else if (*it == "+soft-float")
4075 FloatABI = SoftFloat;
4076 else if (*it == "+mips16")
4078 else if (*it == "+dsp")
4079 DspRev = std::max(DspRev, DSP1);
4080 else if (*it == "+dspr2")
4081 DspRev = std::max(DspRev, DSP2);
4084 // Remove front-end specific option.
4085 std::vector<std::string>::iterator it =
4086 std::find(Features.begin(), Features.end(), "+soft-float");
4087 if (it != Features.end())
4092 const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4093 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4094 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4096 #include "clang/Basic/BuiltinsMips.def"
4099 class Mips32TargetInfoBase : public MipsTargetInfoBase {
4101 Mips32TargetInfoBase(const std::string& triple) :
4102 MipsTargetInfoBase(triple, "o32", "mips32") {
4103 SizeType = UnsignedInt;
4104 PtrDiffType = SignedInt;
4106 virtual bool setABI(const std::string &Name) {
4107 if ((Name == "o32") || (Name == "eabi")) {
4113 virtual void getTargetDefines(const LangOptions &Opts,
4114 MacroBuilder &Builder) const {
4115 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4118 Builder.defineMacro("__mips_o32");
4119 Builder.defineMacro("_ABIO32", "1");
4120 Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4122 else if (ABI == "eabi")
4123 Builder.defineMacro("__mips_eabi");
4125 llvm_unreachable("Invalid ABI for Mips32.");
4127 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4128 unsigned &NumAliases) const {
4129 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4139 { { "t2" }, "$10" },
4140 { { "t3" }, "$11" },
4141 { { "t4" }, "$12" },
4142 { { "t5" }, "$13" },
4143 { { "t6" }, "$14" },
4144 { { "t7" }, "$15" },
4145 { { "s0" }, "$16" },
4146 { { "s1" }, "$17" },
4147 { { "s2" }, "$18" },
4148 { { "s3" }, "$19" },
4149 { { "s4" }, "$20" },
4150 { { "s5" }, "$21" },
4151 { { "s6" }, "$22" },
4152 { { "s7" }, "$23" },
4153 { { "t8" }, "$24" },
4154 { { "t9" }, "$25" },
4155 { { "k0" }, "$26" },
4156 { { "k1" }, "$27" },
4157 { { "gp" }, "$28" },
4158 { { "sp","$sp" }, "$29" },
4159 { { "fp","$fp" }, "$30" },
4162 Aliases = GCCRegAliases;
4163 NumAliases = llvm::array_lengthof(GCCRegAliases);
4167 class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4169 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4170 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4171 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4173 virtual void getTargetDefines(const LangOptions &Opts,
4174 MacroBuilder &Builder) const {
4175 DefineStd(Builder, "MIPSEB", Opts);
4176 Builder.defineMacro("_MIPSEB");
4177 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4181 class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4183 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4185 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4186 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4188 virtual void getTargetDefines(const LangOptions &Opts,
4189 MacroBuilder &Builder) const {
4190 DefineStd(Builder, "MIPSEL", Opts);
4191 Builder.defineMacro("_MIPSEL");
4192 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4196 class Mips64TargetInfoBase : public MipsTargetInfoBase {
4197 virtual void SetDescriptionString(const std::string &Name) = 0;
4199 Mips64TargetInfoBase(const std::string& triple) :
4200 MipsTargetInfoBase(triple, "n64", "mips64") {
4201 LongWidth = LongAlign = 64;
4202 PointerWidth = PointerAlign = 64;
4203 LongDoubleWidth = LongDoubleAlign = 128;
4204 LongDoubleFormat = &llvm::APFloat::IEEEquad;
4205 SuitableAlign = 128;
4207 virtual bool setABI(const std::string &Name) {
4208 SetDescriptionString(Name);
4210 if (Name != "n32" && Name != "n64")
4215 if (Name == "n32") {
4216 LongWidth = LongAlign = 32;
4217 PointerWidth = PointerAlign = 32;
4222 virtual void getTargetDefines(const LangOptions &Opts,
4223 MacroBuilder &Builder) const {
4224 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4226 Builder.defineMacro("__mips64");
4227 Builder.defineMacro("__mips64__");
4230 Builder.defineMacro("__mips_n32");
4231 Builder.defineMacro("_ABIN32", "2");
4232 Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4234 else if (ABI == "n64") {
4235 Builder.defineMacro("__mips_n64");
4236 Builder.defineMacro("_ABI64", "3");
4237 Builder.defineMacro("_MIPS_SIM", "_ABI64");
4240 llvm_unreachable("Invalid ABI for Mips64.");
4242 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4243 unsigned &NumAliases) const {
4244 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4254 { { "a6" }, "$10" },
4255 { { "a7" }, "$11" },
4256 { { "t0" }, "$12" },
4257 { { "t1" }, "$13" },
4258 { { "t2" }, "$14" },
4259 { { "t3" }, "$15" },
4260 { { "s0" }, "$16" },
4261 { { "s1" }, "$17" },
4262 { { "s2" }, "$18" },
4263 { { "s3" }, "$19" },
4264 { { "s4" }, "$20" },
4265 { { "s5" }, "$21" },
4266 { { "s6" }, "$22" },
4267 { { "s7" }, "$23" },
4268 { { "t8" }, "$24" },
4269 { { "t9" }, "$25" },
4270 { { "k0" }, "$26" },
4271 { { "k1" }, "$27" },
4272 { { "gp" }, "$28" },
4273 { { "sp","$sp" }, "$29" },
4274 { { "fp","$fp" }, "$30" },
4277 Aliases = GCCRegAliases;
4278 NumAliases = llvm::array_lengthof(GCCRegAliases);
4282 class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4283 virtual void SetDescriptionString(const std::string &Name) {
4284 // Change DescriptionString only if ABI is n32.
4286 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4287 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4291 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4292 // Default ABI is n64.
4293 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4294 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4297 virtual void getTargetDefines(const LangOptions &Opts,
4298 MacroBuilder &Builder) const {
4299 DefineStd(Builder, "MIPSEB", Opts);
4300 Builder.defineMacro("_MIPSEB");
4301 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4305 class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4306 virtual void SetDescriptionString(const std::string &Name) {
4307 // Change DescriptionString only if ABI is n32.
4309 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4310 "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4314 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4315 // Default ABI is n64.
4317 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4318 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4321 virtual void getTargetDefines(const LangOptions &Opts,
4322 MacroBuilder &Builder) const {
4323 DefineStd(Builder, "MIPSEL", Opts);
4324 Builder.defineMacro("_MIPSEL");
4325 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4328 } // end anonymous namespace.
4331 class PNaClTargetInfo : public TargetInfo {
4333 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4335 this->UserLabelPrefix = "";
4336 this->LongAlign = 32;
4337 this->LongWidth = 32;
4338 this->PointerAlign = 32;
4339 this->PointerWidth = 32;
4340 this->IntMaxType = TargetInfo::SignedLongLong;
4341 this->UIntMaxType = TargetInfo::UnsignedLongLong;
4342 this->Int64Type = TargetInfo::SignedLongLong;
4343 this->DoubleAlign = 64;
4344 this->LongDoubleWidth = 64;
4345 this->LongDoubleAlign = 64;
4346 this->SizeType = TargetInfo::UnsignedInt;
4347 this->PtrDiffType = TargetInfo::SignedInt;
4348 this->IntPtrType = TargetInfo::SignedInt;
4349 this->RegParmMax = 2;
4350 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4351 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4354 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4356 virtual void getArchDefines(const LangOptions &Opts,
4357 MacroBuilder &Builder) const {
4358 Builder.defineMacro("__le32__");
4359 Builder.defineMacro("__pnacl__");
4361 virtual void getTargetDefines(const LangOptions &Opts,
4362 MacroBuilder &Builder) const {
4363 Builder.defineMacro("__LITTLE_ENDIAN__");
4364 getArchDefines(Opts, Builder);
4366 virtual bool hasFeature(StringRef Feature) const {
4367 return Feature == "pnacl";
4369 virtual void getTargetBuiltins(const Builtin::Info *&Records,
4370 unsigned &NumRecords) const {
4372 virtual BuiltinVaListKind getBuiltinVaListKind() const {
4373 return TargetInfo::PNaClABIBuiltinVaList;
4375 virtual void getGCCRegNames(const char * const *&Names,
4376 unsigned &NumNames) const;
4377 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4378 unsigned &NumAliases) const;
4379 virtual bool validateAsmConstraint(const char *&Name,
4380 TargetInfo::ConstraintInfo &Info) const {
4384 virtual const char *getClobbers() const {
4389 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4390 unsigned &NumNames) const {
4395 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4396 unsigned &NumAliases) const {
4400 } // end anonymous namespace.
4403 //===----------------------------------------------------------------------===//
4405 //===----------------------------------------------------------------------===//
4407 static TargetInfo *AllocateTarget(const std::string &T) {
4408 llvm::Triple Triple(T);
4409 llvm::Triple::OSType os = Triple.getOS();
4411 switch (Triple.getArch()) {
4415 case llvm::Triple::hexagon:
4416 return new HexagonTargetInfo(T);
4418 case llvm::Triple::arm:
4419 case llvm::Triple::thumb:
4420 if (Triple.isOSDarwin())
4421 return new DarwinARMTargetInfo(T);
4424 case llvm::Triple::Linux:
4425 return new LinuxTargetInfo<ARMTargetInfo>(T);
4426 case llvm::Triple::FreeBSD:
4427 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4428 case llvm::Triple::NetBSD:
4429 return new NetBSDTargetInfo<ARMTargetInfo>(T);
4430 case llvm::Triple::OpenBSD:
4431 return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4432 case llvm::Triple::Bitrig:
4433 return new BitrigTargetInfo<ARMTargetInfo>(T);
4434 case llvm::Triple::RTEMS:
4435 return new RTEMSTargetInfo<ARMTargetInfo>(T);
4436 case llvm::Triple::NativeClient:
4437 return new NaClTargetInfo<ARMTargetInfo>(T);
4439 return new ARMTargetInfo(T);
4442 case llvm::Triple::msp430:
4443 return new MSP430TargetInfo(T);
4445 case llvm::Triple::mips:
4447 case llvm::Triple::Linux:
4448 return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4449 case llvm::Triple::RTEMS:
4450 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4451 case llvm::Triple::FreeBSD:
4452 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4453 case llvm::Triple::NetBSD:
4454 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4456 return new Mips32EBTargetInfo(T);
4459 case llvm::Triple::mipsel:
4461 case llvm::Triple::Linux:
4462 return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4463 case llvm::Triple::RTEMS:
4464 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4465 case llvm::Triple::FreeBSD:
4466 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4467 case llvm::Triple::NetBSD:
4468 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4470 return new Mips32ELTargetInfo(T);
4473 case llvm::Triple::mips64:
4475 case llvm::Triple::Linux:
4476 return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4477 case llvm::Triple::RTEMS:
4478 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4479 case llvm::Triple::FreeBSD:
4480 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4481 case llvm::Triple::NetBSD:
4482 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4483 case llvm::Triple::OpenBSD:
4484 return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4486 return new Mips64EBTargetInfo(T);
4489 case llvm::Triple::mips64el:
4491 case llvm::Triple::Linux:
4492 return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4493 case llvm::Triple::RTEMS:
4494 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4495 case llvm::Triple::FreeBSD:
4496 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4497 case llvm::Triple::NetBSD:
4498 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4499 case llvm::Triple::OpenBSD:
4500 return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4502 return new Mips64ELTargetInfo(T);
4505 case llvm::Triple::le32:
4507 case llvm::Triple::NativeClient:
4508 return new NaClTargetInfo<PNaClTargetInfo>(T);
4513 case llvm::Triple::ppc:
4514 if (Triple.isOSDarwin())
4515 return new DarwinPPC32TargetInfo(T);
4517 case llvm::Triple::Linux:
4518 return new LinuxTargetInfo<PPC32TargetInfo>(T);
4519 case llvm::Triple::FreeBSD:
4520 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4521 case llvm::Triple::NetBSD:
4522 return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4523 case llvm::Triple::OpenBSD:
4524 return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4525 case llvm::Triple::RTEMS:
4526 return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4528 return new PPC32TargetInfo(T);
4531 case llvm::Triple::ppc64:
4532 if (Triple.isOSDarwin())
4533 return new DarwinPPC64TargetInfo(T);
4535 case llvm::Triple::Linux:
4536 return new LinuxTargetInfo<PPC64TargetInfo>(T);
4537 case llvm::Triple::Lv2:
4538 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4539 case llvm::Triple::FreeBSD:
4540 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4541 case llvm::Triple::NetBSD:
4542 return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4544 return new PPC64TargetInfo(T);
4547 case llvm::Triple::nvptx:
4548 return new NVPTX32TargetInfo(T);
4549 case llvm::Triple::nvptx64:
4550 return new NVPTX64TargetInfo(T);
4552 case llvm::Triple::mblaze:
4553 return new MBlazeTargetInfo(T);
4555 case llvm::Triple::r600:
4556 return new R600TargetInfo(T);
4558 case llvm::Triple::sparc:
4560 case llvm::Triple::Linux:
4561 return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4562 case llvm::Triple::AuroraUX:
4563 return new AuroraUXSparcV8TargetInfo(T);
4564 case llvm::Triple::Solaris:
4565 return new SolarisSparcV8TargetInfo(T);
4566 case llvm::Triple::NetBSD:
4567 return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4568 case llvm::Triple::OpenBSD:
4569 return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4570 case llvm::Triple::RTEMS:
4571 return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4573 return new SparcV8TargetInfo(T);
4576 // FIXME: Need a real SPU target.
4577 case llvm::Triple::cellspu:
4578 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4580 case llvm::Triple::tce:
4581 return new TCETargetInfo(T);
4583 case llvm::Triple::x86:
4584 if (Triple.isOSDarwin())
4585 return new DarwinI386TargetInfo(T);
4588 case llvm::Triple::AuroraUX:
4589 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4590 case llvm::Triple::Linux:
4591 return new LinuxTargetInfo<X86_32TargetInfo>(T);
4592 case llvm::Triple::DragonFly:
4593 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4594 case llvm::Triple::NetBSD:
4595 return new NetBSDI386TargetInfo(T);
4596 case llvm::Triple::OpenBSD:
4597 return new OpenBSDI386TargetInfo(T);
4598 case llvm::Triple::Bitrig:
4599 return new BitrigI386TargetInfo(T);
4600 case llvm::Triple::FreeBSD:
4601 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4602 case llvm::Triple::Minix:
4603 return new MinixTargetInfo<X86_32TargetInfo>(T);
4604 case llvm::Triple::Solaris:
4605 return new SolarisTargetInfo<X86_32TargetInfo>(T);
4606 case llvm::Triple::Cygwin:
4607 return new CygwinX86_32TargetInfo(T);
4608 case llvm::Triple::MinGW32:
4609 return new MinGWX86_32TargetInfo(T);
4610 case llvm::Triple::Win32:
4611 return new VisualStudioWindowsX86_32TargetInfo(T);
4612 case llvm::Triple::Haiku:
4613 return new HaikuX86_32TargetInfo(T);
4614 case llvm::Triple::RTEMS:
4615 return new RTEMSX86_32TargetInfo(T);
4616 case llvm::Triple::NativeClient:
4617 return new NaClTargetInfo<X86_32TargetInfo>(T);
4619 return new X86_32TargetInfo(T);
4622 case llvm::Triple::x86_64:
4623 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4624 return new DarwinX86_64TargetInfo(T);
4627 case llvm::Triple::AuroraUX:
4628 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4629 case llvm::Triple::Linux:
4630 return new LinuxTargetInfo<X86_64TargetInfo>(T);
4631 case llvm::Triple::DragonFly:
4632 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4633 case llvm::Triple::NetBSD:
4634 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4635 case llvm::Triple::OpenBSD:
4636 return new OpenBSDX86_64TargetInfo(T);
4637 case llvm::Triple::Bitrig:
4638 return new BitrigX86_64TargetInfo(T);
4639 case llvm::Triple::FreeBSD:
4640 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4641 case llvm::Triple::Solaris:
4642 return new SolarisTargetInfo<X86_64TargetInfo>(T);
4643 case llvm::Triple::MinGW32:
4644 return new MinGWX86_64TargetInfo(T);
4645 case llvm::Triple::Win32: // This is what Triple.h supports now.
4646 return new VisualStudioWindowsX86_64TargetInfo(T);
4647 case llvm::Triple::NativeClient:
4648 return new NaClTargetInfo<X86_64TargetInfo>(T);
4650 return new X86_64TargetInfo(T);
4655 /// CreateTargetInfo - Return the target info object for the specified target
4657 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4658 TargetOptions &Opts) {
4659 llvm::Triple Triple(Opts.Triple);
4661 // Construct the target
4662 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4664 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4667 Target->setTargetOpts(Opts);
4669 // Set the target CPU if specified.
4670 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4671 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4675 // Set the target ABI if specified.
4676 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4677 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4681 // Set the target C++ ABI.
4682 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4683 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4687 // Compute the default target features, we need the target to handle this
4688 // because features may have dependencies on one another.
4689 llvm::StringMap<bool> Features;
4690 Target->getDefaultFeatures(Features);
4692 // Apply the user specified deltas.
4693 // First the enables.
4694 for (std::vector<std::string>::const_iterator
4695 it = Opts.FeaturesAsWritten.begin(),
4696 ie = Opts.FeaturesAsWritten.end();
4698 const char *Name = it->c_str();
4703 // Apply the feature via the target.
4704 if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4705 Diags.Report(diag::err_target_invalid_feature) << Name;
4710 // Then the disables.
4711 for (std::vector<std::string>::const_iterator
4712 it = Opts.FeaturesAsWritten.begin(),
4713 ie = Opts.FeaturesAsWritten.end();
4715 const char *Name = it->c_str();
4720 // Apply the feature via the target.
4721 if (Name[0] != '-' ||
4722 !Target->setFeatureEnabled(Features, Name + 1, false)) {
4723 Diags.Report(diag::err_target_invalid_feature) << Name;
4728 // Add the features to the compile options.
4730 // FIXME: If we are completely confident that we have the right set, we only
4731 // need to pass the minuses.
4732 Opts.Features.clear();
4733 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4734 ie = Features.end(); it != ie; ++it)
4735 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4736 Target->HandleTargetFeatures(Opts.Features);
4738 return Target.take();