1 //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // These classes wrap the information about a call or function
11 // definition used to handle ABI compliancy.
13 //===----------------------------------------------------------------------===//
15 #include "TargetInfo.h"
19 #include "CodeGenFunction.h"
20 #include "clang/AST/RecordLayout.h"
21 #include "clang/CodeGen/CGFunctionInfo.h"
22 #include "clang/Frontend/CodeGenOptions.h"
23 #include "llvm/ADT/StringExtras.h"
24 #include "llvm/ADT/Triple.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/Type.h"
27 #include "llvm/Support/raw_ostream.h"
28 #include <algorithm> // std::sort
30 using namespace clang;
31 using namespace CodeGen;
33 static void AssignToArrayRange(CodeGen::CGBuilderTy &Builder,
38 // Alternatively, we could emit this as a loop in the source.
39 for (unsigned I = FirstIndex; I <= LastIndex; ++I) {
41 Builder.CreateConstInBoundsGEP1_32(Builder.getInt8Ty(), Array, I);
42 Builder.CreateStore(Value, Cell);
46 static bool isAggregateTypeForABI(QualType T) {
47 return !CodeGenFunction::hasScalarEvaluationKind(T) ||
48 T->isMemberFunctionPointerType();
51 ABIInfo::~ABIInfo() {}
53 static CGCXXABI::RecordArgABI getRecordArgABI(const RecordType *RT,
55 const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
57 return CGCXXABI::RAA_Default;
58 return CXXABI.getRecordArgABI(RD);
61 static CGCXXABI::RecordArgABI getRecordArgABI(QualType T,
63 const RecordType *RT = T->getAs<RecordType>();
65 return CGCXXABI::RAA_Default;
66 return getRecordArgABI(RT, CXXABI);
69 /// Pass transparent unions as if they were the type of the first element. Sema
70 /// should ensure that all elements of the union have the same "machine type".
71 static QualType useFirstFieldIfTransparentUnion(QualType Ty) {
72 if (const RecordType *UT = Ty->getAsUnionType()) {
73 const RecordDecl *UD = UT->getDecl();
74 if (UD->hasAttr<TransparentUnionAttr>()) {
75 assert(!UD->field_empty() && "sema created an empty transparent union");
76 return UD->field_begin()->getType();
82 CGCXXABI &ABIInfo::getCXXABI() const {
83 return CGT.getCXXABI();
86 ASTContext &ABIInfo::getContext() const {
87 return CGT.getContext();
90 llvm::LLVMContext &ABIInfo::getVMContext() const {
91 return CGT.getLLVMContext();
94 const llvm::DataLayout &ABIInfo::getDataLayout() const {
95 return CGT.getDataLayout();
98 const TargetInfo &ABIInfo::getTarget() const {
99 return CGT.getTarget();
102 bool ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
106 bool ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
107 uint64_t Members) const {
111 bool ABIInfo::shouldSignExtUnsignedType(QualType Ty) const {
115 void ABIArgInfo::dump() const {
116 raw_ostream &OS = llvm::errs();
117 OS << "(ABIArgInfo Kind=";
120 OS << "Direct Type=";
121 if (llvm::Type *Ty = getCoerceToType())
133 OS << "InAlloca Offset=" << getInAllocaFieldIndex();
136 OS << "Indirect Align=" << getIndirectAlign()
137 << " ByVal=" << getIndirectByVal()
138 << " Realign=" << getIndirectRealign();
147 TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
149 // If someone can figure out a general rule for this, that would be great.
150 // It's probably just doomed to be platform-dependent, though.
151 unsigned TargetCodeGenInfo::getSizeOfUnwindException() const {
153 // x86-64 FreeBSD, Linux, Darwin
154 // x86-32 FreeBSD, Linux, Darwin
155 // PowerPC Linux, Darwin
156 // ARM Darwin (*not* EABI)
161 bool TargetCodeGenInfo::isNoProtoCallVariadic(const CallArgList &args,
162 const FunctionNoProtoType *fnType) const {
163 // The following conventions are known to require this to be false:
166 // For everything else, we just prefer false unless we opt out.
171 TargetCodeGenInfo::getDependentLibraryOption(llvm::StringRef Lib,
172 llvm::SmallString<24> &Opt) const {
173 // This assumes the user is passing a library name like "rt" instead of a
174 // filename like "librt.a/so", and that they don't care whether it's static or
180 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
182 /// isEmptyField - Return true iff a the field is "empty", that is it
183 /// is an unnamed bit-field or an (array of) empty record(s).
184 static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
186 if (FD->isUnnamedBitfield())
189 QualType FT = FD->getType();
191 // Constant arrays of empty records count as empty, strip them off.
192 // Constant arrays of zero length always count as empty.
194 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
195 if (AT->getSize() == 0)
197 FT = AT->getElementType();
200 const RecordType *RT = FT->getAs<RecordType>();
204 // C++ record fields are never empty, at least in the Itanium ABI.
206 // FIXME: We should use a predicate for whether this behavior is true in the
208 if (isa<CXXRecordDecl>(RT->getDecl()))
211 return isEmptyRecord(Context, FT, AllowArrays);
214 /// isEmptyRecord - Return true iff a structure contains only empty
215 /// fields. Note that a structure with a flexible array member is not
216 /// considered empty.
217 static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
218 const RecordType *RT = T->getAs<RecordType>();
221 const RecordDecl *RD = RT->getDecl();
222 if (RD->hasFlexibleArrayMember())
225 // If this is a C++ record, check the bases first.
226 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
227 for (const auto &I : CXXRD->bases())
228 if (!isEmptyRecord(Context, I.getType(), true))
231 for (const auto *I : RD->fields())
232 if (!isEmptyField(Context, I, AllowArrays))
237 /// isSingleElementStruct - Determine if a structure is a "single
238 /// element struct", i.e. it has exactly one non-empty field or
239 /// exactly one field which is itself a single element
240 /// struct. Structures with flexible array members are never
241 /// considered single element structs.
243 /// \return The field declaration for the single non-empty field, if
245 static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
246 const RecordType *RT = T->getAs<RecordType>();
250 const RecordDecl *RD = RT->getDecl();
251 if (RD->hasFlexibleArrayMember())
254 const Type *Found = nullptr;
256 // If this is a C++ record, check the bases first.
257 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
258 for (const auto &I : CXXRD->bases()) {
259 // Ignore empty records.
260 if (isEmptyRecord(Context, I.getType(), true))
263 // If we already found an element then this isn't a single-element struct.
267 // If this is non-empty and not a single element struct, the composite
268 // cannot be a single element struct.
269 Found = isSingleElementStruct(I.getType(), Context);
275 // Check for single element.
276 for (const auto *FD : RD->fields()) {
277 QualType FT = FD->getType();
279 // Ignore empty fields.
280 if (isEmptyField(Context, FD, true))
283 // If we already found an element then this isn't a single-element
288 // Treat single element arrays as the element.
289 while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
290 if (AT->getSize().getZExtValue() != 1)
292 FT = AT->getElementType();
295 if (!isAggregateTypeForABI(FT)) {
296 Found = FT.getTypePtr();
298 Found = isSingleElementStruct(FT, Context);
304 // We don't consider a struct a single-element struct if it has
305 // padding beyond the element type.
306 if (Found && Context.getTypeSize(Found) != Context.getTypeSize(T))
312 static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
313 // Treat complex types as the element type.
314 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
315 Ty = CTy->getElementType();
317 // Check for a type which we know has a simple scalar argument-passing
318 // convention without any padding. (We're specifically looking for 32
319 // and 64-bit integer and integer-equivalents, float, and double.)
320 if (!Ty->getAs<BuiltinType>() && !Ty->hasPointerRepresentation() &&
321 !Ty->isEnumeralType() && !Ty->isBlockPointerType())
324 uint64_t Size = Context.getTypeSize(Ty);
325 return Size == 32 || Size == 64;
328 /// canExpandIndirectArgument - Test whether an argument type which is to be
329 /// passed indirectly (on the stack) would have the equivalent layout if it was
330 /// expanded into separate arguments. If so, we prefer to do the latter to avoid
331 /// inhibiting optimizations.
333 // FIXME: This predicate is missing many cases, currently it just follows
334 // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
335 // should probably make this smarter, or better yet make the LLVM backend
336 // capable of handling it.
337 static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
338 // We can only expand structure types.
339 const RecordType *RT = Ty->getAs<RecordType>();
343 // We can only expand (C) structures.
345 // FIXME: This needs to be generalized to handle classes as well.
346 const RecordDecl *RD = RT->getDecl();
350 // We try to expand CLike CXXRecordDecl.
351 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
352 if (!CXXRD->isCLike())
358 for (const auto *FD : RD->fields()) {
359 if (!is32Or64BitBasicType(FD->getType(), Context))
362 // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
363 // how to expand them yet, and the predicate for telling if a bitfield still
364 // counts as "basic" is more complicated than what we were doing previously.
365 if (FD->isBitField())
368 Size += Context.getTypeSize(FD->getType());
371 // Make sure there are not any holes in the struct.
372 if (Size != Context.getTypeSize(Ty))
379 /// DefaultABIInfo - The default implementation for ABI specific
380 /// details. This implementation provides information which results in
381 /// self-consistent and sensible LLVM IR generation, but does not
382 /// conform to any particular ABI.
383 class DefaultABIInfo : public ABIInfo {
385 DefaultABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
387 ABIArgInfo classifyReturnType(QualType RetTy) const;
388 ABIArgInfo classifyArgumentType(QualType RetTy) const;
390 void computeInfo(CGFunctionInfo &FI) const override {
391 if (!getCXXABI().classifyReturnType(FI))
392 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
393 for (auto &I : FI.arguments())
394 I.info = classifyArgumentType(I.type);
397 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
398 CodeGenFunction &CGF) const override;
401 class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
403 DefaultTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
404 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
407 llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
408 CodeGenFunction &CGF) const {
412 ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty) const {
413 Ty = useFirstFieldIfTransparentUnion(Ty);
415 if (isAggregateTypeForABI(Ty)) {
416 // Records with non-trivial destructors/copy-constructors should not be
418 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
419 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
421 return ABIArgInfo::getIndirect(0);
424 // Treat an enum type as its underlying type.
425 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
426 Ty = EnumTy->getDecl()->getIntegerType();
428 return (Ty->isPromotableIntegerType() ?
429 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
432 ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy) const {
433 if (RetTy->isVoidType())
434 return ABIArgInfo::getIgnore();
436 if (isAggregateTypeForABI(RetTy))
437 return ABIArgInfo::getIndirect(0);
439 // Treat an enum type as its underlying type.
440 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
441 RetTy = EnumTy->getDecl()->getIntegerType();
443 return (RetTy->isPromotableIntegerType() ?
444 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
447 //===----------------------------------------------------------------------===//
448 // le32/PNaCl bitcode ABI Implementation
450 // This is a simplified version of the x86_32 ABI. Arguments and return values
451 // are always passed on the stack.
452 //===----------------------------------------------------------------------===//
454 class PNaClABIInfo : public ABIInfo {
456 PNaClABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
458 ABIArgInfo classifyReturnType(QualType RetTy) const;
459 ABIArgInfo classifyArgumentType(QualType RetTy) const;
461 void computeInfo(CGFunctionInfo &FI) const override;
462 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
463 CodeGenFunction &CGF) const override;
466 class PNaClTargetCodeGenInfo : public TargetCodeGenInfo {
468 PNaClTargetCodeGenInfo(CodeGen::CodeGenTypes &CGT)
469 : TargetCodeGenInfo(new PNaClABIInfo(CGT)) {}
472 void PNaClABIInfo::computeInfo(CGFunctionInfo &FI) const {
473 if (!getCXXABI().classifyReturnType(FI))
474 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
476 for (auto &I : FI.arguments())
477 I.info = classifyArgumentType(I.type);
480 llvm::Value *PNaClABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
481 CodeGenFunction &CGF) const {
485 /// \brief Classify argument of given type \p Ty.
486 ABIArgInfo PNaClABIInfo::classifyArgumentType(QualType Ty) const {
487 if (isAggregateTypeForABI(Ty)) {
488 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
489 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
490 return ABIArgInfo::getIndirect(0);
491 } else if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
492 // Treat an enum type as its underlying type.
493 Ty = EnumTy->getDecl()->getIntegerType();
494 } else if (Ty->isFloatingType()) {
495 // Floating-point types don't go inreg.
496 return ABIArgInfo::getDirect();
499 return (Ty->isPromotableIntegerType() ?
500 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
503 ABIArgInfo PNaClABIInfo::classifyReturnType(QualType RetTy) const {
504 if (RetTy->isVoidType())
505 return ABIArgInfo::getIgnore();
507 // In the PNaCl ABI we always return records/structures on the stack.
508 if (isAggregateTypeForABI(RetTy))
509 return ABIArgInfo::getIndirect(0);
511 // Treat an enum type as its underlying type.
512 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
513 RetTy = EnumTy->getDecl()->getIntegerType();
515 return (RetTy->isPromotableIntegerType() ?
516 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
519 /// IsX86_MMXType - Return true if this is an MMX type.
520 bool IsX86_MMXType(llvm::Type *IRType) {
521 // Return true if the type is an MMX type <2 x i32>, <4 x i16>, or <8 x i8>.
522 return IRType->isVectorTy() && IRType->getPrimitiveSizeInBits() == 64 &&
523 cast<llvm::VectorType>(IRType)->getElementType()->isIntegerTy() &&
524 IRType->getScalarSizeInBits() != 64;
527 static llvm::Type* X86AdjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
528 StringRef Constraint,
530 if ((Constraint == "y" || Constraint == "&y") && Ty->isVectorTy()) {
531 if (cast<llvm::VectorType>(Ty)->getBitWidth() != 64) {
532 // Invalid MMX constraint
536 return llvm::Type::getX86_MMXTy(CGF.getLLVMContext());
539 // No operation needed
543 /// Returns true if this type can be passed in SSE registers with the
544 /// X86_VectorCall calling convention. Shared between x86_32 and x86_64.
545 static bool isX86VectorTypeForVectorCall(ASTContext &Context, QualType Ty) {
546 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
547 if (BT->isFloatingPoint() && BT->getKind() != BuiltinType::Half)
549 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
550 // vectorcall can pass XMM, YMM, and ZMM vectors. We don't pass SSE1 MMX
551 // registers specially.
552 unsigned VecSize = Context.getTypeSize(VT);
553 if (VecSize == 128 || VecSize == 256 || VecSize == 512)
559 /// Returns true if this aggregate is small enough to be passed in SSE registers
560 /// in the X86_VectorCall calling convention. Shared between x86_32 and x86_64.
561 static bool isX86VectorCallAggregateSmallEnough(uint64_t NumMembers) {
562 return NumMembers <= 4;
565 //===----------------------------------------------------------------------===//
566 // X86-32 ABI Implementation
567 //===----------------------------------------------------------------------===//
569 /// \brief Similar to llvm::CCState, but for Clang.
571 CCState(unsigned CC) : CC(CC), FreeRegs(0), FreeSSERegs(0) {}
575 unsigned FreeSSERegs;
578 /// X86_32ABIInfo - The X86-32 ABI information.
579 class X86_32ABIInfo : public ABIInfo {
585 static const unsigned MinABIStackAlignInBytes = 4;
587 bool IsDarwinVectorABI;
588 bool IsSmallStructInRegABI;
589 bool IsWin32StructABI;
590 unsigned DefaultNumRegisterParameters;
592 static bool isRegisterSize(unsigned Size) {
593 return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
596 bool isHomogeneousAggregateBaseType(QualType Ty) const override {
597 // FIXME: Assumes vectorcall is in use.
598 return isX86VectorTypeForVectorCall(getContext(), Ty);
601 bool isHomogeneousAggregateSmallEnough(const Type *Ty,
602 uint64_t NumMembers) const override {
603 // FIXME: Assumes vectorcall is in use.
604 return isX86VectorCallAggregateSmallEnough(NumMembers);
607 bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context) const;
609 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
610 /// such that the argument will be passed in memory.
611 ABIArgInfo getIndirectResult(QualType Ty, bool ByVal, CCState &State) const;
613 ABIArgInfo getIndirectReturnResult(CCState &State) const;
615 /// \brief Return the alignment to use for the given type on the stack.
616 unsigned getTypeStackAlignInBytes(QualType Ty, unsigned Align) const;
618 Class classify(QualType Ty) const;
619 ABIArgInfo classifyReturnType(QualType RetTy, CCState &State) const;
620 ABIArgInfo classifyArgumentType(QualType RetTy, CCState &State) const;
621 bool shouldUseInReg(QualType Ty, CCState &State, bool &NeedsPadding) const;
623 /// \brief Rewrite the function info so that all memory arguments use
625 void rewriteWithInAlloca(CGFunctionInfo &FI) const;
627 void addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
628 unsigned &StackOffset, ABIArgInfo &Info,
629 QualType Type) const;
633 void computeInfo(CGFunctionInfo &FI) const override;
634 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
635 CodeGenFunction &CGF) const override;
637 X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool w,
639 : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
640 IsWin32StructABI(w), DefaultNumRegisterParameters(r) {}
643 class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
645 X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
646 bool d, bool p, bool w, unsigned r)
647 :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, w, r)) {}
649 static bool isStructReturnInRegABI(
650 const llvm::Triple &Triple, const CodeGenOptions &Opts);
652 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
653 CodeGen::CodeGenModule &CGM) const override;
655 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
656 // Darwin uses different dwarf register numbers for EH.
657 if (CGM.getTarget().getTriple().isOSDarwin()) return 5;
661 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
662 llvm::Value *Address) const override;
664 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
665 StringRef Constraint,
666 llvm::Type* Ty) const override {
667 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
670 void addReturnRegisterOutputs(CodeGenFunction &CGF, LValue ReturnValue,
671 std::string &Constraints,
672 std::vector<llvm::Type *> &ResultRegTypes,
673 std::vector<llvm::Type *> &ResultTruncRegTypes,
674 std::vector<LValue> &ResultRegDests,
675 std::string &AsmString,
676 unsigned NumOutputs) const override;
679 getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override {
680 unsigned Sig = (0xeb << 0) | // jmp rel8
681 (0x06 << 8) | // .+0x08
684 return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
690 /// Rewrite input constraint references after adding some output constraints.
691 /// In the case where there is one output and one input and we add one output,
692 /// we need to replace all operand references greater than or equal to 1:
695 /// The result will be:
698 static void rewriteInputConstraintReferences(unsigned FirstIn,
700 std::string &AsmString) {
702 llvm::raw_string_ostream OS(Buf);
704 while (Pos < AsmString.size()) {
705 size_t DollarStart = AsmString.find('$', Pos);
706 if (DollarStart == std::string::npos)
707 DollarStart = AsmString.size();
708 size_t DollarEnd = AsmString.find_first_not_of('$', DollarStart);
709 if (DollarEnd == std::string::npos)
710 DollarEnd = AsmString.size();
711 OS << StringRef(&AsmString[Pos], DollarEnd - Pos);
713 size_t NumDollars = DollarEnd - DollarStart;
714 if (NumDollars % 2 != 0 && Pos < AsmString.size()) {
715 // We have an operand reference.
716 size_t DigitStart = Pos;
717 size_t DigitEnd = AsmString.find_first_not_of("0123456789", DigitStart);
718 if (DigitEnd == std::string::npos)
719 DigitEnd = AsmString.size();
720 StringRef OperandStr(&AsmString[DigitStart], DigitEnd - DigitStart);
721 unsigned OperandIndex;
722 if (!OperandStr.getAsInteger(10, OperandIndex)) {
723 if (OperandIndex >= FirstIn)
724 OperandIndex += NumNewOuts;
732 AsmString = std::move(OS.str());
735 /// Add output constraints for EAX:EDX because they are return registers.
736 void X86_32TargetCodeGenInfo::addReturnRegisterOutputs(
737 CodeGenFunction &CGF, LValue ReturnSlot, std::string &Constraints,
738 std::vector<llvm::Type *> &ResultRegTypes,
739 std::vector<llvm::Type *> &ResultTruncRegTypes,
740 std::vector<LValue> &ResultRegDests, std::string &AsmString,
741 unsigned NumOutputs) const {
742 uint64_t RetWidth = CGF.getContext().getTypeSize(ReturnSlot.getType());
744 // Use the EAX constraint if the width is 32 or smaller and EAX:EDX if it is
746 if (!Constraints.empty())
748 if (RetWidth <= 32) {
749 Constraints += "={eax}";
750 ResultRegTypes.push_back(CGF.Int32Ty);
752 // Use the 'A' constraint for EAX:EDX.
754 ResultRegTypes.push_back(CGF.Int64Ty);
757 // Truncate EAX or EAX:EDX to an integer of the appropriate size.
758 llvm::Type *CoerceTy = llvm::IntegerType::get(CGF.getLLVMContext(), RetWidth);
759 ResultTruncRegTypes.push_back(CoerceTy);
761 // Coerce the integer by bitcasting the return slot pointer.
762 ReturnSlot.setAddress(CGF.Builder.CreateBitCast(ReturnSlot.getAddress(),
763 CoerceTy->getPointerTo()));
764 ResultRegDests.push_back(ReturnSlot);
766 rewriteInputConstraintReferences(NumOutputs, 1, AsmString);
769 /// shouldReturnTypeInRegister - Determine if the given type should be
770 /// passed in a register (for the Darwin ABI).
771 bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
772 ASTContext &Context) const {
773 uint64_t Size = Context.getTypeSize(Ty);
775 // Type must be register sized.
776 if (!isRegisterSize(Size))
779 if (Ty->isVectorType()) {
780 // 64- and 128- bit vectors inside structures are not returned in
782 if (Size == 64 || Size == 128)
788 // If this is a builtin, pointer, enum, complex type, member pointer, or
789 // member function pointer it is ok.
790 if (Ty->getAs<BuiltinType>() || Ty->hasPointerRepresentation() ||
791 Ty->isAnyComplexType() || Ty->isEnumeralType() ||
792 Ty->isBlockPointerType() || Ty->isMemberPointerType())
795 // Arrays are treated like records.
796 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
797 return shouldReturnTypeInRegister(AT->getElementType(), Context);
799 // Otherwise, it must be a record type.
800 const RecordType *RT = Ty->getAs<RecordType>();
801 if (!RT) return false;
803 // FIXME: Traverse bases here too.
805 // Structure types are passed in register if all fields would be
806 // passed in a register.
807 for (const auto *FD : RT->getDecl()->fields()) {
808 // Empty fields are ignored.
809 if (isEmptyField(Context, FD, true))
812 // Check fields recursively.
813 if (!shouldReturnTypeInRegister(FD->getType(), Context))
819 ABIArgInfo X86_32ABIInfo::getIndirectReturnResult(CCState &State) const {
820 // If the return value is indirect, then the hidden argument is consuming one
822 if (State.FreeRegs) {
824 return ABIArgInfo::getIndirectInReg(/*Align=*/0, /*ByVal=*/false);
826 return ABIArgInfo::getIndirect(/*Align=*/0, /*ByVal=*/false);
829 ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
830 CCState &State) const {
831 if (RetTy->isVoidType())
832 return ABIArgInfo::getIgnore();
834 const Type *Base = nullptr;
835 uint64_t NumElts = 0;
836 if (State.CC == llvm::CallingConv::X86_VectorCall &&
837 isHomogeneousAggregate(RetTy, Base, NumElts)) {
838 // The LLVM struct type for such an aggregate should lower properly.
839 return ABIArgInfo::getDirect();
842 if (const VectorType *VT = RetTy->getAs<VectorType>()) {
843 // On Darwin, some vectors are returned in registers.
844 if (IsDarwinVectorABI) {
845 uint64_t Size = getContext().getTypeSize(RetTy);
847 // 128-bit vectors are a special case; they are returned in
848 // registers and we need to make sure to pick a type the LLVM
849 // backend will like.
851 return ABIArgInfo::getDirect(llvm::VectorType::get(
852 llvm::Type::getInt64Ty(getVMContext()), 2));
854 // Always return in register if it fits in a general purpose
855 // register, or if it is 64 bits and has a single element.
856 if ((Size == 8 || Size == 16 || Size == 32) ||
857 (Size == 64 && VT->getNumElements() == 1))
858 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
861 return getIndirectReturnResult(State);
864 return ABIArgInfo::getDirect();
867 if (isAggregateTypeForABI(RetTy)) {
868 if (const RecordType *RT = RetTy->getAs<RecordType>()) {
869 // Structures with flexible arrays are always indirect.
870 if (RT->getDecl()->hasFlexibleArrayMember())
871 return getIndirectReturnResult(State);
874 // If specified, structs and unions are always indirect.
875 if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
876 return getIndirectReturnResult(State);
878 // Small structures which are register sized are generally returned
880 if (shouldReturnTypeInRegister(RetTy, getContext())) {
881 uint64_t Size = getContext().getTypeSize(RetTy);
883 // As a special-case, if the struct is a "single-element" struct, and
884 // the field is of type "float" or "double", return it in a
885 // floating-point register. (MSVC does not apply this special case.)
886 // We apply a similar transformation for pointer types to improve the
887 // quality of the generated IR.
888 if (const Type *SeltTy = isSingleElementStruct(RetTy, getContext()))
889 if ((!IsWin32StructABI && SeltTy->isRealFloatingType())
890 || SeltTy->hasPointerRepresentation())
891 return ABIArgInfo::getDirect(CGT.ConvertType(QualType(SeltTy, 0)));
893 // FIXME: We should be able to narrow this integer in cases with dead
895 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),Size));
898 return getIndirectReturnResult(State);
901 // Treat an enum type as its underlying type.
902 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
903 RetTy = EnumTy->getDecl()->getIntegerType();
905 return (RetTy->isPromotableIntegerType() ?
906 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
909 static bool isSSEVectorType(ASTContext &Context, QualType Ty) {
910 return Ty->getAs<VectorType>() && Context.getTypeSize(Ty) == 128;
913 static bool isRecordWithSSEVectorType(ASTContext &Context, QualType Ty) {
914 const RecordType *RT = Ty->getAs<RecordType>();
917 const RecordDecl *RD = RT->getDecl();
919 // If this is a C++ record, check the bases first.
920 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
921 for (const auto &I : CXXRD->bases())
922 if (!isRecordWithSSEVectorType(Context, I.getType()))
925 for (const auto *i : RD->fields()) {
926 QualType FT = i->getType();
928 if (isSSEVectorType(Context, FT))
931 if (isRecordWithSSEVectorType(Context, FT))
938 unsigned X86_32ABIInfo::getTypeStackAlignInBytes(QualType Ty,
939 unsigned Align) const {
940 // Otherwise, if the alignment is less than or equal to the minimum ABI
941 // alignment, just use the default; the backend will handle this.
942 if (Align <= MinABIStackAlignInBytes)
943 return 0; // Use default alignment.
945 // On non-Darwin, the stack type alignment is always 4.
946 if (!IsDarwinVectorABI) {
947 // Set explicit alignment, since we may need to realign the top.
948 return MinABIStackAlignInBytes;
951 // Otherwise, if the type contains an SSE vector type, the alignment is 16.
952 if (Align >= 16 && (isSSEVectorType(getContext(), Ty) ||
953 isRecordWithSSEVectorType(getContext(), Ty)))
956 return MinABIStackAlignInBytes;
959 ABIArgInfo X86_32ABIInfo::getIndirectResult(QualType Ty, bool ByVal,
960 CCState &State) const {
962 if (State.FreeRegs) {
963 --State.FreeRegs; // Non-byval indirects just use one pointer.
964 return ABIArgInfo::getIndirectInReg(0, false);
966 return ABIArgInfo::getIndirect(0, false);
969 // Compute the byval alignment.
970 unsigned TypeAlign = getContext().getTypeAlign(Ty) / 8;
971 unsigned StackAlign = getTypeStackAlignInBytes(Ty, TypeAlign);
973 return ABIArgInfo::getIndirect(4, /*ByVal=*/true);
975 // If the stack alignment is less than the type alignment, realign the
977 bool Realign = TypeAlign > StackAlign;
978 return ABIArgInfo::getIndirect(StackAlign, /*ByVal=*/true, Realign);
981 X86_32ABIInfo::Class X86_32ABIInfo::classify(QualType Ty) const {
982 const Type *T = isSingleElementStruct(Ty, getContext());
986 if (const BuiltinType *BT = T->getAs<BuiltinType>()) {
987 BuiltinType::Kind K = BT->getKind();
988 if (K == BuiltinType::Float || K == BuiltinType::Double)
994 bool X86_32ABIInfo::shouldUseInReg(QualType Ty, CCState &State,
995 bool &NeedsPadding) const {
996 NeedsPadding = false;
997 Class C = classify(Ty);
1001 unsigned Size = getContext().getTypeSize(Ty);
1002 unsigned SizeInRegs = (Size + 31) / 32;
1004 if (SizeInRegs == 0)
1007 if (SizeInRegs > State.FreeRegs) {
1012 State.FreeRegs -= SizeInRegs;
1014 if (State.CC == llvm::CallingConv::X86_FastCall ||
1015 State.CC == llvm::CallingConv::X86_VectorCall) {
1019 if (Ty->isIntegralOrEnumerationType())
1022 if (Ty->isPointerType())
1025 if (Ty->isReferenceType())
1029 NeedsPadding = true;
1037 ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty,
1038 CCState &State) const {
1039 // FIXME: Set alignment on indirect arguments.
1041 Ty = useFirstFieldIfTransparentUnion(Ty);
1043 // Check with the C++ ABI first.
1044 const RecordType *RT = Ty->getAs<RecordType>();
1046 CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI());
1047 if (RAA == CGCXXABI::RAA_Indirect) {
1048 return getIndirectResult(Ty, false, State);
1049 } else if (RAA == CGCXXABI::RAA_DirectInMemory) {
1050 // The field index doesn't matter, we'll fix it up later.
1051 return ABIArgInfo::getInAlloca(/*FieldIndex=*/0);
1055 // vectorcall adds the concept of a homogenous vector aggregate, similar
1056 // to other targets.
1057 const Type *Base = nullptr;
1058 uint64_t NumElts = 0;
1059 if (State.CC == llvm::CallingConv::X86_VectorCall &&
1060 isHomogeneousAggregate(Ty, Base, NumElts)) {
1061 if (State.FreeSSERegs >= NumElts) {
1062 State.FreeSSERegs -= NumElts;
1063 if (Ty->isBuiltinType() || Ty->isVectorType())
1064 return ABIArgInfo::getDirect();
1065 return ABIArgInfo::getExpand();
1067 return getIndirectResult(Ty, /*ByVal=*/false, State);
1070 if (isAggregateTypeForABI(Ty)) {
1072 // Structs are always byval on win32, regardless of what they contain.
1073 if (IsWin32StructABI)
1074 return getIndirectResult(Ty, true, State);
1076 // Structures with flexible arrays are always indirect.
1077 if (RT->getDecl()->hasFlexibleArrayMember())
1078 return getIndirectResult(Ty, true, State);
1081 // Ignore empty structs/unions.
1082 if (isEmptyRecord(getContext(), Ty, true))
1083 return ABIArgInfo::getIgnore();
1085 llvm::LLVMContext &LLVMContext = getVMContext();
1086 llvm::IntegerType *Int32 = llvm::Type::getInt32Ty(LLVMContext);
1088 if (shouldUseInReg(Ty, State, NeedsPadding)) {
1089 unsigned SizeInRegs = (getContext().getTypeSize(Ty) + 31) / 32;
1090 SmallVector<llvm::Type*, 3> Elements(SizeInRegs, Int32);
1091 llvm::Type *Result = llvm::StructType::get(LLVMContext, Elements);
1092 return ABIArgInfo::getDirectInReg(Result);
1094 llvm::IntegerType *PaddingType = NeedsPadding ? Int32 : nullptr;
1096 // Expand small (<= 128-bit) record types when we know that the stack layout
1097 // of those arguments will match the struct. This is important because the
1098 // LLVM backend isn't smart enough to remove byval, which inhibits many
1100 if (getContext().getTypeSize(Ty) <= 4*32 &&
1101 canExpandIndirectArgument(Ty, getContext()))
1102 return ABIArgInfo::getExpandWithPadding(
1103 State.CC == llvm::CallingConv::X86_FastCall ||
1104 State.CC == llvm::CallingConv::X86_VectorCall,
1107 return getIndirectResult(Ty, true, State);
1110 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1111 // On Darwin, some vectors are passed in memory, we handle this by passing
1112 // it as an i8/i16/i32/i64.
1113 if (IsDarwinVectorABI) {
1114 uint64_t Size = getContext().getTypeSize(Ty);
1115 if ((Size == 8 || Size == 16 || Size == 32) ||
1116 (Size == 64 && VT->getNumElements() == 1))
1117 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
1121 if (IsX86_MMXType(CGT.ConvertType(Ty)))
1122 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), 64));
1124 return ABIArgInfo::getDirect();
1128 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1129 Ty = EnumTy->getDecl()->getIntegerType();
1132 bool InReg = shouldUseInReg(Ty, State, NeedsPadding);
1134 if (Ty->isPromotableIntegerType()) {
1136 return ABIArgInfo::getExtendInReg();
1137 return ABIArgInfo::getExtend();
1140 return ABIArgInfo::getDirectInReg();
1141 return ABIArgInfo::getDirect();
1144 void X86_32ABIInfo::computeInfo(CGFunctionInfo &FI) const {
1145 CCState State(FI.getCallingConvention());
1146 if (State.CC == llvm::CallingConv::X86_FastCall)
1148 else if (State.CC == llvm::CallingConv::X86_VectorCall) {
1150 State.FreeSSERegs = 6;
1151 } else if (FI.getHasRegParm())
1152 State.FreeRegs = FI.getRegParm();
1154 State.FreeRegs = DefaultNumRegisterParameters;
1156 if (!getCXXABI().classifyReturnType(FI)) {
1157 FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), State);
1158 } else if (FI.getReturnInfo().isIndirect()) {
1159 // The C++ ABI is not aware of register usage, so we have to check if the
1160 // return value was sret and put it in a register ourselves if appropriate.
1161 if (State.FreeRegs) {
1162 --State.FreeRegs; // The sret parameter consumes a register.
1163 FI.getReturnInfo().setInReg(true);
1167 // The chain argument effectively gives us another free register.
1168 if (FI.isChainCall())
1171 bool UsedInAlloca = false;
1172 for (auto &I : FI.arguments()) {
1173 I.info = classifyArgumentType(I.type, State);
1174 UsedInAlloca |= (I.info.getKind() == ABIArgInfo::InAlloca);
1177 // If we needed to use inalloca for any argument, do a second pass and rewrite
1178 // all the memory arguments to use inalloca.
1180 rewriteWithInAlloca(FI);
1184 X86_32ABIInfo::addFieldToArgStruct(SmallVector<llvm::Type *, 6> &FrameFields,
1185 unsigned &StackOffset,
1186 ABIArgInfo &Info, QualType Type) const {
1187 assert(StackOffset % 4U == 0 && "unaligned inalloca struct");
1188 Info = ABIArgInfo::getInAlloca(FrameFields.size());
1189 FrameFields.push_back(CGT.ConvertTypeForMem(Type));
1190 StackOffset += getContext().getTypeSizeInChars(Type).getQuantity();
1192 // Insert padding bytes to respect alignment. For x86_32, each argument is 4
1194 if (StackOffset % 4U) {
1195 unsigned OldOffset = StackOffset;
1196 StackOffset = llvm::RoundUpToAlignment(StackOffset, 4U);
1197 unsigned NumBytes = StackOffset - OldOffset;
1199 llvm::Type *Ty = llvm::Type::getInt8Ty(getVMContext());
1200 Ty = llvm::ArrayType::get(Ty, NumBytes);
1201 FrameFields.push_back(Ty);
1205 static bool isArgInAlloca(const ABIArgInfo &Info) {
1206 // Leave ignored and inreg arguments alone.
1207 switch (Info.getKind()) {
1208 case ABIArgInfo::InAlloca:
1210 case ABIArgInfo::Indirect:
1211 assert(Info.getIndirectByVal());
1213 case ABIArgInfo::Ignore:
1215 case ABIArgInfo::Direct:
1216 case ABIArgInfo::Extend:
1217 case ABIArgInfo::Expand:
1218 if (Info.getInReg())
1222 llvm_unreachable("invalid enum");
1225 void X86_32ABIInfo::rewriteWithInAlloca(CGFunctionInfo &FI) const {
1226 assert(IsWin32StructABI && "inalloca only supported on win32");
1228 // Build a packed struct type for all of the arguments in memory.
1229 SmallVector<llvm::Type *, 6> FrameFields;
1231 unsigned StackOffset = 0;
1232 CGFunctionInfo::arg_iterator I = FI.arg_begin(), E = FI.arg_end();
1234 // Put 'this' into the struct before 'sret', if necessary.
1236 FI.getCallingConvention() == llvm::CallingConv::X86_ThisCall;
1237 ABIArgInfo &Ret = FI.getReturnInfo();
1238 if (Ret.isIndirect() && Ret.isSRetAfterThis() && !IsThisCall &&
1239 isArgInAlloca(I->info)) {
1240 addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type);
1244 // Put the sret parameter into the inalloca struct if it's in memory.
1245 if (Ret.isIndirect() && !Ret.getInReg()) {
1246 CanQualType PtrTy = getContext().getPointerType(FI.getReturnType());
1247 addFieldToArgStruct(FrameFields, StackOffset, Ret, PtrTy);
1248 // On Windows, the hidden sret parameter is always returned in eax.
1249 Ret.setInAllocaSRet(IsWin32StructABI);
1252 // Skip the 'this' parameter in ecx.
1256 // Put arguments passed in memory into the struct.
1257 for (; I != E; ++I) {
1258 if (isArgInAlloca(I->info))
1259 addFieldToArgStruct(FrameFields, StackOffset, I->info, I->type);
1262 FI.setArgStruct(llvm::StructType::get(getVMContext(), FrameFields,
1263 /*isPacked=*/true));
1266 llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1267 CodeGenFunction &CGF) const {
1268 llvm::Type *BPP = CGF.Int8PtrPtrTy;
1270 CGBuilderTy &Builder = CGF.Builder;
1271 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
1273 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
1275 // Compute if the address needs to be aligned
1276 unsigned Align = CGF.getContext().getTypeAlignInChars(Ty).getQuantity();
1277 Align = getTypeStackAlignInBytes(Ty, Align);
1278 Align = std::max(Align, 4U);
1280 // addr = (addr + align - 1) & -align;
1281 llvm::Value *Offset =
1282 llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
1283 Addr = CGF.Builder.CreateGEP(Addr, Offset);
1284 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(Addr,
1286 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int32Ty, -Align);
1287 Addr = CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
1293 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
1294 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
1297 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, Align);
1298 llvm::Value *NextAddr =
1299 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
1301 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
1306 bool X86_32TargetCodeGenInfo::isStructReturnInRegABI(
1307 const llvm::Triple &Triple, const CodeGenOptions &Opts) {
1308 assert(Triple.getArch() == llvm::Triple::x86);
1310 switch (Opts.getStructReturnConvention()) {
1311 case CodeGenOptions::SRCK_Default:
1313 case CodeGenOptions::SRCK_OnStack: // -fpcc-struct-return
1315 case CodeGenOptions::SRCK_InRegs: // -freg-struct-return
1319 if (Triple.isOSDarwin())
1322 switch (Triple.getOS()) {
1323 case llvm::Triple::DragonFly:
1324 case llvm::Triple::FreeBSD:
1325 case llvm::Triple::OpenBSD:
1326 case llvm::Triple::Bitrig:
1327 case llvm::Triple::Win32:
1334 void X86_32TargetCodeGenInfo::setTargetAttributes(const Decl *D,
1335 llvm::GlobalValue *GV,
1336 CodeGen::CodeGenModule &CGM) const {
1337 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
1338 if (FD->hasAttr<X86ForceAlignArgPointerAttr>()) {
1339 // Get the LLVM function.
1340 llvm::Function *Fn = cast<llvm::Function>(GV);
1342 // Now add the 'alignstack' attribute with a value of 16.
1343 llvm::AttrBuilder B;
1344 B.addStackAlignmentAttr(16);
1345 Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
1346 llvm::AttributeSet::get(CGM.getLLVMContext(),
1347 llvm::AttributeSet::FunctionIndex,
1353 bool X86_32TargetCodeGenInfo::initDwarfEHRegSizeTable(
1354 CodeGen::CodeGenFunction &CGF,
1355 llvm::Value *Address) const {
1356 CodeGen::CGBuilderTy &Builder = CGF.Builder;
1358 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
1360 // 0-7 are the eight integer registers; the order is different
1361 // on Darwin (for EH), but the range is the same.
1363 AssignToArrayRange(Builder, Address, Four8, 0, 8);
1365 if (CGF.CGM.getTarget().getTriple().isOSDarwin()) {
1366 // 12-16 are st(0..4). Not sure why we stop at 4.
1367 // These have size 16, which is sizeof(long double) on
1368 // platforms with 8-byte alignment for that type.
1369 llvm::Value *Sixteen8 = llvm::ConstantInt::get(CGF.Int8Ty, 16);
1370 AssignToArrayRange(Builder, Address, Sixteen8, 12, 16);
1373 // 9 is %eflags, which doesn't get a size on Darwin for some
1375 Builder.CreateStore(
1376 Four8, Builder.CreateConstInBoundsGEP1_32(CGF.Int8Ty, Address, 9));
1378 // 11-16 are st(0..5). Not sure why we stop at 5.
1379 // These have size 12, which is sizeof(long double) on
1380 // platforms with 4-byte alignment for that type.
1381 llvm::Value *Twelve8 = llvm::ConstantInt::get(CGF.Int8Ty, 12);
1382 AssignToArrayRange(Builder, Address, Twelve8, 11, 16);
1388 //===----------------------------------------------------------------------===//
1389 // X86-64 ABI Implementation
1390 //===----------------------------------------------------------------------===//
1394 /// The AVX ABI level for X86 targets.
1395 enum class X86AVXABILevel {
1401 /// \p returns the size in bits of the largest (native) vector for \p AVXLevel.
1402 static unsigned getNativeVectorSizeForAVXABI(X86AVXABILevel AVXLevel) {
1404 case X86AVXABILevel::AVX512:
1406 case X86AVXABILevel::AVX:
1408 case X86AVXABILevel::None:
1411 llvm_unreachable("Unknown AVXLevel");
1414 /// X86_64ABIInfo - The X86_64 ABI information.
1415 class X86_64ABIInfo : public ABIInfo {
1427 /// merge - Implement the X86_64 ABI merging algorithm.
1429 /// Merge an accumulating classification \arg Accum with a field
1430 /// classification \arg Field.
1432 /// \param Accum - The accumulating classification. This should
1433 /// always be either NoClass or the result of a previous merge
1434 /// call. In addition, this should never be Memory (the caller
1435 /// should just return Memory for the aggregate).
1436 static Class merge(Class Accum, Class Field);
1438 /// postMerge - Implement the X86_64 ABI post merging algorithm.
1440 /// Post merger cleanup, reduces a malformed Hi and Lo pair to
1441 /// final MEMORY or SSE classes when necessary.
1443 /// \param AggregateSize - The size of the current aggregate in
1444 /// the classification process.
1446 /// \param Lo - The classification for the parts of the type
1447 /// residing in the low word of the containing object.
1449 /// \param Hi - The classification for the parts of the type
1450 /// residing in the higher words of the containing object.
1452 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1454 /// classify - Determine the x86_64 register classes in which the
1455 /// given type T should be passed.
1457 /// \param Lo - The classification for the parts of the type
1458 /// residing in the low word of the containing object.
1460 /// \param Hi - The classification for the parts of the type
1461 /// residing in the high word of the containing object.
1463 /// \param OffsetBase - The bit offset of this type in the
1464 /// containing object. Some parameters are classified different
1465 /// depending on whether they straddle an eightbyte boundary.
1467 /// \param isNamedArg - Whether the argument in question is a "named"
1468 /// argument, as used in AMD64-ABI 3.5.7.
1470 /// If a word is unused its result will be NoClass; if a type should
1471 /// be passed in Memory then at least the classification of \arg Lo
1474 /// The \arg Lo class will be NoClass iff the argument is ignored.
1476 /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
1477 /// also be ComplexX87.
1478 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1479 bool isNamedArg) const;
1481 llvm::Type *GetByteVectorType(QualType Ty) const;
1482 llvm::Type *GetSSETypeAtOffset(llvm::Type *IRType,
1483 unsigned IROffset, QualType SourceTy,
1484 unsigned SourceOffset) const;
1485 llvm::Type *GetINTEGERTypeAtOffset(llvm::Type *IRType,
1486 unsigned IROffset, QualType SourceTy,
1487 unsigned SourceOffset) const;
1489 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1490 /// such that the argument will be returned in memory.
1491 ABIArgInfo getIndirectReturnResult(QualType Ty) const;
1493 /// getIndirectResult - Give a source type \arg Ty, return a suitable result
1494 /// such that the argument will be passed in memory.
1496 /// \param freeIntRegs - The number of free integer registers remaining
1498 ABIArgInfo getIndirectResult(QualType Ty, unsigned freeIntRegs) const;
1500 ABIArgInfo classifyReturnType(QualType RetTy) const;
1502 ABIArgInfo classifyArgumentType(QualType Ty,
1503 unsigned freeIntRegs,
1504 unsigned &neededInt,
1505 unsigned &neededSSE,
1506 bool isNamedArg) const;
1508 bool IsIllegalVectorType(QualType Ty) const;
1510 /// The 0.98 ABI revision clarified a lot of ambiguities,
1511 /// unfortunately in ways that were not always consistent with
1512 /// certain previous compilers. In particular, platforms which
1513 /// required strict binary compatibility with older versions of GCC
1514 /// may need to exempt themselves.
1515 bool honorsRevision0_98() const {
1516 return !getTarget().getTriple().isOSDarwin();
1519 X86AVXABILevel AVXLevel;
1520 // Some ABIs (e.g. X32 ABI and Native Client OS) use 32 bit pointers on
1522 bool Has64BitPointers;
1525 X86_64ABIInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel) :
1526 ABIInfo(CGT), AVXLevel(AVXLevel),
1527 Has64BitPointers(CGT.getDataLayout().getPointerSize(0) == 8) {
1530 bool isPassedUsingAVXType(QualType type) const {
1531 unsigned neededInt, neededSSE;
1532 // The freeIntRegs argument doesn't matter here.
1533 ABIArgInfo info = classifyArgumentType(type, 0, neededInt, neededSSE,
1534 /*isNamedArg*/true);
1535 if (info.isDirect()) {
1536 llvm::Type *ty = info.getCoerceToType();
1537 if (llvm::VectorType *vectorTy = dyn_cast_or_null<llvm::VectorType>(ty))
1538 return (vectorTy->getBitWidth() > 128);
1543 void computeInfo(CGFunctionInfo &FI) const override;
1545 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1546 CodeGenFunction &CGF) const override;
1548 bool has64BitPointers() const {
1549 return Has64BitPointers;
1553 /// WinX86_64ABIInfo - The Windows X86_64 ABI information.
1554 class WinX86_64ABIInfo : public ABIInfo {
1556 ABIArgInfo classify(QualType Ty, unsigned &FreeSSERegs,
1557 bool IsReturnType) const;
1560 WinX86_64ABIInfo(CodeGen::CodeGenTypes &CGT) : ABIInfo(CGT) {}
1562 void computeInfo(CGFunctionInfo &FI) const override;
1564 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1565 CodeGenFunction &CGF) const override;
1567 bool isHomogeneousAggregateBaseType(QualType Ty) const override {
1568 // FIXME: Assumes vectorcall is in use.
1569 return isX86VectorTypeForVectorCall(getContext(), Ty);
1572 bool isHomogeneousAggregateSmallEnough(const Type *Ty,
1573 uint64_t NumMembers) const override {
1574 // FIXME: Assumes vectorcall is in use.
1575 return isX86VectorCallAggregateSmallEnough(NumMembers);
1579 class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1581 X86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel)
1582 : TargetCodeGenInfo(new X86_64ABIInfo(CGT, AVXLevel)) {}
1584 const X86_64ABIInfo &getABIInfo() const {
1585 return static_cast<const X86_64ABIInfo&>(TargetCodeGenInfo::getABIInfo());
1588 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
1592 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1593 llvm::Value *Address) const override {
1594 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1596 // 0-15 are the 16 integer registers.
1598 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1602 llvm::Type* adjustInlineAsmType(CodeGen::CodeGenFunction &CGF,
1603 StringRef Constraint,
1604 llvm::Type* Ty) const override {
1605 return X86AdjustInlineAsmType(CGF, Constraint, Ty);
1608 bool isNoProtoCallVariadic(const CallArgList &args,
1609 const FunctionNoProtoType *fnType) const override {
1610 // The default CC on x86-64 sets %al to the number of SSA
1611 // registers used, and GCC sets this when calling an unprototyped
1612 // function, so we override the default behavior. However, don't do
1613 // that when AVX types are involved: the ABI explicitly states it is
1614 // undefined, and it doesn't work in practice because of how the ABI
1615 // defines varargs anyway.
1616 if (fnType->getCallConv() == CC_C) {
1617 bool HasAVXType = false;
1618 for (CallArgList::const_iterator
1619 it = args.begin(), ie = args.end(); it != ie; ++it) {
1620 if (getABIInfo().isPassedUsingAVXType(it->Ty)) {
1630 return TargetCodeGenInfo::isNoProtoCallVariadic(args, fnType);
1634 getUBSanFunctionSignature(CodeGen::CodeGenModule &CGM) const override {
1636 if (getABIInfo().has64BitPointers())
1637 Sig = (0xeb << 0) | // jmp rel8
1638 (0x0a << 8) | // .+0x0c
1642 Sig = (0xeb << 0) | // jmp rel8
1643 (0x06 << 8) | // .+0x08
1646 return llvm::ConstantInt::get(CGM.Int32Ty, Sig);
1650 class PS4TargetCodeGenInfo : public X86_64TargetCodeGenInfo {
1652 PS4TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, X86AVXABILevel AVXLevel)
1653 : X86_64TargetCodeGenInfo(CGT, AVXLevel) {}
1655 void getDependentLibraryOption(llvm::StringRef Lib,
1656 llvm::SmallString<24> &Opt) const override {
1662 static std::string qualifyWindowsLibrary(llvm::StringRef Lib) {
1663 // If the argument does not end in .lib, automatically add the suffix.
1664 // If the argument contains a space, enclose it in quotes.
1665 // This matches the behavior of MSVC.
1666 bool Quote = (Lib.find(" ") != StringRef::npos);
1667 std::string ArgStr = Quote ? "\"" : "";
1669 if (!Lib.endswith_lower(".lib"))
1671 ArgStr += Quote ? "\"" : "";
1675 class WinX86_32TargetCodeGenInfo : public X86_32TargetCodeGenInfo {
1677 WinX86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
1678 bool d, bool p, bool w, unsigned RegParms)
1679 : X86_32TargetCodeGenInfo(CGT, d, p, w, RegParms) {}
1681 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
1682 CodeGen::CodeGenModule &CGM) const override;
1684 void getDependentLibraryOption(llvm::StringRef Lib,
1685 llvm::SmallString<24> &Opt) const override {
1686 Opt = "/DEFAULTLIB:";
1687 Opt += qualifyWindowsLibrary(Lib);
1690 void getDetectMismatchOption(llvm::StringRef Name,
1691 llvm::StringRef Value,
1692 llvm::SmallString<32> &Opt) const override {
1693 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
1697 static void addStackProbeSizeTargetAttribute(const Decl *D,
1698 llvm::GlobalValue *GV,
1699 CodeGen::CodeGenModule &CGM) {
1700 if (isa<FunctionDecl>(D)) {
1701 if (CGM.getCodeGenOpts().StackProbeSize != 4096) {
1702 llvm::Function *Fn = cast<llvm::Function>(GV);
1704 Fn->addFnAttr("stack-probe-size",
1705 llvm::utostr(CGM.getCodeGenOpts().StackProbeSize));
1710 void WinX86_32TargetCodeGenInfo::setTargetAttributes(const Decl *D,
1711 llvm::GlobalValue *GV,
1712 CodeGen::CodeGenModule &CGM) const {
1713 X86_32TargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
1715 addStackProbeSizeTargetAttribute(D, GV, CGM);
1718 class WinX86_64TargetCodeGenInfo : public TargetCodeGenInfo {
1720 WinX86_64TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT,
1721 X86AVXABILevel AVXLevel)
1722 : TargetCodeGenInfo(new WinX86_64ABIInfo(CGT)) {}
1724 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
1725 CodeGen::CodeGenModule &CGM) const override;
1727 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
1731 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
1732 llvm::Value *Address) const override {
1733 llvm::Value *Eight8 = llvm::ConstantInt::get(CGF.Int8Ty, 8);
1735 // 0-15 are the 16 integer registers.
1737 AssignToArrayRange(CGF.Builder, Address, Eight8, 0, 16);
1741 void getDependentLibraryOption(llvm::StringRef Lib,
1742 llvm::SmallString<24> &Opt) const override {
1743 Opt = "/DEFAULTLIB:";
1744 Opt += qualifyWindowsLibrary(Lib);
1747 void getDetectMismatchOption(llvm::StringRef Name,
1748 llvm::StringRef Value,
1749 llvm::SmallString<32> &Opt) const override {
1750 Opt = "/FAILIFMISMATCH:\"" + Name.str() + "=" + Value.str() + "\"";
1754 void WinX86_64TargetCodeGenInfo::setTargetAttributes(const Decl *D,
1755 llvm::GlobalValue *GV,
1756 CodeGen::CodeGenModule &CGM) const {
1757 TargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
1759 addStackProbeSizeTargetAttribute(D, GV, CGM);
1763 void X86_64ABIInfo::postMerge(unsigned AggregateSize, Class &Lo,
1765 // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
1767 // (a) If one of the classes is Memory, the whole argument is passed in
1770 // (b) If X87UP is not preceded by X87, the whole argument is passed in
1773 // (c) If the size of the aggregate exceeds two eightbytes and the first
1774 // eightbyte isn't SSE or any other eightbyte isn't SSEUP, the whole
1775 // argument is passed in memory. NOTE: This is necessary to keep the
1776 // ABI working for processors that don't support the __m256 type.
1778 // (d) If SSEUP is not preceded by SSE or SSEUP, it is converted to SSE.
1780 // Some of these are enforced by the merging logic. Others can arise
1781 // only with unions; for example:
1782 // union { _Complex double; unsigned; }
1784 // Note that clauses (b) and (c) were added in 0.98.
1788 if (Hi == X87Up && Lo != X87 && honorsRevision0_98())
1790 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp))
1792 if (Hi == SSEUp && Lo != SSE)
1796 X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum, Class Field) {
1797 // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
1798 // classified recursively so that always two fields are
1799 // considered. The resulting class is calculated according to
1800 // the classes of the fields in the eightbyte:
1802 // (a) If both classes are equal, this is the resulting class.
1804 // (b) If one of the classes is NO_CLASS, the resulting class is
1807 // (c) If one of the classes is MEMORY, the result is the MEMORY
1810 // (d) If one of the classes is INTEGER, the result is the
1813 // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
1814 // MEMORY is used as class.
1816 // (f) Otherwise class SSE is used.
1818 // Accum should never be memory (we should have returned) or
1819 // ComplexX87 (because this cannot be passed in a structure).
1820 assert((Accum != Memory && Accum != ComplexX87) &&
1821 "Invalid accumulated classification during merge.");
1822 if (Accum == Field || Field == NoClass)
1824 if (Field == Memory)
1826 if (Accum == NoClass)
1828 if (Accum == Integer || Field == Integer)
1830 if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
1831 Accum == X87 || Accum == X87Up)
1836 void X86_64ABIInfo::classify(QualType Ty, uint64_t OffsetBase,
1837 Class &Lo, Class &Hi, bool isNamedArg) const {
1838 // FIXME: This code can be simplified by introducing a simple value class for
1839 // Class pairs with appropriate constructor methods for the various
1842 // FIXME: Some of the split computations are wrong; unaligned vectors
1843 // shouldn't be passed in registers for example, so there is no chance they
1844 // can straddle an eightbyte. Verify & simplify.
1848 Class &Current = OffsetBase < 64 ? Lo : Hi;
1851 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
1852 BuiltinType::Kind k = BT->getKind();
1854 if (k == BuiltinType::Void) {
1856 } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
1859 } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
1861 } else if ((k == BuiltinType::Float || k == BuiltinType::Double) ||
1862 (k == BuiltinType::LongDouble &&
1863 getTarget().getTriple().isOSNaCl())) {
1865 } else if (k == BuiltinType::LongDouble) {
1869 // FIXME: _Decimal32 and _Decimal64 are SSE.
1870 // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
1874 if (const EnumType *ET = Ty->getAs<EnumType>()) {
1875 // Classify the underlying integer type.
1876 classify(ET->getDecl()->getIntegerType(), OffsetBase, Lo, Hi, isNamedArg);
1880 if (Ty->hasPointerRepresentation()) {
1885 if (Ty->isMemberPointerType()) {
1886 if (Ty->isMemberFunctionPointerType()) {
1887 if (Has64BitPointers) {
1888 // If Has64BitPointers, this is an {i64, i64}, so classify both
1892 // Otherwise, with 32-bit pointers, this is an {i32, i32}. If that
1893 // straddles an eightbyte boundary, Hi should be classified as well.
1894 uint64_t EB_FuncPtr = (OffsetBase) / 64;
1895 uint64_t EB_ThisAdj = (OffsetBase + 64 - 1) / 64;
1896 if (EB_FuncPtr != EB_ThisAdj) {
1908 if (const VectorType *VT = Ty->getAs<VectorType>()) {
1909 uint64_t Size = getContext().getTypeSize(VT);
1911 // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
1912 // float> as integer.
1915 // If this type crosses an eightbyte boundary, it should be
1917 uint64_t EB_Real = (OffsetBase) / 64;
1918 uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
1919 if (EB_Real != EB_Imag)
1921 } else if (Size == 64) {
1922 // gcc passes <1 x double> in memory. :(
1923 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
1926 // gcc passes <1 x long long> as INTEGER.
1927 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong) ||
1928 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULongLong) ||
1929 VT->getElementType()->isSpecificBuiltinType(BuiltinType::Long) ||
1930 VT->getElementType()->isSpecificBuiltinType(BuiltinType::ULong))
1935 // If this type crosses an eightbyte boundary, it should be
1937 if (OffsetBase && OffsetBase != 64)
1939 } else if (Size == 128 ||
1940 (isNamedArg && Size <= getNativeVectorSizeForAVXABI(AVXLevel))) {
1941 // Arguments of 256-bits are split into four eightbyte chunks. The
1942 // least significant one belongs to class SSE and all the others to class
1943 // SSEUP. The original Lo and Hi design considers that types can't be
1944 // greater than 128-bits, so a 64-bit split in Hi and Lo makes sense.
1945 // This design isn't correct for 256-bits, but since there're no cases
1946 // where the upper parts would need to be inspected, avoid adding
1947 // complexity and just consider Hi to match the 64-256 part.
1949 // Note that per 3.5.7 of AMD64-ABI, 256-bit args are only passed in
1950 // registers if they are "named", i.e. not part of the "..." of a
1951 // variadic function.
1953 // Similarly, per 3.2.3. of the AVX512 draft, 512-bits ("named") args are
1954 // split into eight eightbyte chunks, one SSE and seven SSEUP.
1961 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
1962 QualType ET = getContext().getCanonicalType(CT->getElementType());
1964 uint64_t Size = getContext().getTypeSize(Ty);
1965 if (ET->isIntegralOrEnumerationType()) {
1968 else if (Size <= 128)
1970 } else if (ET == getContext().FloatTy)
1972 else if (ET == getContext().DoubleTy ||
1973 (ET == getContext().LongDoubleTy &&
1974 getTarget().getTriple().isOSNaCl()))
1976 else if (ET == getContext().LongDoubleTy)
1977 Current = ComplexX87;
1979 // If this complex type crosses an eightbyte boundary then it
1981 uint64_t EB_Real = (OffsetBase) / 64;
1982 uint64_t EB_Imag = (OffsetBase + getContext().getTypeSize(ET)) / 64;
1983 if (Hi == NoClass && EB_Real != EB_Imag)
1989 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
1990 // Arrays are treated like structures.
1992 uint64_t Size = getContext().getTypeSize(Ty);
1994 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
1995 // than four eightbytes, ..., it has class MEMORY.
1999 // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
2000 // fields, it has class MEMORY.
2002 // Only need to check alignment of array base.
2003 if (OffsetBase % getContext().getTypeAlign(AT->getElementType()))
2006 // Otherwise implement simplified merge. We could be smarter about
2007 // this, but it isn't worth it and would be harder to verify.
2009 uint64_t EltSize = getContext().getTypeSize(AT->getElementType());
2010 uint64_t ArraySize = AT->getSize().getZExtValue();
2012 // The only case a 256-bit wide vector could be used is when the array
2013 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
2014 // to work for sizes wider than 128, early check and fallback to memory.
2015 if (Size > 128 && EltSize != 256)
2018 for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
2019 Class FieldLo, FieldHi;
2020 classify(AT->getElementType(), Offset, FieldLo, FieldHi, isNamedArg);
2021 Lo = merge(Lo, FieldLo);
2022 Hi = merge(Hi, FieldHi);
2023 if (Lo == Memory || Hi == Memory)
2027 postMerge(Size, Lo, Hi);
2028 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
2032 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2033 uint64_t Size = getContext().getTypeSize(Ty);
2035 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
2036 // than four eightbytes, ..., it has class MEMORY.
2040 // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
2041 // copy constructor or a non-trivial destructor, it is passed by invisible
2043 if (getRecordArgABI(RT, getCXXABI()))
2046 const RecordDecl *RD = RT->getDecl();
2048 // Assume variable sized types are passed in memory.
2049 if (RD->hasFlexibleArrayMember())
2052 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
2054 // Reset Lo class, this will be recomputed.
2057 // If this is a C++ record, classify the bases first.
2058 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
2059 for (const auto &I : CXXRD->bases()) {
2060 assert(!I.isVirtual() && !I.getType()->isDependentType() &&
2061 "Unexpected base class!");
2062 const CXXRecordDecl *Base =
2063 cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl());
2065 // Classify this field.
2067 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
2068 // single eightbyte, each is classified separately. Each eightbyte gets
2069 // initialized to class NO_CLASS.
2070 Class FieldLo, FieldHi;
2072 OffsetBase + getContext().toBits(Layout.getBaseClassOffset(Base));
2073 classify(I.getType(), Offset, FieldLo, FieldHi, isNamedArg);
2074 Lo = merge(Lo, FieldLo);
2075 Hi = merge(Hi, FieldHi);
2076 if (Lo == Memory || Hi == Memory)
2081 // Classify the fields one at a time, merging the results.
2083 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2084 i != e; ++i, ++idx) {
2085 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
2086 bool BitField = i->isBitField();
2088 // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger than
2089 // four eightbytes, or it contains unaligned fields, it has class MEMORY.
2091 // The only case a 256-bit wide vector could be used is when the struct
2092 // contains a single 256-bit element. Since Lo and Hi logic isn't extended
2093 // to work for sizes wider than 128, early check and fallback to memory.
2095 if (Size > 128 && getContext().getTypeSize(i->getType()) != 256) {
2099 // Note, skip this test for bit-fields, see below.
2100 if (!BitField && Offset % getContext().getTypeAlign(i->getType())) {
2105 // Classify this field.
2107 // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
2108 // exceeds a single eightbyte, each is classified
2109 // separately. Each eightbyte gets initialized to class
2111 Class FieldLo, FieldHi;
2113 // Bit-fields require special handling, they do not force the
2114 // structure to be passed in memory even if unaligned, and
2115 // therefore they can straddle an eightbyte.
2117 // Ignore padding bit-fields.
2118 if (i->isUnnamedBitfield())
2121 uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
2122 uint64_t Size = i->getBitWidthValue(getContext());
2124 uint64_t EB_Lo = Offset / 64;
2125 uint64_t EB_Hi = (Offset + Size - 1) / 64;
2128 assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
2133 FieldHi = EB_Hi ? Integer : NoClass;
2136 classify(i->getType(), Offset, FieldLo, FieldHi, isNamedArg);
2137 Lo = merge(Lo, FieldLo);
2138 Hi = merge(Hi, FieldHi);
2139 if (Lo == Memory || Hi == Memory)
2143 postMerge(Size, Lo, Hi);
2147 ABIArgInfo X86_64ABIInfo::getIndirectReturnResult(QualType Ty) const {
2148 // If this is a scalar LLVM value then assume LLVM will pass it in the right
2150 if (!isAggregateTypeForABI(Ty)) {
2151 // Treat an enum type as its underlying type.
2152 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2153 Ty = EnumTy->getDecl()->getIntegerType();
2155 return (Ty->isPromotableIntegerType() ?
2156 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2159 return ABIArgInfo::getIndirect(0);
2162 bool X86_64ABIInfo::IsIllegalVectorType(QualType Ty) const {
2163 if (const VectorType *VecTy = Ty->getAs<VectorType>()) {
2164 uint64_t Size = getContext().getTypeSize(VecTy);
2165 unsigned LargestVector = getNativeVectorSizeForAVXABI(AVXLevel);
2166 if (Size <= 64 || Size > LargestVector)
2173 ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
2174 unsigned freeIntRegs) const {
2175 // If this is a scalar LLVM value then assume LLVM will pass it in the right
2178 // This assumption is optimistic, as there could be free registers available
2179 // when we need to pass this argument in memory, and LLVM could try to pass
2180 // the argument in the free register. This does not seem to happen currently,
2181 // but this code would be much safer if we could mark the argument with
2182 // 'onstack'. See PR12193.
2183 if (!isAggregateTypeForABI(Ty) && !IsIllegalVectorType(Ty)) {
2184 // Treat an enum type as its underlying type.
2185 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2186 Ty = EnumTy->getDecl()->getIntegerType();
2188 return (Ty->isPromotableIntegerType() ?
2189 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
2192 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
2193 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
2195 // Compute the byval alignment. We specify the alignment of the byval in all
2196 // cases so that the mid-level optimizer knows the alignment of the byval.
2197 unsigned Align = std::max(getContext().getTypeAlign(Ty) / 8, 8U);
2199 // Attempt to avoid passing indirect results using byval when possible. This
2200 // is important for good codegen.
2202 // We do this by coercing the value into a scalar type which the backend can
2203 // handle naturally (i.e., without using byval).
2205 // For simplicity, we currently only do this when we have exhausted all of the
2206 // free integer registers. Doing this when there are free integer registers
2207 // would require more care, as we would have to ensure that the coerced value
2208 // did not claim the unused register. That would require either reording the
2209 // arguments to the function (so that any subsequent inreg values came first),
2210 // or only doing this optimization when there were no following arguments that
2213 // We currently expect it to be rare (particularly in well written code) for
2214 // arguments to be passed on the stack when there are still free integer
2215 // registers available (this would typically imply large structs being passed
2216 // by value), so this seems like a fair tradeoff for now.
2218 // We can revisit this if the backend grows support for 'onstack' parameter
2219 // attributes. See PR12193.
2220 if (freeIntRegs == 0) {
2221 uint64_t Size = getContext().getTypeSize(Ty);
2223 // If this type fits in an eightbyte, coerce it into the matching integral
2224 // type, which will end up on the stack (with alignment 8).
2225 if (Align == 8 && Size <= 64)
2226 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
2230 return ABIArgInfo::getIndirect(Align);
2233 /// The ABI specifies that a value should be passed in a full vector XMM/YMM
2234 /// register. Pick an LLVM IR type that will be passed as a vector register.
2235 llvm::Type *X86_64ABIInfo::GetByteVectorType(QualType Ty) const {
2236 // Wrapper structs/arrays that only contain vectors are passed just like
2237 // vectors; strip them off if present.
2238 if (const Type *InnerTy = isSingleElementStruct(Ty, getContext()))
2239 Ty = QualType(InnerTy, 0);
2241 llvm::Type *IRType = CGT.ConvertType(Ty);
2242 if(isa<llvm::VectorType>(IRType))
2245 // We couldn't find the preferred IR vector type for 'Ty'.
2246 uint64_t Size = getContext().getTypeSize(Ty);
2247 assert((Size == 128 || Size == 256) && "Invalid type found!");
2249 // Return a LLVM IR vector type based on the size of 'Ty'.
2250 return llvm::VectorType::get(llvm::Type::getDoubleTy(getVMContext()),
2254 /// BitsContainNoUserData - Return true if the specified [start,end) bit range
2255 /// is known to either be off the end of the specified type or being in
2256 /// alignment padding. The user type specified is known to be at most 128 bits
2257 /// in size, and have passed through X86_64ABIInfo::classify with a successful
2258 /// classification that put one of the two halves in the INTEGER class.
2260 /// It is conservatively correct to return false.
2261 static bool BitsContainNoUserData(QualType Ty, unsigned StartBit,
2262 unsigned EndBit, ASTContext &Context) {
2263 // If the bytes being queried are off the end of the type, there is no user
2264 // data hiding here. This handles analysis of builtins, vectors and other
2265 // types that don't contain interesting padding.
2266 unsigned TySize = (unsigned)Context.getTypeSize(Ty);
2267 if (TySize <= StartBit)
2270 if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
2271 unsigned EltSize = (unsigned)Context.getTypeSize(AT->getElementType());
2272 unsigned NumElts = (unsigned)AT->getSize().getZExtValue();
2274 // Check each element to see if the element overlaps with the queried range.
2275 for (unsigned i = 0; i != NumElts; ++i) {
2276 // If the element is after the span we care about, then we're done..
2277 unsigned EltOffset = i*EltSize;
2278 if (EltOffset >= EndBit) break;
2280 unsigned EltStart = EltOffset < StartBit ? StartBit-EltOffset :0;
2281 if (!BitsContainNoUserData(AT->getElementType(), EltStart,
2282 EndBit-EltOffset, Context))
2285 // If it overlaps no elements, then it is safe to process as padding.
2289 if (const RecordType *RT = Ty->getAs<RecordType>()) {
2290 const RecordDecl *RD = RT->getDecl();
2291 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
2293 // If this is a C++ record, check the bases first.
2294 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
2295 for (const auto &I : CXXRD->bases()) {
2296 assert(!I.isVirtual() && !I.getType()->isDependentType() &&
2297 "Unexpected base class!");
2298 const CXXRecordDecl *Base =
2299 cast<CXXRecordDecl>(I.getType()->getAs<RecordType>()->getDecl());
2301 // If the base is after the span we care about, ignore it.
2302 unsigned BaseOffset = Context.toBits(Layout.getBaseClassOffset(Base));
2303 if (BaseOffset >= EndBit) continue;
2305 unsigned BaseStart = BaseOffset < StartBit ? StartBit-BaseOffset :0;
2306 if (!BitsContainNoUserData(I.getType(), BaseStart,
2307 EndBit-BaseOffset, Context))
2312 // Verify that no field has data that overlaps the region of interest. Yes
2313 // this could be sped up a lot by being smarter about queried fields,
2314 // however we're only looking at structs up to 16 bytes, so we don't care
2317 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
2318 i != e; ++i, ++idx) {
2319 unsigned FieldOffset = (unsigned)Layout.getFieldOffset(idx);
2321 // If we found a field after the region we care about, then we're done.
2322 if (FieldOffset >= EndBit) break;
2324 unsigned FieldStart = FieldOffset < StartBit ? StartBit-FieldOffset :0;
2325 if (!BitsContainNoUserData(i->getType(), FieldStart, EndBit-FieldOffset,
2330 // If nothing in this record overlapped the area of interest, then we're
2338 /// ContainsFloatAtOffset - Return true if the specified LLVM IR type has a
2339 /// float member at the specified offset. For example, {int,{float}} has a
2340 /// float at offset 4. It is conservatively correct for this routine to return
2342 static bool ContainsFloatAtOffset(llvm::Type *IRType, unsigned IROffset,
2343 const llvm::DataLayout &TD) {
2344 // Base case if we find a float.
2345 if (IROffset == 0 && IRType->isFloatTy())
2348 // If this is a struct, recurse into the field at the specified offset.
2349 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
2350 const llvm::StructLayout *SL = TD.getStructLayout(STy);
2351 unsigned Elt = SL->getElementContainingOffset(IROffset);
2352 IROffset -= SL->getElementOffset(Elt);
2353 return ContainsFloatAtOffset(STy->getElementType(Elt), IROffset, TD);
2356 // If this is an array, recurse into the field at the specified offset.
2357 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
2358 llvm::Type *EltTy = ATy->getElementType();
2359 unsigned EltSize = TD.getTypeAllocSize(EltTy);
2360 IROffset -= IROffset/EltSize*EltSize;
2361 return ContainsFloatAtOffset(EltTy, IROffset, TD);
2368 /// GetSSETypeAtOffset - Return a type that will be passed by the backend in the
2369 /// low 8 bytes of an XMM register, corresponding to the SSE class.
2370 llvm::Type *X86_64ABIInfo::
2371 GetSSETypeAtOffset(llvm::Type *IRType, unsigned IROffset,
2372 QualType SourceTy, unsigned SourceOffset) const {
2373 // The only three choices we have are either double, <2 x float>, or float. We
2374 // pass as float if the last 4 bytes is just padding. This happens for
2375 // structs that contain 3 floats.
2376 if (BitsContainNoUserData(SourceTy, SourceOffset*8+32,
2377 SourceOffset*8+64, getContext()))
2378 return llvm::Type::getFloatTy(getVMContext());
2380 // We want to pass as <2 x float> if the LLVM IR type contains a float at
2381 // offset+0 and offset+4. Walk the LLVM IR type to find out if this is the
2383 if (ContainsFloatAtOffset(IRType, IROffset, getDataLayout()) &&
2384 ContainsFloatAtOffset(IRType, IROffset+4, getDataLayout()))
2385 return llvm::VectorType::get(llvm::Type::getFloatTy(getVMContext()), 2);
2387 return llvm::Type::getDoubleTy(getVMContext());
2391 /// GetINTEGERTypeAtOffset - The ABI specifies that a value should be passed in
2392 /// an 8-byte GPR. This means that we either have a scalar or we are talking
2393 /// about the high or low part of an up-to-16-byte struct. This routine picks
2394 /// the best LLVM IR type to represent this, which may be i64 or may be anything
2395 /// else that the backend will pass in a GPR that works better (e.g. i8, %foo*,
2398 /// PrefType is an LLVM IR type that corresponds to (part of) the IR type for
2399 /// the source type. IROffset is an offset in bytes into the LLVM IR type that
2400 /// the 8-byte value references. PrefType may be null.
2402 /// SourceTy is the source-level type for the entire argument. SourceOffset is
2403 /// an offset into this that we're processing (which is always either 0 or 8).
2405 llvm::Type *X86_64ABIInfo::
2406 GetINTEGERTypeAtOffset(llvm::Type *IRType, unsigned IROffset,
2407 QualType SourceTy, unsigned SourceOffset) const {
2408 // If we're dealing with an un-offset LLVM IR type, then it means that we're
2409 // returning an 8-byte unit starting with it. See if we can safely use it.
2410 if (IROffset == 0) {
2411 // Pointers and int64's always fill the 8-byte unit.
2412 if ((isa<llvm::PointerType>(IRType) && Has64BitPointers) ||
2413 IRType->isIntegerTy(64))
2416 // If we have a 1/2/4-byte integer, we can use it only if the rest of the
2417 // goodness in the source type is just tail padding. This is allowed to
2418 // kick in for struct {double,int} on the int, but not on
2419 // struct{double,int,int} because we wouldn't return the second int. We
2420 // have to do this analysis on the source type because we can't depend on
2421 // unions being lowered a specific way etc.
2422 if (IRType->isIntegerTy(8) || IRType->isIntegerTy(16) ||
2423 IRType->isIntegerTy(32) ||
2424 (isa<llvm::PointerType>(IRType) && !Has64BitPointers)) {
2425 unsigned BitWidth = isa<llvm::PointerType>(IRType) ? 32 :
2426 cast<llvm::IntegerType>(IRType)->getBitWidth();
2428 if (BitsContainNoUserData(SourceTy, SourceOffset*8+BitWidth,
2429 SourceOffset*8+64, getContext()))
2434 if (llvm::StructType *STy = dyn_cast<llvm::StructType>(IRType)) {
2435 // If this is a struct, recurse into the field at the specified offset.
2436 const llvm::StructLayout *SL = getDataLayout().getStructLayout(STy);
2437 if (IROffset < SL->getSizeInBytes()) {
2438 unsigned FieldIdx = SL->getElementContainingOffset(IROffset);
2439 IROffset -= SL->getElementOffset(FieldIdx);
2441 return GetINTEGERTypeAtOffset(STy->getElementType(FieldIdx), IROffset,
2442 SourceTy, SourceOffset);
2446 if (llvm::ArrayType *ATy = dyn_cast<llvm::ArrayType>(IRType)) {
2447 llvm::Type *EltTy = ATy->getElementType();
2448 unsigned EltSize = getDataLayout().getTypeAllocSize(EltTy);
2449 unsigned EltOffset = IROffset/EltSize*EltSize;
2450 return GetINTEGERTypeAtOffset(EltTy, IROffset-EltOffset, SourceTy,
2454 // Okay, we don't have any better idea of what to pass, so we pass this in an
2455 // integer register that isn't too big to fit the rest of the struct.
2456 unsigned TySizeInBytes =
2457 (unsigned)getContext().getTypeSizeInChars(SourceTy).getQuantity();
2459 assert(TySizeInBytes != SourceOffset && "Empty field?");
2461 // It is always safe to classify this as an integer type up to i64 that
2462 // isn't larger than the structure.
2463 return llvm::IntegerType::get(getVMContext(),
2464 std::min(TySizeInBytes-SourceOffset, 8U)*8);
2468 /// GetX86_64ByValArgumentPair - Given a high and low type that can ideally
2469 /// be used as elements of a two register pair to pass or return, return a
2470 /// first class aggregate to represent them. For example, if the low part of
2471 /// a by-value argument should be passed as i32* and the high part as float,
2472 /// return {i32*, float}.
2474 GetX86_64ByValArgumentPair(llvm::Type *Lo, llvm::Type *Hi,
2475 const llvm::DataLayout &TD) {
2476 // In order to correctly satisfy the ABI, we need to the high part to start
2477 // at offset 8. If the high and low parts we inferred are both 4-byte types
2478 // (e.g. i32 and i32) then the resultant struct type ({i32,i32}) won't have
2479 // the second element at offset 8. Check for this:
2480 unsigned LoSize = (unsigned)TD.getTypeAllocSize(Lo);
2481 unsigned HiAlign = TD.getABITypeAlignment(Hi);
2482 unsigned HiStart = llvm::RoundUpToAlignment(LoSize, HiAlign);
2483 assert(HiStart != 0 && HiStart <= 8 && "Invalid x86-64 argument pair!");
2485 // To handle this, we have to increase the size of the low part so that the
2486 // second element will start at an 8 byte offset. We can't increase the size
2487 // of the second element because it might make us access off the end of the
2490 // There are usually two sorts of types the ABI generation code can produce
2491 // for the low part of a pair that aren't 8 bytes in size: float or
2492 // i8/i16/i32. This can also include pointers when they are 32-bit (X32 and
2494 // Promote these to a larger type.
2495 if (Lo->isFloatTy())
2496 Lo = llvm::Type::getDoubleTy(Lo->getContext());
2498 assert((Lo->isIntegerTy() || Lo->isPointerTy())
2499 && "Invalid/unknown lo type");
2500 Lo = llvm::Type::getInt64Ty(Lo->getContext());
2504 llvm::StructType *Result = llvm::StructType::get(Lo, Hi, nullptr);
2507 // Verify that the second element is at an 8-byte offset.
2508 assert(TD.getStructLayout(Result)->getElementOffset(1) == 8 &&
2509 "Invalid x86-64 argument pair!");
2513 ABIArgInfo X86_64ABIInfo::
2514 classifyReturnType(QualType RetTy) const {
2515 // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
2516 // classification algorithm.
2517 X86_64ABIInfo::Class Lo, Hi;
2518 classify(RetTy, 0, Lo, Hi, /*isNamedArg*/ true);
2520 // Check some invariants.
2521 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2522 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2524 llvm::Type *ResType = nullptr;
2528 return ABIArgInfo::getIgnore();
2529 // If the low part is just padding, it takes no register, leave ResType
2531 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2532 "Unknown missing lo part");
2537 llvm_unreachable("Invalid classification for lo word.");
2539 // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
2542 return getIndirectReturnResult(RetTy);
2544 // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
2545 // available register of the sequence %rax, %rdx is used.
2547 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2549 // If we have a sign or zero extended integer, make sure to return Extend
2550 // so that the parameter gets the right LLVM IR attributes.
2551 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2552 // Treat an enum type as its underlying type.
2553 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
2554 RetTy = EnumTy->getDecl()->getIntegerType();
2556 if (RetTy->isIntegralOrEnumerationType() &&
2557 RetTy->isPromotableIntegerType())
2558 return ABIArgInfo::getExtend();
2562 // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
2563 // available SSE register of the sequence %xmm0, %xmm1 is used.
2565 ResType = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 0, RetTy, 0);
2568 // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
2569 // returned on the X87 stack in %st0 as 80-bit x87 number.
2571 ResType = llvm::Type::getX86_FP80Ty(getVMContext());
2574 // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
2575 // part of the value is returned in %st0 and the imaginary part in
2578 assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
2579 ResType = llvm::StructType::get(llvm::Type::getX86_FP80Ty(getVMContext()),
2580 llvm::Type::getX86_FP80Ty(getVMContext()),
2585 llvm::Type *HighPart = nullptr;
2587 // Memory was handled previously and X87 should
2588 // never occur as a hi class.
2591 llvm_unreachable("Invalid classification for hi word.");
2593 case ComplexX87: // Previously handled.
2598 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2599 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2600 return ABIArgInfo::getDirect(HighPart, 8);
2603 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2604 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2605 return ABIArgInfo::getDirect(HighPart, 8);
2608 // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
2609 // is passed in the next available eightbyte chunk if the last used
2612 // SSEUP should always be preceded by SSE, just widen.
2614 assert(Lo == SSE && "Unexpected SSEUp classification.");
2615 ResType = GetByteVectorType(RetTy);
2618 // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
2619 // returned together with the previous X87 value in %st0.
2621 // If X87Up is preceded by X87, we don't need to do
2622 // anything. However, in some cases with unions it may not be
2623 // preceded by X87. In such situations we follow gcc and pass the
2624 // extra bits in an SSE reg.
2626 HighPart = GetSSETypeAtOffset(CGT.ConvertType(RetTy), 8, RetTy, 8);
2627 if (Lo == NoClass) // Return HighPart at offset 8 in memory.
2628 return ABIArgInfo::getDirect(HighPart, 8);
2633 // If a high part was specified, merge it together with the low part. It is
2634 // known to pass in the high eightbyte of the result. We do this by forming a
2635 // first class struct aggregate with the high and low part: {low, high}
2637 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
2639 return ABIArgInfo::getDirect(ResType);
2642 ABIArgInfo X86_64ABIInfo::classifyArgumentType(
2643 QualType Ty, unsigned freeIntRegs, unsigned &neededInt, unsigned &neededSSE,
2647 Ty = useFirstFieldIfTransparentUnion(Ty);
2649 X86_64ABIInfo::Class Lo, Hi;
2650 classify(Ty, 0, Lo, Hi, isNamedArg);
2652 // Check some invariants.
2653 // FIXME: Enforce these by construction.
2654 assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
2655 assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
2659 llvm::Type *ResType = nullptr;
2663 return ABIArgInfo::getIgnore();
2664 // If the low part is just padding, it takes no register, leave ResType
2666 assert((Hi == SSE || Hi == Integer || Hi == X87Up) &&
2667 "Unknown missing lo part");
2670 // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
2674 // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
2675 // COMPLEX_X87, it is passed in memory.
2678 if (getRecordArgABI(Ty, getCXXABI()) == CGCXXABI::RAA_Indirect)
2680 return getIndirectResult(Ty, freeIntRegs);
2684 llvm_unreachable("Invalid classification for lo word.");
2686 // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
2687 // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
2692 // Pick an 8-byte type based on the preferred type.
2693 ResType = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 0, Ty, 0);
2695 // If we have a sign or zero extended integer, make sure to return Extend
2696 // so that the parameter gets the right LLVM IR attributes.
2697 if (Hi == NoClass && isa<llvm::IntegerType>(ResType)) {
2698 // Treat an enum type as its underlying type.
2699 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
2700 Ty = EnumTy->getDecl()->getIntegerType();
2702 if (Ty->isIntegralOrEnumerationType() &&
2703 Ty->isPromotableIntegerType())
2704 return ABIArgInfo::getExtend();
2709 // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
2710 // available SSE register is used, the registers are taken in the
2711 // order from %xmm0 to %xmm7.
2713 llvm::Type *IRType = CGT.ConvertType(Ty);
2714 ResType = GetSSETypeAtOffset(IRType, 0, Ty, 0);
2720 llvm::Type *HighPart = nullptr;
2722 // Memory was handled previously, ComplexX87 and X87 should
2723 // never occur as hi classes, and X87Up must be preceded by X87,
2724 // which is passed in memory.
2728 llvm_unreachable("Invalid classification for hi word.");
2730 case NoClass: break;
2734 // Pick an 8-byte type based on the preferred type.
2735 HighPart = GetINTEGERTypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2737 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2738 return ABIArgInfo::getDirect(HighPart, 8);
2741 // X87Up generally doesn't occur here (long double is passed in
2742 // memory), except in situations involving unions.
2745 HighPart = GetSSETypeAtOffset(CGT.ConvertType(Ty), 8, Ty, 8);
2747 if (Lo == NoClass) // Pass HighPart at offset 8 in memory.
2748 return ABIArgInfo::getDirect(HighPart, 8);
2753 // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
2754 // eightbyte is passed in the upper half of the last used SSE
2755 // register. This only happens when 128-bit vectors are passed.
2757 assert(Lo == SSE && "Unexpected SSEUp classification");
2758 ResType = GetByteVectorType(Ty);
2762 // If a high part was specified, merge it together with the low part. It is
2763 // known to pass in the high eightbyte of the result. We do this by forming a
2764 // first class struct aggregate with the high and low part: {low, high}
2766 ResType = GetX86_64ByValArgumentPair(ResType, HighPart, getDataLayout());
2768 return ABIArgInfo::getDirect(ResType);
2771 void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
2773 if (!getCXXABI().classifyReturnType(FI))
2774 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
2776 // Keep track of the number of assigned registers.
2777 unsigned freeIntRegs = 6, freeSSERegs = 8;
2779 // If the return value is indirect, then the hidden argument is consuming one
2780 // integer register.
2781 if (FI.getReturnInfo().isIndirect())
2784 // The chain argument effectively gives us another free register.
2785 if (FI.isChainCall())
2788 unsigned NumRequiredArgs = FI.getNumRequiredArgs();
2789 // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
2790 // get assigned (in left-to-right order) for passing as follows...
2792 for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
2793 it != ie; ++it, ++ArgNo) {
2794 bool IsNamedArg = ArgNo < NumRequiredArgs;
2796 unsigned neededInt, neededSSE;
2797 it->info = classifyArgumentType(it->type, freeIntRegs, neededInt,
2798 neededSSE, IsNamedArg);
2800 // AMD64-ABI 3.2.3p3: If there are no registers available for any
2801 // eightbyte of an argument, the whole argument is passed on the
2802 // stack. If registers have already been assigned for some
2803 // eightbytes of such an argument, the assignments get reverted.
2804 if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
2805 freeIntRegs -= neededInt;
2806 freeSSERegs -= neededSSE;
2808 it->info = getIndirectResult(it->type, freeIntRegs);
2813 static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
2815 CodeGenFunction &CGF) {
2816 llvm::Value *overflow_arg_area_p = CGF.Builder.CreateStructGEP(
2817 nullptr, VAListAddr, 2, "overflow_arg_area_p");
2818 llvm::Value *overflow_arg_area =
2819 CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
2821 // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
2822 // byte boundary if alignment needed by type exceeds 8 byte boundary.
2823 // It isn't stated explicitly in the standard, but in practice we use
2824 // alignment greater than 16 where necessary.
2825 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
2827 // overflow_arg_area = (overflow_arg_area + align - 1) & -align;
2828 llvm::Value *Offset =
2829 llvm::ConstantInt::get(CGF.Int64Ty, Align - 1);
2830 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
2831 llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
2833 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, -(uint64_t)Align);
2835 CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
2836 overflow_arg_area->getType(),
2837 "overflow_arg_area.align");
2840 // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
2841 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2843 CGF.Builder.CreateBitCast(overflow_arg_area,
2844 llvm::PointerType::getUnqual(LTy));
2846 // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
2847 // l->overflow_arg_area + sizeof(type).
2848 // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
2849 // an 8 byte boundary.
2851 uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
2852 llvm::Value *Offset =
2853 llvm::ConstantInt::get(CGF.Int32Ty, (SizeInBytes + 7) & ~7);
2854 overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
2855 "overflow_arg_area.next");
2856 CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
2858 // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
2862 llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
2863 CodeGenFunction &CGF) const {
2864 // Assume that va_list type is correct; should be pointer to LLVM type:
2868 // i8* overflow_arg_area;
2869 // i8* reg_save_area;
2871 unsigned neededInt, neededSSE;
2873 Ty = CGF.getContext().getCanonicalType(Ty);
2874 ABIArgInfo AI = classifyArgumentType(Ty, 0, neededInt, neededSSE,
2875 /*isNamedArg*/false);
2877 // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
2878 // in the registers. If not go to step 7.
2879 if (!neededInt && !neededSSE)
2880 return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
2882 // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
2883 // general purpose registers needed to pass type and num_fp to hold
2884 // the number of floating point registers needed.
2886 // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
2887 // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
2888 // l->fp_offset > 304 - num_fp * 16 go to step 7.
2890 // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
2891 // register save space).
2893 llvm::Value *InRegs = nullptr;
2894 llvm::Value *gp_offset_p = nullptr, *gp_offset = nullptr;
2895 llvm::Value *fp_offset_p = nullptr, *fp_offset = nullptr;
2898 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "gp_offset_p");
2899 gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
2900 InRegs = llvm::ConstantInt::get(CGF.Int32Ty, 48 - neededInt * 8);
2901 InRegs = CGF.Builder.CreateICmpULE(gp_offset, InRegs, "fits_in_gp");
2906 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 1, "fp_offset_p");
2907 fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
2908 llvm::Value *FitsInFP =
2909 llvm::ConstantInt::get(CGF.Int32Ty, 176 - neededSSE * 16);
2910 FitsInFP = CGF.Builder.CreateICmpULE(fp_offset, FitsInFP, "fits_in_fp");
2911 InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
2914 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
2915 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
2916 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
2917 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
2919 // Emit code to load the value if it was passed in registers.
2921 CGF.EmitBlock(InRegBlock);
2923 // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
2924 // an offset of l->gp_offset and/or l->fp_offset. This may require
2925 // copying to a temporary location in case the parameter is passed
2926 // in different register classes or requires an alignment greater
2927 // than 8 for general purpose registers and 16 for XMM registers.
2929 // FIXME: This really results in shameful code when we end up needing to
2930 // collect arguments from different places; often what should result in a
2931 // simple assembling of a structure from scattered addresses has many more
2932 // loads than necessary. Can we clean this up?
2933 llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
2934 llvm::Value *RegAddr = CGF.Builder.CreateLoad(
2935 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3), "reg_save_area");
2936 if (neededInt && neededSSE) {
2938 assert(AI.isDirect() && "Unexpected ABI info for mixed regs");
2939 llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
2940 llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
2941 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
2942 assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
2943 llvm::Type *TyLo = ST->getElementType(0);
2944 llvm::Type *TyHi = ST->getElementType(1);
2945 assert((TyLo->isFPOrFPVectorTy() ^ TyHi->isFPOrFPVectorTy()) &&
2946 "Unexpected ABI info for mixed regs");
2947 llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
2948 llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
2949 llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2950 llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2951 llvm::Value *RegLoAddr = TyLo->isFPOrFPVectorTy() ? FPAddr : GPAddr;
2952 llvm::Value *RegHiAddr = TyLo->isFPOrFPVectorTy() ? GPAddr : FPAddr;
2954 CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
2955 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0));
2956 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
2957 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1));
2959 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2960 llvm::PointerType::getUnqual(LTy));
2961 } else if (neededInt) {
2962 RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
2963 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2964 llvm::PointerType::getUnqual(LTy));
2966 // Copy to a temporary if necessary to ensure the appropriate alignment.
2967 std::pair<CharUnits, CharUnits> SizeAlign =
2968 CGF.getContext().getTypeInfoInChars(Ty);
2969 uint64_t TySize = SizeAlign.first.getQuantity();
2970 unsigned TyAlign = SizeAlign.second.getQuantity();
2972 llvm::Value *Tmp = CGF.CreateMemTemp(Ty);
2973 CGF.Builder.CreateMemCpy(Tmp, RegAddr, TySize, 8, false);
2976 } else if (neededSSE == 1) {
2977 RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2978 RegAddr = CGF.Builder.CreateBitCast(RegAddr,
2979 llvm::PointerType::getUnqual(LTy));
2981 assert(neededSSE == 2 && "Invalid number of needed registers!");
2982 // SSE registers are spaced 16 bytes apart in the register save
2983 // area, we need to collect the two eightbytes together.
2984 llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
2985 llvm::Value *RegAddrHi = CGF.Builder.CreateConstGEP1_32(RegAddrLo, 16);
2986 llvm::Type *DoubleTy = CGF.DoubleTy;
2987 llvm::Type *DblPtrTy =
2988 llvm::PointerType::getUnqual(DoubleTy);
2989 llvm::StructType *ST = llvm::StructType::get(DoubleTy, DoubleTy, nullptr);
2990 llvm::Value *V, *Tmp = CGF.CreateMemTemp(Ty);
2991 Tmp = CGF.Builder.CreateBitCast(Tmp, ST->getPointerTo());
2992 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
2994 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 0));
2995 V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
2997 CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(ST, Tmp, 1));
2998 RegAddr = CGF.Builder.CreateBitCast(Tmp,
2999 llvm::PointerType::getUnqual(LTy));
3002 // AMD64-ABI 3.5.7p5: Step 5. Set:
3003 // l->gp_offset = l->gp_offset + num_gp * 8
3004 // l->fp_offset = l->fp_offset + num_fp * 16.
3006 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededInt * 8);
3007 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
3011 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, neededSSE * 16);
3012 CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
3015 CGF.EmitBranch(ContBlock);
3017 // Emit code to load the value if it was passed in memory.
3019 CGF.EmitBlock(InMemBlock);
3020 llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
3022 // Return the appropriate result.
3024 CGF.EmitBlock(ContBlock);
3025 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(), 2,
3027 ResAddr->addIncoming(RegAddr, InRegBlock);
3028 ResAddr->addIncoming(MemAddr, InMemBlock);
3032 ABIArgInfo WinX86_64ABIInfo::classify(QualType Ty, unsigned &FreeSSERegs,
3033 bool IsReturnType) const {
3035 if (Ty->isVoidType())
3036 return ABIArgInfo::getIgnore();
3038 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3039 Ty = EnumTy->getDecl()->getIntegerType();
3041 TypeInfo Info = getContext().getTypeInfo(Ty);
3042 uint64_t Width = Info.Width;
3043 unsigned Align = getContext().toCharUnitsFromBits(Info.Align).getQuantity();
3045 const RecordType *RT = Ty->getAs<RecordType>();
3047 if (!IsReturnType) {
3048 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(RT, getCXXABI()))
3049 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
3052 if (RT->getDecl()->hasFlexibleArrayMember())
3053 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3055 // FIXME: mingw-w64-gcc emits 128-bit struct as i128
3056 if (Width == 128 && getTarget().getTriple().isWindowsGNUEnvironment())
3057 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
3061 // vectorcall adds the concept of a homogenous vector aggregate, similar to
3063 const Type *Base = nullptr;
3064 uint64_t NumElts = 0;
3065 if (FreeSSERegs && isHomogeneousAggregate(Ty, Base, NumElts)) {
3066 if (FreeSSERegs >= NumElts) {
3067 FreeSSERegs -= NumElts;
3068 if (IsReturnType || Ty->isBuiltinType() || Ty->isVectorType())
3069 return ABIArgInfo::getDirect();
3070 return ABIArgInfo::getExpand();
3072 return ABIArgInfo::getIndirect(Align, /*ByVal=*/false);
3076 if (Ty->isMemberPointerType()) {
3077 // If the member pointer is represented by an LLVM int or ptr, pass it
3079 llvm::Type *LLTy = CGT.ConvertType(Ty);
3080 if (LLTy->isPointerTy() || LLTy->isIntegerTy())
3081 return ABIArgInfo::getDirect();
3084 if (RT || Ty->isAnyComplexType() || Ty->isMemberPointerType()) {
3085 // MS x64 ABI requirement: "Any argument that doesn't fit in 8 bytes, or is
3086 // not 1, 2, 4, or 8 bytes, must be passed by reference."
3087 if (Width > 64 || !llvm::isPowerOf2_64(Width))
3088 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3090 // Otherwise, coerce it to a small integer.
3091 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Width));
3094 // Bool type is always extended to the ABI, other builtin types are not
3096 const BuiltinType *BT = Ty->getAs<BuiltinType>();
3097 if (BT && BT->getKind() == BuiltinType::Bool)
3098 return ABIArgInfo::getExtend();
3100 return ABIArgInfo::getDirect();
3103 void WinX86_64ABIInfo::computeInfo(CGFunctionInfo &FI) const {
3105 FI.getCallingConvention() == llvm::CallingConv::X86_VectorCall;
3107 // We can use up to 4 SSE return registers with vectorcall.
3108 unsigned FreeSSERegs = IsVectorCall ? 4 : 0;
3109 if (!getCXXABI().classifyReturnType(FI))
3110 FI.getReturnInfo() = classify(FI.getReturnType(), FreeSSERegs, true);
3112 // We can use up to 6 SSE register parameters with vectorcall.
3113 FreeSSERegs = IsVectorCall ? 6 : 0;
3114 for (auto &I : FI.arguments())
3115 I.info = classify(I.type, FreeSSERegs, false);
3118 llvm::Value *WinX86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3119 CodeGenFunction &CGF) const {
3120 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3122 CGBuilderTy &Builder = CGF.Builder;
3123 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
3125 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3127 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3128 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
3131 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 8);
3132 llvm::Value *NextAddr =
3133 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
3135 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3142 /// PPC32_SVR4_ABIInfo - The 32-bit PowerPC ELF (SVR4) ABI information.
3143 class PPC32_SVR4_ABIInfo : public DefaultABIInfo {
3145 PPC32_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
3147 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3148 CodeGenFunction &CGF) const override;
3151 class PPC32TargetCodeGenInfo : public TargetCodeGenInfo {
3153 PPC32TargetCodeGenInfo(CodeGenTypes &CGT)
3154 : TargetCodeGenInfo(new PPC32_SVR4_ABIInfo(CGT)) {}
3156 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3157 // This is recovered from gcc output.
3158 return 1; // r1 is the dedicated stack pointer
3161 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3162 llvm::Value *Address) const override;
3167 llvm::Value *PPC32_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
3169 CodeGenFunction &CGF) const {
3170 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
3171 // TODO: Implement this. For now ignore.
3176 bool isI64 = Ty->isIntegerType() && getContext().getTypeSize(Ty) == 64;
3178 Ty->isIntegerType() || Ty->isPointerType() || Ty->isAggregateType();
3179 llvm::Type *CharPtr = CGF.Int8PtrTy;
3180 llvm::Type *CharPtrPtr = CGF.Int8PtrPtrTy;
3182 CGBuilderTy &Builder = CGF.Builder;
3183 llvm::Value *GPRPtr = Builder.CreateBitCast(VAListAddr, CharPtr, "gprptr");
3184 llvm::Value *GPRPtrAsInt = Builder.CreatePtrToInt(GPRPtr, CGF.Int32Ty);
3185 llvm::Value *FPRPtrAsInt =
3186 Builder.CreateAdd(GPRPtrAsInt, Builder.getInt32(1));
3187 llvm::Value *FPRPtr = Builder.CreateIntToPtr(FPRPtrAsInt, CharPtr);
3188 llvm::Value *OverflowAreaPtrAsInt =
3189 Builder.CreateAdd(FPRPtrAsInt, Builder.getInt32(3));
3190 llvm::Value *OverflowAreaPtr =
3191 Builder.CreateIntToPtr(OverflowAreaPtrAsInt, CharPtrPtr);
3192 llvm::Value *RegsaveAreaPtrAsInt =
3193 Builder.CreateAdd(OverflowAreaPtrAsInt, Builder.getInt32(4));
3194 llvm::Value *RegsaveAreaPtr =
3195 Builder.CreateIntToPtr(RegsaveAreaPtrAsInt, CharPtrPtr);
3196 llvm::Value *GPR = Builder.CreateLoad(GPRPtr, false, "gpr");
3197 // Align GPR when TY is i64.
3199 llvm::Value *GPRAnd = Builder.CreateAnd(GPR, Builder.getInt8(1));
3200 llvm::Value *CC64 = Builder.CreateICmpEQ(GPRAnd, Builder.getInt8(1));
3201 llvm::Value *GPRPlusOne = Builder.CreateAdd(GPR, Builder.getInt8(1));
3202 GPR = Builder.CreateSelect(CC64, GPRPlusOne, GPR);
3204 llvm::Value *FPR = Builder.CreateLoad(FPRPtr, false, "fpr");
3205 llvm::Value *OverflowArea =
3206 Builder.CreateLoad(OverflowAreaPtr, false, "overflow_area");
3207 llvm::Value *OverflowAreaAsInt =
3208 Builder.CreatePtrToInt(OverflowArea, CGF.Int32Ty);
3209 llvm::Value *RegsaveArea =
3210 Builder.CreateLoad(RegsaveAreaPtr, false, "regsave_area");
3211 llvm::Value *RegsaveAreaAsInt =
3212 Builder.CreatePtrToInt(RegsaveArea, CGF.Int32Ty);
3215 Builder.CreateICmpULT(isInt ? GPR : FPR, Builder.getInt8(8), "cond");
3217 llvm::Value *RegConstant =
3218 Builder.CreateMul(isInt ? GPR : FPR, Builder.getInt8(isInt ? 4 : 8));
3220 llvm::Value *OurReg = Builder.CreateAdd(
3221 RegsaveAreaAsInt, Builder.CreateSExt(RegConstant, CGF.Int32Ty));
3223 if (Ty->isFloatingType())
3224 OurReg = Builder.CreateAdd(OurReg, Builder.getInt32(32));
3226 llvm::BasicBlock *UsingRegs = CGF.createBasicBlock("using_regs");
3227 llvm::BasicBlock *UsingOverflow = CGF.createBasicBlock("using_overflow");
3228 llvm::BasicBlock *Cont = CGF.createBasicBlock("cont");
3230 Builder.CreateCondBr(CC, UsingRegs, UsingOverflow);
3232 CGF.EmitBlock(UsingRegs);
3234 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3235 llvm::Value *Result1 = Builder.CreateIntToPtr(OurReg, PTy);
3236 // Increase the GPR/FPR indexes.
3238 GPR = Builder.CreateAdd(GPR, Builder.getInt8(isI64 ? 2 : 1));
3239 Builder.CreateStore(GPR, GPRPtr);
3241 FPR = Builder.CreateAdd(FPR, Builder.getInt8(1));
3242 Builder.CreateStore(FPR, FPRPtr);
3244 CGF.EmitBranch(Cont);
3246 CGF.EmitBlock(UsingOverflow);
3248 // Increase the overflow area.
3249 llvm::Value *Result2 = Builder.CreateIntToPtr(OverflowAreaAsInt, PTy);
3251 Builder.CreateAdd(OverflowAreaAsInt, Builder.getInt32(isInt ? 4 : 8));
3252 Builder.CreateStore(Builder.CreateIntToPtr(OverflowAreaAsInt, CharPtr),
3254 CGF.EmitBranch(Cont);
3256 CGF.EmitBlock(Cont);
3258 llvm::PHINode *Result = CGF.Builder.CreatePHI(PTy, 2, "vaarg.addr");
3259 Result->addIncoming(Result1, UsingRegs);
3260 Result->addIncoming(Result2, UsingOverflow);
3262 if (Ty->isAggregateType()) {
3263 llvm::Value *AGGPtr = Builder.CreateBitCast(Result, CharPtrPtr, "aggrptr");
3264 return Builder.CreateLoad(AGGPtr, false, "aggr");
3271 PPC32TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3272 llvm::Value *Address) const {
3273 // This is calculated from the LLVM and GCC tables and verified
3274 // against gcc output. AFAIK all ABIs use the same encoding.
3276 CodeGen::CGBuilderTy &Builder = CGF.Builder;
3278 llvm::IntegerType *i8 = CGF.Int8Ty;
3279 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
3280 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
3281 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
3283 // 0-31: r0-31, the 4-byte general-purpose registers
3284 AssignToArrayRange(Builder, Address, Four8, 0, 31);
3286 // 32-63: fp0-31, the 8-byte floating-point registers
3287 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
3289 // 64-76 are various 4-byte special-purpose registers:
3296 AssignToArrayRange(Builder, Address, Four8, 64, 76);
3298 // 77-108: v0-31, the 16-byte vector registers
3299 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
3306 AssignToArrayRange(Builder, Address, Four8, 109, 113);
3314 /// PPC64_SVR4_ABIInfo - The 64-bit PowerPC ELF (SVR4) ABI information.
3315 class PPC64_SVR4_ABIInfo : public DefaultABIInfo {
3323 static const unsigned GPRBits = 64;
3327 // A vector of float or double will be promoted to <4 x f32> or <4 x f64> and
3328 // will be passed in a QPX register.
3329 bool IsQPXVectorTy(const Type *Ty) const {
3333 if (const VectorType *VT = Ty->getAs<VectorType>()) {
3334 unsigned NumElements = VT->getNumElements();
3335 if (NumElements == 1)
3338 if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double)) {
3339 if (getContext().getTypeSize(Ty) <= 256)
3341 } else if (VT->getElementType()->
3342 isSpecificBuiltinType(BuiltinType::Float)) {
3343 if (getContext().getTypeSize(Ty) <= 128)
3351 bool IsQPXVectorTy(QualType Ty) const {
3352 return IsQPXVectorTy(Ty.getTypePtr());
3356 PPC64_SVR4_ABIInfo(CodeGen::CodeGenTypes &CGT, ABIKind Kind, bool HasQPX)
3357 : DefaultABIInfo(CGT), Kind(Kind), HasQPX(HasQPX) {}
3359 bool isPromotableTypeForABI(QualType Ty) const;
3360 bool isAlignedParamType(QualType Ty, bool &Align32) const;
3362 ABIArgInfo classifyReturnType(QualType RetTy) const;
3363 ABIArgInfo classifyArgumentType(QualType Ty) const;
3365 bool isHomogeneousAggregateBaseType(QualType Ty) const override;
3366 bool isHomogeneousAggregateSmallEnough(const Type *Ty,
3367 uint64_t Members) const override;
3369 // TODO: We can add more logic to computeInfo to improve performance.
3370 // Example: For aggregate arguments that fit in a register, we could
3371 // use getDirectInReg (as is done below for structs containing a single
3372 // floating-point value) to avoid pushing them to memory on function
3373 // entry. This would require changing the logic in PPCISelLowering
3374 // when lowering the parameters in the caller and args in the callee.
3375 void computeInfo(CGFunctionInfo &FI) const override {
3376 if (!getCXXABI().classifyReturnType(FI))
3377 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3378 for (auto &I : FI.arguments()) {
3379 // We rely on the default argument classification for the most part.
3380 // One exception: An aggregate containing a single floating-point
3381 // or vector item must be passed in a register if one is available.
3382 const Type *T = isSingleElementStruct(I.type, getContext());
3384 const BuiltinType *BT = T->getAs<BuiltinType>();
3385 if (IsQPXVectorTy(T) ||
3386 (T->isVectorType() && getContext().getTypeSize(T) == 128) ||
3387 (BT && BT->isFloatingPoint())) {
3389 I.info = ABIArgInfo::getDirectInReg(CGT.ConvertType(QT));
3393 I.info = classifyArgumentType(I.type);
3397 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3398 CodeGenFunction &CGF) const override;
3401 class PPC64_SVR4_TargetCodeGenInfo : public TargetCodeGenInfo {
3404 PPC64_SVR4_TargetCodeGenInfo(CodeGenTypes &CGT,
3405 PPC64_SVR4_ABIInfo::ABIKind Kind, bool HasQPX)
3406 : TargetCodeGenInfo(new PPC64_SVR4_ABIInfo(CGT, Kind, HasQPX)) {}
3408 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3409 // This is recovered from gcc output.
3410 return 1; // r1 is the dedicated stack pointer
3413 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3414 llvm::Value *Address) const override;
3417 class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
3419 PPC64TargetCodeGenInfo(CodeGenTypes &CGT) : DefaultTargetCodeGenInfo(CGT) {}
3421 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3422 // This is recovered from gcc output.
3423 return 1; // r1 is the dedicated stack pointer
3426 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3427 llvm::Value *Address) const override;
3432 // Return true if the ABI requires Ty to be passed sign- or zero-
3433 // extended to 64 bits.
3435 PPC64_SVR4_ABIInfo::isPromotableTypeForABI(QualType Ty) const {
3436 // Treat an enum type as its underlying type.
3437 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
3438 Ty = EnumTy->getDecl()->getIntegerType();
3440 // Promotable integer types are required to be promoted by the ABI.
3441 if (Ty->isPromotableIntegerType())
3444 // In addition to the usual promotable integer types, we also need to
3445 // extend all 32-bit types, since the ABI requires promotion to 64 bits.
3446 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
3447 switch (BT->getKind()) {
3448 case BuiltinType::Int:
3449 case BuiltinType::UInt:
3458 /// isAlignedParamType - Determine whether a type requires 16-byte
3459 /// alignment in the parameter area.
3461 PPC64_SVR4_ABIInfo::isAlignedParamType(QualType Ty, bool &Align32) const {
3464 // Complex types are passed just like their elements.
3465 if (const ComplexType *CTy = Ty->getAs<ComplexType>())
3466 Ty = CTy->getElementType();
3468 // Only vector types of size 16 bytes need alignment (larger types are
3469 // passed via reference, smaller types are not aligned).
3470 if (IsQPXVectorTy(Ty)) {
3471 if (getContext().getTypeSize(Ty) > 128)
3475 } else if (Ty->isVectorType()) {
3476 return getContext().getTypeSize(Ty) == 128;
3479 // For single-element float/vector structs, we consider the whole type
3480 // to have the same alignment requirements as its single element.
3481 const Type *AlignAsType = nullptr;
3482 const Type *EltType = isSingleElementStruct(Ty, getContext());
3484 const BuiltinType *BT = EltType->getAs<BuiltinType>();
3485 if (IsQPXVectorTy(EltType) || (EltType->isVectorType() &&
3486 getContext().getTypeSize(EltType) == 128) ||
3487 (BT && BT->isFloatingPoint()))
3488 AlignAsType = EltType;
3491 // Likewise for ELFv2 homogeneous aggregates.
3492 const Type *Base = nullptr;
3493 uint64_t Members = 0;
3494 if (!AlignAsType && Kind == ELFv2 &&
3495 isAggregateTypeForABI(Ty) && isHomogeneousAggregate(Ty, Base, Members))
3498 // With special case aggregates, only vector base types need alignment.
3499 if (AlignAsType && IsQPXVectorTy(AlignAsType)) {
3500 if (getContext().getTypeSize(AlignAsType) > 128)
3504 } else if (AlignAsType) {
3505 return AlignAsType->isVectorType();
3508 // Otherwise, we only need alignment for any aggregate type that
3509 // has an alignment requirement of >= 16 bytes.
3510 if (isAggregateTypeForABI(Ty) && getContext().getTypeAlign(Ty) >= 128) {
3511 if (HasQPX && getContext().getTypeAlign(Ty) >= 256)
3519 /// isHomogeneousAggregate - Return true if a type is an ELFv2 homogeneous
3520 /// aggregate. Base is set to the base element type, and Members is set
3521 /// to the number of base elements.
3522 bool ABIInfo::isHomogeneousAggregate(QualType Ty, const Type *&Base,
3523 uint64_t &Members) const {
3524 if (const ConstantArrayType *AT = getContext().getAsConstantArrayType(Ty)) {
3525 uint64_t NElements = AT->getSize().getZExtValue();
3528 if (!isHomogeneousAggregate(AT->getElementType(), Base, Members))
3530 Members *= NElements;
3531 } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
3532 const RecordDecl *RD = RT->getDecl();
3533 if (RD->hasFlexibleArrayMember())
3538 // If this is a C++ record, check the bases first.
3539 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
3540 for (const auto &I : CXXRD->bases()) {
3541 // Ignore empty records.
3542 if (isEmptyRecord(getContext(), I.getType(), true))
3545 uint64_t FldMembers;
3546 if (!isHomogeneousAggregate(I.getType(), Base, FldMembers))
3549 Members += FldMembers;
3553 for (const auto *FD : RD->fields()) {
3554 // Ignore (non-zero arrays of) empty records.
3555 QualType FT = FD->getType();
3556 while (const ConstantArrayType *AT =
3557 getContext().getAsConstantArrayType(FT)) {
3558 if (AT->getSize().getZExtValue() == 0)
3560 FT = AT->getElementType();
3562 if (isEmptyRecord(getContext(), FT, true))
3565 // For compatibility with GCC, ignore empty bitfields in C++ mode.
3566 if (getContext().getLangOpts().CPlusPlus &&
3567 FD->isBitField() && FD->getBitWidthValue(getContext()) == 0)
3570 uint64_t FldMembers;
3571 if (!isHomogeneousAggregate(FD->getType(), Base, FldMembers))
3574 Members = (RD->isUnion() ?
3575 std::max(Members, FldMembers) : Members + FldMembers);
3581 // Ensure there is no padding.
3582 if (getContext().getTypeSize(Base) * Members !=
3583 getContext().getTypeSize(Ty))
3587 if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
3589 Ty = CT->getElementType();
3592 // Most ABIs only support float, double, and some vector type widths.
3593 if (!isHomogeneousAggregateBaseType(Ty))
3596 // The base type must be the same for all members. Types that
3597 // agree in both total size and mode (float vs. vector) are
3598 // treated as being equivalent here.
3599 const Type *TyPtr = Ty.getTypePtr();
3603 if (Base->isVectorType() != TyPtr->isVectorType() ||
3604 getContext().getTypeSize(Base) != getContext().getTypeSize(TyPtr))
3607 return Members > 0 && isHomogeneousAggregateSmallEnough(Base, Members);
3610 bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
3611 // Homogeneous aggregates for ELFv2 must have base types of float,
3612 // double, long double, or 128-bit vectors.
3613 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
3614 if (BT->getKind() == BuiltinType::Float ||
3615 BT->getKind() == BuiltinType::Double ||
3616 BT->getKind() == BuiltinType::LongDouble)
3619 if (const VectorType *VT = Ty->getAs<VectorType>()) {
3620 if (getContext().getTypeSize(VT) == 128 || IsQPXVectorTy(Ty))
3626 bool PPC64_SVR4_ABIInfo::isHomogeneousAggregateSmallEnough(
3627 const Type *Base, uint64_t Members) const {
3628 // Vector types require one register, floating point types require one
3629 // or two registers depending on their size.
3631 Base->isVectorType() ? 1 : (getContext().getTypeSize(Base) + 63) / 64;
3633 // Homogeneous Aggregates may occupy at most 8 registers.
3634 return Members * NumRegs <= 8;
3638 PPC64_SVR4_ABIInfo::classifyArgumentType(QualType Ty) const {
3639 Ty = useFirstFieldIfTransparentUnion(Ty);
3641 if (Ty->isAnyComplexType())
3642 return ABIArgInfo::getDirect();
3644 // Non-Altivec vector types are passed in GPRs (smaller than 16 bytes)
3645 // or via reference (larger than 16 bytes).
3646 if (Ty->isVectorType() && !IsQPXVectorTy(Ty)) {
3647 uint64_t Size = getContext().getTypeSize(Ty);
3649 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
3650 else if (Size < 128) {
3651 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
3652 return ABIArgInfo::getDirect(CoerceTy);
3656 if (isAggregateTypeForABI(Ty)) {
3657 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
3658 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
3661 uint64_t ABIAlign = isAlignedParamType(Ty, Align32) ?
3662 (Align32 ? 32 : 16) : 8;
3663 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8;
3665 // ELFv2 homogeneous aggregates are passed as array types.
3666 const Type *Base = nullptr;
3667 uint64_t Members = 0;
3668 if (Kind == ELFv2 &&
3669 isHomogeneousAggregate(Ty, Base, Members)) {
3670 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
3671 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
3672 return ABIArgInfo::getDirect(CoerceTy);
3675 // If an aggregate may end up fully in registers, we do not
3676 // use the ByVal method, but pass the aggregate as array.
3677 // This is usually beneficial since we avoid forcing the
3678 // back-end to store the argument to memory.
3679 uint64_t Bits = getContext().getTypeSize(Ty);
3680 if (Bits > 0 && Bits <= 8 * GPRBits) {
3681 llvm::Type *CoerceTy;
3683 // Types up to 8 bytes are passed as integer type (which will be
3684 // properly aligned in the argument save area doubleword).
3685 if (Bits <= GPRBits)
3686 CoerceTy = llvm::IntegerType::get(getVMContext(),
3687 llvm::RoundUpToAlignment(Bits, 8));
3688 // Larger types are passed as arrays, with the base type selected
3689 // according to the required alignment in the save area.
3691 uint64_t RegBits = ABIAlign * 8;
3692 uint64_t NumRegs = llvm::RoundUpToAlignment(Bits, RegBits) / RegBits;
3693 llvm::Type *RegTy = llvm::IntegerType::get(getVMContext(), RegBits);
3694 CoerceTy = llvm::ArrayType::get(RegTy, NumRegs);
3697 return ABIArgInfo::getDirect(CoerceTy);
3700 // All other aggregates are passed ByVal.
3701 return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true,
3702 /*Realign=*/TyAlign > ABIAlign);
3705 return (isPromotableTypeForABI(Ty) ?
3706 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3710 PPC64_SVR4_ABIInfo::classifyReturnType(QualType RetTy) const {
3711 if (RetTy->isVoidType())
3712 return ABIArgInfo::getIgnore();
3714 if (RetTy->isAnyComplexType())
3715 return ABIArgInfo::getDirect();
3717 // Non-Altivec vector types are returned in GPRs (smaller than 16 bytes)
3718 // or via reference (larger than 16 bytes).
3719 if (RetTy->isVectorType() && !IsQPXVectorTy(RetTy)) {
3720 uint64_t Size = getContext().getTypeSize(RetTy);
3722 return ABIArgInfo::getIndirect(0);
3723 else if (Size < 128) {
3724 llvm::Type *CoerceTy = llvm::IntegerType::get(getVMContext(), Size);
3725 return ABIArgInfo::getDirect(CoerceTy);
3729 if (isAggregateTypeForABI(RetTy)) {
3730 // ELFv2 homogeneous aggregates are returned as array types.
3731 const Type *Base = nullptr;
3732 uint64_t Members = 0;
3733 if (Kind == ELFv2 &&
3734 isHomogeneousAggregate(RetTy, Base, Members)) {
3735 llvm::Type *BaseTy = CGT.ConvertType(QualType(Base, 0));
3736 llvm::Type *CoerceTy = llvm::ArrayType::get(BaseTy, Members);
3737 return ABIArgInfo::getDirect(CoerceTy);
3740 // ELFv2 small aggregates are returned in up to two registers.
3741 uint64_t Bits = getContext().getTypeSize(RetTy);
3742 if (Kind == ELFv2 && Bits <= 2 * GPRBits) {
3744 return ABIArgInfo::getIgnore();
3746 llvm::Type *CoerceTy;
3747 if (Bits > GPRBits) {
3748 CoerceTy = llvm::IntegerType::get(getVMContext(), GPRBits);
3749 CoerceTy = llvm::StructType::get(CoerceTy, CoerceTy, nullptr);
3751 CoerceTy = llvm::IntegerType::get(getVMContext(),
3752 llvm::RoundUpToAlignment(Bits, 8));
3753 return ABIArgInfo::getDirect(CoerceTy);
3756 // All other aggregates are returned indirectly.
3757 return ABIArgInfo::getIndirect(0);
3760 return (isPromotableTypeForABI(RetTy) ?
3761 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
3764 // Based on ARMABIInfo::EmitVAArg, adjusted for 64-bit machine.
3765 llvm::Value *PPC64_SVR4_ABIInfo::EmitVAArg(llvm::Value *VAListAddr,
3767 CodeGenFunction &CGF) const {
3768 llvm::Type *BP = CGF.Int8PtrTy;
3769 llvm::Type *BPP = CGF.Int8PtrPtrTy;
3771 CGBuilderTy &Builder = CGF.Builder;
3772 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
3773 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
3775 // Handle types that require 16-byte alignment in the parameter save area.
3777 if (isAlignedParamType(Ty, Align32)) {
3778 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
3779 AddrAsInt = Builder.CreateAdd(AddrAsInt,
3780 Builder.getInt64(Align32 ? 31 : 15));
3781 AddrAsInt = Builder.CreateAnd(AddrAsInt,
3782 Builder.getInt64(Align32 ? -32 : -16));
3783 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align");
3786 // Update the va_list pointer. The pointer should be bumped by the
3787 // size of the object. We can trust getTypeSize() except for a complex
3788 // type whose base type is smaller than a doubleword. For these, the
3789 // size of the object is 16 bytes; see below for further explanation.
3790 unsigned SizeInBytes = CGF.getContext().getTypeSize(Ty) / 8;
3792 unsigned CplxBaseSize = 0;
3794 if (const ComplexType *CTy = Ty->getAs<ComplexType>()) {
3795 BaseTy = CTy->getElementType();
3796 CplxBaseSize = CGF.getContext().getTypeSize(BaseTy) / 8;
3797 if (CplxBaseSize < 8)
3801 unsigned Offset = llvm::RoundUpToAlignment(SizeInBytes, 8);
3802 llvm::Value *NextAddr =
3803 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int64Ty, Offset),
3805 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
3807 // If we have a complex type and the base type is smaller than 8 bytes,
3808 // the ABI calls for the real and imaginary parts to be right-adjusted
3809 // in separate doublewords. However, Clang expects us to produce a
3810 // pointer to a structure with the two parts packed tightly. So generate
3811 // loads of the real and imaginary parts relative to the va_list pointer,
3812 // and store them to a temporary structure.
3813 if (CplxBaseSize && CplxBaseSize < 8) {
3814 llvm::Value *RealAddr = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
3815 llvm::Value *ImagAddr = RealAddr;
3816 if (CGF.CGM.getDataLayout().isBigEndian()) {
3818 Builder.CreateAdd(RealAddr, Builder.getInt64(8 - CplxBaseSize));
3820 Builder.CreateAdd(ImagAddr, Builder.getInt64(16 - CplxBaseSize));
3822 ImagAddr = Builder.CreateAdd(ImagAddr, Builder.getInt64(8));
3824 llvm::Type *PBaseTy = llvm::PointerType::getUnqual(CGF.ConvertType(BaseTy));
3825 RealAddr = Builder.CreateIntToPtr(RealAddr, PBaseTy);
3826 ImagAddr = Builder.CreateIntToPtr(ImagAddr, PBaseTy);
3827 llvm::Value *Real = Builder.CreateLoad(RealAddr, false, ".vareal");
3828 llvm::Value *Imag = Builder.CreateLoad(ImagAddr, false, ".vaimag");
3829 llvm::AllocaInst *Ptr =
3830 CGF.CreateTempAlloca(CGT.ConvertTypeForMem(Ty), "vacplx");
3831 llvm::Value *RealPtr =
3832 Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 0, ".real");
3833 llvm::Value *ImagPtr =
3834 Builder.CreateStructGEP(Ptr->getAllocatedType(), Ptr, 1, ".imag");
3835 Builder.CreateStore(Real, RealPtr, false);
3836 Builder.CreateStore(Imag, ImagPtr, false);
3840 // If the argument is smaller than 8 bytes, it is right-adjusted in
3841 // its doubleword slot. Adjust the pointer to pick it up from the
3843 if (SizeInBytes < 8 && CGF.CGM.getDataLayout().isBigEndian()) {
3844 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
3845 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt64(8 - SizeInBytes));
3846 Addr = Builder.CreateIntToPtr(AddrAsInt, BP);
3849 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
3850 return Builder.CreateBitCast(Addr, PTy);
3854 PPC64_initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3855 llvm::Value *Address) {
3856 // This is calculated from the LLVM and GCC tables and verified
3857 // against gcc output. AFAIK all ABIs use the same encoding.
3859 CodeGen::CGBuilderTy &Builder = CGF.Builder;
3861 llvm::IntegerType *i8 = CGF.Int8Ty;
3862 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
3863 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
3864 llvm::Value *Sixteen8 = llvm::ConstantInt::get(i8, 16);
3866 // 0-31: r0-31, the 8-byte general-purpose registers
3867 AssignToArrayRange(Builder, Address, Eight8, 0, 31);
3869 // 32-63: fp0-31, the 8-byte floating-point registers
3870 AssignToArrayRange(Builder, Address, Eight8, 32, 63);
3872 // 64-76 are various 4-byte special-purpose registers:
3879 AssignToArrayRange(Builder, Address, Four8, 64, 76);
3881 // 77-108: v0-31, the 16-byte vector registers
3882 AssignToArrayRange(Builder, Address, Sixteen8, 77, 108);
3889 AssignToArrayRange(Builder, Address, Four8, 109, 113);
3895 PPC64_SVR4_TargetCodeGenInfo::initDwarfEHRegSizeTable(
3896 CodeGen::CodeGenFunction &CGF,
3897 llvm::Value *Address) const {
3899 return PPC64_initDwarfEHRegSizeTable(CGF, Address);
3903 PPC64TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
3904 llvm::Value *Address) const {
3906 return PPC64_initDwarfEHRegSizeTable(CGF, Address);
3909 //===----------------------------------------------------------------------===//
3910 // AArch64 ABI Implementation
3911 //===----------------------------------------------------------------------===//
3915 class AArch64ABIInfo : public ABIInfo {
3926 AArch64ABIInfo(CodeGenTypes &CGT, ABIKind Kind) : ABIInfo(CGT), Kind(Kind) {}
3929 ABIKind getABIKind() const { return Kind; }
3930 bool isDarwinPCS() const { return Kind == DarwinPCS; }
3932 ABIArgInfo classifyReturnType(QualType RetTy) const;
3933 ABIArgInfo classifyArgumentType(QualType RetTy) const;
3934 bool isHomogeneousAggregateBaseType(QualType Ty) const override;
3935 bool isHomogeneousAggregateSmallEnough(const Type *Ty,
3936 uint64_t Members) const override;
3938 bool isIllegalVectorType(QualType Ty) const;
3940 void computeInfo(CGFunctionInfo &FI) const override {
3941 if (!getCXXABI().classifyReturnType(FI))
3942 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
3944 for (auto &it : FI.arguments())
3945 it.info = classifyArgumentType(it.type);
3948 llvm::Value *EmitDarwinVAArg(llvm::Value *VAListAddr, QualType Ty,
3949 CodeGenFunction &CGF) const;
3951 llvm::Value *EmitAAPCSVAArg(llvm::Value *VAListAddr, QualType Ty,
3952 CodeGenFunction &CGF) const;
3954 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
3955 CodeGenFunction &CGF) const override {
3956 return isDarwinPCS() ? EmitDarwinVAArg(VAListAddr, Ty, CGF)
3957 : EmitAAPCSVAArg(VAListAddr, Ty, CGF);
3961 class AArch64TargetCodeGenInfo : public TargetCodeGenInfo {
3963 AArch64TargetCodeGenInfo(CodeGenTypes &CGT, AArch64ABIInfo::ABIKind Kind)
3964 : TargetCodeGenInfo(new AArch64ABIInfo(CGT, Kind)) {}
3966 StringRef getARCRetainAutoreleasedReturnValueMarker() const override {
3967 return "mov\tfp, fp\t\t; marker for objc_retainAutoreleaseReturnValue";
3970 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
3974 bool doesReturnSlotInterfereWithArgs() const override { return false; }
3978 ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty) const {
3979 Ty = useFirstFieldIfTransparentUnion(Ty);
3981 // Handle illegal vector types here.
3982 if (isIllegalVectorType(Ty)) {
3983 uint64_t Size = getContext().getTypeSize(Ty);
3985 llvm::Type *ResType = llvm::Type::getInt32Ty(getVMContext());
3986 return ABIArgInfo::getDirect(ResType);
3989 llvm::Type *ResType =
3990 llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 2);
3991 return ABIArgInfo::getDirect(ResType);
3994 llvm::Type *ResType =
3995 llvm::VectorType::get(llvm::Type::getInt32Ty(getVMContext()), 4);
3996 return ABIArgInfo::getDirect(ResType);
3998 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4001 if (!isAggregateTypeForABI(Ty)) {
4002 // Treat an enum type as its underlying type.
4003 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
4004 Ty = EnumTy->getDecl()->getIntegerType();
4006 return (Ty->isPromotableIntegerType() && isDarwinPCS()
4007 ? ABIArgInfo::getExtend()
4008 : ABIArgInfo::getDirect());
4011 // Structures with either a non-trivial destructor or a non-trivial
4012 // copy constructor are always indirect.
4013 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
4014 return ABIArgInfo::getIndirect(0, /*ByVal=*/RAA ==
4015 CGCXXABI::RAA_DirectInMemory);
4018 // Empty records are always ignored on Darwin, but actually passed in C++ mode
4019 // elsewhere for GNU compatibility.
4020 if (isEmptyRecord(getContext(), Ty, true)) {
4021 if (!getContext().getLangOpts().CPlusPlus || isDarwinPCS())
4022 return ABIArgInfo::getIgnore();
4024 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
4027 // Homogeneous Floating-point Aggregates (HFAs) need to be expanded.
4028 const Type *Base = nullptr;
4029 uint64_t Members = 0;
4030 if (isHomogeneousAggregate(Ty, Base, Members)) {
4031 return ABIArgInfo::getDirect(
4032 llvm::ArrayType::get(CGT.ConvertType(QualType(Base, 0)), Members));
4035 // Aggregates <= 16 bytes are passed directly in registers or on the stack.
4036 uint64_t Size = getContext().getTypeSize(Ty);
4038 unsigned Alignment = getContext().getTypeAlign(Ty);
4039 Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes
4041 // We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
4042 // For aggregates with 16-byte alignment, we use i128.
4043 if (Alignment < 128 && Size == 128) {
4044 llvm::Type *BaseTy = llvm::Type::getInt64Ty(getVMContext());
4045 return ABIArgInfo::getDirect(llvm::ArrayType::get(BaseTy, Size / 64));
4047 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
4050 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4053 ABIArgInfo AArch64ABIInfo::classifyReturnType(QualType RetTy) const {
4054 if (RetTy->isVoidType())
4055 return ABIArgInfo::getIgnore();
4057 // Large vector types should be returned via memory.
4058 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128)
4059 return ABIArgInfo::getIndirect(0);
4061 if (!isAggregateTypeForABI(RetTy)) {
4062 // Treat an enum type as its underlying type.
4063 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
4064 RetTy = EnumTy->getDecl()->getIntegerType();
4066 return (RetTy->isPromotableIntegerType() && isDarwinPCS()
4067 ? ABIArgInfo::getExtend()
4068 : ABIArgInfo::getDirect());
4071 if (isEmptyRecord(getContext(), RetTy, true))
4072 return ABIArgInfo::getIgnore();
4074 const Type *Base = nullptr;
4075 uint64_t Members = 0;
4076 if (isHomogeneousAggregate(RetTy, Base, Members))
4077 // Homogeneous Floating-point Aggregates (HFAs) are returned directly.
4078 return ABIArgInfo::getDirect();
4080 // Aggregates <= 16 bytes are returned directly in registers or on the stack.
4081 uint64_t Size = getContext().getTypeSize(RetTy);
4083 unsigned Alignment = getContext().getTypeAlign(RetTy);
4084 Size = 64 * ((Size + 63) / 64); // round up to multiple of 8 bytes
4086 // We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
4087 // For aggregates with 16-byte alignment, we use i128.
4088 if (Alignment < 128 && Size == 128) {
4089 llvm::Type *BaseTy = llvm::Type::getInt64Ty(getVMContext());
4090 return ABIArgInfo::getDirect(llvm::ArrayType::get(BaseTy, Size / 64));
4092 return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(), Size));
4095 return ABIArgInfo::getIndirect(0);
4098 /// isIllegalVectorType - check whether the vector type is legal for AArch64.
4099 bool AArch64ABIInfo::isIllegalVectorType(QualType Ty) const {
4100 if (const VectorType *VT = Ty->getAs<VectorType>()) {
4101 // Check whether VT is legal.
4102 unsigned NumElements = VT->getNumElements();
4103 uint64_t Size = getContext().getTypeSize(VT);
4104 // NumElements should be power of 2 between 1 and 16.
4105 if ((NumElements & (NumElements - 1)) != 0 || NumElements > 16)
4107 return Size != 64 && (Size != 128 || NumElements == 1);
4112 bool AArch64ABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
4113 // Homogeneous aggregates for AAPCS64 must have base types of a floating
4114 // point type or a short-vector type. This is the same as the 32-bit ABI,
4115 // but with the difference that any floating-point type is allowed,
4116 // including __fp16.
4117 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
4118 if (BT->isFloatingPoint())
4120 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
4121 unsigned VecSize = getContext().getTypeSize(VT);
4122 if (VecSize == 64 || VecSize == 128)
4128 bool AArch64ABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
4129 uint64_t Members) const {
4130 return Members <= 4;
4133 llvm::Value *AArch64ABIInfo::EmitAAPCSVAArg(llvm::Value *VAListAddr,
4135 CodeGenFunction &CGF) const {
4136 ABIArgInfo AI = classifyArgumentType(Ty);
4137 bool IsIndirect = AI.isIndirect();
4139 llvm::Type *BaseTy = CGF.ConvertType(Ty);
4141 BaseTy = llvm::PointerType::getUnqual(BaseTy);
4142 else if (AI.getCoerceToType())
4143 BaseTy = AI.getCoerceToType();
4145 unsigned NumRegs = 1;
4146 if (llvm::ArrayType *ArrTy = dyn_cast<llvm::ArrayType>(BaseTy)) {
4147 BaseTy = ArrTy->getElementType();
4148 NumRegs = ArrTy->getNumElements();
4150 bool IsFPR = BaseTy->isFloatingPointTy() || BaseTy->isVectorTy();
4152 // The AArch64 va_list type and handling is specified in the Procedure Call
4153 // Standard, section B.4:
4163 llvm::BasicBlock *MaybeRegBlock = CGF.createBasicBlock("vaarg.maybe_reg");
4164 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
4165 llvm::BasicBlock *OnStackBlock = CGF.createBasicBlock("vaarg.on_stack");
4166 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
4167 auto &Ctx = CGF.getContext();
4169 llvm::Value *reg_offs_p = nullptr, *reg_offs = nullptr;
4171 int RegSize = IsIndirect ? 8 : getContext().getTypeSize(Ty) / 8;
4173 // 3 is the field number of __gr_offs
4175 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "gr_offs_p");
4176 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "gr_offs");
4177 reg_top_index = 1; // field number for __gr_top
4178 RegSize = llvm::RoundUpToAlignment(RegSize, 8);
4180 // 4 is the field number of __vr_offs.
4182 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 4, "vr_offs_p");
4183 reg_offs = CGF.Builder.CreateLoad(reg_offs_p, "vr_offs");
4184 reg_top_index = 2; // field number for __vr_top
4185 RegSize = 16 * NumRegs;
4188 //=======================================
4189 // Find out where argument was passed
4190 //=======================================
4192 // If reg_offs >= 0 we're already using the stack for this type of
4193 // argument. We don't want to keep updating reg_offs (in case it overflows,
4194 // though anyone passing 2GB of arguments, each at most 16 bytes, deserves
4195 // whatever they get).
4196 llvm::Value *UsingStack = nullptr;
4197 UsingStack = CGF.Builder.CreateICmpSGE(
4198 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, 0));
4200 CGF.Builder.CreateCondBr(UsingStack, OnStackBlock, MaybeRegBlock);
4202 // Otherwise, at least some kind of argument could go in these registers, the
4203 // question is whether this particular type is too big.
4204 CGF.EmitBlock(MaybeRegBlock);
4206 // Integer arguments may need to correct register alignment (for example a
4207 // "struct { __int128 a; };" gets passed in x_2N, x_{2N+1}). In this case we
4208 // align __gr_offs to calculate the potential address.
4209 if (!IsFPR && !IsIndirect && Ctx.getTypeAlign(Ty) > 64) {
4210 int Align = Ctx.getTypeAlign(Ty) / 8;
4212 reg_offs = CGF.Builder.CreateAdd(
4213 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, Align - 1),
4215 reg_offs = CGF.Builder.CreateAnd(
4216 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, -Align),
4220 // Update the gr_offs/vr_offs pointer for next call to va_arg on this va_list.
4221 llvm::Value *NewOffset = nullptr;
4222 NewOffset = CGF.Builder.CreateAdd(
4223 reg_offs, llvm::ConstantInt::get(CGF.Int32Ty, RegSize), "new_reg_offs");
4224 CGF.Builder.CreateStore(NewOffset, reg_offs_p);
4226 // Now we're in a position to decide whether this argument really was in
4227 // registers or not.
4228 llvm::Value *InRegs = nullptr;
4229 InRegs = CGF.Builder.CreateICmpSLE(
4230 NewOffset, llvm::ConstantInt::get(CGF.Int32Ty, 0), "inreg");
4232 CGF.Builder.CreateCondBr(InRegs, InRegBlock, OnStackBlock);
4234 //=======================================
4235 // Argument was in registers
4236 //=======================================
4238 // Now we emit the code for if the argument was originally passed in
4239 // registers. First start the appropriate block:
4240 CGF.EmitBlock(InRegBlock);
4242 llvm::Value *reg_top_p = nullptr, *reg_top = nullptr;
4243 reg_top_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, reg_top_index,
4245 reg_top = CGF.Builder.CreateLoad(reg_top_p, "reg_top");
4246 llvm::Value *BaseAddr = CGF.Builder.CreateGEP(reg_top, reg_offs);
4247 llvm::Value *RegAddr = nullptr;
4248 llvm::Type *MemTy = llvm::PointerType::getUnqual(CGF.ConvertTypeForMem(Ty));
4251 // If it's been passed indirectly (actually a struct), whatever we find from
4252 // stored registers or on the stack will actually be a struct **.
4253 MemTy = llvm::PointerType::getUnqual(MemTy);
4256 const Type *Base = nullptr;
4257 uint64_t NumMembers = 0;
4258 bool IsHFA = isHomogeneousAggregate(Ty, Base, NumMembers);
4259 if (IsHFA && NumMembers > 1) {
4260 // Homogeneous aggregates passed in registers will have their elements split
4261 // and stored 16-bytes apart regardless of size (they're notionally in qN,
4262 // qN+1, ...). We reload and store into a temporary local variable
4264 assert(!IsIndirect && "Homogeneous aggregates should be passed directly");
4265 llvm::Type *BaseTy = CGF.ConvertType(QualType(Base, 0));
4266 llvm::Type *HFATy = llvm::ArrayType::get(BaseTy, NumMembers);
4267 llvm::AllocaInst *Tmp = CGF.CreateTempAlloca(HFATy);
4270 if (CGF.CGM.getDataLayout().isBigEndian() && Ctx.getTypeSize(Base) < 128)
4271 Offset = 16 - Ctx.getTypeSize(Base) / 8;
4272 for (unsigned i = 0; i < NumMembers; ++i) {
4273 llvm::Value *BaseOffset =
4274 llvm::ConstantInt::get(CGF.Int32Ty, 16 * i + Offset);
4275 llvm::Value *LoadAddr = CGF.Builder.CreateGEP(BaseAddr, BaseOffset);
4276 LoadAddr = CGF.Builder.CreateBitCast(
4277 LoadAddr, llvm::PointerType::getUnqual(BaseTy));
4278 llvm::Value *StoreAddr =
4279 CGF.Builder.CreateStructGEP(Tmp->getAllocatedType(), Tmp, i);
4281 llvm::Value *Elem = CGF.Builder.CreateLoad(LoadAddr);
4282 CGF.Builder.CreateStore(Elem, StoreAddr);
4285 RegAddr = CGF.Builder.CreateBitCast(Tmp, MemTy);
4287 // Otherwise the object is contiguous in memory
4288 unsigned BeAlign = reg_top_index == 2 ? 16 : 8;
4289 if (CGF.CGM.getDataLayout().isBigEndian() &&
4290 (IsHFA || !isAggregateTypeForABI(Ty)) &&
4291 Ctx.getTypeSize(Ty) < (BeAlign * 8)) {
4292 int Offset = BeAlign - Ctx.getTypeSize(Ty) / 8;
4293 BaseAddr = CGF.Builder.CreatePtrToInt(BaseAddr, CGF.Int64Ty);
4295 BaseAddr = CGF.Builder.CreateAdd(
4296 BaseAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be");
4298 BaseAddr = CGF.Builder.CreateIntToPtr(BaseAddr, CGF.Int8PtrTy);
4301 RegAddr = CGF.Builder.CreateBitCast(BaseAddr, MemTy);
4304 CGF.EmitBranch(ContBlock);
4306 //=======================================
4307 // Argument was on the stack
4308 //=======================================
4309 CGF.EmitBlock(OnStackBlock);
4311 llvm::Value *stack_p = nullptr, *OnStackAddr = nullptr;
4312 stack_p = CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 0, "stack_p");
4313 OnStackAddr = CGF.Builder.CreateLoad(stack_p, "stack");
4315 // Again, stack arguments may need realigmnent. In this case both integer and
4316 // floating-point ones might be affected.
4317 if (!IsIndirect && Ctx.getTypeAlign(Ty) > 64) {
4318 int Align = Ctx.getTypeAlign(Ty) / 8;
4320 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty);
4322 OnStackAddr = CGF.Builder.CreateAdd(
4323 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Align - 1),
4325 OnStackAddr = CGF.Builder.CreateAnd(
4326 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, -Align),
4329 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy);
4336 StackSize = Ctx.getTypeSize(Ty) / 8;
4338 // All stack slots are 8 bytes
4339 StackSize = llvm::RoundUpToAlignment(StackSize, 8);
4341 llvm::Value *StackSizeC = llvm::ConstantInt::get(CGF.Int32Ty, StackSize);
4342 llvm::Value *NewStack =
4343 CGF.Builder.CreateGEP(OnStackAddr, StackSizeC, "new_stack");
4345 // Write the new value of __stack for the next call to va_arg
4346 CGF.Builder.CreateStore(NewStack, stack_p);
4348 if (CGF.CGM.getDataLayout().isBigEndian() && !isAggregateTypeForABI(Ty) &&
4349 Ctx.getTypeSize(Ty) < 64) {
4350 int Offset = 8 - Ctx.getTypeSize(Ty) / 8;
4351 OnStackAddr = CGF.Builder.CreatePtrToInt(OnStackAddr, CGF.Int64Ty);
4353 OnStackAddr = CGF.Builder.CreateAdd(
4354 OnStackAddr, llvm::ConstantInt::get(CGF.Int64Ty, Offset), "align_be");
4356 OnStackAddr = CGF.Builder.CreateIntToPtr(OnStackAddr, CGF.Int8PtrTy);
4359 OnStackAddr = CGF.Builder.CreateBitCast(OnStackAddr, MemTy);
4361 CGF.EmitBranch(ContBlock);
4363 //=======================================
4365 //=======================================
4366 CGF.EmitBlock(ContBlock);
4368 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(MemTy, 2, "vaarg.addr");
4369 ResAddr->addIncoming(RegAddr, InRegBlock);
4370 ResAddr->addIncoming(OnStackAddr, OnStackBlock);
4373 return CGF.Builder.CreateLoad(ResAddr, "vaarg.addr");
4378 llvm::Value *AArch64ABIInfo::EmitDarwinVAArg(llvm::Value *VAListAddr,
4380 CodeGenFunction &CGF) const {
4381 // We do not support va_arg for aggregates or illegal vector types.
4382 // Lower VAArg here for these cases and use the LLVM va_arg instruction for
4384 if (!isAggregateTypeForABI(Ty) && !isIllegalVectorType(Ty))
4387 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8;
4388 uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
4390 const Type *Base = nullptr;
4391 uint64_t Members = 0;
4392 bool isHA = isHomogeneousAggregate(Ty, Base, Members);
4394 bool isIndirect = false;
4395 // Arguments bigger than 16 bytes which aren't homogeneous aggregates should
4396 // be passed indirectly.
4397 if (Size > 16 && !isHA) {
4403 llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
4404 llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
4406 CGBuilderTy &Builder = CGF.Builder;
4407 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
4408 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
4410 if (isEmptyRecord(getContext(), Ty, true)) {
4411 // These are ignored for parameter passing purposes.
4412 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
4413 return Builder.CreateBitCast(Addr, PTy);
4416 const uint64_t MinABIAlign = 8;
4417 if (Align > MinABIAlign) {
4418 llvm::Value *Offset = llvm::ConstantInt::get(CGF.Int32Ty, Align - 1);
4419 Addr = Builder.CreateGEP(Addr, Offset);
4420 llvm::Value *AsInt = Builder.CreatePtrToInt(Addr, CGF.Int64Ty);
4421 llvm::Value *Mask = llvm::ConstantInt::get(CGF.Int64Ty, ~(Align - 1));
4422 llvm::Value *Aligned = Builder.CreateAnd(AsInt, Mask);
4423 Addr = Builder.CreateIntToPtr(Aligned, BP, "ap.align");
4426 uint64_t Offset = llvm::RoundUpToAlignment(Size, MinABIAlign);
4427 llvm::Value *NextAddr = Builder.CreateGEP(
4428 Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset), "ap.next");
4429 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
4432 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP));
4433 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
4434 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
4439 //===----------------------------------------------------------------------===//
4440 // ARM ABI Implementation
4441 //===----------------------------------------------------------------------===//
4445 class ARMABIInfo : public ABIInfo {
4457 ARMABIInfo(CodeGenTypes &CGT, ABIKind _Kind) : ABIInfo(CGT), Kind(_Kind) {
4461 bool isEABI() const {
4462 switch (getTarget().getTriple().getEnvironment()) {
4463 case llvm::Triple::Android:
4464 case llvm::Triple::EABI:
4465 case llvm::Triple::EABIHF:
4466 case llvm::Triple::GNUEABI:
4467 case llvm::Triple::GNUEABIHF:
4474 bool isEABIHF() const {
4475 switch (getTarget().getTriple().getEnvironment()) {
4476 case llvm::Triple::EABIHF:
4477 case llvm::Triple::GNUEABIHF:
4484 ABIKind getABIKind() const { return Kind; }
4487 ABIArgInfo classifyReturnType(QualType RetTy, bool isVariadic) const;
4488 ABIArgInfo classifyArgumentType(QualType RetTy, bool isVariadic) const;
4489 bool isIllegalVectorType(QualType Ty) const;
4491 bool isHomogeneousAggregateBaseType(QualType Ty) const override;
4492 bool isHomogeneousAggregateSmallEnough(const Type *Ty,
4493 uint64_t Members) const override;
4495 void computeInfo(CGFunctionInfo &FI) const override;
4497 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4498 CodeGenFunction &CGF) const override;
4500 llvm::CallingConv::ID getLLVMDefaultCC() const;
4501 llvm::CallingConv::ID getABIDefaultCC() const;
4505 class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
4507 ARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
4508 :TargetCodeGenInfo(new ARMABIInfo(CGT, K)) {}
4510 const ARMABIInfo &getABIInfo() const {
4511 return static_cast<const ARMABIInfo&>(TargetCodeGenInfo::getABIInfo());
4514 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
4518 StringRef getARCRetainAutoreleasedReturnValueMarker() const override {
4519 return "mov\tr7, r7\t\t@ marker for objc_retainAutoreleaseReturnValue";
4522 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
4523 llvm::Value *Address) const override {
4524 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
4526 // 0-15 are the 16 integer registers.
4527 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 15);
4531 unsigned getSizeOfUnwindException() const override {
4532 if (getABIInfo().isEABI()) return 88;
4533 return TargetCodeGenInfo::getSizeOfUnwindException();
4536 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4537 CodeGen::CodeGenModule &CGM) const override {
4538 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
4542 const ARMInterruptAttr *Attr = FD->getAttr<ARMInterruptAttr>();
4547 switch (Attr->getInterrupt()) {
4548 case ARMInterruptAttr::Generic: Kind = ""; break;
4549 case ARMInterruptAttr::IRQ: Kind = "IRQ"; break;
4550 case ARMInterruptAttr::FIQ: Kind = "FIQ"; break;
4551 case ARMInterruptAttr::SWI: Kind = "SWI"; break;
4552 case ARMInterruptAttr::ABORT: Kind = "ABORT"; break;
4553 case ARMInterruptAttr::UNDEF: Kind = "UNDEF"; break;
4556 llvm::Function *Fn = cast<llvm::Function>(GV);
4558 Fn->addFnAttr("interrupt", Kind);
4560 if (cast<ARMABIInfo>(getABIInfo()).getABIKind() == ARMABIInfo::APCS)
4563 // AAPCS guarantees that sp will be 8-byte aligned on any public interface,
4564 // however this is not necessarily true on taking any interrupt. Instruct
4565 // the backend to perform a realignment as part of the function prologue.
4566 llvm::AttrBuilder B;
4567 B.addStackAlignmentAttr(8);
4568 Fn->addAttributes(llvm::AttributeSet::FunctionIndex,
4569 llvm::AttributeSet::get(CGM.getLLVMContext(),
4570 llvm::AttributeSet::FunctionIndex,
4575 class WindowsARMTargetCodeGenInfo : public ARMTargetCodeGenInfo {
4576 void addStackProbeSizeTargetAttribute(const Decl *D, llvm::GlobalValue *GV,
4577 CodeGen::CodeGenModule &CGM) const;
4580 WindowsARMTargetCodeGenInfo(CodeGenTypes &CGT, ARMABIInfo::ABIKind K)
4581 : ARMTargetCodeGenInfo(CGT, K) {}
4583 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
4584 CodeGen::CodeGenModule &CGM) const override;
4587 void WindowsARMTargetCodeGenInfo::addStackProbeSizeTargetAttribute(
4588 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const {
4589 if (!isa<FunctionDecl>(D))
4591 if (CGM.getCodeGenOpts().StackProbeSize == 4096)
4594 llvm::Function *F = cast<llvm::Function>(GV);
4595 F->addFnAttr("stack-probe-size",
4596 llvm::utostr(CGM.getCodeGenOpts().StackProbeSize));
4599 void WindowsARMTargetCodeGenInfo::setTargetAttributes(
4600 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &CGM) const {
4601 ARMTargetCodeGenInfo::setTargetAttributes(D, GV, CGM);
4602 addStackProbeSizeTargetAttribute(D, GV, CGM);
4606 void ARMABIInfo::computeInfo(CGFunctionInfo &FI) const {
4607 if (!getCXXABI().classifyReturnType(FI))
4608 FI.getReturnInfo() =
4609 classifyReturnType(FI.getReturnType(), FI.isVariadic());
4611 for (auto &I : FI.arguments())
4612 I.info = classifyArgumentType(I.type, FI.isVariadic());
4614 // Always honor user-specified calling convention.
4615 if (FI.getCallingConvention() != llvm::CallingConv::C)
4618 llvm::CallingConv::ID cc = getRuntimeCC();
4619 if (cc != llvm::CallingConv::C)
4620 FI.setEffectiveCallingConvention(cc);
4623 /// Return the default calling convention that LLVM will use.
4624 llvm::CallingConv::ID ARMABIInfo::getLLVMDefaultCC() const {
4625 // The default calling convention that LLVM will infer.
4627 return llvm::CallingConv::ARM_AAPCS_VFP;
4629 return llvm::CallingConv::ARM_AAPCS;
4631 return llvm::CallingConv::ARM_APCS;
4634 /// Return the calling convention that our ABI would like us to use
4635 /// as the C calling convention.
4636 llvm::CallingConv::ID ARMABIInfo::getABIDefaultCC() const {
4637 switch (getABIKind()) {
4638 case APCS: return llvm::CallingConv::ARM_APCS;
4639 case AAPCS: return llvm::CallingConv::ARM_AAPCS;
4640 case AAPCS_VFP: return llvm::CallingConv::ARM_AAPCS_VFP;
4642 llvm_unreachable("bad ABI kind");
4645 void ARMABIInfo::setCCs() {
4646 assert(getRuntimeCC() == llvm::CallingConv::C);
4648 // Don't muddy up the IR with a ton of explicit annotations if
4649 // they'd just match what LLVM will infer from the triple.
4650 llvm::CallingConv::ID abiCC = getABIDefaultCC();
4651 if (abiCC != getLLVMDefaultCC())
4654 BuiltinCC = (getABIKind() == APCS ?
4655 llvm::CallingConv::ARM_APCS : llvm::CallingConv::ARM_AAPCS);
4658 ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty,
4659 bool isVariadic) const {
4660 // 6.1.2.1 The following argument types are VFP CPRCs:
4661 // A single-precision floating-point type (including promoted
4662 // half-precision types); A double-precision floating-point type;
4663 // A 64-bit or 128-bit containerized vector type; Homogeneous Aggregate
4664 // with a Base Type of a single- or double-precision floating-point type,
4665 // 64-bit containerized vectors or 128-bit containerized vectors with one
4666 // to four Elements.
4667 bool IsEffectivelyAAPCS_VFP = getABIKind() == AAPCS_VFP && !isVariadic;
4669 Ty = useFirstFieldIfTransparentUnion(Ty);
4671 // Handle illegal vector types here.
4672 if (isIllegalVectorType(Ty)) {
4673 uint64_t Size = getContext().getTypeSize(Ty);
4675 llvm::Type *ResType =
4676 llvm::Type::getInt32Ty(getVMContext());
4677 return ABIArgInfo::getDirect(ResType);
4680 llvm::Type *ResType = llvm::VectorType::get(
4681 llvm::Type::getInt32Ty(getVMContext()), 2);
4682 return ABIArgInfo::getDirect(ResType);
4685 llvm::Type *ResType = llvm::VectorType::get(
4686 llvm::Type::getInt32Ty(getVMContext()), 4);
4687 return ABIArgInfo::getDirect(ResType);
4689 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
4692 if (!isAggregateTypeForABI(Ty)) {
4693 // Treat an enum type as its underlying type.
4694 if (const EnumType *EnumTy = Ty->getAs<EnumType>()) {
4695 Ty = EnumTy->getDecl()->getIntegerType();
4698 return (Ty->isPromotableIntegerType() ? ABIArgInfo::getExtend()
4699 : ABIArgInfo::getDirect());
4702 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
4703 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
4706 // Ignore empty records.
4707 if (isEmptyRecord(getContext(), Ty, true))
4708 return ABIArgInfo::getIgnore();
4710 if (IsEffectivelyAAPCS_VFP) {
4711 // Homogeneous Aggregates need to be expanded when we can fit the aggregate
4712 // into VFP registers.
4713 const Type *Base = nullptr;
4714 uint64_t Members = 0;
4715 if (isHomogeneousAggregate(Ty, Base, Members)) {
4716 assert(Base && "Base class should be set for homogeneous aggregate");
4717 // Base can be a floating-point or a vector.
4718 return ABIArgInfo::getDirect(nullptr, 0, nullptr, false);
4722 // Support byval for ARM.
4723 // The ABI alignment for APCS is 4-byte and for AAPCS at least 4-byte and at
4724 // most 8-byte. We realign the indirect argument if type alignment is bigger
4725 // than ABI alignment.
4726 uint64_t ABIAlign = 4;
4727 uint64_t TyAlign = getContext().getTypeAlign(Ty) / 8;
4728 if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
4729 getABIKind() == ARMABIInfo::AAPCS)
4730 ABIAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
4732 if (getContext().getTypeSizeInChars(Ty) > CharUnits::fromQuantity(64)) {
4733 return ABIArgInfo::getIndirect(ABIAlign, /*ByVal=*/true,
4734 /*Realign=*/TyAlign > ABIAlign);
4737 // Otherwise, pass by coercing to a structure of the appropriate size.
4740 // FIXME: Try to match the types of the arguments more accurately where
4742 if (getContext().getTypeAlign(Ty) <= 32) {
4743 ElemTy = llvm::Type::getInt32Ty(getVMContext());
4744 SizeRegs = (getContext().getTypeSize(Ty) + 31) / 32;
4746 ElemTy = llvm::Type::getInt64Ty(getVMContext());
4747 SizeRegs = (getContext().getTypeSize(Ty) + 63) / 64;
4750 return ABIArgInfo::getDirect(llvm::ArrayType::get(ElemTy, SizeRegs));
4753 static bool isIntegerLikeType(QualType Ty, ASTContext &Context,
4754 llvm::LLVMContext &VMContext) {
4755 // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
4756 // is called integer-like if its size is less than or equal to one word, and
4757 // the offset of each of its addressable sub-fields is zero.
4759 uint64_t Size = Context.getTypeSize(Ty);
4761 // Check that the type fits in a word.
4765 // FIXME: Handle vector types!
4766 if (Ty->isVectorType())
4769 // Float types are never treated as "integer like".
4770 if (Ty->isRealFloatingType())
4773 // If this is a builtin or pointer type then it is ok.
4774 if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
4777 // Small complex integer types are "integer like".
4778 if (const ComplexType *CT = Ty->getAs<ComplexType>())
4779 return isIntegerLikeType(CT->getElementType(), Context, VMContext);
4781 // Single element and zero sized arrays should be allowed, by the definition
4782 // above, but they are not.
4784 // Otherwise, it must be a record type.
4785 const RecordType *RT = Ty->getAs<RecordType>();
4786 if (!RT) return false;
4788 // Ignore records with flexible arrays.
4789 const RecordDecl *RD = RT->getDecl();
4790 if (RD->hasFlexibleArrayMember())
4793 // Check that all sub-fields are at offset 0, and are themselves "integer
4795 const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
4797 bool HadField = false;
4799 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
4800 i != e; ++i, ++idx) {
4801 const FieldDecl *FD = *i;
4803 // Bit-fields are not addressable, we only need to verify they are "integer
4804 // like". We still have to disallow a subsequent non-bitfield, for example:
4805 // struct { int : 0; int x }
4806 // is non-integer like according to gcc.
4807 if (FD->isBitField()) {
4811 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
4817 // Check if this field is at offset 0.
4818 if (Layout.getFieldOffset(idx) != 0)
4821 if (!isIntegerLikeType(FD->getType(), Context, VMContext))
4824 // Only allow at most one field in a structure. This doesn't match the
4825 // wording above, but follows gcc in situations with a field following an
4827 if (!RD->isUnion()) {
4838 ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy,
4839 bool isVariadic) const {
4840 bool IsEffectivelyAAPCS_VFP = getABIKind() == AAPCS_VFP && !isVariadic;
4842 if (RetTy->isVoidType())
4843 return ABIArgInfo::getIgnore();
4845 // Large vector types should be returned via memory.
4846 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 128) {
4847 return ABIArgInfo::getIndirect(0);
4850 if (!isAggregateTypeForABI(RetTy)) {
4851 // Treat an enum type as its underlying type.
4852 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
4853 RetTy = EnumTy->getDecl()->getIntegerType();
4855 return RetTy->isPromotableIntegerType() ? ABIArgInfo::getExtend()
4856 : ABIArgInfo::getDirect();
4859 // Are we following APCS?
4860 if (getABIKind() == APCS) {
4861 if (isEmptyRecord(getContext(), RetTy, false))
4862 return ABIArgInfo::getIgnore();
4864 // Complex types are all returned as packed integers.
4866 // FIXME: Consider using 2 x vector types if the back end handles them
4868 if (RetTy->isAnyComplexType())
4869 return ABIArgInfo::getDirect(llvm::IntegerType::get(
4870 getVMContext(), getContext().getTypeSize(RetTy)));
4872 // Integer like structures are returned in r0.
4873 if (isIntegerLikeType(RetTy, getContext(), getVMContext())) {
4874 // Return in the smallest viable integer type.
4875 uint64_t Size = getContext().getTypeSize(RetTy);
4877 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
4879 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
4880 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
4883 // Otherwise return in memory.
4884 return ABIArgInfo::getIndirect(0);
4887 // Otherwise this is an AAPCS variant.
4889 if (isEmptyRecord(getContext(), RetTy, true))
4890 return ABIArgInfo::getIgnore();
4892 // Check for homogeneous aggregates with AAPCS-VFP.
4893 if (IsEffectivelyAAPCS_VFP) {
4894 const Type *Base = nullptr;
4896 if (isHomogeneousAggregate(RetTy, Base, Members)) {
4897 assert(Base && "Base class should be set for homogeneous aggregate");
4898 // Homogeneous Aggregates are returned directly.
4899 return ABIArgInfo::getDirect(nullptr, 0, nullptr, false);
4903 // Aggregates <= 4 bytes are returned in r0; other aggregates
4904 // are returned indirectly.
4905 uint64_t Size = getContext().getTypeSize(RetTy);
4907 if (getDataLayout().isBigEndian())
4908 // Return in 32 bit integer integer type (as if loaded by LDR, AAPCS 5.4)
4909 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
4911 // Return in the smallest viable integer type.
4913 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
4915 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
4916 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
4919 return ABIArgInfo::getIndirect(0);
4922 /// isIllegalVector - check whether Ty is an illegal vector type.
4923 bool ARMABIInfo::isIllegalVectorType(QualType Ty) const {
4924 if (const VectorType *VT = Ty->getAs<VectorType>()) {
4925 // Check whether VT is legal.
4926 unsigned NumElements = VT->getNumElements();
4927 uint64_t Size = getContext().getTypeSize(VT);
4928 // NumElements should be power of 2.
4929 if ((NumElements & (NumElements - 1)) != 0)
4931 // Size should be greater than 32 bits.
4937 bool ARMABIInfo::isHomogeneousAggregateBaseType(QualType Ty) const {
4938 // Homogeneous aggregates for AAPCS-VFP must have base types of float,
4939 // double, or 64-bit or 128-bit vectors.
4940 if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
4941 if (BT->getKind() == BuiltinType::Float ||
4942 BT->getKind() == BuiltinType::Double ||
4943 BT->getKind() == BuiltinType::LongDouble)
4945 } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
4946 unsigned VecSize = getContext().getTypeSize(VT);
4947 if (VecSize == 64 || VecSize == 128)
4953 bool ARMABIInfo::isHomogeneousAggregateSmallEnough(const Type *Base,
4954 uint64_t Members) const {
4955 return Members <= 4;
4958 llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
4959 CodeGenFunction &CGF) const {
4960 llvm::Type *BP = CGF.Int8PtrTy;
4961 llvm::Type *BPP = CGF.Int8PtrPtrTy;
4963 CGBuilderTy &Builder = CGF.Builder;
4964 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
4965 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
4967 if (isEmptyRecord(getContext(), Ty, true)) {
4968 // These are ignored for parameter passing purposes.
4969 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
4970 return Builder.CreateBitCast(Addr, PTy);
4973 uint64_t Size = CGF.getContext().getTypeSize(Ty) / 8;
4974 uint64_t TyAlign = CGF.getContext().getTypeAlign(Ty) / 8;
4975 bool IsIndirect = false;
4977 // The ABI alignment for 64-bit or 128-bit vectors is 8 for AAPCS and 4 for
4978 // APCS. For AAPCS, the ABI alignment is at least 4-byte and at most 8-byte.
4979 if (getABIKind() == ARMABIInfo::AAPCS_VFP ||
4980 getABIKind() == ARMABIInfo::AAPCS)
4981 TyAlign = std::min(std::max(TyAlign, (uint64_t)4), (uint64_t)8);
4984 // Use indirect if size of the illegal vector is bigger than 16 bytes.
4985 if (isIllegalVectorType(Ty) && Size > 16) {
4991 // Handle address alignment for ABI alignment > 4 bytes.
4993 assert((TyAlign & (TyAlign - 1)) == 0 &&
4994 "Alignment is not power of 2!");
4995 llvm::Value *AddrAsInt = Builder.CreatePtrToInt(Addr, CGF.Int32Ty);
4996 AddrAsInt = Builder.CreateAdd(AddrAsInt, Builder.getInt32(TyAlign - 1));
4997 AddrAsInt = Builder.CreateAnd(AddrAsInt, Builder.getInt32(~(TyAlign - 1)));
4998 Addr = Builder.CreateIntToPtr(AddrAsInt, BP, "ap.align");
5002 llvm::RoundUpToAlignment(Size, 4);
5003 llvm::Value *NextAddr =
5004 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
5006 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
5009 Addr = Builder.CreateLoad(Builder.CreateBitCast(Addr, BPP));
5010 else if (TyAlign < CGF.getContext().getTypeAlign(Ty) / 8) {
5011 // We can't directly cast ap.cur to pointer to a vector type, since ap.cur
5012 // may not be correctly aligned for the vector type. We create an aligned
5013 // temporary space and copy the content over from ap.cur to the temporary
5014 // space. This is necessary if the natural alignment of the type is greater
5015 // than the ABI alignment.
5016 llvm::Type *I8PtrTy = Builder.getInt8PtrTy();
5017 CharUnits CharSize = getContext().getTypeSizeInChars(Ty);
5018 llvm::Value *AlignedTemp = CGF.CreateTempAlloca(CGF.ConvertType(Ty),
5020 llvm::Value *Dst = Builder.CreateBitCast(AlignedTemp, I8PtrTy);
5021 llvm::Value *Src = Builder.CreateBitCast(Addr, I8PtrTy);
5022 Builder.CreateMemCpy(Dst, Src,
5023 llvm::ConstantInt::get(CGF.IntPtrTy, CharSize.getQuantity()),
5025 Addr = AlignedTemp; //The content is in aligned location.
5028 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
5029 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
5034 //===----------------------------------------------------------------------===//
5035 // NVPTX ABI Implementation
5036 //===----------------------------------------------------------------------===//
5040 class NVPTXABIInfo : public ABIInfo {
5042 NVPTXABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
5044 ABIArgInfo classifyReturnType(QualType RetTy) const;
5045 ABIArgInfo classifyArgumentType(QualType Ty) const;
5047 void computeInfo(CGFunctionInfo &FI) const override;
5048 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5049 CodeGenFunction &CFG) const override;
5052 class NVPTXTargetCodeGenInfo : public TargetCodeGenInfo {
5054 NVPTXTargetCodeGenInfo(CodeGenTypes &CGT)
5055 : TargetCodeGenInfo(new NVPTXABIInfo(CGT)) {}
5057 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5058 CodeGen::CodeGenModule &M) const override;
5060 // Adds a NamedMDNode with F, Name, and Operand as operands, and adds the
5061 // resulting MDNode to the nvvm.annotations MDNode.
5062 static void addNVVMMetadata(llvm::Function *F, StringRef Name, int Operand);
5065 ABIArgInfo NVPTXABIInfo::classifyReturnType(QualType RetTy) const {
5066 if (RetTy->isVoidType())
5067 return ABIArgInfo::getIgnore();
5069 // note: this is different from default ABI
5070 if (!RetTy->isScalarType())
5071 return ABIArgInfo::getDirect();
5073 // Treat an enum type as its underlying type.
5074 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
5075 RetTy = EnumTy->getDecl()->getIntegerType();
5077 return (RetTy->isPromotableIntegerType() ?
5078 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5081 ABIArgInfo NVPTXABIInfo::classifyArgumentType(QualType Ty) const {
5082 // Treat an enum type as its underlying type.
5083 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5084 Ty = EnumTy->getDecl()->getIntegerType();
5086 // Return aggregates type as indirect by value
5087 if (isAggregateTypeForABI(Ty))
5088 return ABIArgInfo::getIndirect(0, /* byval */ true);
5090 return (Ty->isPromotableIntegerType() ?
5091 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5094 void NVPTXABIInfo::computeInfo(CGFunctionInfo &FI) const {
5095 if (!getCXXABI().classifyReturnType(FI))
5096 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
5097 for (auto &I : FI.arguments())
5098 I.info = classifyArgumentType(I.type);
5100 // Always honor user-specified calling convention.
5101 if (FI.getCallingConvention() != llvm::CallingConv::C)
5104 FI.setEffectiveCallingConvention(getRuntimeCC());
5107 llvm::Value *NVPTXABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5108 CodeGenFunction &CFG) const {
5109 llvm_unreachable("NVPTX does not support varargs");
5112 void NVPTXTargetCodeGenInfo::
5113 setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5114 CodeGen::CodeGenModule &M) const{
5115 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
5118 llvm::Function *F = cast<llvm::Function>(GV);
5120 // Perform special handling in OpenCL mode
5121 if (M.getLangOpts().OpenCL) {
5122 // Use OpenCL function attributes to check for kernel functions
5123 // By default, all functions are device functions
5124 if (FD->hasAttr<OpenCLKernelAttr>()) {
5125 // OpenCL __kernel functions get kernel metadata
5126 // Create !{<func-ref>, metadata !"kernel", i32 1} node
5127 addNVVMMetadata(F, "kernel", 1);
5128 // And kernel functions are not subject to inlining
5129 F->addFnAttr(llvm::Attribute::NoInline);
5133 // Perform special handling in CUDA mode.
5134 if (M.getLangOpts().CUDA) {
5135 // CUDA __global__ functions get a kernel metadata entry. Since
5136 // __global__ functions cannot be called from the device, we do not
5137 // need to set the noinline attribute.
5138 if (FD->hasAttr<CUDAGlobalAttr>()) {
5139 // Create !{<func-ref>, metadata !"kernel", i32 1} node
5140 addNVVMMetadata(F, "kernel", 1);
5142 if (CUDALaunchBoundsAttr *Attr = FD->getAttr<CUDALaunchBoundsAttr>()) {
5143 // Create !{<func-ref>, metadata !"maxntidx", i32 <val>} node
5144 llvm::APSInt MaxThreads(32);
5145 MaxThreads = Attr->getMaxThreads()->EvaluateKnownConstInt(M.getContext());
5147 addNVVMMetadata(F, "maxntidx", MaxThreads.getExtValue());
5149 // min blocks is an optional argument for CUDALaunchBoundsAttr. If it was
5150 // not specified in __launch_bounds__ or if the user specified a 0 value,
5151 // we don't have to add a PTX directive.
5152 if (Attr->getMinBlocks()) {
5153 llvm::APSInt MinBlocks(32);
5154 MinBlocks = Attr->getMinBlocks()->EvaluateKnownConstInt(M.getContext());
5156 // Create !{<func-ref>, metadata !"minctasm", i32 <val>} node
5157 addNVVMMetadata(F, "minctasm", MinBlocks.getExtValue());
5163 void NVPTXTargetCodeGenInfo::addNVVMMetadata(llvm::Function *F, StringRef Name,
5165 llvm::Module *M = F->getParent();
5166 llvm::LLVMContext &Ctx = M->getContext();
5168 // Get "nvvm.annotations" metadata node
5169 llvm::NamedMDNode *MD = M->getOrInsertNamedMetadata("nvvm.annotations");
5171 llvm::Metadata *MDVals[] = {
5172 llvm::ConstantAsMetadata::get(F), llvm::MDString::get(Ctx, Name),
5173 llvm::ConstantAsMetadata::get(
5174 llvm::ConstantInt::get(llvm::Type::getInt32Ty(Ctx), Operand))};
5175 // Append metadata to nvvm.annotations
5176 MD->addOperand(llvm::MDNode::get(Ctx, MDVals));
5180 //===----------------------------------------------------------------------===//
5181 // SystemZ ABI Implementation
5182 //===----------------------------------------------------------------------===//
5186 class SystemZABIInfo : public ABIInfo {
5190 SystemZABIInfo(CodeGenTypes &CGT, bool HV)
5191 : ABIInfo(CGT), HasVector(HV) {}
5193 bool isPromotableIntegerType(QualType Ty) const;
5194 bool isCompoundType(QualType Ty) const;
5195 bool isVectorArgumentType(QualType Ty) const;
5196 bool isFPArgumentType(QualType Ty) const;
5197 QualType GetSingleElementType(QualType Ty) const;
5199 ABIArgInfo classifyReturnType(QualType RetTy) const;
5200 ABIArgInfo classifyArgumentType(QualType ArgTy) const;
5202 void computeInfo(CGFunctionInfo &FI) const override {
5203 if (!getCXXABI().classifyReturnType(FI))
5204 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
5205 for (auto &I : FI.arguments())
5206 I.info = classifyArgumentType(I.type);
5209 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5210 CodeGenFunction &CGF) const override;
5213 class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
5215 SystemZTargetCodeGenInfo(CodeGenTypes &CGT, bool HasVector)
5216 : TargetCodeGenInfo(new SystemZABIInfo(CGT, HasVector)) {}
5221 bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
5222 // Treat an enum type as its underlying type.
5223 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5224 Ty = EnumTy->getDecl()->getIntegerType();
5226 // Promotable integer types are required to be promoted by the ABI.
5227 if (Ty->isPromotableIntegerType())
5230 // 32-bit values must also be promoted.
5231 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
5232 switch (BT->getKind()) {
5233 case BuiltinType::Int:
5234 case BuiltinType::UInt:
5242 bool SystemZABIInfo::isCompoundType(QualType Ty) const {
5243 return (Ty->isAnyComplexType() ||
5244 Ty->isVectorType() ||
5245 isAggregateTypeForABI(Ty));
5248 bool SystemZABIInfo::isVectorArgumentType(QualType Ty) const {
5249 return (HasVector &&
5250 Ty->isVectorType() &&
5251 getContext().getTypeSize(Ty) <= 128);
5254 bool SystemZABIInfo::isFPArgumentType(QualType Ty) const {
5255 if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
5256 switch (BT->getKind()) {
5257 case BuiltinType::Float:
5258 case BuiltinType::Double:
5267 QualType SystemZABIInfo::GetSingleElementType(QualType Ty) const {
5268 if (const RecordType *RT = Ty->getAsStructureType()) {
5269 const RecordDecl *RD = RT->getDecl();
5272 // If this is a C++ record, check the bases first.
5273 if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD))
5274 for (const auto &I : CXXRD->bases()) {
5275 QualType Base = I.getType();
5277 // Empty bases don't affect things either way.
5278 if (isEmptyRecord(getContext(), Base, true))
5281 if (!Found.isNull())
5283 Found = GetSingleElementType(Base);
5286 // Check the fields.
5287 for (const auto *FD : RD->fields()) {
5288 // For compatibility with GCC, ignore empty bitfields in C++ mode.
5289 // Unlike isSingleElementStruct(), empty structure and array fields
5290 // do count. So do anonymous bitfields that aren't zero-sized.
5291 if (getContext().getLangOpts().CPlusPlus &&
5292 FD->isBitField() && FD->getBitWidthValue(getContext()) == 0)
5295 // Unlike isSingleElementStruct(), arrays do not count.
5296 // Nested structures still do though.
5297 if (!Found.isNull())
5299 Found = GetSingleElementType(FD->getType());
5302 // Unlike isSingleElementStruct(), trailing padding is allowed.
5303 // An 8-byte aligned struct s { float f; } is passed as a double.
5304 if (!Found.isNull())
5311 llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5312 CodeGenFunction &CGF) const {
5313 // Assume that va_list type is correct; should be pointer to LLVM type:
5317 // i8 *__overflow_arg_area;
5318 // i8 *__reg_save_area;
5321 // Every non-vector argument occupies 8 bytes and is passed by preference
5322 // in either GPRs or FPRs. Vector arguments occupy 8 or 16 bytes and are
5323 // always passed on the stack.
5324 Ty = CGF.getContext().getCanonicalType(Ty);
5325 llvm::Type *ArgTy = CGF.ConvertTypeForMem(Ty);
5326 llvm::Type *APTy = llvm::PointerType::getUnqual(ArgTy);
5327 ABIArgInfo AI = classifyArgumentType(Ty);
5328 bool IsIndirect = AI.isIndirect();
5329 bool InFPRs = false;
5330 bool IsVector = false;
5331 unsigned UnpaddedBitSize;
5333 APTy = llvm::PointerType::getUnqual(APTy);
5334 UnpaddedBitSize = 64;
5336 if (AI.getCoerceToType())
5337 ArgTy = AI.getCoerceToType();
5338 InFPRs = ArgTy->isFloatTy() || ArgTy->isDoubleTy();
5339 IsVector = ArgTy->isVectorTy();
5340 UnpaddedBitSize = getContext().getTypeSize(Ty);
5342 unsigned PaddedBitSize = (IsVector && UnpaddedBitSize > 64) ? 128 : 64;
5343 assert((UnpaddedBitSize <= PaddedBitSize) && "Invalid argument size.");
5345 unsigned PaddedSize = PaddedBitSize / 8;
5346 unsigned Padding = (PaddedBitSize - UnpaddedBitSize) / 8;
5348 llvm::Type *IndexTy = CGF.Int64Ty;
5349 llvm::Value *PaddedSizeV = llvm::ConstantInt::get(IndexTy, PaddedSize);
5352 // Work out the address of a vector argument on the stack.
5353 // Vector arguments are always passed in the high bits of a
5354 // single (8 byte) or double (16 byte) stack slot.
5355 llvm::Value *OverflowArgAreaPtr =
5356 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 2,
5357 "overflow_arg_area_ptr");
5358 llvm::Value *OverflowArgArea =
5359 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area");
5360 llvm::Value *MemAddr =
5361 CGF.Builder.CreateBitCast(OverflowArgArea, APTy, "mem_addr");
5363 // Update overflow_arg_area_ptr pointer
5364 llvm::Value *NewOverflowArgArea =
5365 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area");
5366 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
5371 unsigned MaxRegs, RegCountField, RegSaveIndex, RegPadding;
5373 MaxRegs = 4; // Maximum of 4 FPR arguments
5374 RegCountField = 1; // __fpr
5375 RegSaveIndex = 16; // save offset for f0
5376 RegPadding = 0; // floats are passed in the high bits of an FPR
5378 MaxRegs = 5; // Maximum of 5 GPR arguments
5379 RegCountField = 0; // __gpr
5380 RegSaveIndex = 2; // save offset for r2
5381 RegPadding = Padding; // values are passed in the low bits of a GPR
5384 llvm::Value *RegCountPtr = CGF.Builder.CreateStructGEP(
5385 nullptr, VAListAddr, RegCountField, "reg_count_ptr");
5386 llvm::Value *RegCount = CGF.Builder.CreateLoad(RegCountPtr, "reg_count");
5387 llvm::Value *MaxRegsV = llvm::ConstantInt::get(IndexTy, MaxRegs);
5388 llvm::Value *InRegs = CGF.Builder.CreateICmpULT(RegCount, MaxRegsV,
5391 llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
5392 llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
5393 llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
5394 CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
5396 // Emit code to load the value if it was passed in registers.
5397 CGF.EmitBlock(InRegBlock);
5399 // Work out the address of an argument register.
5400 llvm::Value *ScaledRegCount =
5401 CGF.Builder.CreateMul(RegCount, PaddedSizeV, "scaled_reg_count");
5402 llvm::Value *RegBase =
5403 llvm::ConstantInt::get(IndexTy, RegSaveIndex * PaddedSize + RegPadding);
5404 llvm::Value *RegOffset =
5405 CGF.Builder.CreateAdd(ScaledRegCount, RegBase, "reg_offset");
5406 llvm::Value *RegSaveAreaPtr =
5407 CGF.Builder.CreateStructGEP(nullptr, VAListAddr, 3, "reg_save_area_ptr");
5408 llvm::Value *RegSaveArea =
5409 CGF.Builder.CreateLoad(RegSaveAreaPtr, "reg_save_area");
5410 llvm::Value *RawRegAddr =
5411 CGF.Builder.CreateGEP(RegSaveArea, RegOffset, "raw_reg_addr");
5412 llvm::Value *RegAddr =
5413 CGF.Builder.CreateBitCast(RawRegAddr, APTy, "reg_addr");
5415 // Update the register count
5416 llvm::Value *One = llvm::ConstantInt::get(IndexTy, 1);
5417 llvm::Value *NewRegCount =
5418 CGF.Builder.CreateAdd(RegCount, One, "reg_count");
5419 CGF.Builder.CreateStore(NewRegCount, RegCountPtr);
5420 CGF.EmitBranch(ContBlock);
5422 // Emit code to load the value if it was passed in memory.
5423 CGF.EmitBlock(InMemBlock);
5425 // Work out the address of a stack argument.
5426 llvm::Value *OverflowArgAreaPtr = CGF.Builder.CreateStructGEP(
5427 nullptr, VAListAddr, 2, "overflow_arg_area_ptr");
5428 llvm::Value *OverflowArgArea =
5429 CGF.Builder.CreateLoad(OverflowArgAreaPtr, "overflow_arg_area");
5430 llvm::Value *PaddingV = llvm::ConstantInt::get(IndexTy, Padding);
5431 llvm::Value *RawMemAddr =
5432 CGF.Builder.CreateGEP(OverflowArgArea, PaddingV, "raw_mem_addr");
5433 llvm::Value *MemAddr =
5434 CGF.Builder.CreateBitCast(RawMemAddr, APTy, "mem_addr");
5436 // Update overflow_arg_area_ptr pointer
5437 llvm::Value *NewOverflowArgArea =
5438 CGF.Builder.CreateGEP(OverflowArgArea, PaddedSizeV, "overflow_arg_area");
5439 CGF.Builder.CreateStore(NewOverflowArgArea, OverflowArgAreaPtr);
5440 CGF.EmitBranch(ContBlock);
5442 // Return the appropriate result.
5443 CGF.EmitBlock(ContBlock);
5444 llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(APTy, 2, "va_arg.addr");
5445 ResAddr->addIncoming(RegAddr, InRegBlock);
5446 ResAddr->addIncoming(MemAddr, InMemBlock);
5449 return CGF.Builder.CreateLoad(ResAddr, "indirect_arg");
5454 ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy) const {
5455 if (RetTy->isVoidType())
5456 return ABIArgInfo::getIgnore();
5457 if (isVectorArgumentType(RetTy))
5458 return ABIArgInfo::getDirect();
5459 if (isCompoundType(RetTy) || getContext().getTypeSize(RetTy) > 64)
5460 return ABIArgInfo::getIndirect(0);
5461 return (isPromotableIntegerType(RetTy) ?
5462 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5465 ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty) const {
5466 // Handle the generic C++ ABI.
5467 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
5468 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
5470 // Integers and enums are extended to full register width.
5471 if (isPromotableIntegerType(Ty))
5472 return ABIArgInfo::getExtend();
5474 // Handle vector types and vector-like structure types. Note that
5475 // as opposed to float-like structure types, we do not allow any
5476 // padding for vector-like structures, so verify the sizes match.
5477 uint64_t Size = getContext().getTypeSize(Ty);
5478 QualType SingleElementTy = GetSingleElementType(Ty);
5479 if (isVectorArgumentType(SingleElementTy) &&
5480 getContext().getTypeSize(SingleElementTy) == Size)
5481 return ABIArgInfo::getDirect(CGT.ConvertType(SingleElementTy));
5483 // Values that are not 1, 2, 4 or 8 bytes in size are passed indirectly.
5484 if (Size != 8 && Size != 16 && Size != 32 && Size != 64)
5485 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
5487 // Handle small structures.
5488 if (const RecordType *RT = Ty->getAs<RecordType>()) {
5489 // Structures with flexible arrays have variable length, so really
5490 // fail the size test above.
5491 const RecordDecl *RD = RT->getDecl();
5492 if (RD->hasFlexibleArrayMember())
5493 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
5495 // The structure is passed as an unextended integer, a float, or a double.
5497 if (isFPArgumentType(SingleElementTy)) {
5498 assert(Size == 32 || Size == 64);
5500 PassTy = llvm::Type::getFloatTy(getVMContext());
5502 PassTy = llvm::Type::getDoubleTy(getVMContext());
5504 PassTy = llvm::IntegerType::get(getVMContext(), Size);
5505 return ABIArgInfo::getDirect(PassTy);
5508 // Non-structure compounds are passed indirectly.
5509 if (isCompoundType(Ty))
5510 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
5512 return ABIArgInfo::getDirect(nullptr);
5515 //===----------------------------------------------------------------------===//
5516 // MSP430 ABI Implementation
5517 //===----------------------------------------------------------------------===//
5521 class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
5523 MSP430TargetCodeGenInfo(CodeGenTypes &CGT)
5524 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
5525 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5526 CodeGen::CodeGenModule &M) const override;
5531 void MSP430TargetCodeGenInfo::setTargetAttributes(const Decl *D,
5532 llvm::GlobalValue *GV,
5533 CodeGen::CodeGenModule &M) const {
5534 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
5535 if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
5536 // Handle 'interrupt' attribute:
5537 llvm::Function *F = cast<llvm::Function>(GV);
5539 // Step 1: Set ISR calling convention.
5540 F->setCallingConv(llvm::CallingConv::MSP430_INTR);
5542 // Step 2: Add attributes goodness.
5543 F->addFnAttr(llvm::Attribute::NoInline);
5545 // Step 3: Emit ISR vector alias.
5546 unsigned Num = attr->getNumber() / 2;
5547 llvm::GlobalAlias::create(llvm::Function::ExternalLinkage,
5548 "__isr_" + Twine(Num), F);
5553 //===----------------------------------------------------------------------===//
5554 // MIPS ABI Implementation. This works for both little-endian and
5555 // big-endian variants.
5556 //===----------------------------------------------------------------------===//
5559 class MipsABIInfo : public ABIInfo {
5561 unsigned MinABIStackAlignInBytes, StackAlignInBytes;
5562 void CoerceToIntArgs(uint64_t TySize,
5563 SmallVectorImpl<llvm::Type *> &ArgList) const;
5564 llvm::Type* HandleAggregates(QualType Ty, uint64_t TySize) const;
5565 llvm::Type* returnAggregateInRegs(QualType RetTy, uint64_t Size) const;
5566 llvm::Type* getPaddingType(uint64_t Align, uint64_t Offset) const;
5568 MipsABIInfo(CodeGenTypes &CGT, bool _IsO32) :
5569 ABIInfo(CGT), IsO32(_IsO32), MinABIStackAlignInBytes(IsO32 ? 4 : 8),
5570 StackAlignInBytes(IsO32 ? 8 : 16) {}
5572 ABIArgInfo classifyReturnType(QualType RetTy) const;
5573 ABIArgInfo classifyArgumentType(QualType RetTy, uint64_t &Offset) const;
5574 void computeInfo(CGFunctionInfo &FI) const override;
5575 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5576 CodeGenFunction &CGF) const override;
5577 bool shouldSignExtUnsignedType(QualType Ty) const override;
5580 class MIPSTargetCodeGenInfo : public TargetCodeGenInfo {
5581 unsigned SizeOfUnwindException;
5583 MIPSTargetCodeGenInfo(CodeGenTypes &CGT, bool IsO32)
5584 : TargetCodeGenInfo(new MipsABIInfo(CGT, IsO32)),
5585 SizeOfUnwindException(IsO32 ? 24 : 32) {}
5587 int getDwarfEHStackPointer(CodeGen::CodeGenModule &CGM) const override {
5591 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5592 CodeGen::CodeGenModule &CGM) const override {
5593 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
5595 llvm::Function *Fn = cast<llvm::Function>(GV);
5596 if (FD->hasAttr<Mips16Attr>()) {
5597 Fn->addFnAttr("mips16");
5599 else if (FD->hasAttr<NoMips16Attr>()) {
5600 Fn->addFnAttr("nomips16");
5604 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5605 llvm::Value *Address) const override;
5607 unsigned getSizeOfUnwindException() const override {
5608 return SizeOfUnwindException;
5613 void MipsABIInfo::CoerceToIntArgs(
5614 uint64_t TySize, SmallVectorImpl<llvm::Type *> &ArgList) const {
5615 llvm::IntegerType *IntTy =
5616 llvm::IntegerType::get(getVMContext(), MinABIStackAlignInBytes * 8);
5618 // Add (TySize / MinABIStackAlignInBytes) args of IntTy.
5619 for (unsigned N = TySize / (MinABIStackAlignInBytes * 8); N; --N)
5620 ArgList.push_back(IntTy);
5622 // If necessary, add one more integer type to ArgList.
5623 unsigned R = TySize % (MinABIStackAlignInBytes * 8);
5626 ArgList.push_back(llvm::IntegerType::get(getVMContext(), R));
5629 // In N32/64, an aligned double precision floating point field is passed in
5631 llvm::Type* MipsABIInfo::HandleAggregates(QualType Ty, uint64_t TySize) const {
5632 SmallVector<llvm::Type*, 8> ArgList, IntArgList;
5635 CoerceToIntArgs(TySize, ArgList);
5636 return llvm::StructType::get(getVMContext(), ArgList);
5639 if (Ty->isComplexType())
5640 return CGT.ConvertType(Ty);
5642 const RecordType *RT = Ty->getAs<RecordType>();
5644 // Unions/vectors are passed in integer registers.
5645 if (!RT || !RT->isStructureOrClassType()) {
5646 CoerceToIntArgs(TySize, ArgList);
5647 return llvm::StructType::get(getVMContext(), ArgList);
5650 const RecordDecl *RD = RT->getDecl();
5651 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
5652 assert(!(TySize % 8) && "Size of structure must be multiple of 8.");
5654 uint64_t LastOffset = 0;
5656 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
5658 // Iterate over fields in the struct/class and check if there are any aligned
5660 for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
5661 i != e; ++i, ++idx) {
5662 const QualType Ty = i->getType();
5663 const BuiltinType *BT = Ty->getAs<BuiltinType>();
5665 if (!BT || BT->getKind() != BuiltinType::Double)
5668 uint64_t Offset = Layout.getFieldOffset(idx);
5669 if (Offset % 64) // Ignore doubles that are not aligned.
5672 // Add ((Offset - LastOffset) / 64) args of type i64.
5673 for (unsigned j = (Offset - LastOffset) / 64; j > 0; --j)
5674 ArgList.push_back(I64);
5677 ArgList.push_back(llvm::Type::getDoubleTy(getVMContext()));
5678 LastOffset = Offset + 64;
5681 CoerceToIntArgs(TySize - LastOffset, IntArgList);
5682 ArgList.append(IntArgList.begin(), IntArgList.end());
5684 return llvm::StructType::get(getVMContext(), ArgList);
5687 llvm::Type *MipsABIInfo::getPaddingType(uint64_t OrigOffset,
5688 uint64_t Offset) const {
5689 if (OrigOffset + MinABIStackAlignInBytes > Offset)
5692 return llvm::IntegerType::get(getVMContext(), (Offset - OrigOffset) * 8);
5696 MipsABIInfo::classifyArgumentType(QualType Ty, uint64_t &Offset) const {
5697 Ty = useFirstFieldIfTransparentUnion(Ty);
5699 uint64_t OrigOffset = Offset;
5700 uint64_t TySize = getContext().getTypeSize(Ty);
5701 uint64_t Align = getContext().getTypeAlign(Ty) / 8;
5703 Align = std::min(std::max(Align, (uint64_t)MinABIStackAlignInBytes),
5704 (uint64_t)StackAlignInBytes);
5705 unsigned CurrOffset = llvm::RoundUpToAlignment(Offset, Align);
5706 Offset = CurrOffset + llvm::RoundUpToAlignment(TySize, Align * 8) / 8;
5708 if (isAggregateTypeForABI(Ty) || Ty->isVectorType()) {
5709 // Ignore empty aggregates.
5711 return ABIArgInfo::getIgnore();
5713 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI())) {
5714 Offset = OrigOffset + MinABIStackAlignInBytes;
5715 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
5718 // If we have reached here, aggregates are passed directly by coercing to
5719 // another structure type. Padding is inserted if the offset of the
5720 // aggregate is unaligned.
5721 ABIArgInfo ArgInfo =
5722 ABIArgInfo::getDirect(HandleAggregates(Ty, TySize), 0,
5723 getPaddingType(OrigOffset, CurrOffset));
5724 ArgInfo.setInReg(true);
5728 // Treat an enum type as its underlying type.
5729 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
5730 Ty = EnumTy->getDecl()->getIntegerType();
5732 // All integral types are promoted to the GPR width.
5733 if (Ty->isIntegralOrEnumerationType())
5734 return ABIArgInfo::getExtend();
5736 return ABIArgInfo::getDirect(
5737 nullptr, 0, IsO32 ? nullptr : getPaddingType(OrigOffset, CurrOffset));
5741 MipsABIInfo::returnAggregateInRegs(QualType RetTy, uint64_t Size) const {
5742 const RecordType *RT = RetTy->getAs<RecordType>();
5743 SmallVector<llvm::Type*, 8> RTList;
5745 if (RT && RT->isStructureOrClassType()) {
5746 const RecordDecl *RD = RT->getDecl();
5747 const ASTRecordLayout &Layout = getContext().getASTRecordLayout(RD);
5748 unsigned FieldCnt = Layout.getFieldCount();
5750 // N32/64 returns struct/classes in floating point registers if the
5751 // following conditions are met:
5752 // 1. The size of the struct/class is no larger than 128-bit.
5753 // 2. The struct/class has one or two fields all of which are floating
5755 // 3. The offset of the first field is zero (this follows what gcc does).
5757 // Any other composite results are returned in integer registers.
5759 if (FieldCnt && (FieldCnt <= 2) && !Layout.getFieldOffset(0)) {
5760 RecordDecl::field_iterator b = RD->field_begin(), e = RD->field_end();
5761 for (; b != e; ++b) {
5762 const BuiltinType *BT = b->getType()->getAs<BuiltinType>();
5764 if (!BT || !BT->isFloatingPoint())
5767 RTList.push_back(CGT.ConvertType(b->getType()));
5771 return llvm::StructType::get(getVMContext(), RTList,
5772 RD->hasAttr<PackedAttr>());
5778 CoerceToIntArgs(Size, RTList);
5779 return llvm::StructType::get(getVMContext(), RTList);
5782 ABIArgInfo MipsABIInfo::classifyReturnType(QualType RetTy) const {
5783 uint64_t Size = getContext().getTypeSize(RetTy);
5785 if (RetTy->isVoidType())
5786 return ABIArgInfo::getIgnore();
5788 // O32 doesn't treat zero-sized structs differently from other structs.
5789 // However, N32/N64 ignores zero sized return values.
5790 if (!IsO32 && Size == 0)
5791 return ABIArgInfo::getIgnore();
5793 if (isAggregateTypeForABI(RetTy) || RetTy->isVectorType()) {
5795 if (RetTy->isAnyComplexType())
5796 return ABIArgInfo::getDirect();
5798 // O32 returns integer vectors in registers and N32/N64 returns all small
5799 // aggregates in registers.
5801 (RetTy->isVectorType() && !RetTy->hasFloatingRepresentation())) {
5802 ABIArgInfo ArgInfo =
5803 ABIArgInfo::getDirect(returnAggregateInRegs(RetTy, Size));
5804 ArgInfo.setInReg(true);
5809 return ABIArgInfo::getIndirect(0);
5812 // Treat an enum type as its underlying type.
5813 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
5814 RetTy = EnumTy->getDecl()->getIntegerType();
5816 return (RetTy->isPromotableIntegerType() ?
5817 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
5820 void MipsABIInfo::computeInfo(CGFunctionInfo &FI) const {
5821 ABIArgInfo &RetInfo = FI.getReturnInfo();
5822 if (!getCXXABI().classifyReturnType(FI))
5823 RetInfo = classifyReturnType(FI.getReturnType());
5825 // Check if a pointer to an aggregate is passed as a hidden argument.
5826 uint64_t Offset = RetInfo.isIndirect() ? MinABIStackAlignInBytes : 0;
5828 for (auto &I : FI.arguments())
5829 I.info = classifyArgumentType(I.type, Offset);
5832 llvm::Value* MipsABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
5833 CodeGenFunction &CGF) const {
5834 llvm::Type *BP = CGF.Int8PtrTy;
5835 llvm::Type *BPP = CGF.Int8PtrPtrTy;
5837 // Integer arguments are promoted to 32-bit on O32 and 64-bit on N32/N64.
5838 // Pointers are also promoted in the same way but this only matters for N32.
5839 unsigned SlotSizeInBits = IsO32 ? 32 : 64;
5840 unsigned PtrWidth = getTarget().getPointerWidth(0);
5841 if ((Ty->isIntegerType() &&
5842 CGF.getContext().getIntWidth(Ty) < SlotSizeInBits) ||
5843 (Ty->isPointerType() && PtrWidth < SlotSizeInBits)) {
5844 Ty = CGF.getContext().getIntTypeForBitwidth(SlotSizeInBits,
5845 Ty->isSignedIntegerType());
5848 CGBuilderTy &Builder = CGF.Builder;
5849 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
5850 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
5852 std::min(getContext().getTypeAlign(Ty) / 8, StackAlignInBytes);
5853 llvm::Type *PTy = llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
5854 llvm::Value *AddrTyped;
5855 llvm::IntegerType *IntTy = (PtrWidth == 32) ? CGF.Int32Ty : CGF.Int64Ty;
5857 if (TypeAlign > MinABIStackAlignInBytes) {
5858 llvm::Value *AddrAsInt = CGF.Builder.CreatePtrToInt(Addr, IntTy);
5859 llvm::Value *Inc = llvm::ConstantInt::get(IntTy, TypeAlign - 1);
5860 llvm::Value *Mask = llvm::ConstantInt::get(IntTy, -TypeAlign);
5861 llvm::Value *Add = CGF.Builder.CreateAdd(AddrAsInt, Inc);
5862 llvm::Value *And = CGF.Builder.CreateAnd(Add, Mask);
5863 AddrTyped = CGF.Builder.CreateIntToPtr(And, PTy);
5866 AddrTyped = Builder.CreateBitCast(Addr, PTy);
5868 llvm::Value *AlignedAddr = Builder.CreateBitCast(AddrTyped, BP);
5869 TypeAlign = std::max((unsigned)TypeAlign, MinABIStackAlignInBytes);
5870 unsigned ArgSizeInBits = CGF.getContext().getTypeSize(Ty);
5871 uint64_t Offset = llvm::RoundUpToAlignment(ArgSizeInBits / 8, TypeAlign);
5872 llvm::Value *NextAddr =
5873 Builder.CreateGEP(AlignedAddr, llvm::ConstantInt::get(IntTy, Offset),
5875 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
5880 bool MipsABIInfo::shouldSignExtUnsignedType(QualType Ty) const {
5881 int TySize = getContext().getTypeSize(Ty);
5883 // MIPS64 ABI requires unsigned 32 bit integers to be sign extended.
5884 if (Ty->isUnsignedIntegerOrEnumerationType() && TySize == 32)
5891 MIPSTargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
5892 llvm::Value *Address) const {
5893 // This information comes from gcc's implementation, which seems to
5894 // as canonical as it gets.
5896 // Everything on MIPS is 4 bytes. Double-precision FP registers
5897 // are aliased to pairs of single-precision FP registers.
5898 llvm::Value *Four8 = llvm::ConstantInt::get(CGF.Int8Ty, 4);
5900 // 0-31 are the general purpose registers, $0 - $31.
5901 // 32-63 are the floating-point registers, $f0 - $f31.
5902 // 64 and 65 are the multiply/divide registers, $hi and $lo.
5903 // 66 is the (notional, I think) register for signal-handler return.
5904 AssignToArrayRange(CGF.Builder, Address, Four8, 0, 65);
5906 // 67-74 are the floating-point status registers, $fcc0 - $fcc7.
5907 // They are one bit wide and ignored here.
5909 // 80-111 are the coprocessor 0 registers, $c0r0 - $c0r31.
5910 // (coprocessor 1 is the FP unit)
5911 // 112-143 are the coprocessor 2 registers, $c2r0 - $c2r31.
5912 // 144-175 are the coprocessor 3 registers, $c3r0 - $c3r31.
5913 // 176-181 are the DSP accumulator registers.
5914 AssignToArrayRange(CGF.Builder, Address, Four8, 80, 181);
5918 //===----------------------------------------------------------------------===//
5919 // TCE ABI Implementation (see http://tce.cs.tut.fi). Uses mostly the defaults.
5920 // Currently subclassed only to implement custom OpenCL C function attribute
5922 //===----------------------------------------------------------------------===//
5926 class TCETargetCodeGenInfo : public DefaultTargetCodeGenInfo {
5928 TCETargetCodeGenInfo(CodeGenTypes &CGT)
5929 : DefaultTargetCodeGenInfo(CGT) {}
5931 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
5932 CodeGen::CodeGenModule &M) const override;
5935 void TCETargetCodeGenInfo::setTargetAttributes(
5936 const Decl *D, llvm::GlobalValue *GV, CodeGen::CodeGenModule &M) const {
5937 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
5940 llvm::Function *F = cast<llvm::Function>(GV);
5942 if (M.getLangOpts().OpenCL) {
5943 if (FD->hasAttr<OpenCLKernelAttr>()) {
5944 // OpenCL C Kernel functions are not subject to inlining
5945 F->addFnAttr(llvm::Attribute::NoInline);
5946 const ReqdWorkGroupSizeAttr *Attr = FD->getAttr<ReqdWorkGroupSizeAttr>();
5948 // Convert the reqd_work_group_size() attributes to metadata.
5949 llvm::LLVMContext &Context = F->getContext();
5950 llvm::NamedMDNode *OpenCLMetadata =
5951 M.getModule().getOrInsertNamedMetadata(
5952 "opencl.kernel_wg_size_info");
5954 SmallVector<llvm::Metadata *, 5> Operands;
5955 Operands.push_back(llvm::ConstantAsMetadata::get(F));
5958 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
5959 M.Int32Ty, llvm::APInt(32, Attr->getXDim()))));
5961 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
5962 M.Int32Ty, llvm::APInt(32, Attr->getYDim()))));
5964 llvm::ConstantAsMetadata::get(llvm::Constant::getIntegerValue(
5965 M.Int32Ty, llvm::APInt(32, Attr->getZDim()))));
5967 // Add a boolean constant operand for "required" (true) or "hint"
5968 // (false) for implementing the work_group_size_hint attr later.
5969 // Currently always true as the hint is not yet implemented.
5971 llvm::ConstantAsMetadata::get(llvm::ConstantInt::getTrue(Context)));
5972 OpenCLMetadata->addOperand(llvm::MDNode::get(Context, Operands));
5980 //===----------------------------------------------------------------------===//
5981 // Hexagon ABI Implementation
5982 //===----------------------------------------------------------------------===//
5986 class HexagonABIInfo : public ABIInfo {
5990 HexagonABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
5994 ABIArgInfo classifyReturnType(QualType RetTy) const;
5995 ABIArgInfo classifyArgumentType(QualType RetTy) const;
5997 void computeInfo(CGFunctionInfo &FI) const override;
5999 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6000 CodeGenFunction &CGF) const override;
6003 class HexagonTargetCodeGenInfo : public TargetCodeGenInfo {
6005 HexagonTargetCodeGenInfo(CodeGenTypes &CGT)
6006 :TargetCodeGenInfo(new HexagonABIInfo(CGT)) {}
6008 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
6015 void HexagonABIInfo::computeInfo(CGFunctionInfo &FI) const {
6016 if (!getCXXABI().classifyReturnType(FI))
6017 FI.getReturnInfo() = classifyReturnType(FI.getReturnType());
6018 for (auto &I : FI.arguments())
6019 I.info = classifyArgumentType(I.type);
6022 ABIArgInfo HexagonABIInfo::classifyArgumentType(QualType Ty) const {
6023 if (!isAggregateTypeForABI(Ty)) {
6024 // Treat an enum type as its underlying type.
6025 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
6026 Ty = EnumTy->getDecl()->getIntegerType();
6028 return (Ty->isPromotableIntegerType() ?
6029 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
6032 // Ignore empty records.
6033 if (isEmptyRecord(getContext(), Ty, true))
6034 return ABIArgInfo::getIgnore();
6036 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
6037 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
6039 uint64_t Size = getContext().getTypeSize(Ty);
6041 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
6042 // Pass in the smallest viable integer type.
6044 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
6046 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
6048 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
6050 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
6053 ABIArgInfo HexagonABIInfo::classifyReturnType(QualType RetTy) const {
6054 if (RetTy->isVoidType())
6055 return ABIArgInfo::getIgnore();
6057 // Large vector types should be returned via memory.
6058 if (RetTy->isVectorType() && getContext().getTypeSize(RetTy) > 64)
6059 return ABIArgInfo::getIndirect(0);
6061 if (!isAggregateTypeForABI(RetTy)) {
6062 // Treat an enum type as its underlying type.
6063 if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
6064 RetTy = EnumTy->getDecl()->getIntegerType();
6066 return (RetTy->isPromotableIntegerType() ?
6067 ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
6070 if (isEmptyRecord(getContext(), RetTy, true))
6071 return ABIArgInfo::getIgnore();
6073 // Aggregates <= 8 bytes are returned in r0; other aggregates
6074 // are returned indirectly.
6075 uint64_t Size = getContext().getTypeSize(RetTy);
6077 // Return in the smallest viable integer type.
6079 return ABIArgInfo::getDirect(llvm::Type::getInt8Ty(getVMContext()));
6081 return ABIArgInfo::getDirect(llvm::Type::getInt16Ty(getVMContext()));
6083 return ABIArgInfo::getDirect(llvm::Type::getInt32Ty(getVMContext()));
6084 return ABIArgInfo::getDirect(llvm::Type::getInt64Ty(getVMContext()));
6087 return ABIArgInfo::getIndirect(0, /*ByVal=*/true);
6090 llvm::Value *HexagonABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6091 CodeGenFunction &CGF) const {
6092 // FIXME: Need to handle alignment
6093 llvm::Type *BPP = CGF.Int8PtrPtrTy;
6095 CGBuilderTy &Builder = CGF.Builder;
6096 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
6098 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
6100 llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
6101 llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
6104 llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
6105 llvm::Value *NextAddr =
6106 Builder.CreateGEP(Addr, llvm::ConstantInt::get(CGF.Int32Ty, Offset),
6108 Builder.CreateStore(NextAddr, VAListAddrAsBPP);
6113 //===----------------------------------------------------------------------===//
6114 // AMDGPU ABI Implementation
6115 //===----------------------------------------------------------------------===//
6119 class AMDGPUTargetCodeGenInfo : public TargetCodeGenInfo {
6121 AMDGPUTargetCodeGenInfo(CodeGenTypes &CGT)
6122 : TargetCodeGenInfo(new DefaultABIInfo(CGT)) {}
6123 void setTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
6124 CodeGen::CodeGenModule &M) const override;
6129 void AMDGPUTargetCodeGenInfo::setTargetAttributes(
6131 llvm::GlobalValue *GV,
6132 CodeGen::CodeGenModule &M) const {
6133 const FunctionDecl *FD = dyn_cast<FunctionDecl>(D);
6137 if (const auto Attr = FD->getAttr<AMDGPUNumVGPRAttr>()) {
6138 llvm::Function *F = cast<llvm::Function>(GV);
6139 uint32_t NumVGPR = Attr->getNumVGPR();
6141 F->addFnAttr("amdgpu_num_vgpr", llvm::utostr(NumVGPR));
6144 if (const auto Attr = FD->getAttr<AMDGPUNumSGPRAttr>()) {
6145 llvm::Function *F = cast<llvm::Function>(GV);
6146 unsigned NumSGPR = Attr->getNumSGPR();
6148 F->addFnAttr("amdgpu_num_sgpr", llvm::utostr(NumSGPR));
6153 //===----------------------------------------------------------------------===//
6154 // SPARC v9 ABI Implementation.
6155 // Based on the SPARC Compliance Definition version 2.4.1.
6157 // Function arguments a mapped to a nominal "parameter array" and promoted to
6158 // registers depending on their type. Each argument occupies 8 or 16 bytes in
6159 // the array, structs larger than 16 bytes are passed indirectly.
6161 // One case requires special care:
6168 // When a struct mixed is passed by value, it only occupies 8 bytes in the
6169 // parameter array, but the int is passed in an integer register, and the float
6170 // is passed in a floating point register. This is represented as two arguments
6171 // with the LLVM IR inreg attribute:
6173 // declare void f(i32 inreg %i, float inreg %f)
6175 // The code generator will only allocate 4 bytes from the parameter array for
6176 // the inreg arguments. All other arguments are allocated a multiple of 8
6180 class SparcV9ABIInfo : public ABIInfo {
6182 SparcV9ABIInfo(CodeGenTypes &CGT) : ABIInfo(CGT) {}
6185 ABIArgInfo classifyType(QualType RetTy, unsigned SizeLimit) const;
6186 void computeInfo(CGFunctionInfo &FI) const override;
6187 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6188 CodeGenFunction &CGF) const override;
6190 // Coercion type builder for structs passed in registers. The coercion type
6191 // serves two purposes:
6193 // 1. Pad structs to a multiple of 64 bits, so they are passed 'left-aligned'
6195 // 2. Expose aligned floating point elements as first-level elements, so the
6196 // code generator knows to pass them in floating point registers.
6198 // We also compute the InReg flag which indicates that the struct contains
6199 // aligned 32-bit floats.
6201 struct CoerceBuilder {
6202 llvm::LLVMContext &Context;
6203 const llvm::DataLayout &DL;
6204 SmallVector<llvm::Type*, 8> Elems;
6208 CoerceBuilder(llvm::LLVMContext &c, const llvm::DataLayout &dl)
6209 : Context(c), DL(dl), Size(0), InReg(false) {}
6211 // Pad Elems with integers until Size is ToSize.
6212 void pad(uint64_t ToSize) {
6213 assert(ToSize >= Size && "Cannot remove elements");
6217 // Finish the current 64-bit word.
6218 uint64_t Aligned = llvm::RoundUpToAlignment(Size, 64);
6219 if (Aligned > Size && Aligned <= ToSize) {
6220 Elems.push_back(llvm::IntegerType::get(Context, Aligned - Size));
6224 // Add whole 64-bit words.
6225 while (Size + 64 <= ToSize) {
6226 Elems.push_back(llvm::Type::getInt64Ty(Context));
6230 // Final in-word padding.
6231 if (Size < ToSize) {
6232 Elems.push_back(llvm::IntegerType::get(Context, ToSize - Size));
6237 // Add a floating point element at Offset.
6238 void addFloat(uint64_t Offset, llvm::Type *Ty, unsigned Bits) {
6239 // Unaligned floats are treated as integers.
6242 // The InReg flag is only required if there are any floats < 64 bits.
6246 Elems.push_back(Ty);
6247 Size = Offset + Bits;
6250 // Add a struct type to the coercion type, starting at Offset (in bits).
6251 void addStruct(uint64_t Offset, llvm::StructType *StrTy) {
6252 const llvm::StructLayout *Layout = DL.getStructLayout(StrTy);
6253 for (unsigned i = 0, e = StrTy->getNumElements(); i != e; ++i) {
6254 llvm::Type *ElemTy = StrTy->getElementType(i);
6255 uint64_t ElemOffset = Offset + Layout->getElementOffsetInBits(i);
6256 switch (ElemTy->getTypeID()) {
6257 case llvm::Type::StructTyID:
6258 addStruct(ElemOffset, cast<llvm::StructType>(ElemTy));
6260 case llvm::Type::FloatTyID:
6261 addFloat(ElemOffset, ElemTy, 32);
6263 case llvm::Type::DoubleTyID:
6264 addFloat(ElemOffset, ElemTy, 64);
6266 case llvm::Type::FP128TyID:
6267 addFloat(ElemOffset, ElemTy, 128);
6269 case llvm::Type::PointerTyID:
6270 if (ElemOffset % 64 == 0) {
6272 Elems.push_back(ElemTy);
6282 // Check if Ty is a usable substitute for the coercion type.
6283 bool isUsableType(llvm::StructType *Ty) const {
6284 return llvm::makeArrayRef(Elems) == Ty->elements();
6287 // Get the coercion type as a literal struct type.
6288 llvm::Type *getType() const {
6289 if (Elems.size() == 1)
6290 return Elems.front();
6292 return llvm::StructType::get(Context, Elems);
6296 } // end anonymous namespace
6299 SparcV9ABIInfo::classifyType(QualType Ty, unsigned SizeLimit) const {
6300 if (Ty->isVoidType())
6301 return ABIArgInfo::getIgnore();
6303 uint64_t Size = getContext().getTypeSize(Ty);
6305 // Anything too big to fit in registers is passed with an explicit indirect
6306 // pointer / sret pointer.
6307 if (Size > SizeLimit)
6308 return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
6310 // Treat an enum type as its underlying type.
6311 if (const EnumType *EnumTy = Ty->getAs<EnumType>())
6312 Ty = EnumTy->getDecl()->getIntegerType();
6314 // Integer types smaller than a register are extended.
6315 if (Size < 64 && Ty->isIntegerType())
6316 return ABIArgInfo::getExtend();
6318 // Other non-aggregates go in registers.
6319 if (!isAggregateTypeForABI(Ty))
6320 return ABIArgInfo::getDirect();
6322 // If a C++ object has either a non-trivial copy constructor or a non-trivial
6323 // destructor, it is passed with an explicit indirect pointer / sret pointer.
6324 if (CGCXXABI::RecordArgABI RAA = getRecordArgABI(Ty, getCXXABI()))
6325 return ABIArgInfo::getIndirect(0, RAA == CGCXXABI::RAA_DirectInMemory);
6327 // This is a small aggregate type that should be passed in registers.
6328 // Build a coercion type from the LLVM struct type.
6329 llvm::StructType *StrTy = dyn_cast<llvm::StructType>(CGT.ConvertType(Ty));
6331 return ABIArgInfo::getDirect();
6333 CoerceBuilder CB(getVMContext(), getDataLayout());
6334 CB.addStruct(0, StrTy);
6335 CB.pad(llvm::RoundUpToAlignment(CB.DL.getTypeSizeInBits(StrTy), 64));
6337 // Try to use the original type for coercion.
6338 llvm::Type *CoerceTy = CB.isUsableType(StrTy) ? StrTy : CB.getType();
6341 return ABIArgInfo::getDirectInReg(CoerceTy);
6343 return ABIArgInfo::getDirect(CoerceTy);
6346 llvm::Value *SparcV9ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6347 CodeGenFunction &CGF) const {
6348 ABIArgInfo AI = classifyType(Ty, 16 * 8);
6349 llvm::Type *ArgTy = CGT.ConvertType(Ty);
6350 if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
6351 AI.setCoerceToType(ArgTy);
6353 llvm::Type *BPP = CGF.Int8PtrPtrTy;
6354 CGBuilderTy &Builder = CGF.Builder;
6355 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP, "ap");
6356 llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
6357 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
6358 llvm::Value *ArgAddr;
6361 switch (AI.getKind()) {
6362 case ABIArgInfo::Expand:
6363 case ABIArgInfo::InAlloca:
6364 llvm_unreachable("Unsupported ABI kind for va_arg");
6366 case ABIArgInfo::Extend:
6369 .CreateConstGEP1_32(Addr, 8 - getDataLayout().getTypeAllocSize(ArgTy),
6373 case ABIArgInfo::Direct:
6374 Stride = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
6378 case ABIArgInfo::Indirect:
6380 ArgAddr = Builder.CreateBitCast(Addr,
6381 llvm::PointerType::getUnqual(ArgPtrTy),
6383 ArgAddr = Builder.CreateLoad(ArgAddr, "indirect.arg");
6386 case ABIArgInfo::Ignore:
6387 return llvm::UndefValue::get(ArgPtrTy);
6391 Addr = Builder.CreateConstGEP1_32(Addr, Stride, "ap.next");
6392 Builder.CreateStore(Addr, VAListAddrAsBPP);
6394 return Builder.CreatePointerCast(ArgAddr, ArgPtrTy, "arg.addr");
6397 void SparcV9ABIInfo::computeInfo(CGFunctionInfo &FI) const {
6398 FI.getReturnInfo() = classifyType(FI.getReturnType(), 32 * 8);
6399 for (auto &I : FI.arguments())
6400 I.info = classifyType(I.type, 16 * 8);
6404 class SparcV9TargetCodeGenInfo : public TargetCodeGenInfo {
6406 SparcV9TargetCodeGenInfo(CodeGenTypes &CGT)
6407 : TargetCodeGenInfo(new SparcV9ABIInfo(CGT)) {}
6409 int getDwarfEHStackPointer(CodeGen::CodeGenModule &M) const override {
6413 bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
6414 llvm::Value *Address) const override;
6416 } // end anonymous namespace
6419 SparcV9TargetCodeGenInfo::initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
6420 llvm::Value *Address) const {
6421 // This is calculated from the LLVM and GCC tables and verified
6422 // against gcc output. AFAIK all ABIs use the same encoding.
6424 CodeGen::CGBuilderTy &Builder = CGF.Builder;
6426 llvm::IntegerType *i8 = CGF.Int8Ty;
6427 llvm::Value *Four8 = llvm::ConstantInt::get(i8, 4);
6428 llvm::Value *Eight8 = llvm::ConstantInt::get(i8, 8);
6430 // 0-31: the 8-byte general-purpose registers
6431 AssignToArrayRange(Builder, Address, Eight8, 0, 31);
6433 // 32-63: f0-31, the 4-byte floating-point registers
6434 AssignToArrayRange(Builder, Address, Four8, 32, 63);
6444 AssignToArrayRange(Builder, Address, Eight8, 64, 71);
6446 // 72-87: d0-15, the 8-byte floating-point registers
6447 AssignToArrayRange(Builder, Address, Eight8, 72, 87);
6453 //===----------------------------------------------------------------------===//
6454 // XCore ABI Implementation
6455 //===----------------------------------------------------------------------===//
6459 /// A SmallStringEnc instance is used to build up the TypeString by passing
6460 /// it by reference between functions that append to it.
6461 typedef llvm::SmallString<128> SmallStringEnc;
6463 /// TypeStringCache caches the meta encodings of Types.
6465 /// The reason for caching TypeStrings is two fold:
6466 /// 1. To cache a type's encoding for later uses;
6467 /// 2. As a means to break recursive member type inclusion.
6469 /// A cache Entry can have a Status of:
6470 /// NonRecursive: The type encoding is not recursive;
6471 /// Recursive: The type encoding is recursive;
6472 /// Incomplete: An incomplete TypeString;
6473 /// IncompleteUsed: An incomplete TypeString that has been used in a
6474 /// Recursive type encoding.
6476 /// A NonRecursive entry will have all of its sub-members expanded as fully
6477 /// as possible. Whilst it may contain types which are recursive, the type
6478 /// itself is not recursive and thus its encoding may be safely used whenever
6479 /// the type is encountered.
6481 /// A Recursive entry will have all of its sub-members expanded as fully as
6482 /// possible. The type itself is recursive and it may contain other types which
6483 /// are recursive. The Recursive encoding must not be used during the expansion
6484 /// of a recursive type's recursive branch. For simplicity the code uses
6485 /// IncompleteCount to reject all usage of Recursive encodings for member types.
6487 /// An Incomplete entry is always a RecordType and only encodes its
6488 /// identifier e.g. "s(S){}". Incomplete 'StubEnc' entries are ephemeral and
6489 /// are placed into the cache during type expansion as a means to identify and
6490 /// handle recursive inclusion of types as sub-members. If there is recursion
6491 /// the entry becomes IncompleteUsed.
6493 /// During the expansion of a RecordType's members:
6495 /// If the cache contains a NonRecursive encoding for the member type, the
6496 /// cached encoding is used;
6498 /// If the cache contains a Recursive encoding for the member type, the
6499 /// cached encoding is 'Swapped' out, as it may be incorrect, and...
6501 /// If the member is a RecordType, an Incomplete encoding is placed into the
6502 /// cache to break potential recursive inclusion of itself as a sub-member;
6504 /// Once a member RecordType has been expanded, its temporary incomplete
6505 /// entry is removed from the cache. If a Recursive encoding was swapped out
6506 /// it is swapped back in;
6508 /// If an incomplete entry is used to expand a sub-member, the incomplete
6509 /// entry is marked as IncompleteUsed. The cache keeps count of how many
6510 /// IncompleteUsed entries it currently contains in IncompleteUsedCount;
6512 /// If a member's encoding is found to be a NonRecursive or Recursive viz:
6513 /// IncompleteUsedCount==0, the member's encoding is added to the cache.
6514 /// Else the member is part of a recursive type and thus the recursion has
6515 /// been exited too soon for the encoding to be correct for the member.
6517 class TypeStringCache {
6518 enum Status {NonRecursive, Recursive, Incomplete, IncompleteUsed};
6520 std::string Str; // The encoded TypeString for the type.
6521 enum Status State; // Information about the encoding in 'Str'.
6522 std::string Swapped; // A temporary place holder for a Recursive encoding
6523 // during the expansion of RecordType's members.
6525 std::map<const IdentifierInfo *, struct Entry> Map;
6526 unsigned IncompleteCount; // Number of Incomplete entries in the Map.
6527 unsigned IncompleteUsedCount; // Number of IncompleteUsed entries in the Map.
6529 TypeStringCache() : IncompleteCount(0), IncompleteUsedCount(0) {};
6530 void addIncomplete(const IdentifierInfo *ID, std::string StubEnc);
6531 bool removeIncomplete(const IdentifierInfo *ID);
6532 void addIfComplete(const IdentifierInfo *ID, StringRef Str,
6534 StringRef lookupStr(const IdentifierInfo *ID);
6537 /// TypeString encodings for enum & union fields must be order.
6538 /// FieldEncoding is a helper for this ordering process.
6539 class FieldEncoding {
6543 FieldEncoding(bool b, SmallStringEnc &e) : HasName(b), Enc(e.c_str()) {};
6544 StringRef str() {return Enc.c_str();};
6545 bool operator<(const FieldEncoding &rhs) const {
6546 if (HasName != rhs.HasName) return HasName;
6547 return Enc < rhs.Enc;
6551 class XCoreABIInfo : public DefaultABIInfo {
6553 XCoreABIInfo(CodeGen::CodeGenTypes &CGT) : DefaultABIInfo(CGT) {}
6554 llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6555 CodeGenFunction &CGF) const override;
6558 class XCoreTargetCodeGenInfo : public TargetCodeGenInfo {
6559 mutable TypeStringCache TSC;
6561 XCoreTargetCodeGenInfo(CodeGenTypes &CGT)
6562 :TargetCodeGenInfo(new XCoreABIInfo(CGT)) {}
6563 void emitTargetMD(const Decl *D, llvm::GlobalValue *GV,
6564 CodeGen::CodeGenModule &M) const override;
6567 } // End anonymous namespace.
6569 llvm::Value *XCoreABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
6570 CodeGenFunction &CGF) const {
6571 CGBuilderTy &Builder = CGF.Builder;
6574 llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr,
6576 llvm::Value *AP = Builder.CreateLoad(VAListAddrAsBPP);
6578 // Handle the argument.
6579 ABIArgInfo AI = classifyArgumentType(Ty);
6580 llvm::Type *ArgTy = CGT.ConvertType(Ty);
6581 if (AI.canHaveCoerceToType() && !AI.getCoerceToType())
6582 AI.setCoerceToType(ArgTy);
6583 llvm::Type *ArgPtrTy = llvm::PointerType::getUnqual(ArgTy);
6585 uint64_t ArgSize = 0;
6586 switch (AI.getKind()) {
6587 case ABIArgInfo::Expand:
6588 case ABIArgInfo::InAlloca:
6589 llvm_unreachable("Unsupported ABI kind for va_arg");
6590 case ABIArgInfo::Ignore:
6591 Val = llvm::UndefValue::get(ArgPtrTy);
6594 case ABIArgInfo::Extend:
6595 case ABIArgInfo::Direct:
6596 Val = Builder.CreatePointerCast(AP, ArgPtrTy);
6597 ArgSize = getDataLayout().getTypeAllocSize(AI.getCoerceToType());
6601 case ABIArgInfo::Indirect:
6602 llvm::Value *ArgAddr;
6603 ArgAddr = Builder.CreateBitCast(AP, llvm::PointerType::getUnqual(ArgPtrTy));
6604 ArgAddr = Builder.CreateLoad(ArgAddr);
6605 Val = Builder.CreatePointerCast(ArgAddr, ArgPtrTy);
6610 // Increment the VAList.
6612 llvm::Value *APN = Builder.CreateConstGEP1_32(AP, ArgSize);
6613 Builder.CreateStore(APN, VAListAddrAsBPP);
6618 /// During the expansion of a RecordType, an incomplete TypeString is placed
6619 /// into the cache as a means to identify and break recursion.
6620 /// If there is a Recursive encoding in the cache, it is swapped out and will
6621 /// be reinserted by removeIncomplete().
6622 /// All other types of encoding should have been used rather than arriving here.
6623 void TypeStringCache::addIncomplete(const IdentifierInfo *ID,
6624 std::string StubEnc) {
6628 assert( (E.Str.empty() || E.State == Recursive) &&
6629 "Incorrectly use of addIncomplete");
6630 assert(!StubEnc.empty() && "Passing an empty string to addIncomplete()");
6631 E.Swapped.swap(E.Str); // swap out the Recursive
6632 E.Str.swap(StubEnc);
6633 E.State = Incomplete;
6637 /// Once the RecordType has been expanded, the temporary incomplete TypeString
6638 /// must be removed from the cache.
6639 /// If a Recursive was swapped out by addIncomplete(), it will be replaced.
6640 /// Returns true if the RecordType was defined recursively.
6641 bool TypeStringCache::removeIncomplete(const IdentifierInfo *ID) {
6644 auto I = Map.find(ID);
6645 assert(I != Map.end() && "Entry not present");
6646 Entry &E = I->second;
6647 assert( (E.State == Incomplete ||
6648 E.State == IncompleteUsed) &&
6649 "Entry must be an incomplete type");
6650 bool IsRecursive = false;
6651 if (E.State == IncompleteUsed) {
6652 // We made use of our Incomplete encoding, thus we are recursive.
6654 --IncompleteUsedCount;
6656 if (E.Swapped.empty())
6659 // Swap the Recursive back.
6660 E.Swapped.swap(E.Str);
6662 E.State = Recursive;
6668 /// Add the encoded TypeString to the cache only if it is NonRecursive or
6669 /// Recursive (viz: all sub-members were expanded as fully as possible).
6670 void TypeStringCache::addIfComplete(const IdentifierInfo *ID, StringRef Str,
6672 if (!ID || IncompleteUsedCount)
6673 return; // No key or it is is an incomplete sub-type so don't add.
6675 if (IsRecursive && !E.Str.empty()) {
6676 assert(E.State==Recursive && E.Str.size() == Str.size() &&
6677 "This is not the same Recursive entry");
6678 // The parent container was not recursive after all, so we could have used
6679 // this Recursive sub-member entry after all, but we assumed the worse when
6680 // we started viz: IncompleteCount!=0.
6683 assert(E.Str.empty() && "Entry already present");
6685 E.State = IsRecursive? Recursive : NonRecursive;
6688 /// Return a cached TypeString encoding for the ID. If there isn't one, or we
6689 /// are recursively expanding a type (IncompleteCount != 0) and the cached
6690 /// encoding is Recursive, return an empty StringRef.
6691 StringRef TypeStringCache::lookupStr(const IdentifierInfo *ID) {
6693 return StringRef(); // We have no key.
6694 auto I = Map.find(ID);
6696 return StringRef(); // We have no encoding.
6697 Entry &E = I->second;
6698 if (E.State == Recursive && IncompleteCount)
6699 return StringRef(); // We don't use Recursive encodings for member types.
6701 if (E.State == Incomplete) {
6702 // The incomplete type is being used to break out of recursion.
6703 E.State = IncompleteUsed;
6704 ++IncompleteUsedCount;
6706 return E.Str.c_str();
6709 /// The XCore ABI includes a type information section that communicates symbol
6710 /// type information to the linker. The linker uses this information to verify
6711 /// safety/correctness of things such as array bound and pointers et al.
6712 /// The ABI only requires C (and XC) language modules to emit TypeStrings.
6713 /// This type information (TypeString) is emitted into meta data for all global
6714 /// symbols: definitions, declarations, functions & variables.
6716 /// The TypeString carries type, qualifier, name, size & value details.
6717 /// Please see 'Tools Development Guide' section 2.16.2 for format details:
6718 /// https://www.xmos.com/download/public/Tools-Development-Guide%28X9114A%29.pdf
6719 /// The output is tested by test/CodeGen/xcore-stringtype.c.
6721 static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
6722 CodeGen::CodeGenModule &CGM, TypeStringCache &TSC);
6724 /// XCore uses emitTargetMD to emit TypeString metadata for global symbols.
6725 void XCoreTargetCodeGenInfo::emitTargetMD(const Decl *D, llvm::GlobalValue *GV,
6726 CodeGen::CodeGenModule &CGM) const {
6728 if (getTypeString(Enc, D, CGM, TSC)) {
6729 llvm::LLVMContext &Ctx = CGM.getModule().getContext();
6730 llvm::SmallVector<llvm::Metadata *, 2> MDVals;
6731 MDVals.push_back(llvm::ConstantAsMetadata::get(GV));
6732 MDVals.push_back(llvm::MDString::get(Ctx, Enc.str()));
6733 llvm::NamedMDNode *MD =
6734 CGM.getModule().getOrInsertNamedMetadata("xcore.typestrings");
6735 MD->addOperand(llvm::MDNode::get(Ctx, MDVals));
6739 static bool appendType(SmallStringEnc &Enc, QualType QType,
6740 const CodeGen::CodeGenModule &CGM,
6741 TypeStringCache &TSC);
6743 /// Helper function for appendRecordType().
6744 /// Builds a SmallVector containing the encoded field types in declaration
6746 static bool extractFieldType(SmallVectorImpl<FieldEncoding> &FE,
6747 const RecordDecl *RD,
6748 const CodeGen::CodeGenModule &CGM,
6749 TypeStringCache &TSC) {
6750 for (const auto *Field : RD->fields()) {
6753 Enc += Field->getName();
6755 if (Field->isBitField()) {
6757 llvm::raw_svector_ostream OS(Enc);
6759 OS << Field->getBitWidthValue(CGM.getContext());
6763 if (!appendType(Enc, Field->getType(), CGM, TSC))
6765 if (Field->isBitField())
6768 FE.emplace_back(!Field->getName().empty(), Enc);
6773 /// Appends structure and union types to Enc and adds encoding to cache.
6774 /// Recursively calls appendType (via extractFieldType) for each field.
6775 /// Union types have their fields ordered according to the ABI.
6776 static bool appendRecordType(SmallStringEnc &Enc, const RecordType *RT,
6777 const CodeGen::CodeGenModule &CGM,
6778 TypeStringCache &TSC, const IdentifierInfo *ID) {
6779 // Append the cached TypeString if we have one.
6780 StringRef TypeString = TSC.lookupStr(ID);
6781 if (!TypeString.empty()) {
6786 // Start to emit an incomplete TypeString.
6787 size_t Start = Enc.size();
6788 Enc += (RT->isUnionType()? 'u' : 's');
6791 Enc += ID->getName();
6794 // We collect all encoded fields and order as necessary.
6795 bool IsRecursive = false;
6796 const RecordDecl *RD = RT->getDecl()->getDefinition();
6797 if (RD && !RD->field_empty()) {
6798 // An incomplete TypeString stub is placed in the cache for this RecordType
6799 // so that recursive calls to this RecordType will use it whilst building a
6800 // complete TypeString for this RecordType.
6801 SmallVector<FieldEncoding, 16> FE;
6802 std::string StubEnc(Enc.substr(Start).str());
6803 StubEnc += '}'; // StubEnc now holds a valid incomplete TypeString.
6804 TSC.addIncomplete(ID, std::move(StubEnc));
6805 if (!extractFieldType(FE, RD, CGM, TSC)) {
6806 (void) TSC.removeIncomplete(ID);
6809 IsRecursive = TSC.removeIncomplete(ID);
6810 // The ABI requires unions to be sorted but not structures.
6811 // See FieldEncoding::operator< for sort algorithm.
6812 if (RT->isUnionType())
6813 std::sort(FE.begin(), FE.end());
6814 // We can now complete the TypeString.
6815 unsigned E = FE.size();
6816 for (unsigned I = 0; I != E; ++I) {
6823 TSC.addIfComplete(ID, Enc.substr(Start), IsRecursive);
6827 /// Appends enum types to Enc and adds the encoding to the cache.
6828 static bool appendEnumType(SmallStringEnc &Enc, const EnumType *ET,
6829 TypeStringCache &TSC,
6830 const IdentifierInfo *ID) {
6831 // Append the cached TypeString if we have one.
6832 StringRef TypeString = TSC.lookupStr(ID);
6833 if (!TypeString.empty()) {
6838 size_t Start = Enc.size();
6841 Enc += ID->getName();
6844 // We collect all encoded enumerations and order them alphanumerically.
6845 if (const EnumDecl *ED = ET->getDecl()->getDefinition()) {
6846 SmallVector<FieldEncoding, 16> FE;
6847 for (auto I = ED->enumerator_begin(), E = ED->enumerator_end(); I != E;
6849 SmallStringEnc EnumEnc;
6851 EnumEnc += I->getName();
6853 I->getInitVal().toString(EnumEnc);
6855 FE.push_back(FieldEncoding(!I->getName().empty(), EnumEnc));
6857 std::sort(FE.begin(), FE.end());
6858 unsigned E = FE.size();
6859 for (unsigned I = 0; I != E; ++I) {
6866 TSC.addIfComplete(ID, Enc.substr(Start), false);
6870 /// Appends type's qualifier to Enc.
6871 /// This is done prior to appending the type's encoding.
6872 static void appendQualifier(SmallStringEnc &Enc, QualType QT) {
6873 // Qualifiers are emitted in alphabetical order.
6874 static const char *Table[] = {"","c:","r:","cr:","v:","cv:","rv:","crv:"};
6876 if (QT.isConstQualified())
6878 if (QT.isRestrictQualified())
6880 if (QT.isVolatileQualified())
6882 Enc += Table[Lookup];
6885 /// Appends built-in types to Enc.
6886 static bool appendBuiltinType(SmallStringEnc &Enc, const BuiltinType *BT) {
6887 const char *EncType;
6888 switch (BT->getKind()) {
6889 case BuiltinType::Void:
6892 case BuiltinType::Bool:
6895 case BuiltinType::Char_U:
6898 case BuiltinType::UChar:
6901 case BuiltinType::SChar:
6904 case BuiltinType::UShort:
6907 case BuiltinType::Short:
6910 case BuiltinType::UInt:
6913 case BuiltinType::Int:
6916 case BuiltinType::ULong:
6919 case BuiltinType::Long:
6922 case BuiltinType::ULongLong:
6925 case BuiltinType::LongLong:
6928 case BuiltinType::Float:
6931 case BuiltinType::Double:
6934 case BuiltinType::LongDouble:
6944 /// Appends a pointer encoding to Enc before calling appendType for the pointee.
6945 static bool appendPointerType(SmallStringEnc &Enc, const PointerType *PT,
6946 const CodeGen::CodeGenModule &CGM,
6947 TypeStringCache &TSC) {
6949 if (!appendType(Enc, PT->getPointeeType(), CGM, TSC))
6955 /// Appends array encoding to Enc before calling appendType for the element.
6956 static bool appendArrayType(SmallStringEnc &Enc, QualType QT,
6957 const ArrayType *AT,
6958 const CodeGen::CodeGenModule &CGM,
6959 TypeStringCache &TSC, StringRef NoSizeEnc) {
6960 if (AT->getSizeModifier() != ArrayType::Normal)
6963 if (const ConstantArrayType *CAT = dyn_cast<ConstantArrayType>(AT))
6964 CAT->getSize().toStringUnsigned(Enc);
6966 Enc += NoSizeEnc; // Global arrays use "*", otherwise it is "".
6968 // The Qualifiers should be attached to the type rather than the array.
6969 appendQualifier(Enc, QT);
6970 if (!appendType(Enc, AT->getElementType(), CGM, TSC))
6976 /// Appends a function encoding to Enc, calling appendType for the return type
6977 /// and the arguments.
6978 static bool appendFunctionType(SmallStringEnc &Enc, const FunctionType *FT,
6979 const CodeGen::CodeGenModule &CGM,
6980 TypeStringCache &TSC) {
6982 if (!appendType(Enc, FT->getReturnType(), CGM, TSC))
6985 if (const FunctionProtoType *FPT = FT->getAs<FunctionProtoType>()) {
6986 // N.B. we are only interested in the adjusted param types.
6987 auto I = FPT->param_type_begin();
6988 auto E = FPT->param_type_end();
6991 if (!appendType(Enc, *I, CGM, TSC))
6997 if (FPT->isVariadic())
7000 if (FPT->isVariadic())
7010 /// Handles the type's qualifier before dispatching a call to handle specific
7012 static bool appendType(SmallStringEnc &Enc, QualType QType,
7013 const CodeGen::CodeGenModule &CGM,
7014 TypeStringCache &TSC) {
7016 QualType QT = QType.getCanonicalType();
7018 if (const ArrayType *AT = QT->getAsArrayTypeUnsafe())
7019 // The Qualifiers should be attached to the type rather than the array.
7020 // Thus we don't call appendQualifier() here.
7021 return appendArrayType(Enc, QT, AT, CGM, TSC, "");
7023 appendQualifier(Enc, QT);
7025 if (const BuiltinType *BT = QT->getAs<BuiltinType>())
7026 return appendBuiltinType(Enc, BT);
7028 if (const PointerType *PT = QT->getAs<PointerType>())
7029 return appendPointerType(Enc, PT, CGM, TSC);
7031 if (const EnumType *ET = QT->getAs<EnumType>())
7032 return appendEnumType(Enc, ET, TSC, QT.getBaseTypeIdentifier());
7034 if (const RecordType *RT = QT->getAsStructureType())
7035 return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier());
7037 if (const RecordType *RT = QT->getAsUnionType())
7038 return appendRecordType(Enc, RT, CGM, TSC, QT.getBaseTypeIdentifier());
7040 if (const FunctionType *FT = QT->getAs<FunctionType>())
7041 return appendFunctionType(Enc, FT, CGM, TSC);
7046 static bool getTypeString(SmallStringEnc &Enc, const Decl *D,
7047 CodeGen::CodeGenModule &CGM, TypeStringCache &TSC) {
7051 if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
7052 if (FD->getLanguageLinkage() != CLanguageLinkage)
7054 return appendType(Enc, FD->getType(), CGM, TSC);
7057 if (const VarDecl *VD = dyn_cast<VarDecl>(D)) {
7058 if (VD->getLanguageLinkage() != CLanguageLinkage)
7060 QualType QT = VD->getType().getCanonicalType();
7061 if (const ArrayType *AT = QT->getAsArrayTypeUnsafe()) {
7062 // Global ArrayTypes are given a size of '*' if the size is unknown.
7063 // The Qualifiers should be attached to the type rather than the array.
7064 // Thus we don't call appendQualifier() here.
7065 return appendArrayType(Enc, QT, AT, CGM, TSC, "*");
7067 return appendType(Enc, QT, CGM, TSC);
7073 //===----------------------------------------------------------------------===//
7075 //===----------------------------------------------------------------------===//
7077 const llvm::Triple &CodeGenModule::getTriple() const {
7078 return getTarget().getTriple();
7081 bool CodeGenModule::supportsCOMDAT() const {
7082 return !getTriple().isOSBinFormatMachO();
7085 const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() {
7086 if (TheTargetCodeGenInfo)
7087 return *TheTargetCodeGenInfo;
7089 const llvm::Triple &Triple = getTarget().getTriple();
7090 switch (Triple.getArch()) {
7092 return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo(Types));
7094 case llvm::Triple::le32:
7095 return *(TheTargetCodeGenInfo = new PNaClTargetCodeGenInfo(Types));
7096 case llvm::Triple::mips:
7097 case llvm::Triple::mipsel:
7098 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, true));
7100 case llvm::Triple::mips64:
7101 case llvm::Triple::mips64el:
7102 return *(TheTargetCodeGenInfo = new MIPSTargetCodeGenInfo(Types, false));
7104 case llvm::Triple::aarch64:
7105 case llvm::Triple::aarch64_be: {
7106 AArch64ABIInfo::ABIKind Kind = AArch64ABIInfo::AAPCS;
7107 if (getTarget().getABI() == "darwinpcs")
7108 Kind = AArch64ABIInfo::DarwinPCS;
7110 return *(TheTargetCodeGenInfo = new AArch64TargetCodeGenInfo(Types, Kind));
7113 case llvm::Triple::arm:
7114 case llvm::Triple::armeb:
7115 case llvm::Triple::thumb:
7116 case llvm::Triple::thumbeb:
7118 if (Triple.getOS() == llvm::Triple::Win32) {
7119 TheTargetCodeGenInfo =
7120 new WindowsARMTargetCodeGenInfo(Types, ARMABIInfo::AAPCS_VFP);
7121 return *TheTargetCodeGenInfo;
7124 ARMABIInfo::ABIKind Kind = ARMABIInfo::AAPCS;
7125 if (getTarget().getABI() == "apcs-gnu")
7126 Kind = ARMABIInfo::APCS;
7127 else if (CodeGenOpts.FloatABI == "hard" ||
7128 (CodeGenOpts.FloatABI != "soft" &&
7129 Triple.getEnvironment() == llvm::Triple::GNUEABIHF))
7130 Kind = ARMABIInfo::AAPCS_VFP;
7132 return *(TheTargetCodeGenInfo = new ARMTargetCodeGenInfo(Types, Kind));
7135 case llvm::Triple::ppc:
7136 return *(TheTargetCodeGenInfo = new PPC32TargetCodeGenInfo(Types));
7137 case llvm::Triple::ppc64:
7138 if (Triple.isOSBinFormatELF()) {
7139 PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv1;
7140 if (getTarget().getABI() == "elfv2")
7141 Kind = PPC64_SVR4_ABIInfo::ELFv2;
7142 bool HasQPX = getTarget().getABI() == "elfv1-qpx";
7144 return *(TheTargetCodeGenInfo =
7145 new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX));
7147 return *(TheTargetCodeGenInfo = new PPC64TargetCodeGenInfo(Types));
7148 case llvm::Triple::ppc64le: {
7149 assert(Triple.isOSBinFormatELF() && "PPC64 LE non-ELF not supported!");
7150 PPC64_SVR4_ABIInfo::ABIKind Kind = PPC64_SVR4_ABIInfo::ELFv2;
7151 if (getTarget().getABI() == "elfv1" || getTarget().getABI() == "elfv1-qpx")
7152 Kind = PPC64_SVR4_ABIInfo::ELFv1;
7153 bool HasQPX = getTarget().getABI() == "elfv1-qpx";
7155 return *(TheTargetCodeGenInfo =
7156 new PPC64_SVR4_TargetCodeGenInfo(Types, Kind, HasQPX));
7159 case llvm::Triple::nvptx:
7160 case llvm::Triple::nvptx64:
7161 return *(TheTargetCodeGenInfo = new NVPTXTargetCodeGenInfo(Types));
7163 case llvm::Triple::msp430:
7164 return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
7166 case llvm::Triple::systemz: {
7167 bool HasVector = getTarget().getABI() == "vector";
7168 return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo(Types,
7172 case llvm::Triple::tce:
7173 return *(TheTargetCodeGenInfo = new TCETargetCodeGenInfo(Types));
7175 case llvm::Triple::x86: {
7176 bool IsDarwinVectorABI = Triple.isOSDarwin();
7177 bool IsSmallStructInRegABI =
7178 X86_32TargetCodeGenInfo::isStructReturnInRegABI(Triple, CodeGenOpts);
7179 bool IsWin32FloatStructABI = Triple.isOSWindows() && !Triple.isOSCygMing();
7181 if (Triple.getOS() == llvm::Triple::Win32) {
7182 return *(TheTargetCodeGenInfo = new WinX86_32TargetCodeGenInfo(
7183 Types, IsDarwinVectorABI, IsSmallStructInRegABI,
7184 IsWin32FloatStructABI, CodeGenOpts.NumRegisterParameters));
7186 return *(TheTargetCodeGenInfo = new X86_32TargetCodeGenInfo(
7187 Types, IsDarwinVectorABI, IsSmallStructInRegABI,
7188 IsWin32FloatStructABI, CodeGenOpts.NumRegisterParameters));
7192 case llvm::Triple::x86_64: {
7193 StringRef ABI = getTarget().getABI();
7194 X86AVXABILevel AVXLevel = (ABI == "avx512" ? X86AVXABILevel::AVX512 :
7195 ABI == "avx" ? X86AVXABILevel::AVX :
7196 X86AVXABILevel::None);
7198 switch (Triple.getOS()) {
7199 case llvm::Triple::Win32:
7200 return *(TheTargetCodeGenInfo =
7201 new WinX86_64TargetCodeGenInfo(Types, AVXLevel));
7202 case llvm::Triple::PS4:
7203 return *(TheTargetCodeGenInfo =
7204 new PS4TargetCodeGenInfo(Types, AVXLevel));
7206 return *(TheTargetCodeGenInfo =
7207 new X86_64TargetCodeGenInfo(Types, AVXLevel));
7210 case llvm::Triple::hexagon:
7211 return *(TheTargetCodeGenInfo = new HexagonTargetCodeGenInfo(Types));
7212 case llvm::Triple::r600:
7213 return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types));
7214 case llvm::Triple::amdgcn:
7215 return *(TheTargetCodeGenInfo = new AMDGPUTargetCodeGenInfo(Types));
7216 case llvm::Triple::sparcv9:
7217 return *(TheTargetCodeGenInfo = new SparcV9TargetCodeGenInfo(Types));
7218 case llvm::Triple::xcore:
7219 return *(TheTargetCodeGenInfo = new XCoreTargetCodeGenInfo(Types));