1 //===--- ARM.cpp - ARM (not AArch64) Helpers for Tools ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "clang/Driver/Driver.h"
12 #include "clang/Driver/DriverDiagnostic.h"
13 #include "clang/Driver/Options.h"
14 #include "llvm/ADT/StringSwitch.h"
15 #include "llvm/Option/ArgList.h"
16 #include "llvm/Support/TargetParser.h"
18 using namespace clang::driver;
19 using namespace clang::driver::tools;
20 using namespace clang;
21 using namespace llvm::opt;
24 int arm::getARMSubArchVersionNumber(const llvm::Triple &Triple) {
25 llvm::StringRef Arch = Triple.getArchName();
26 return llvm::ARM::parseArchVersion(Arch);
30 bool arm::isARMMProfile(const llvm::Triple &Triple) {
31 llvm::StringRef Arch = Triple.getArchName();
32 return llvm::ARM::parseArchProfile(Arch) == llvm::ARM::ProfileKind::M;
35 // Get Arch/CPU from args.
36 void arm::getARMArchCPUFromArgs(const ArgList &Args, llvm::StringRef &Arch,
37 llvm::StringRef &CPU, bool FromAs) {
38 if (const Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ))
40 if (const Arg *A = Args.getLastArg(options::OPT_march_EQ))
46 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
47 StringRef Value = A->getValue();
48 if (Value.startswith("-mcpu="))
49 CPU = Value.substr(6);
50 if (Value.startswith("-march="))
51 Arch = Value.substr(7);
56 // FIXME: Use ARMTargetParser.
57 static void getARMHWDivFeatures(const Driver &D, const Arg *A,
58 const ArgList &Args, StringRef HWDiv,
59 std::vector<StringRef> &Features) {
60 unsigned HWDivID = llvm::ARM::parseHWDiv(HWDiv);
61 if (!llvm::ARM::getHWDivFeatures(HWDivID, Features))
62 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
66 static void getARMFPUFeatures(const Driver &D, const Arg *A,
67 const ArgList &Args, StringRef FPU,
68 std::vector<StringRef> &Features) {
69 unsigned FPUID = llvm::ARM::parseFPU(FPU);
70 if (!llvm::ARM::getFPUFeatures(FPUID, Features))
71 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
74 // Decode ARM features from string like +[no]featureA+[no]featureB+...
75 static bool DecodeARMFeatures(const Driver &D, StringRef text,
76 std::vector<StringRef> &Features) {
77 SmallVector<StringRef, 8> Split;
78 text.split(Split, StringRef("+"), -1, false);
80 for (StringRef Feature : Split) {
81 StringRef FeatureName = llvm::ARM::getArchExtFeature(Feature);
82 if (!FeatureName.empty())
83 Features.push_back(FeatureName);
90 static void DecodeARMFeaturesFromCPU(const Driver &D, StringRef CPU,
91 std::vector<StringRef> &Features) {
92 if (CPU != "generic") {
93 llvm::ARM::ArchKind ArchKind = llvm::ARM::parseCPUArch(CPU);
94 unsigned Extension = llvm::ARM::getDefaultExtensions(CPU, ArchKind);
95 llvm::ARM::getExtensionFeatures(Extension, Features);
99 // Check if -march is valid by checking if it can be canonicalised and parsed.
100 // getARMArch is used here instead of just checking the -march value in order
101 // to handle -march=native correctly.
102 static void checkARMArchName(const Driver &D, const Arg *A, const ArgList &Args,
103 llvm::StringRef ArchName,
104 std::vector<StringRef> &Features,
105 const llvm::Triple &Triple) {
106 std::pair<StringRef, StringRef> Split = ArchName.split("+");
108 std::string MArch = arm::getARMArch(ArchName, Triple);
109 if (llvm::ARM::parseArch(MArch) == llvm::ARM::ArchKind::INVALID ||
110 (Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
111 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
114 // Check -mcpu=. Needs ArchName to handle -mcpu=generic.
115 static void checkARMCPUName(const Driver &D, const Arg *A, const ArgList &Args,
116 llvm::StringRef CPUName, llvm::StringRef ArchName,
117 std::vector<StringRef> &Features,
118 const llvm::Triple &Triple) {
119 std::pair<StringRef, StringRef> Split = CPUName.split("+");
121 std::string CPU = arm::getARMTargetCPU(CPUName, ArchName, Triple);
122 if (arm::getLLVMArchSuffixForARM(CPU, ArchName, Triple).empty() ||
123 (Split.second.size() && !DecodeARMFeatures(D, Split.second, Features)))
124 D.Diag(clang::diag::err_drv_clang_unsupported) << A->getAsString(Args);
127 bool arm::useAAPCSForMachO(const llvm::Triple &T) {
128 // The backend is hardwired to assume AAPCS for M-class processors, ensure
129 // the frontend matches that.
130 return T.getEnvironment() == llvm::Triple::EABI ||
131 T.getOS() == llvm::Triple::UnknownOS || isARMMProfile(T);
134 // Select mode for reading thread pointer (-mtp=soft/cp15).
135 arm::ReadTPMode arm::getReadTPMode(const ToolChain &TC, const ArgList &Args) {
136 if (Arg *A = Args.getLastArg(options::OPT_mtp_mode_EQ)) {
137 const Driver &D = TC.getDriver();
138 arm::ReadTPMode ThreadPointer =
139 llvm::StringSwitch<arm::ReadTPMode>(A->getValue())
140 .Case("cp15", ReadTPMode::Cp15)
141 .Case("soft", ReadTPMode::Soft)
142 .Default(ReadTPMode::Invalid);
143 if (ThreadPointer != ReadTPMode::Invalid)
144 return ThreadPointer;
145 if (StringRef(A->getValue()).empty())
146 D.Diag(diag::err_drv_missing_arg_mtp) << A->getAsString(Args);
148 D.Diag(diag::err_drv_invalid_mtp) << A->getAsString(Args);
149 return ReadTPMode::Invalid;
151 return ReadTPMode::Soft;
154 // Select the float ABI as determined by -msoft-float, -mhard-float, and
156 arm::FloatABI arm::getARMFloatABI(const ToolChain &TC, const ArgList &Args) {
157 const Driver &D = TC.getDriver();
158 const llvm::Triple &Triple = TC.getEffectiveTriple();
159 auto SubArch = getARMSubArchVersionNumber(Triple);
160 arm::FloatABI ABI = FloatABI::Invalid;
162 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
163 options::OPT_mfloat_abi_EQ)) {
164 if (A->getOption().matches(options::OPT_msoft_float)) {
165 ABI = FloatABI::Soft;
166 } else if (A->getOption().matches(options::OPT_mhard_float)) {
167 ABI = FloatABI::Hard;
169 ABI = llvm::StringSwitch<arm::FloatABI>(A->getValue())
170 .Case("soft", FloatABI::Soft)
171 .Case("softfp", FloatABI::SoftFP)
172 .Case("hard", FloatABI::Hard)
173 .Default(FloatABI::Invalid);
174 if (ABI == FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
175 D.Diag(diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
176 ABI = FloatABI::Soft;
180 // It is incorrect to select hard float ABI on MachO platforms if the ABI is
182 if (Triple.isOSBinFormatMachO() && !useAAPCSForMachO(Triple) &&
183 ABI == FloatABI::Hard) {
184 D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args)
185 << Triple.getArchName();
189 // If unspecified, choose the default based on the platform.
190 if (ABI == FloatABI::Invalid) {
191 switch (Triple.getOS()) {
192 case llvm::Triple::Darwin:
193 case llvm::Triple::MacOSX:
194 case llvm::Triple::IOS:
195 case llvm::Triple::TvOS: {
196 // Darwin defaults to "softfp" for v6 and v7.
197 ABI = (SubArch == 6 || SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
198 ABI = Triple.isWatchABI() ? FloatABI::Hard : ABI;
201 case llvm::Triple::WatchOS:
202 ABI = FloatABI::Hard;
205 // FIXME: this is invalid for WindowsCE
206 case llvm::Triple::Win32:
207 ABI = FloatABI::Hard;
210 case llvm::Triple::NetBSD:
211 switch (Triple.getEnvironment()) {
212 case llvm::Triple::EABIHF:
213 case llvm::Triple::GNUEABIHF:
214 ABI = FloatABI::Hard;
217 ABI = FloatABI::Soft;
222 case llvm::Triple::FreeBSD:
223 switch (Triple.getEnvironment()) {
224 case llvm::Triple::GNUEABIHF:
225 ABI = FloatABI::Hard;
228 // FreeBSD defaults to soft float
229 ABI = FloatABI::Soft;
234 case llvm::Triple::OpenBSD:
235 ABI = FloatABI::Soft;
239 switch (Triple.getEnvironment()) {
240 case llvm::Triple::GNUEABIHF:
241 case llvm::Triple::MuslEABIHF:
242 case llvm::Triple::EABIHF:
243 ABI = FloatABI::Hard;
245 case llvm::Triple::GNUEABI:
246 case llvm::Triple::MuslEABI:
247 case llvm::Triple::EABI:
248 // EABI is always AAPCS, and if it was not marked 'hard', it's softfp
249 ABI = FloatABI::SoftFP;
251 case llvm::Triple::Android:
252 ABI = (SubArch == 7) ? FloatABI::SoftFP : FloatABI::Soft;
255 // Assume "soft", but warn the user we are guessing.
256 if (Triple.isOSBinFormatMachO() &&
257 Triple.getSubArch() == llvm::Triple::ARMSubArch_v7em)
258 ABI = FloatABI::Hard;
260 ABI = FloatABI::Soft;
262 if (Triple.getOS() != llvm::Triple::UnknownOS ||
263 !Triple.isOSBinFormatMachO())
264 D.Diag(diag::warn_drv_assuming_mfloat_abi_is) << "soft";
270 assert(ABI != FloatABI::Invalid && "must select an ABI");
274 void arm::getARMTargetFeatures(const ToolChain &TC,
275 const llvm::Triple &Triple,
277 ArgStringList &CmdArgs,
278 std::vector<StringRef> &Features,
280 const Driver &D = TC.getDriver();
283 Args.hasArg(options::OPT_mkernel, options::OPT_fapple_kext);
284 arm::FloatABI ABI = arm::getARMFloatABI(TC, Args);
285 arm::ReadTPMode ThreadPointer = arm::getReadTPMode(TC, Args);
286 const Arg *WaCPU = nullptr, *WaFPU = nullptr;
287 const Arg *WaHDiv = nullptr, *WaArch = nullptr;
290 // FIXME: Note, this is a hack, the LLVM backend doesn't actually use these
291 // yet (it uses the -mfloat-abi and -msoft-float options), and it is
292 // stripped out by the ARM target. We should probably pass this a new
293 // -target-option, which is handled by the -cc1/-cc1as invocation.
295 // FIXME2: For consistency, it would be ideal if we set up the target
296 // machine state the same when using the frontend or the assembler. We don't
297 // currently do that for the assembler, we pass the options directly to the
298 // backend and never even instantiate the frontend TargetInfo. If we did,
299 // and used its handleTargetFeatures hook, then we could ensure the
300 // assembler and the frontend behave the same.
302 // Use software floating point operations?
303 if (ABI == arm::FloatABI::Soft)
304 Features.push_back("+soft-float");
306 // Use software floating point argument passing?
307 if (ABI != arm::FloatABI::Hard)
308 Features.push_back("+soft-float-abi");
310 // Here, we make sure that -Wa,-mfpu/cpu/arch/hwdiv will be passed down
311 // to the assembler correctly.
313 Args.filtered(options::OPT_Wa_COMMA, options::OPT_Xassembler)) {
314 StringRef Value = A->getValue();
315 if (Value.startswith("-mfpu=")) {
317 } else if (Value.startswith("-mcpu=")) {
319 } else if (Value.startswith("-mhwdiv=")) {
321 } else if (Value.startswith("-march=")) {
327 if (ThreadPointer == arm::ReadTPMode::Cp15)
328 Features.push_back("+read-tp-hard");
330 // Check -march. ClangAs gives preference to -Wa,-march=.
331 const Arg *ArchArg = Args.getLastArg(options::OPT_march_EQ);
335 D.Diag(clang::diag::warn_drv_unused_argument)
336 << ArchArg->getAsString(Args);
337 ArchName = StringRef(WaArch->getValue()).substr(7);
338 checkARMArchName(D, WaArch, Args, ArchName, Features, Triple);
340 D.Diag(clang::diag::warn_drv_unused_argument) << WaArch->getAsString(Args);
341 } else if (ArchArg) {
342 ArchName = ArchArg->getValue();
343 checkARMArchName(D, ArchArg, Args, ArchName, Features, Triple);
346 // Check -mcpu. ClangAs gives preference to -Wa,-mcpu=.
347 const Arg *CPUArg = Args.getLastArg(options::OPT_mcpu_EQ);
351 D.Diag(clang::diag::warn_drv_unused_argument)
352 << CPUArg->getAsString(Args);
353 CPUName = StringRef(WaCPU->getValue()).substr(6);
354 checkARMCPUName(D, WaCPU, Args, CPUName, ArchName, Features, Triple);
356 CPUName = CPUArg->getValue();
357 checkARMCPUName(D, CPUArg, Args, CPUName, ArchName, Features, Triple);
360 // Add CPU features for generic CPUs
361 if (CPUName == "native") {
362 llvm::StringMap<bool> HostFeatures;
363 if (llvm::sys::getHostCPUFeatures(HostFeatures))
364 for (auto &F : HostFeatures)
366 Args.MakeArgString((F.second ? "+" : "-") + F.first()));
367 } else if (!CPUName.empty()) {
368 DecodeARMFeaturesFromCPU(D, CPUName, Features);
371 // Honor -mfpu=. ClangAs gives preference to -Wa,-mfpu=.
372 const Arg *FPUArg = Args.getLastArg(options::OPT_mfpu_EQ);
375 D.Diag(clang::diag::warn_drv_unused_argument)
376 << FPUArg->getAsString(Args);
377 getARMFPUFeatures(D, WaFPU, Args, StringRef(WaFPU->getValue()).substr(6),
380 getARMFPUFeatures(D, FPUArg, Args, FPUArg->getValue(), Features);
383 // Honor -mhwdiv=. ClangAs gives preference to -Wa,-mhwdiv=.
384 const Arg *HDivArg = Args.getLastArg(options::OPT_mhwdiv_EQ);
387 D.Diag(clang::diag::warn_drv_unused_argument)
388 << HDivArg->getAsString(Args);
389 getARMHWDivFeatures(D, WaHDiv, Args,
390 StringRef(WaHDiv->getValue()).substr(8), Features);
392 getARMHWDivFeatures(D, HDivArg, Args, HDivArg->getValue(), Features);
394 // Setting -msoft-float effectively disables NEON because of the GCC
395 // implementation, although the same isn't true of VFP or VFP3.
396 if (ABI == arm::FloatABI::Soft) {
397 Features.push_back("-neon");
398 // Also need to explicitly disable features which imply NEON.
399 Features.push_back("-crypto");
402 // En/disable crc code generation.
403 if (Arg *A = Args.getLastArg(options::OPT_mcrc, options::OPT_mnocrc)) {
404 if (A->getOption().matches(options::OPT_mcrc))
405 Features.push_back("+crc");
407 Features.push_back("-crc");
410 // Look for the last occurrence of -mlong-calls or -mno-long-calls. If
411 // neither options are specified, see if we are compiling for kernel/kext and
412 // decide whether to pass "+long-calls" based on the OS and its version.
413 if (Arg *A = Args.getLastArg(options::OPT_mlong_calls,
414 options::OPT_mno_long_calls)) {
415 if (A->getOption().matches(options::OPT_mlong_calls))
416 Features.push_back("+long-calls");
417 } else if (KernelOrKext && (!Triple.isiOS() || Triple.isOSVersionLT(6)) &&
418 !Triple.isWatchOS()) {
419 Features.push_back("+long-calls");
422 // Generate execute-only output (no data access to code sections).
423 // This only makes sense for the compiler, not for the assembler.
425 // Supported only on ARMv6T2 and ARMv7 and above.
426 // Cannot be combined with -mno-movt or -mlong-calls
427 if (Arg *A = Args.getLastArg(options::OPT_mexecute_only, options::OPT_mno_execute_only)) {
428 if (A->getOption().matches(options::OPT_mexecute_only)) {
429 if (getARMSubArchVersionNumber(Triple) < 7 &&
430 llvm::ARM::parseArch(Triple.getArchName()) != llvm::ARM::ArchKind::ARMV6T2)
431 D.Diag(diag::err_target_unsupported_execute_only) << Triple.getArchName();
432 else if (Arg *B = Args.getLastArg(options::OPT_mno_movt))
433 D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
434 // Long calls create constant pool entries and have not yet been fixed up
435 // to play nicely with execute-only. Hence, they cannot be used in
436 // execute-only code for now
437 else if (Arg *B = Args.getLastArg(options::OPT_mlong_calls, options::OPT_mno_long_calls)) {
438 if (B->getOption().matches(options::OPT_mlong_calls))
439 D.Diag(diag::err_opt_not_valid_with_opt) << A->getAsString(Args) << B->getAsString(Args);
441 Features.push_back("+execute-only");
446 // Kernel code has more strict alignment requirements.
448 Features.push_back("+strict-align");
449 else if (Arg *A = Args.getLastArg(options::OPT_mno_unaligned_access,
450 options::OPT_munaligned_access)) {
451 if (A->getOption().matches(options::OPT_munaligned_access)) {
452 // No v6M core supports unaligned memory access (v6M ARM ARM A3.2).
453 if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
454 D.Diag(diag::err_target_unsupported_unaligned) << "v6m";
455 // v8M Baseline follows on from v6M, so doesn't support unaligned memory
457 else if (Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v8m_baseline)
458 D.Diag(diag::err_target_unsupported_unaligned) << "v8m.base";
460 Features.push_back("+strict-align");
462 // Assume pre-ARMv6 doesn't support unaligned accesses.
464 // ARMv6 may or may not support unaligned accesses depending on the
465 // SCTLR.U bit, which is architecture-specific. We assume ARMv6
466 // Darwin and NetBSD targets support unaligned accesses, and others don't.
468 // ARMv7 always has SCTLR.U set to 1, but it has a new SCTLR.A bit
469 // which raises an alignment fault on unaligned accesses. Linux
470 // defaults this bit to 0 and handles it as a system-wide (not
471 // per-process) setting. It is therefore safe to assume that ARMv7+
472 // Linux targets support unaligned accesses. The same goes for NaCl.
474 // The above behavior is consistent with GCC.
475 int VersionNum = getARMSubArchVersionNumber(Triple);
476 if (Triple.isOSDarwin() || Triple.isOSNetBSD()) {
477 if (VersionNum < 6 ||
478 Triple.getSubArch() == llvm::Triple::SubArchType::ARMSubArch_v6m)
479 Features.push_back("+strict-align");
480 } else if (Triple.isOSLinux() || Triple.isOSNaCl()) {
482 Features.push_back("+strict-align");
484 Features.push_back("+strict-align");
487 // llvm does not support reserving registers in general. There is support
488 // for reserving r9 on ARM though (defined as a platform-specific register
490 if (Args.hasArg(options::OPT_ffixed_r9))
491 Features.push_back("+reserve-r9");
493 // The kext linker doesn't know how to deal with movw/movt.
494 if (KernelOrKext || Args.hasArg(options::OPT_mno_movt))
495 Features.push_back("+no-movt");
497 if (Args.hasArg(options::OPT_mno_neg_immediates))
498 Features.push_back("+no-neg-immediates");
501 const std::string arm::getARMArch(StringRef Arch, const llvm::Triple &Triple) {
506 MArch = Triple.getArchName();
507 MArch = StringRef(MArch).split("+").first.lower();
509 // Handle -march=native.
510 if (MArch == "native") {
511 std::string CPU = llvm::sys::getHostCPUName();
512 if (CPU != "generic") {
513 // Translate the native cpu into the architecture suffix for that CPU.
514 StringRef Suffix = arm::getLLVMArchSuffixForARM(CPU, MArch, Triple);
515 // If there is no valid architecture suffix for this CPU we don't know how
516 // to handle it, so return no architecture.
520 MArch = std::string("arm") + Suffix.str();
527 /// Get the (LLVM) name of the minimum ARM CPU for the arch we are targeting.
528 StringRef arm::getARMCPUForMArch(StringRef Arch, const llvm::Triple &Triple) {
529 std::string MArch = getARMArch(Arch, Triple);
530 // getARMCPUForArch defaults to the triple if MArch is empty, but empty MArch
531 // here means an -march=native that we can't handle, so instead return no CPU.
535 // We need to return an empty string here on invalid MArch values as the
536 // various places that call this function can't cope with a null result.
537 return Triple.getARMCPUForArch(MArch);
540 /// getARMTargetCPU - Get the (LLVM) name of the ARM cpu we are targeting.
541 std::string arm::getARMTargetCPU(StringRef CPU, StringRef Arch,
542 const llvm::Triple &Triple) {
543 // FIXME: Warn on inconsistent use of -mcpu and -march.
544 // If we have -mcpu=, use that.
546 std::string MCPU = StringRef(CPU).split("+").first.lower();
547 // Handle -mcpu=native.
548 if (MCPU == "native")
549 return llvm::sys::getHostCPUName();
554 return getARMCPUForMArch(Arch, Triple);
557 /// getLLVMArchSuffixForARM - Get the LLVM arch name to use for a particular
558 /// CPU (or Arch, if CPU is generic).
559 // FIXME: This is redundant with -mcpu, why does LLVM use this.
560 StringRef arm::getLLVMArchSuffixForARM(StringRef CPU, StringRef Arch,
561 const llvm::Triple &Triple) {
562 llvm::ARM::ArchKind ArchKind;
563 if (CPU == "generic") {
564 std::string ARMArch = tools::arm::getARMArch(Arch, Triple);
565 ArchKind = llvm::ARM::parseArch(ARMArch);
566 if (ArchKind == llvm::ARM::ArchKind::INVALID)
567 // In case of generic Arch, i.e. "arm",
568 // extract arch from default cpu of the Triple
569 ArchKind = llvm::ARM::parseCPUArch(Triple.getARMCPUForArch(ARMArch));
571 // FIXME: horrible hack to get around the fact that Cortex-A7 is only an
572 // armv7k triple if it's actually been specified via "-arch armv7k".
573 ArchKind = (Arch == "armv7k" || Arch == "thumbv7k")
574 ? llvm::ARM::ArchKind::ARMV7K
575 : llvm::ARM::parseCPUArch(CPU);
577 if (ArchKind == llvm::ARM::ArchKind::INVALID)
579 return llvm::ARM::getSubArch(ArchKind);
582 void arm::appendEBLinkFlags(const ArgList &Args, ArgStringList &CmdArgs,
583 const llvm::Triple &Triple) {
584 if (Args.hasArg(options::OPT_r))
587 // ARMv7 (and later) and ARMv6-M do not support BE-32, so instruct the linker
588 // to generate BE-8 executables.
589 if (arm::getARMSubArchVersionNumber(Triple) >= 7 || arm::isARMMProfile(Triple))
590 CmdArgs.push_back("--be8");