1 //===--- Mips.cpp - Tools Implementations -----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "ToolChains/CommonArgs.h"
12 #include "clang/Driver/Driver.h"
13 #include "clang/Driver/DriverDiagnostic.h"
14 #include "clang/Driver/Options.h"
15 #include "llvm/ADT/StringSwitch.h"
16 #include "llvm/Option/ArgList.h"
18 using namespace clang::driver;
19 using namespace clang::driver::tools;
20 using namespace clang;
21 using namespace llvm::opt;
23 bool tools::isMipsArch(llvm::Triple::ArchType Arch) {
24 return Arch == llvm::Triple::mips || Arch == llvm::Triple::mipsel ||
25 Arch == llvm::Triple::mips64 || Arch == llvm::Triple::mips64el;
28 // Get CPU and ABI names. They are not independent
29 // so we have to calculate them together.
30 void mips::getMipsCPUAndABI(const ArgList &Args, const llvm::Triple &Triple,
31 StringRef &CPUName, StringRef &ABIName) {
32 const char *DefMips32CPU = "mips32r2";
33 const char *DefMips64CPU = "mips64r2";
35 // MIPS32r6 is the default for mips(el)?-img-linux-gnu and MIPS64r6 is the
36 // default for mips64(el)?-img-linux-gnu.
37 if (Triple.getVendor() == llvm::Triple::ImaginationTechnologies &&
38 Triple.getEnvironment() == llvm::Triple::GNU) {
39 DefMips32CPU = "mips32r6";
40 DefMips64CPU = "mips64r6";
43 // MIPS64r6 is the default for Android MIPS64 (mips64el-linux-android).
44 if (Triple.isAndroid()) {
45 DefMips32CPU = "mips32";
46 DefMips64CPU = "mips64r6";
49 // MIPS3 is the default for mips64*-unknown-openbsd.
50 if (Triple.getOS() == llvm::Triple::OpenBSD)
51 DefMips64CPU = "mips3";
53 if (Arg *A = Args.getLastArg(clang::driver::options::OPT_march_EQ,
54 options::OPT_mcpu_EQ))
55 CPUName = A->getValue();
57 if (Arg *A = Args.getLastArg(options::OPT_mabi_EQ)) {
58 ABIName = A->getValue();
59 // Convert a GNU style Mips ABI name to the name
60 // accepted by LLVM Mips backend.
61 ABIName = llvm::StringSwitch<llvm::StringRef>(ABIName)
67 // Setup default CPU and ABI names.
68 if (CPUName.empty() && ABIName.empty()) {
69 switch (Triple.getArch()) {
71 llvm_unreachable("Unexpected triple arch name");
72 case llvm::Triple::mips:
73 case llvm::Triple::mipsel:
74 CPUName = DefMips32CPU;
76 case llvm::Triple::mips64:
77 case llvm::Triple::mips64el:
78 CPUName = DefMips64CPU;
83 if (ABIName.empty() &&
84 (Triple.getVendor() == llvm::Triple::MipsTechnologies ||
85 Triple.getVendor() == llvm::Triple::ImaginationTechnologies)) {
86 ABIName = llvm::StringSwitch<const char *>(CPUName)
92 .Case("mips32", "o32")
93 .Case("mips32r2", "o32")
94 .Case("mips32r3", "o32")
95 .Case("mips32r5", "o32")
96 .Case("mips32r6", "o32")
97 .Case("mips64", "n64")
98 .Case("mips64r2", "n64")
99 .Case("mips64r3", "n64")
100 .Case("mips64r5", "n64")
101 .Case("mips64r6", "n64")
102 .Case("octeon", "n64")
103 .Case("p5600", "o32")
107 if (ABIName.empty()) {
108 // Deduce ABI name from the target triple.
109 if (Triple.getArch() == llvm::Triple::mips ||
110 Triple.getArch() == llvm::Triple::mipsel)
116 if (CPUName.empty()) {
117 // Deduce CPU name from ABI name.
118 CPUName = llvm::StringSwitch<const char *>(ABIName)
119 .Case("o32", DefMips32CPU)
120 .Cases("n32", "n64", DefMips64CPU)
124 // FIXME: Warn on inconsistent use of -march and -mabi.
127 std::string mips::getMipsABILibSuffix(const ArgList &Args,
128 const llvm::Triple &Triple) {
129 StringRef CPUName, ABIName;
130 tools::mips::getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
131 return llvm::StringSwitch<std::string>(ABIName)
137 // Convert ABI name to the GNU tools acceptable variant.
138 StringRef mips::getGnuCompatibleMipsABIName(StringRef ABI) {
139 return llvm::StringSwitch<llvm::StringRef>(ABI)
145 // Select the MIPS float ABI as determined by -msoft-float, -mhard-float,
147 mips::FloatABI mips::getMipsFloatABI(const Driver &D, const ArgList &Args) {
148 mips::FloatABI ABI = mips::FloatABI::Invalid;
150 Args.getLastArg(options::OPT_msoft_float, options::OPT_mhard_float,
151 options::OPT_mfloat_abi_EQ)) {
152 if (A->getOption().matches(options::OPT_msoft_float))
153 ABI = mips::FloatABI::Soft;
154 else if (A->getOption().matches(options::OPT_mhard_float))
155 ABI = mips::FloatABI::Hard;
157 ABI = llvm::StringSwitch<mips::FloatABI>(A->getValue())
158 .Case("soft", mips::FloatABI::Soft)
159 .Case("hard", mips::FloatABI::Hard)
160 .Default(mips::FloatABI::Invalid);
161 if (ABI == mips::FloatABI::Invalid && !StringRef(A->getValue()).empty()) {
162 D.Diag(clang::diag::err_drv_invalid_mfloat_abi) << A->getAsString(Args);
163 ABI = mips::FloatABI::Hard;
168 // If unspecified, choose the default based on the platform.
169 if (ABI == mips::FloatABI::Invalid) {
170 // Assume "hard", because it's a default value used by gcc.
171 // When we start to recognize specific target MIPS processors,
172 // we will be able to select the default more correctly.
173 ABI = mips::FloatABI::Hard;
176 assert(ABI != mips::FloatABI::Invalid && "must select an ABI");
180 void mips::getMIPSTargetFeatures(const Driver &D, const llvm::Triple &Triple,
182 std::vector<StringRef> &Features) {
185 getMipsCPUAndABI(Args, Triple, CPUName, ABIName);
186 ABIName = getGnuCompatibleMipsABIName(ABIName);
188 // Historically, PIC code for MIPS was associated with -mabicalls, a.k.a
189 // SVR4 abicalls. Static code does not use SVR4 calling sequences. An ABI
190 // extension was developed by Richard Sandiford & Code Sourcery to support
191 // static code calling PIC code (CPIC). For O32 and N32 this means we have
192 // several combinations of PIC/static and abicalls. Pure static, static
193 // with the CPIC extension, and pure PIC code.
195 // At final link time, O32 and N32 with CPIC will have another section
196 // added to the binary which contains the stub functions to perform
197 // any fixups required for PIC code.
199 // For N64, the situation is more regular: code can either be static
200 // (non-abicalls) or PIC (abicalls). GCC has traditionally picked PIC code
201 // code for N64. Since Clang has already built the relocation model portion
202 // of the commandline, we pick add +noabicalls feature in the N64 static
205 // The is another case to be accounted for: -msym32, which enforces that all
206 // symbols have 32 bits in size. In this case, N64 can in theory use CPIC
207 // but it is unsupported.
209 // The combinations for N64 are:
210 // a) Static without abicalls and 64bit symbols.
211 // b) Static with abicalls and 32bit symbols.
212 // c) PIC with abicalls and 64bit symbols.
214 // For case (a) we need to add +noabicalls for N64.
216 bool IsN64 = ABIName == "64";
219 Arg *LastPICArg = Args.getLastArg(options::OPT_fPIC, options::OPT_fno_PIC,
220 options::OPT_fpic, options::OPT_fno_pic,
221 options::OPT_fPIE, options::OPT_fno_PIE,
222 options::OPT_fpie, options::OPT_fno_pie);
224 Option O = LastPICArg->getOption();
226 (O.matches(options::OPT_fno_PIC) || O.matches(options::OPT_fno_pic) ||
227 O.matches(options::OPT_fno_PIE) || O.matches(options::OPT_fno_pie));
231 Features.push_back("+noabicalls");
233 AddTargetFeature(Args, Features, options::OPT_mno_abicalls,
234 options::OPT_mabicalls, "noabicalls");
236 mips::FloatABI FloatABI = mips::getMipsFloatABI(D, Args);
237 if (FloatABI == mips::FloatABI::Soft) {
238 // FIXME: Note, this is a hack. We need to pass the selected float
239 // mode to the MipsTargetInfoBase to define appropriate macros there.
240 // Now it is the only method.
241 Features.push_back("+soft-float");
244 if (Arg *A = Args.getLastArg(options::OPT_mnan_EQ)) {
245 StringRef Val = StringRef(A->getValue());
247 if (mips::getSupportedNanEncoding(CPUName) & mips::Nan2008)
248 Features.push_back("+nan2008");
250 Features.push_back("-nan2008");
251 D.Diag(diag::warn_target_unsupported_nan2008) << CPUName;
253 } else if (Val == "legacy") {
254 if (mips::getSupportedNanEncoding(CPUName) & mips::NanLegacy)
255 Features.push_back("-nan2008");
257 Features.push_back("+nan2008");
258 D.Diag(diag::warn_target_unsupported_nanlegacy) << CPUName;
261 D.Diag(diag::err_drv_unsupported_option_argument)
262 << A->getOption().getName() << Val;
265 AddTargetFeature(Args, Features, options::OPT_msingle_float,
266 options::OPT_mdouble_float, "single-float");
267 AddTargetFeature(Args, Features, options::OPT_mips16, options::OPT_mno_mips16,
269 AddTargetFeature(Args, Features, options::OPT_mmicromips,
270 options::OPT_mno_micromips, "micromips");
271 AddTargetFeature(Args, Features, options::OPT_mdsp, options::OPT_mno_dsp,
273 AddTargetFeature(Args, Features, options::OPT_mdspr2, options::OPT_mno_dspr2,
275 AddTargetFeature(Args, Features, options::OPT_mmsa, options::OPT_mno_msa,
278 // Add the last -mfp32/-mfpxx/-mfp64, if none are given and the ABI is O32
279 // pass -mfpxx, or if none are given and fp64a is default, pass fp64 and
281 if (Arg *A = Args.getLastArg(options::OPT_mfp32, options::OPT_mfpxx,
282 options::OPT_mfp64)) {
283 if (A->getOption().matches(options::OPT_mfp32))
284 Features.push_back("-fp64");
285 else if (A->getOption().matches(options::OPT_mfpxx)) {
286 Features.push_back("+fpxx");
287 Features.push_back("+nooddspreg");
289 Features.push_back("+fp64");
290 } else if (mips::shouldUseFPXX(Args, Triple, CPUName, ABIName, FloatABI)) {
291 Features.push_back("+fpxx");
292 Features.push_back("+nooddspreg");
293 } else if (mips::isFP64ADefault(Triple, CPUName)) {
294 Features.push_back("+fp64");
295 Features.push_back("+nooddspreg");
298 AddTargetFeature(Args, Features, options::OPT_mno_odd_spreg,
299 options::OPT_modd_spreg, "nooddspreg");
300 AddTargetFeature(Args, Features, options::OPT_mno_madd4, options::OPT_mmadd4,
302 AddTargetFeature(Args, Features, options::OPT_mlong_calls,
303 options::OPT_mno_long_calls, "long-calls");
304 AddTargetFeature(Args, Features, options::OPT_mmt, options::OPT_mno_mt,"mt");
307 mips::NanEncoding mips::getSupportedNanEncoding(StringRef &CPU) {
308 // Strictly speaking, mips32r2 and mips64r2 are NanLegacy-only since Nan2008
309 // was first introduced in Release 3. However, other compilers have
310 // traditionally allowed it for Release 2 so we should do the same.
311 return (NanEncoding)llvm::StringSwitch<int>(CPU)
312 .Case("mips1", NanLegacy)
313 .Case("mips2", NanLegacy)
314 .Case("mips3", NanLegacy)
315 .Case("mips4", NanLegacy)
316 .Case("mips5", NanLegacy)
317 .Case("mips32", NanLegacy)
318 .Case("mips32r2", NanLegacy | Nan2008)
319 .Case("mips32r3", NanLegacy | Nan2008)
320 .Case("mips32r5", NanLegacy | Nan2008)
321 .Case("mips32r6", Nan2008)
322 .Case("mips64", NanLegacy)
323 .Case("mips64r2", NanLegacy | Nan2008)
324 .Case("mips64r3", NanLegacy | Nan2008)
325 .Case("mips64r5", NanLegacy | Nan2008)
326 .Case("mips64r6", Nan2008)
330 bool mips::hasCompactBranches(StringRef &CPU) {
331 // mips32r6 and mips64r6 have compact branches.
332 return llvm::StringSwitch<bool>(CPU)
333 .Case("mips32r6", true)
334 .Case("mips64r6", true)
338 bool mips::hasMipsAbiArg(const ArgList &Args, const char *Value) {
339 Arg *A = Args.getLastArg(options::OPT_mabi_EQ);
340 return A && (A->getValue() == StringRef(Value));
343 bool mips::isUCLibc(const ArgList &Args) {
344 Arg *A = Args.getLastArg(options::OPT_m_libc_Group);
345 return A && A->getOption().matches(options::OPT_muclibc);
348 bool mips::isNaN2008(const ArgList &Args, const llvm::Triple &Triple) {
349 if (Arg *NaNArg = Args.getLastArg(options::OPT_mnan_EQ))
350 return llvm::StringSwitch<bool>(NaNArg->getValue())
352 .Case("legacy", false)
355 // NaN2008 is the default for MIPS32r6/MIPS64r6.
356 return llvm::StringSwitch<bool>(getCPUName(Args, Triple))
357 .Cases("mips32r6", "mips64r6", true)
363 bool mips::isFP64ADefault(const llvm::Triple &Triple, StringRef CPUName) {
364 if (!Triple.isAndroid())
367 // Android MIPS32R6 defaults to FP64A.
368 return llvm::StringSwitch<bool>(CPUName)
369 .Case("mips32r6", true)
373 bool mips::isFPXXDefault(const llvm::Triple &Triple, StringRef CPUName,
374 StringRef ABIName, mips::FloatABI FloatABI) {
375 if (Triple.getVendor() != llvm::Triple::ImaginationTechnologies &&
376 Triple.getVendor() != llvm::Triple::MipsTechnologies &&
383 // FPXX shouldn't be used if either -msoft-float or -mfloat-abi=soft is
385 if (FloatABI == mips::FloatABI::Soft)
388 return llvm::StringSwitch<bool>(CPUName)
389 .Cases("mips2", "mips3", "mips4", "mips5", true)
390 .Cases("mips32", "mips32r2", "mips32r3", "mips32r5", true)
391 .Cases("mips64", "mips64r2", "mips64r3", "mips64r5", true)
395 bool mips::shouldUseFPXX(const ArgList &Args, const llvm::Triple &Triple,
396 StringRef CPUName, StringRef ABIName,
397 mips::FloatABI FloatABI) {
398 bool UseFPXX = isFPXXDefault(Triple, CPUName, ABIName, FloatABI);
400 // FPXX shouldn't be used if -msingle-float is present.
401 if (Arg *A = Args.getLastArg(options::OPT_msingle_float,
402 options::OPT_mdouble_float))
403 if (A->getOption().matches(options::OPT_msingle_float))