1 /*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
14 #error "ACLE intrinsics support not enabled."
19 #if defined(__cplusplus)
23 /* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
24 /* 8.3 Memory barriers */
25 #if !defined(_MSC_VER)
26 #define __dmb(i) __builtin_arm_dmb(i)
27 #define __dsb(i) __builtin_arm_dsb(i)
28 #define __isb(i) __builtin_arm_isb(i)
33 #if !defined(_MSC_VER)
34 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfi(void) {
38 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfe(void) {
42 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sev(void) {
46 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sevl(void) {
50 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __yield(void) {
51 __builtin_arm_yield();
56 #define __dbg(t) __builtin_arm_dbg(t)
60 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
61 __swp(uint32_t __x, volatile uint32_t *__p) {
64 v = __builtin_arm_ldrex(__p);
65 while (__builtin_arm_strex(__x, __p));
69 /* 8.6 Memory prefetch intrinsics */
70 /* 8.6.1 Data prefetch */
71 #define __pld(addr) __pldx(0, 0, 0, addr)
74 #define __pldx(access_kind, cache_level, retention_policy, addr) \
75 __builtin_arm_prefetch(addr, access_kind, 1)
77 #define __pldx(access_kind, cache_level, retention_policy, addr) \
78 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
81 /* 8.6.2 Instruction prefetch */
82 #define __pli(addr) __plix(0, 0, addr)
85 #define __plix(cache_level, retention_policy, addr) \
86 __builtin_arm_prefetch(addr, 0, 0)
88 #define __plix(cache_level, retention_policy, addr) \
89 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
93 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __nop(void) {
97 /* 9 DATA-PROCESSING INTRINSICS */
98 /* 9.2 Miscellaneous data-processing intrinsics */
100 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
101 __ror(uint32_t __x, uint32_t __y) {
105 return (__x >> __y) | (__x << (32 - __y));
108 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
109 __rorll(uint64_t __x, uint32_t __y) {
113 return (__x >> __y) | (__x << (64 - __y));
116 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
117 __rorl(unsigned long __x, uint32_t __y) {
118 #if __SIZEOF_LONG__ == 4
119 return __ror(__x, __y);
121 return __rorll(__x, __y);
127 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
128 __clz(uint32_t __t) {
129 return __builtin_clz(__t);
132 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
133 __clzl(unsigned long __t) {
134 return __builtin_clzl(__t);
137 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
138 __clzll(uint64_t __t) {
139 return __builtin_clzll(__t);
143 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
144 __rev(uint32_t __t) {
145 return __builtin_bswap32(__t);
148 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
149 __revl(unsigned long __t) {
150 #if __SIZEOF_LONG__ == 4
151 return __builtin_bswap32(__t);
153 return __builtin_bswap64(__t);
157 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
158 __revll(uint64_t __t) {
159 return __builtin_bswap64(__t);
163 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
164 __rev16(uint32_t __t) {
165 return __ror(__rev(__t), 16);
168 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
169 __rev16ll(uint64_t __t) {
170 return (((uint64_t)__rev16(__t >> 32)) << 32) | __rev16(__t);
173 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
174 __rev16l(unsigned long __t) {
175 #if __SIZEOF_LONG__ == 4
178 return __rev16ll(__t);
183 static __inline__ int16_t __attribute__((__always_inline__, __nodebug__))
184 __revsh(int16_t __t) {
185 return __builtin_bswap16(__t);
189 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
190 __rbit(uint32_t __t) {
191 return __builtin_arm_rbit(__t);
194 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
195 __rbitll(uint64_t __t) {
196 #if __ARM_32BIT_STATE
197 return (((uint64_t)__builtin_arm_rbit(__t)) << 32) |
198 __builtin_arm_rbit(__t >> 32);
200 return __builtin_arm_rbit64(__t);
204 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
205 __rbitl(unsigned long __t) {
206 #if __SIZEOF_LONG__ == 4
209 return __rbitll(__t);
214 * 9.3 16-bit multiplications
216 #if __ARM_FEATURE_DSP
217 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
218 __smulbb(int32_t __a, int32_t __b) {
219 return __builtin_arm_smulbb(__a, __b);
221 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
222 __smulbt(int32_t __a, int32_t __b) {
223 return __builtin_arm_smulbt(__a, __b);
225 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
226 __smultb(int32_t __a, int32_t __b) {
227 return __builtin_arm_smultb(__a, __b);
229 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
230 __smultt(int32_t __a, int32_t __b) {
231 return __builtin_arm_smultt(__a, __b);
233 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
234 __smulwb(int32_t __a, int32_t __b) {
235 return __builtin_arm_smulwb(__a, __b);
237 static __inline__ int32_t __attribute__((__always_inline__,__nodebug__))
238 __smulwt(int32_t __a, int32_t __b) {
239 return __builtin_arm_smulwt(__a, __b);
244 * 9.4 Saturating intrinsics
246 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
247 * intrinsics are implemented and the flag is enabled.
249 /* 9.4.1 Width-specified saturation intrinsics */
250 #if __ARM_FEATURE_SAT
251 #define __ssat(x, y) __builtin_arm_ssat(x, y)
252 #define __usat(x, y) __builtin_arm_usat(x, y)
255 /* 9.4.2 Saturating addition and subtraction intrinsics */
256 #if __ARM_FEATURE_DSP
257 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
258 __qadd(int32_t __t, int32_t __v) {
259 return __builtin_arm_qadd(__t, __v);
262 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
263 __qsub(int32_t __t, int32_t __v) {
264 return __builtin_arm_qsub(__t, __v);
267 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
268 __qdbl(int32_t __t) {
269 return __builtin_arm_qadd(__t, __t);
273 /* 9.4.3 Accumultating multiplications */
274 #if __ARM_FEATURE_DSP
275 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
276 __smlabb(int32_t __a, int32_t __b, int32_t __c) {
277 return __builtin_arm_smlabb(__a, __b, __c);
279 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
280 __smlabt(int32_t __a, int32_t __b, int32_t __c) {
281 return __builtin_arm_smlabt(__a, __b, __c);
283 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
284 __smlatb(int32_t __a, int32_t __b, int32_t __c) {
285 return __builtin_arm_smlatb(__a, __b, __c);
287 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
288 __smlatt(int32_t __a, int32_t __b, int32_t __c) {
289 return __builtin_arm_smlatt(__a, __b, __c);
291 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
292 __smlawb(int32_t __a, int32_t __b, int32_t __c) {
293 return __builtin_arm_smlawb(__a, __b, __c);
295 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
296 __smlawt(int32_t __a, int32_t __b, int32_t __c) {
297 return __builtin_arm_smlawt(__a, __b, __c);
302 /* 9.5.4 Parallel 16-bit saturation */
303 #if __ARM_FEATURE_SIMD32
304 #define __ssat16(x, y) __builtin_arm_ssat16(x, y)
305 #define __usat16(x, y) __builtin_arm_usat16(x, y)
308 /* 9.5.5 Packing and unpacking */
309 #if __ARM_FEATURE_SIMD32
310 typedef int32_t int8x4_t;
311 typedef int32_t int16x2_t;
312 typedef uint32_t uint8x4_t;
313 typedef uint32_t uint16x2_t;
315 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
316 __sxtab16(int16x2_t __a, int8x4_t __b) {
317 return __builtin_arm_sxtab16(__a, __b);
319 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
320 __sxtb16(int8x4_t __a) {
321 return __builtin_arm_sxtb16(__a);
323 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
324 __uxtab16(int16x2_t __a, int8x4_t __b) {
325 return __builtin_arm_uxtab16(__a, __b);
327 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
328 __uxtb16(int8x4_t __a) {
329 return __builtin_arm_uxtb16(__a);
333 /* 9.5.6 Parallel selection */
334 #if __ARM_FEATURE_SIMD32
335 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
336 __sel(uint8x4_t __a, uint8x4_t __b) {
337 return __builtin_arm_sel(__a, __b);
341 /* 9.5.7 Parallel 8-bit addition and subtraction */
342 #if __ARM_FEATURE_SIMD32
343 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
344 __qadd8(int8x4_t __a, int8x4_t __b) {
345 return __builtin_arm_qadd8(__a, __b);
347 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
348 __qsub8(int8x4_t __a, int8x4_t __b) {
349 return __builtin_arm_qsub8(__a, __b);
351 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
352 __sadd8(int8x4_t __a, int8x4_t __b) {
353 return __builtin_arm_sadd8(__a, __b);
355 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
356 __shadd8(int8x4_t __a, int8x4_t __b) {
357 return __builtin_arm_shadd8(__a, __b);
359 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
360 __shsub8(int8x4_t __a, int8x4_t __b) {
361 return __builtin_arm_shsub8(__a, __b);
363 static __inline__ int8x4_t __attribute__((__always_inline__, __nodebug__))
364 __ssub8(int8x4_t __a, int8x4_t __b) {
365 return __builtin_arm_ssub8(__a, __b);
367 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
368 __uadd8(uint8x4_t __a, uint8x4_t __b) {
369 return __builtin_arm_uadd8(__a, __b);
371 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
372 __uhadd8(uint8x4_t __a, uint8x4_t __b) {
373 return __builtin_arm_uhadd8(__a, __b);
375 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
376 __uhsub8(uint8x4_t __a, uint8x4_t __b) {
377 return __builtin_arm_uhsub8(__a, __b);
379 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
380 __uqadd8(uint8x4_t __a, uint8x4_t __b) {
381 return __builtin_arm_uqadd8(__a, __b);
383 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
384 __uqsub8(uint8x4_t __a, uint8x4_t __b) {
385 return __builtin_arm_uqsub8(__a, __b);
387 static __inline__ uint8x4_t __attribute__((__always_inline__, __nodebug__))
388 __usub8(uint8x4_t __a, uint8x4_t __b) {
389 return __builtin_arm_usub8(__a, __b);
393 /* 9.5.8 Sum of 8-bit absolute differences */
394 #if __ARM_FEATURE_SIMD32
395 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
396 __usad8(uint8x4_t __a, uint8x4_t __b) {
397 return __builtin_arm_usad8(__a, __b);
399 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
400 __usada8(uint8x4_t __a, uint8x4_t __b, uint32_t __c) {
401 return __builtin_arm_usada8(__a, __b, __c);
405 /* 9.5.9 Parallel 16-bit addition and subtraction */
406 #if __ARM_FEATURE_SIMD32
407 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
408 __qadd16(int16x2_t __a, int16x2_t __b) {
409 return __builtin_arm_qadd16(__a, __b);
411 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
412 __qasx(int16x2_t __a, int16x2_t __b) {
413 return __builtin_arm_qasx(__a, __b);
415 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
416 __qsax(int16x2_t __a, int16x2_t __b) {
417 return __builtin_arm_qsax(__a, __b);
419 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
420 __qsub16(int16x2_t __a, int16x2_t __b) {
421 return __builtin_arm_qsub16(__a, __b);
423 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
424 __sadd16(int16x2_t __a, int16x2_t __b) {
425 return __builtin_arm_sadd16(__a, __b);
427 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
428 __sasx(int16x2_t __a, int16x2_t __b) {
429 return __builtin_arm_sasx(__a, __b);
431 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
432 __shadd16(int16x2_t __a, int16x2_t __b) {
433 return __builtin_arm_shadd16(__a, __b);
435 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
436 __shasx(int16x2_t __a, int16x2_t __b) {
437 return __builtin_arm_shasx(__a, __b);
439 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
440 __shsax(int16x2_t __a, int16x2_t __b) {
441 return __builtin_arm_shsax(__a, __b);
443 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
444 __shsub16(int16x2_t __a, int16x2_t __b) {
445 return __builtin_arm_shsub16(__a, __b);
447 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
448 __ssax(int16x2_t __a, int16x2_t __b) {
449 return __builtin_arm_ssax(__a, __b);
451 static __inline__ int16x2_t __attribute__((__always_inline__, __nodebug__))
452 __ssub16(int16x2_t __a, int16x2_t __b) {
453 return __builtin_arm_ssub16(__a, __b);
455 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
456 __uadd16(uint16x2_t __a, uint16x2_t __b) {
457 return __builtin_arm_uadd16(__a, __b);
459 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
460 __uasx(uint16x2_t __a, uint16x2_t __b) {
461 return __builtin_arm_uasx(__a, __b);
463 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
464 __uhadd16(uint16x2_t __a, uint16x2_t __b) {
465 return __builtin_arm_uhadd16(__a, __b);
467 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
468 __uhasx(uint16x2_t __a, uint16x2_t __b) {
469 return __builtin_arm_uhasx(__a, __b);
471 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
472 __uhsax(uint16x2_t __a, uint16x2_t __b) {
473 return __builtin_arm_uhsax(__a, __b);
475 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
476 __uhsub16(uint16x2_t __a, uint16x2_t __b) {
477 return __builtin_arm_uhsub16(__a, __b);
479 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
480 __uqadd16(uint16x2_t __a, uint16x2_t __b) {
481 return __builtin_arm_uqadd16(__a, __b);
483 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
484 __uqasx(uint16x2_t __a, uint16x2_t __b) {
485 return __builtin_arm_uqasx(__a, __b);
487 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
488 __uqsax(uint16x2_t __a, uint16x2_t __b) {
489 return __builtin_arm_uqsax(__a, __b);
491 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
492 __uqsub16(uint16x2_t __a, uint16x2_t __b) {
493 return __builtin_arm_uqsub16(__a, __b);
495 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
496 __usax(uint16x2_t __a, uint16x2_t __b) {
497 return __builtin_arm_usax(__a, __b);
499 static __inline__ uint16x2_t __attribute__((__always_inline__, __nodebug__))
500 __usub16(uint16x2_t __a, uint16x2_t __b) {
501 return __builtin_arm_usub16(__a, __b);
505 /* 9.5.10 Parallel 16-bit multiplications */
506 #if __ARM_FEATURE_SIMD32
507 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
508 __smlad(int16x2_t __a, int16x2_t __b, int32_t __c) {
509 return __builtin_arm_smlad(__a, __b, __c);
511 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
512 __smladx(int16x2_t __a, int16x2_t __b, int32_t __c) {
513 return __builtin_arm_smladx(__a, __b, __c);
515 static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
516 __smlald(int16x2_t __a, int16x2_t __b, int64_t __c) {
517 return __builtin_arm_smlald(__a, __b, __c);
519 static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
520 __smlaldx(int16x2_t __a, int16x2_t __b, int64_t __c) {
521 return __builtin_arm_smlaldx(__a, __b, __c);
523 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
524 __smlsd(int16x2_t __a, int16x2_t __b, int32_t __c) {
525 return __builtin_arm_smlsd(__a, __b, __c);
527 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
528 __smlsdx(int16x2_t __a, int16x2_t __b, int32_t __c) {
529 return __builtin_arm_smlsdx(__a, __b, __c);
531 static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
532 __smlsld(int16x2_t __a, int16x2_t __b, int64_t __c) {
533 return __builtin_arm_smlsld(__a, __b, __c);
535 static __inline__ int64_t __attribute__((__always_inline__, __nodebug__))
536 __smlsldx(int16x2_t __a, int16x2_t __b, int64_t __c) {
537 return __builtin_arm_smlsldx(__a, __b, __c);
539 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
540 __smuad(int16x2_t __a, int16x2_t __b) {
541 return __builtin_arm_smuad(__a, __b);
543 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
544 __smuadx(int16x2_t __a, int16x2_t __b) {
545 return __builtin_arm_smuadx(__a, __b);
547 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
548 __smusd(int16x2_t __a, int16x2_t __b) {
549 return __builtin_arm_smusd(__a, __b);
551 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
552 __smusdx(int16x2_t __a, int16x2_t __b) {
553 return __builtin_arm_smusdx(__a, __b);
557 /* 9.7 CRC32 intrinsics */
558 #if __ARM_FEATURE_CRC32
559 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
560 __crc32b(uint32_t __a, uint8_t __b) {
561 return __builtin_arm_crc32b(__a, __b);
564 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
565 __crc32h(uint32_t __a, uint16_t __b) {
566 return __builtin_arm_crc32h(__a, __b);
569 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
570 __crc32w(uint32_t __a, uint32_t __b) {
571 return __builtin_arm_crc32w(__a, __b);
574 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
575 __crc32d(uint32_t __a, uint64_t __b) {
576 return __builtin_arm_crc32d(__a, __b);
579 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
580 __crc32cb(uint32_t __a, uint8_t __b) {
581 return __builtin_arm_crc32cb(__a, __b);
584 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
585 __crc32ch(uint32_t __a, uint16_t __b) {
586 return __builtin_arm_crc32ch(__a, __b);
589 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
590 __crc32cw(uint32_t __a, uint32_t __b) {
591 return __builtin_arm_crc32cw(__a, __b);
594 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
595 __crc32cd(uint32_t __a, uint64_t __b) {
596 return __builtin_arm_crc32cd(__a, __b);
600 /* Armv8.3-A Javascript conversion intrinsic */
601 #if __ARM_64BIT_STATE && defined(__ARM_FEATURE_JCVT)
602 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
604 return __builtin_arm_jcvt(__a);
608 /* 10.1 Special register intrinsics */
609 #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg)
610 #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg)
611 #define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg)
612 #define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v)
613 #define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v)
614 #define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v)
616 // Memory Tagging Extensions (MTE) Intrinsics
617 #if __ARM_FEATURE_MEMORY_TAGGING
618 #define __arm_mte_create_random_tag(__ptr, __mask) __builtin_arm_irg(__ptr, __mask)
619 #define __arm_mte_increment_tag(__ptr, __tag_offset) __builtin_arm_addg(__ptr, __tag_offset)
620 #define __arm_mte_exclude_tag(__ptr, __excluded) __builtin_arm_gmi(__ptr, __excluded)
621 #define __arm_mte_get_tag(__ptr) __builtin_arm_ldg(__ptr)
622 #define __arm_mte_set_tag(__ptr) __builtin_arm_stg(__ptr)
623 #define __arm_mte_ptrdiff(__ptra, __ptrb) __builtin_arm_subp(__ptra, __ptrb)
626 #if defined(__cplusplus)
630 #endif /* __ARM_ACLE_H */