1 /*===---- arm_acle.h - ARM Non-Neon intrinsics -----------------------------===
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21 *===-----------------------------------------------------------------------===
28 #error "ACLE intrinsics support not enabled."
33 #if defined(__cplusplus)
37 /* 8 SYNCHRONIZATION, BARRIER AND HINT INTRINSICS */
38 /* 8.3 Memory barriers */
39 #if !defined(_MSC_VER)
40 #define __dmb(i) __builtin_arm_dmb(i)
41 #define __dsb(i) __builtin_arm_dsb(i)
42 #define __isb(i) __builtin_arm_isb(i)
47 #if !defined(_MSC_VER)
48 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfi(void) {
52 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __wfe(void) {
56 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sev(void) {
60 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __sevl(void) {
64 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __yield(void) {
65 __builtin_arm_yield();
70 #define __dbg(t) __builtin_arm_dbg(t)
74 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
75 __swp(uint32_t x, volatile uint32_t *p) {
77 do v = __builtin_arm_ldrex(p); while (__builtin_arm_strex(x, p));
81 /* 8.6 Memory prefetch intrinsics */
82 /* 8.6.1 Data prefetch */
83 #define __pld(addr) __pldx(0, 0, 0, addr)
86 #define __pldx(access_kind, cache_level, retention_policy, addr) \
87 __builtin_arm_prefetch(addr, access_kind, 1)
89 #define __pldx(access_kind, cache_level, retention_policy, addr) \
90 __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
93 /* 8.6.2 Instruction prefetch */
94 #define __pli(addr) __plix(0, 0, addr)
97 #define __plix(cache_level, retention_policy, addr) \
98 __builtin_arm_prefetch(addr, 0, 0)
100 #define __plix(cache_level, retention_policy, addr) \
101 __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
105 static __inline__ void __attribute__((__always_inline__, __nodebug__)) __nop(void) {
109 /* 9 DATA-PROCESSING INTRINSICS */
110 /* 9.2 Miscellaneous data-processing intrinsics */
112 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
113 __ror(uint32_t x, uint32_t y) {
115 if (y == 0) return x;
116 return (x >> y) | (x << (32 - y));
119 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
120 __rorll(uint64_t x, uint32_t y) {
122 if (y == 0) return x;
123 return (x >> y) | (x << (64 - y));
126 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
127 __rorl(unsigned long x, uint32_t y) {
128 #if __SIZEOF_LONG__ == 4
131 return __rorll(x, y);
137 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
139 return __builtin_clz(t);
142 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
143 __clzl(unsigned long t) {
144 return __builtin_clzl(t);
147 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
148 __clzll(uint64_t t) {
149 return __builtin_clzll(t);
153 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
155 return __builtin_bswap32(t);
158 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
159 __revl(unsigned long t) {
160 #if __SIZEOF_LONG__ == 4
161 return __builtin_bswap32(t);
163 return __builtin_bswap64(t);
167 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
168 __revll(uint64_t t) {
169 return __builtin_bswap64(t);
173 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
174 __rev16(uint32_t t) {
175 return __ror(__rev(t), 16);
178 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
179 __rev16l(unsigned long t) {
180 return __rorl(__revl(t), sizeof(long) / 2);
183 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
184 __rev16ll(uint64_t t) {
185 return __rorll(__revll(t), 32);
189 static __inline__ int16_t __attribute__((__always_inline__, __nodebug__))
191 return __builtin_bswap16(t);
195 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
197 return __builtin_arm_rbit(t);
200 static __inline__ uint64_t __attribute__((__always_inline__, __nodebug__))
201 __rbitll(uint64_t t) {
202 #if __ARM_32BIT_STATE
203 return (((uint64_t) __builtin_arm_rbit(t)) << 32) |
204 __builtin_arm_rbit(t >> 32);
206 return __builtin_arm_rbit64(t);
210 static __inline__ unsigned long __attribute__((__always_inline__, __nodebug__))
211 __rbitl(unsigned long t) {
212 #if __SIZEOF_LONG__ == 4
220 * 9.4 Saturating intrinsics
222 * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q flag
223 * intrinsics are implemented and the flag is enabled.
225 /* 9.4.1 Width-specified saturation intrinsics */
226 #if __ARM_32BIT_STATE
227 #define __ssat(x, y) __builtin_arm_ssat(x, y)
228 #define __usat(x, y) __builtin_arm_usat(x, y)
231 /* 9.4.2 Saturating addition and subtraction intrinsics */
232 #if __ARM_32BIT_STATE
233 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
234 __qadd(int32_t t, int32_t v) {
235 return __builtin_arm_qadd(t, v);
238 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
239 __qsub(int32_t t, int32_t v) {
240 return __builtin_arm_qsub(t, v);
243 static __inline__ int32_t __attribute__((__always_inline__, __nodebug__))
245 return __builtin_arm_qadd(t, t);
249 /* 9.7 CRC32 intrinsics */
250 #if __ARM_FEATURE_CRC32
251 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
252 __crc32b(uint32_t a, uint8_t b) {
253 return __builtin_arm_crc32b(a, b);
256 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
257 __crc32h(uint32_t a, uint16_t b) {
258 return __builtin_arm_crc32h(a, b);
261 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
262 __crc32w(uint32_t a, uint32_t b) {
263 return __builtin_arm_crc32w(a, b);
266 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
267 __crc32d(uint32_t a, uint64_t b) {
268 return __builtin_arm_crc32d(a, b);
271 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
272 __crc32cb(uint32_t a, uint8_t b) {
273 return __builtin_arm_crc32cb(a, b);
276 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
277 __crc32ch(uint32_t a, uint16_t b) {
278 return __builtin_arm_crc32ch(a, b);
281 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
282 __crc32cw(uint32_t a, uint32_t b) {
283 return __builtin_arm_crc32cw(a, b);
286 static __inline__ uint32_t __attribute__((__always_inline__, __nodebug__))
287 __crc32cd(uint32_t a, uint64_t b) {
288 return __builtin_arm_crc32cd(a, b);
292 /* 10.1 Special register intrinsics */
293 #define __arm_rsr(sysreg) __builtin_arm_rsr(sysreg)
294 #define __arm_rsr64(sysreg) __builtin_arm_rsr64(sysreg)
295 #define __arm_rsrp(sysreg) __builtin_arm_rsrp(sysreg)
296 #define __arm_wsr(sysreg, v) __builtin_arm_wsr(sysreg, v)
297 #define __arm_wsr64(sysreg, v) __builtin_arm_wsr64(sysreg, v)
298 #define __arm_wsrp(sysreg, v) __builtin_arm_wsrp(sysreg, v)
300 #if defined(__cplusplus)
304 #endif /* __ARM_ACLE_H */