1 /*===---- avx2intrin.h - AVX2 intrinsics -----------------------------------===
3 * Permission is hereby granted, free of charge, to any person obtaining a copy
4 * of this software and associated documentation files (the "Software"), to deal
5 * in the Software without restriction, including without limitation the rights
6 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7 * copies of the Software, and to permit persons to whom the Software is
8 * furnished to do so, subject to the following conditions:
10 * The above copyright notice and this permission notice shall be included in
11 * all copies or substantial portions of the Software.
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 *===-----------------------------------------------------------------------===
25 #error "Never use <avx2intrin.h> directly; include <immintrin.h> instead."
28 #ifndef __AVX2INTRIN_H
29 #define __AVX2INTRIN_H
31 /* Define the default attributes for the functions in this file. */
32 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
34 /* SSE4 Multiple Packed Sums of Absolute Difference. */
35 #define _mm256_mpsadbw_epu8(X, Y, M) __builtin_ia32_mpsadbw256((X), (Y), (M))
37 static __inline__ __m256i __DEFAULT_FN_ATTRS
38 _mm256_abs_epi8(__m256i __a)
40 return (__m256i)__builtin_ia32_pabsb256((__v32qi)__a);
43 static __inline__ __m256i __DEFAULT_FN_ATTRS
44 _mm256_abs_epi16(__m256i __a)
46 return (__m256i)__builtin_ia32_pabsw256((__v16hi)__a);
49 static __inline__ __m256i __DEFAULT_FN_ATTRS
50 _mm256_abs_epi32(__m256i __a)
52 return (__m256i)__builtin_ia32_pabsd256((__v8si)__a);
55 static __inline__ __m256i __DEFAULT_FN_ATTRS
56 _mm256_packs_epi16(__m256i __a, __m256i __b)
58 return (__m256i)__builtin_ia32_packsswb256((__v16hi)__a, (__v16hi)__b);
61 static __inline__ __m256i __DEFAULT_FN_ATTRS
62 _mm256_packs_epi32(__m256i __a, __m256i __b)
64 return (__m256i)__builtin_ia32_packssdw256((__v8si)__a, (__v8si)__b);
67 static __inline__ __m256i __DEFAULT_FN_ATTRS
68 _mm256_packus_epi16(__m256i __a, __m256i __b)
70 return (__m256i)__builtin_ia32_packuswb256((__v16hi)__a, (__v16hi)__b);
73 static __inline__ __m256i __DEFAULT_FN_ATTRS
74 _mm256_packus_epi32(__m256i __V1, __m256i __V2)
76 return (__m256i) __builtin_ia32_packusdw256((__v8si)__V1, (__v8si)__V2);
79 static __inline__ __m256i __DEFAULT_FN_ATTRS
80 _mm256_add_epi8(__m256i __a, __m256i __b)
82 return (__m256i)((__v32qi)__a + (__v32qi)__b);
85 static __inline__ __m256i __DEFAULT_FN_ATTRS
86 _mm256_add_epi16(__m256i __a, __m256i __b)
88 return (__m256i)((__v16hi)__a + (__v16hi)__b);
91 static __inline__ __m256i __DEFAULT_FN_ATTRS
92 _mm256_add_epi32(__m256i __a, __m256i __b)
94 return (__m256i)((__v8si)__a + (__v8si)__b);
97 static __inline__ __m256i __DEFAULT_FN_ATTRS
98 _mm256_add_epi64(__m256i __a, __m256i __b)
103 static __inline__ __m256i __DEFAULT_FN_ATTRS
104 _mm256_adds_epi8(__m256i __a, __m256i __b)
106 return (__m256i)__builtin_ia32_paddsb256((__v32qi)__a, (__v32qi)__b);
109 static __inline__ __m256i __DEFAULT_FN_ATTRS
110 _mm256_adds_epi16(__m256i __a, __m256i __b)
112 return (__m256i)__builtin_ia32_paddsw256((__v16hi)__a, (__v16hi)__b);
115 static __inline__ __m256i __DEFAULT_FN_ATTRS
116 _mm256_adds_epu8(__m256i __a, __m256i __b)
118 return (__m256i)__builtin_ia32_paddusb256((__v32qi)__a, (__v32qi)__b);
121 static __inline__ __m256i __DEFAULT_FN_ATTRS
122 _mm256_adds_epu16(__m256i __a, __m256i __b)
124 return (__m256i)__builtin_ia32_paddusw256((__v16hi)__a, (__v16hi)__b);
127 #define _mm256_alignr_epi8(a, b, n) __extension__ ({ \
130 (__m256i)__builtin_ia32_palignr256((__v32qi)__a, (__v32qi)__b, (n)); })
132 static __inline__ __m256i __DEFAULT_FN_ATTRS
133 _mm256_and_si256(__m256i __a, __m256i __b)
138 static __inline__ __m256i __DEFAULT_FN_ATTRS
139 _mm256_andnot_si256(__m256i __a, __m256i __b)
144 static __inline__ __m256i __DEFAULT_FN_ATTRS
145 _mm256_avg_epu8(__m256i __a, __m256i __b)
147 return (__m256i)__builtin_ia32_pavgb256((__v32qi)__a, (__v32qi)__b);
150 static __inline__ __m256i __DEFAULT_FN_ATTRS
151 _mm256_avg_epu16(__m256i __a, __m256i __b)
153 return (__m256i)__builtin_ia32_pavgw256((__v16hi)__a, (__v16hi)__b);
156 static __inline__ __m256i __DEFAULT_FN_ATTRS
157 _mm256_blendv_epi8(__m256i __V1, __m256i __V2, __m256i __M)
159 return (__m256i)__builtin_ia32_pblendvb256((__v32qi)__V1, (__v32qi)__V2,
163 #define _mm256_blend_epi16(V1, V2, M) __extension__ ({ \
164 __m256i __V1 = (V1); \
165 __m256i __V2 = (V2); \
166 (__m256i)__builtin_shufflevector((__v16hi)__V1, (__v16hi)__V2, \
167 (((M) & 0x01) ? 16 : 0), \
168 (((M) & 0x02) ? 17 : 1), \
169 (((M) & 0x04) ? 18 : 2), \
170 (((M) & 0x08) ? 19 : 3), \
171 (((M) & 0x10) ? 20 : 4), \
172 (((M) & 0x20) ? 21 : 5), \
173 (((M) & 0x40) ? 22 : 6), \
174 (((M) & 0x80) ? 23 : 7), \
175 (((M) & 0x01) ? 24 : 8), \
176 (((M) & 0x02) ? 25 : 9), \
177 (((M) & 0x04) ? 26 : 10), \
178 (((M) & 0x08) ? 27 : 11), \
179 (((M) & 0x10) ? 28 : 12), \
180 (((M) & 0x20) ? 29 : 13), \
181 (((M) & 0x40) ? 30 : 14), \
182 (((M) & 0x80) ? 31 : 15)); })
184 static __inline__ __m256i __DEFAULT_FN_ATTRS
185 _mm256_cmpeq_epi8(__m256i __a, __m256i __b)
187 return (__m256i)((__v32qi)__a == (__v32qi)__b);
190 static __inline__ __m256i __DEFAULT_FN_ATTRS
191 _mm256_cmpeq_epi16(__m256i __a, __m256i __b)
193 return (__m256i)((__v16hi)__a == (__v16hi)__b);
196 static __inline__ __m256i __DEFAULT_FN_ATTRS
197 _mm256_cmpeq_epi32(__m256i __a, __m256i __b)
199 return (__m256i)((__v8si)__a == (__v8si)__b);
202 static __inline__ __m256i __DEFAULT_FN_ATTRS
203 _mm256_cmpeq_epi64(__m256i __a, __m256i __b)
205 return (__m256i)(__a == __b);
208 static __inline__ __m256i __DEFAULT_FN_ATTRS
209 _mm256_cmpgt_epi8(__m256i __a, __m256i __b)
211 return (__m256i)((__v32qi)__a > (__v32qi)__b);
214 static __inline__ __m256i __DEFAULT_FN_ATTRS
215 _mm256_cmpgt_epi16(__m256i __a, __m256i __b)
217 return (__m256i)((__v16hi)__a > (__v16hi)__b);
220 static __inline__ __m256i __DEFAULT_FN_ATTRS
221 _mm256_cmpgt_epi32(__m256i __a, __m256i __b)
223 return (__m256i)((__v8si)__a > (__v8si)__b);
226 static __inline__ __m256i __DEFAULT_FN_ATTRS
227 _mm256_cmpgt_epi64(__m256i __a, __m256i __b)
229 return (__m256i)(__a > __b);
232 static __inline__ __m256i __DEFAULT_FN_ATTRS
233 _mm256_hadd_epi16(__m256i __a, __m256i __b)
235 return (__m256i)__builtin_ia32_phaddw256((__v16hi)__a, (__v16hi)__b);
238 static __inline__ __m256i __DEFAULT_FN_ATTRS
239 _mm256_hadd_epi32(__m256i __a, __m256i __b)
241 return (__m256i)__builtin_ia32_phaddd256((__v8si)__a, (__v8si)__b);
244 static __inline__ __m256i __DEFAULT_FN_ATTRS
245 _mm256_hadds_epi16(__m256i __a, __m256i __b)
247 return (__m256i)__builtin_ia32_phaddsw256((__v16hi)__a, (__v16hi)__b);
250 static __inline__ __m256i __DEFAULT_FN_ATTRS
251 _mm256_hsub_epi16(__m256i __a, __m256i __b)
253 return (__m256i)__builtin_ia32_phsubw256((__v16hi)__a, (__v16hi)__b);
256 static __inline__ __m256i __DEFAULT_FN_ATTRS
257 _mm256_hsub_epi32(__m256i __a, __m256i __b)
259 return (__m256i)__builtin_ia32_phsubd256((__v8si)__a, (__v8si)__b);
262 static __inline__ __m256i __DEFAULT_FN_ATTRS
263 _mm256_hsubs_epi16(__m256i __a, __m256i __b)
265 return (__m256i)__builtin_ia32_phsubsw256((__v16hi)__a, (__v16hi)__b);
268 static __inline__ __m256i __DEFAULT_FN_ATTRS
269 _mm256_maddubs_epi16(__m256i __a, __m256i __b)
271 return (__m256i)__builtin_ia32_pmaddubsw256((__v32qi)__a, (__v32qi)__b);
274 static __inline__ __m256i __DEFAULT_FN_ATTRS
275 _mm256_madd_epi16(__m256i __a, __m256i __b)
277 return (__m256i)__builtin_ia32_pmaddwd256((__v16hi)__a, (__v16hi)__b);
280 static __inline__ __m256i __DEFAULT_FN_ATTRS
281 _mm256_max_epi8(__m256i __a, __m256i __b)
283 return (__m256i)__builtin_ia32_pmaxsb256((__v32qi)__a, (__v32qi)__b);
286 static __inline__ __m256i __DEFAULT_FN_ATTRS
287 _mm256_max_epi16(__m256i __a, __m256i __b)
289 return (__m256i)__builtin_ia32_pmaxsw256((__v16hi)__a, (__v16hi)__b);
292 static __inline__ __m256i __DEFAULT_FN_ATTRS
293 _mm256_max_epi32(__m256i __a, __m256i __b)
295 return (__m256i)__builtin_ia32_pmaxsd256((__v8si)__a, (__v8si)__b);
298 static __inline__ __m256i __DEFAULT_FN_ATTRS
299 _mm256_max_epu8(__m256i __a, __m256i __b)
301 return (__m256i)__builtin_ia32_pmaxub256((__v32qi)__a, (__v32qi)__b);
304 static __inline__ __m256i __DEFAULT_FN_ATTRS
305 _mm256_max_epu16(__m256i __a, __m256i __b)
307 return (__m256i)__builtin_ia32_pmaxuw256((__v16hi)__a, (__v16hi)__b);
310 static __inline__ __m256i __DEFAULT_FN_ATTRS
311 _mm256_max_epu32(__m256i __a, __m256i __b)
313 return (__m256i)__builtin_ia32_pmaxud256((__v8si)__a, (__v8si)__b);
316 static __inline__ __m256i __DEFAULT_FN_ATTRS
317 _mm256_min_epi8(__m256i __a, __m256i __b)
319 return (__m256i)__builtin_ia32_pminsb256((__v32qi)__a, (__v32qi)__b);
322 static __inline__ __m256i __DEFAULT_FN_ATTRS
323 _mm256_min_epi16(__m256i __a, __m256i __b)
325 return (__m256i)__builtin_ia32_pminsw256((__v16hi)__a, (__v16hi)__b);
328 static __inline__ __m256i __DEFAULT_FN_ATTRS
329 _mm256_min_epi32(__m256i __a, __m256i __b)
331 return (__m256i)__builtin_ia32_pminsd256((__v8si)__a, (__v8si)__b);
334 static __inline__ __m256i __DEFAULT_FN_ATTRS
335 _mm256_min_epu8(__m256i __a, __m256i __b)
337 return (__m256i)__builtin_ia32_pminub256((__v32qi)__a, (__v32qi)__b);
340 static __inline__ __m256i __DEFAULT_FN_ATTRS
341 _mm256_min_epu16(__m256i __a, __m256i __b)
343 return (__m256i)__builtin_ia32_pminuw256 ((__v16hi)__a, (__v16hi)__b);
346 static __inline__ __m256i __DEFAULT_FN_ATTRS
347 _mm256_min_epu32(__m256i __a, __m256i __b)
349 return (__m256i)__builtin_ia32_pminud256((__v8si)__a, (__v8si)__b);
352 static __inline__ int __DEFAULT_FN_ATTRS
353 _mm256_movemask_epi8(__m256i __a)
355 return __builtin_ia32_pmovmskb256((__v32qi)__a);
358 static __inline__ __m256i __DEFAULT_FN_ATTRS
359 _mm256_cvtepi8_epi16(__m128i __V)
361 return (__m256i)__builtin_ia32_pmovsxbw256((__v16qi)__V);
364 static __inline__ __m256i __DEFAULT_FN_ATTRS
365 _mm256_cvtepi8_epi32(__m128i __V)
367 return (__m256i)__builtin_ia32_pmovsxbd256((__v16qi)__V);
370 static __inline__ __m256i __DEFAULT_FN_ATTRS
371 _mm256_cvtepi8_epi64(__m128i __V)
373 return (__m256i)__builtin_ia32_pmovsxbq256((__v16qi)__V);
376 static __inline__ __m256i __DEFAULT_FN_ATTRS
377 _mm256_cvtepi16_epi32(__m128i __V)
379 return (__m256i)__builtin_ia32_pmovsxwd256((__v8hi)__V);
382 static __inline__ __m256i __DEFAULT_FN_ATTRS
383 _mm256_cvtepi16_epi64(__m128i __V)
385 return (__m256i)__builtin_ia32_pmovsxwq256((__v8hi)__V);
388 static __inline__ __m256i __DEFAULT_FN_ATTRS
389 _mm256_cvtepi32_epi64(__m128i __V)
391 return (__m256i)__builtin_ia32_pmovsxdq256((__v4si)__V);
394 static __inline__ __m256i __DEFAULT_FN_ATTRS
395 _mm256_cvtepu8_epi16(__m128i __V)
397 return (__m256i)__builtin_ia32_pmovzxbw256((__v16qi)__V);
400 static __inline__ __m256i __DEFAULT_FN_ATTRS
401 _mm256_cvtepu8_epi32(__m128i __V)
403 return (__m256i)__builtin_ia32_pmovzxbd256((__v16qi)__V);
406 static __inline__ __m256i __DEFAULT_FN_ATTRS
407 _mm256_cvtepu8_epi64(__m128i __V)
409 return (__m256i)__builtin_ia32_pmovzxbq256((__v16qi)__V);
412 static __inline__ __m256i __DEFAULT_FN_ATTRS
413 _mm256_cvtepu16_epi32(__m128i __V)
415 return (__m256i)__builtin_ia32_pmovzxwd256((__v8hi)__V);
418 static __inline__ __m256i __DEFAULT_FN_ATTRS
419 _mm256_cvtepu16_epi64(__m128i __V)
421 return (__m256i)__builtin_ia32_pmovzxwq256((__v8hi)__V);
424 static __inline__ __m256i __DEFAULT_FN_ATTRS
425 _mm256_cvtepu32_epi64(__m128i __V)
427 return (__m256i)__builtin_ia32_pmovzxdq256((__v4si)__V);
430 static __inline__ __m256i __DEFAULT_FN_ATTRS
431 _mm256_mul_epi32(__m256i __a, __m256i __b)
433 return (__m256i)__builtin_ia32_pmuldq256((__v8si)__a, (__v8si)__b);
436 static __inline__ __m256i __DEFAULT_FN_ATTRS
437 _mm256_mulhrs_epi16(__m256i __a, __m256i __b)
439 return (__m256i)__builtin_ia32_pmulhrsw256((__v16hi)__a, (__v16hi)__b);
442 static __inline__ __m256i __DEFAULT_FN_ATTRS
443 _mm256_mulhi_epu16(__m256i __a, __m256i __b)
445 return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b);
448 static __inline__ __m256i __DEFAULT_FN_ATTRS
449 _mm256_mulhi_epi16(__m256i __a, __m256i __b)
451 return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b);
454 static __inline__ __m256i __DEFAULT_FN_ATTRS
455 _mm256_mullo_epi16(__m256i __a, __m256i __b)
457 return (__m256i)((__v16hi)__a * (__v16hi)__b);
460 static __inline__ __m256i __DEFAULT_FN_ATTRS
461 _mm256_mullo_epi32 (__m256i __a, __m256i __b)
463 return (__m256i)((__v8si)__a * (__v8si)__b);
466 static __inline__ __m256i __DEFAULT_FN_ATTRS
467 _mm256_mul_epu32(__m256i __a, __m256i __b)
469 return __builtin_ia32_pmuludq256((__v8si)__a, (__v8si)__b);
472 static __inline__ __m256i __DEFAULT_FN_ATTRS
473 _mm256_or_si256(__m256i __a, __m256i __b)
478 static __inline__ __m256i __DEFAULT_FN_ATTRS
479 _mm256_sad_epu8(__m256i __a, __m256i __b)
481 return __builtin_ia32_psadbw256((__v32qi)__a, (__v32qi)__b);
484 static __inline__ __m256i __DEFAULT_FN_ATTRS
485 _mm256_shuffle_epi8(__m256i __a, __m256i __b)
487 return (__m256i)__builtin_ia32_pshufb256((__v32qi)__a, (__v32qi)__b);
490 #define _mm256_shuffle_epi32(a, imm) __extension__ ({ \
492 (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)_mm256_set1_epi32(0), \
493 (imm) & 0x3, ((imm) & 0xc) >> 2, \
494 ((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \
495 4 + (((imm) & 0x03) >> 0), \
496 4 + (((imm) & 0x0c) >> 2), \
497 4 + (((imm) & 0x30) >> 4), \
498 4 + (((imm) & 0xc0) >> 6)); })
500 #define _mm256_shufflehi_epi16(a, imm) __extension__ ({ \
502 (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)_mm256_set1_epi16(0), \
504 4 + (((imm) & 0x03) >> 0), \
505 4 + (((imm) & 0x0c) >> 2), \
506 4 + (((imm) & 0x30) >> 4), \
507 4 + (((imm) & 0xc0) >> 6), \
509 12 + (((imm) & 0x03) >> 0), \
510 12 + (((imm) & 0x0c) >> 2), \
511 12 + (((imm) & 0x30) >> 4), \
512 12 + (((imm) & 0xc0) >> 6)); })
514 #define _mm256_shufflelo_epi16(a, imm) __extension__ ({ \
516 (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)_mm256_set1_epi16(0), \
517 (imm) & 0x3,((imm) & 0xc) >> 2, \
518 ((imm) & 0x30) >> 4, ((imm) & 0xc0) >> 6, \
520 8 + (((imm) & 0x03) >> 0), \
521 8 + (((imm) & 0x0c) >> 2), \
522 8 + (((imm) & 0x30) >> 4), \
523 8 + (((imm) & 0xc0) >> 6), \
526 static __inline__ __m256i __DEFAULT_FN_ATTRS
527 _mm256_sign_epi8(__m256i __a, __m256i __b)
529 return (__m256i)__builtin_ia32_psignb256((__v32qi)__a, (__v32qi)__b);
532 static __inline__ __m256i __DEFAULT_FN_ATTRS
533 _mm256_sign_epi16(__m256i __a, __m256i __b)
535 return (__m256i)__builtin_ia32_psignw256((__v16hi)__a, (__v16hi)__b);
538 static __inline__ __m256i __DEFAULT_FN_ATTRS
539 _mm256_sign_epi32(__m256i __a, __m256i __b)
541 return (__m256i)__builtin_ia32_psignd256((__v8si)__a, (__v8si)__b);
544 #define _mm256_slli_si256(a, count) __extension__ ({ \
546 (__m256i)__builtin_ia32_pslldqi256(__a, (count)*8); })
548 #define _mm256_bslli_epi128(a, count) _mm256_slli_si256((a), (count))
550 static __inline__ __m256i __DEFAULT_FN_ATTRS
551 _mm256_slli_epi16(__m256i __a, int __count)
553 return (__m256i)__builtin_ia32_psllwi256((__v16hi)__a, __count);
556 static __inline__ __m256i __DEFAULT_FN_ATTRS
557 _mm256_sll_epi16(__m256i __a, __m128i __count)
559 return (__m256i)__builtin_ia32_psllw256((__v16hi)__a, (__v8hi)__count);
562 static __inline__ __m256i __DEFAULT_FN_ATTRS
563 _mm256_slli_epi32(__m256i __a, int __count)
565 return (__m256i)__builtin_ia32_pslldi256((__v8si)__a, __count);
568 static __inline__ __m256i __DEFAULT_FN_ATTRS
569 _mm256_sll_epi32(__m256i __a, __m128i __count)
571 return (__m256i)__builtin_ia32_pslld256((__v8si)__a, (__v4si)__count);
574 static __inline__ __m256i __DEFAULT_FN_ATTRS
575 _mm256_slli_epi64(__m256i __a, int __count)
577 return __builtin_ia32_psllqi256(__a, __count);
580 static __inline__ __m256i __DEFAULT_FN_ATTRS
581 _mm256_sll_epi64(__m256i __a, __m128i __count)
583 return __builtin_ia32_psllq256(__a, __count);
586 static __inline__ __m256i __DEFAULT_FN_ATTRS
587 _mm256_srai_epi16(__m256i __a, int __count)
589 return (__m256i)__builtin_ia32_psrawi256((__v16hi)__a, __count);
592 static __inline__ __m256i __DEFAULT_FN_ATTRS
593 _mm256_sra_epi16(__m256i __a, __m128i __count)
595 return (__m256i)__builtin_ia32_psraw256((__v16hi)__a, (__v8hi)__count);
598 static __inline__ __m256i __DEFAULT_FN_ATTRS
599 _mm256_srai_epi32(__m256i __a, int __count)
601 return (__m256i)__builtin_ia32_psradi256((__v8si)__a, __count);
604 static __inline__ __m256i __DEFAULT_FN_ATTRS
605 _mm256_sra_epi32(__m256i __a, __m128i __count)
607 return (__m256i)__builtin_ia32_psrad256((__v8si)__a, (__v4si)__count);
610 #define _mm256_srli_si256(a, count) __extension__ ({ \
612 (__m256i)__builtin_ia32_psrldqi256(__a, (count)*8); })
614 #define _mm256_bsrli_epi128(a, count) _mm256_srli_si256((a), (count))
616 static __inline__ __m256i __DEFAULT_FN_ATTRS
617 _mm256_srli_epi16(__m256i __a, int __count)
619 return (__m256i)__builtin_ia32_psrlwi256((__v16hi)__a, __count);
622 static __inline__ __m256i __DEFAULT_FN_ATTRS
623 _mm256_srl_epi16(__m256i __a, __m128i __count)
625 return (__m256i)__builtin_ia32_psrlw256((__v16hi)__a, (__v8hi)__count);
628 static __inline__ __m256i __DEFAULT_FN_ATTRS
629 _mm256_srli_epi32(__m256i __a, int __count)
631 return (__m256i)__builtin_ia32_psrldi256((__v8si)__a, __count);
634 static __inline__ __m256i __DEFAULT_FN_ATTRS
635 _mm256_srl_epi32(__m256i __a, __m128i __count)
637 return (__m256i)__builtin_ia32_psrld256((__v8si)__a, (__v4si)__count);
640 static __inline__ __m256i __DEFAULT_FN_ATTRS
641 _mm256_srli_epi64(__m256i __a, int __count)
643 return __builtin_ia32_psrlqi256(__a, __count);
646 static __inline__ __m256i __DEFAULT_FN_ATTRS
647 _mm256_srl_epi64(__m256i __a, __m128i __count)
649 return __builtin_ia32_psrlq256(__a, __count);
652 static __inline__ __m256i __DEFAULT_FN_ATTRS
653 _mm256_sub_epi8(__m256i __a, __m256i __b)
655 return (__m256i)((__v32qi)__a - (__v32qi)__b);
658 static __inline__ __m256i __DEFAULT_FN_ATTRS
659 _mm256_sub_epi16(__m256i __a, __m256i __b)
661 return (__m256i)((__v16hi)__a - (__v16hi)__b);
664 static __inline__ __m256i __DEFAULT_FN_ATTRS
665 _mm256_sub_epi32(__m256i __a, __m256i __b)
667 return (__m256i)((__v8si)__a - (__v8si)__b);
670 static __inline__ __m256i __DEFAULT_FN_ATTRS
671 _mm256_sub_epi64(__m256i __a, __m256i __b)
676 static __inline__ __m256i __DEFAULT_FN_ATTRS
677 _mm256_subs_epi8(__m256i __a, __m256i __b)
679 return (__m256i)__builtin_ia32_psubsb256((__v32qi)__a, (__v32qi)__b);
682 static __inline__ __m256i __DEFAULT_FN_ATTRS
683 _mm256_subs_epi16(__m256i __a, __m256i __b)
685 return (__m256i)__builtin_ia32_psubsw256((__v16hi)__a, (__v16hi)__b);
688 static __inline__ __m256i __DEFAULT_FN_ATTRS
689 _mm256_subs_epu8(__m256i __a, __m256i __b)
691 return (__m256i)__builtin_ia32_psubusb256((__v32qi)__a, (__v32qi)__b);
694 static __inline__ __m256i __DEFAULT_FN_ATTRS
695 _mm256_subs_epu16(__m256i __a, __m256i __b)
697 return (__m256i)__builtin_ia32_psubusw256((__v16hi)__a, (__v16hi)__b);
700 static __inline__ __m256i __DEFAULT_FN_ATTRS
701 _mm256_unpackhi_epi8(__m256i __a, __m256i __b)
703 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 8, 32+8, 9, 32+9, 10, 32+10, 11, 32+11, 12, 32+12, 13, 32+13, 14, 32+14, 15, 32+15, 24, 32+24, 25, 32+25, 26, 32+26, 27, 32+27, 28, 32+28, 29, 32+29, 30, 32+30, 31, 32+31);
706 static __inline__ __m256i __DEFAULT_FN_ATTRS
707 _mm256_unpackhi_epi16(__m256i __a, __m256i __b)
709 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
712 static __inline__ __m256i __DEFAULT_FN_ATTRS
713 _mm256_unpackhi_epi32(__m256i __a, __m256i __b)
715 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 2, 8+2, 3, 8+3, 6, 8+6, 7, 8+7);
718 static __inline__ __m256i __DEFAULT_FN_ATTRS
719 _mm256_unpackhi_epi64(__m256i __a, __m256i __b)
721 return (__m256i)__builtin_shufflevector(__a, __b, 1, 4+1, 3, 4+3);
724 static __inline__ __m256i __DEFAULT_FN_ATTRS
725 _mm256_unpacklo_epi8(__m256i __a, __m256i __b)
727 return (__m256i)__builtin_shufflevector((__v32qi)__a, (__v32qi)__b, 0, 32+0, 1, 32+1, 2, 32+2, 3, 32+3, 4, 32+4, 5, 32+5, 6, 32+6, 7, 32+7, 16, 32+16, 17, 32+17, 18, 32+18, 19, 32+19, 20, 32+20, 21, 32+21, 22, 32+22, 23, 32+23);
730 static __inline__ __m256i __DEFAULT_FN_ATTRS
731 _mm256_unpacklo_epi16(__m256i __a, __m256i __b)
733 return (__m256i)__builtin_shufflevector((__v16hi)__a, (__v16hi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11);
736 static __inline__ __m256i __DEFAULT_FN_ATTRS
737 _mm256_unpacklo_epi32(__m256i __a, __m256i __b)
739 return (__m256i)__builtin_shufflevector((__v8si)__a, (__v8si)__b, 0, 8+0, 1, 8+1, 4, 8+4, 5, 8+5);
742 static __inline__ __m256i __DEFAULT_FN_ATTRS
743 _mm256_unpacklo_epi64(__m256i __a, __m256i __b)
745 return (__m256i)__builtin_shufflevector(__a, __b, 0, 4+0, 2, 4+2);
748 static __inline__ __m256i __DEFAULT_FN_ATTRS
749 _mm256_xor_si256(__m256i __a, __m256i __b)
754 static __inline__ __m256i __DEFAULT_FN_ATTRS
755 _mm256_stream_load_si256(__m256i *__V)
757 return (__m256i)__builtin_ia32_movntdqa256((__v4di *)__V);
760 static __inline__ __m128 __DEFAULT_FN_ATTRS
761 _mm_broadcastss_ps(__m128 __X)
763 return (__m128)__builtin_ia32_vbroadcastss_ps((__v4sf)__X);
766 static __inline__ __m128d __DEFAULT_FN_ATTRS
767 _mm_broadcastsd_pd(__m128d __a)
769 return __builtin_shufflevector(__a, __a, 0, 0);
772 static __inline__ __m256 __DEFAULT_FN_ATTRS
773 _mm256_broadcastss_ps(__m128 __X)
775 return (__m256)__builtin_ia32_vbroadcastss_ps256((__v4sf)__X);
778 static __inline__ __m256d __DEFAULT_FN_ATTRS
779 _mm256_broadcastsd_pd(__m128d __X)
781 return (__m256d)__builtin_ia32_vbroadcastsd_pd256((__v2df)__X);
784 static __inline__ __m256i __DEFAULT_FN_ATTRS
785 _mm256_broadcastsi128_si256(__m128i __X)
787 return (__m256i)__builtin_shufflevector(__X, __X, 0, 1, 0, 1);
790 #define _mm_blend_epi32(V1, V2, M) __extension__ ({ \
791 __m128i __V1 = (V1); \
792 __m128i __V2 = (V2); \
793 (__m128i)__builtin_shufflevector((__v4si)__V1, (__v4si)__V2, \
794 (((M) & 0x01) ? 4 : 0), \
795 (((M) & 0x02) ? 5 : 1), \
796 (((M) & 0x04) ? 6 : 2), \
797 (((M) & 0x08) ? 7 : 3)); })
799 #define _mm256_blend_epi32(V1, V2, M) __extension__ ({ \
800 __m256i __V1 = (V1); \
801 __m256i __V2 = (V2); \
802 (__m256i)__builtin_shufflevector((__v8si)__V1, (__v8si)__V2, \
803 (((M) & 0x01) ? 8 : 0), \
804 (((M) & 0x02) ? 9 : 1), \
805 (((M) & 0x04) ? 10 : 2), \
806 (((M) & 0x08) ? 11 : 3), \
807 (((M) & 0x10) ? 12 : 4), \
808 (((M) & 0x20) ? 13 : 5), \
809 (((M) & 0x40) ? 14 : 6), \
810 (((M) & 0x80) ? 15 : 7)); })
812 static __inline__ __m256i __DEFAULT_FN_ATTRS
813 _mm256_broadcastb_epi8(__m128i __X)
815 return (__m256i)__builtin_ia32_pbroadcastb256((__v16qi)__X);
818 static __inline__ __m256i __DEFAULT_FN_ATTRS
819 _mm256_broadcastw_epi16(__m128i __X)
821 return (__m256i)__builtin_ia32_pbroadcastw256((__v8hi)__X);
824 static __inline__ __m256i __DEFAULT_FN_ATTRS
825 _mm256_broadcastd_epi32(__m128i __X)
827 return (__m256i)__builtin_ia32_pbroadcastd256((__v4si)__X);
830 static __inline__ __m256i __DEFAULT_FN_ATTRS
831 _mm256_broadcastq_epi64(__m128i __X)
833 return (__m256i)__builtin_ia32_pbroadcastq256(__X);
836 static __inline__ __m128i __DEFAULT_FN_ATTRS
837 _mm_broadcastb_epi8(__m128i __X)
839 return (__m128i)__builtin_ia32_pbroadcastb128((__v16qi)__X);
842 static __inline__ __m128i __DEFAULT_FN_ATTRS
843 _mm_broadcastw_epi16(__m128i __X)
845 return (__m128i)__builtin_ia32_pbroadcastw128((__v8hi)__X);
849 static __inline__ __m128i __DEFAULT_FN_ATTRS
850 _mm_broadcastd_epi32(__m128i __X)
852 return (__m128i)__builtin_ia32_pbroadcastd128((__v4si)__X);
855 static __inline__ __m128i __DEFAULT_FN_ATTRS
856 _mm_broadcastq_epi64(__m128i __X)
858 return (__m128i)__builtin_ia32_pbroadcastq128(__X);
861 static __inline__ __m256i __DEFAULT_FN_ATTRS
862 _mm256_permutevar8x32_epi32(__m256i __a, __m256i __b)
864 return (__m256i)__builtin_ia32_permvarsi256((__v8si)__a, (__v8si)__b);
867 #define _mm256_permute4x64_pd(V, M) __extension__ ({ \
869 (__m256d)__builtin_shufflevector((__v4df)__V, (__v4df) _mm256_setzero_pd(), \
870 (M) & 0x3, ((M) & 0xc) >> 2, \
871 ((M) & 0x30) >> 4, ((M) & 0xc0) >> 6); })
873 static __inline__ __m256 __DEFAULT_FN_ATTRS
874 _mm256_permutevar8x32_ps(__m256 __a, __m256 __b)
876 return (__m256)__builtin_ia32_permvarsf256((__v8sf)__a, (__v8sf)__b);
879 #define _mm256_permute4x64_epi64(V, M) __extension__ ({ \
881 (__m256i)__builtin_shufflevector((__v4di)__V, (__v4di) _mm256_setzero_si256(), \
882 (M) & 0x3, ((M) & 0xc) >> 2, \
883 ((M) & 0x30) >> 4, ((M) & 0xc0) >> 6); })
885 #define _mm256_permute2x128_si256(V1, V2, M) __extension__ ({ \
886 __m256i __V1 = (V1); \
887 __m256i __V2 = (V2); \
888 (__m256i)__builtin_ia32_permti256(__V1, __V2, (M)); })
890 #define _mm256_extracti128_si256(V, M) __extension__ ({ \
891 (__m128i)__builtin_shufflevector( \
893 (__v4di)(_mm256_setzero_si256()), \
894 (((M) & 1) ? 2 : 0), \
895 (((M) & 1) ? 3 : 1) );})
897 #define _mm256_inserti128_si256(V1, V2, M) __extension__ ({ \
898 (__m256i)__builtin_shufflevector( \
900 (__v4di)_mm256_castsi128_si256((__m128i)(V2)), \
901 (((M) & 1) ? 0 : 4), \
902 (((M) & 1) ? 1 : 5), \
903 (((M) & 1) ? 4 : 2), \
904 (((M) & 1) ? 5 : 3) );})
906 static __inline__ __m256i __DEFAULT_FN_ATTRS
907 _mm256_maskload_epi32(int const *__X, __m256i __M)
909 return (__m256i)__builtin_ia32_maskloadd256((const __v8si *)__X, (__v8si)__M);
912 static __inline__ __m256i __DEFAULT_FN_ATTRS
913 _mm256_maskload_epi64(long long const *__X, __m256i __M)
915 return (__m256i)__builtin_ia32_maskloadq256((const __v4di *)__X, __M);
918 static __inline__ __m128i __DEFAULT_FN_ATTRS
919 _mm_maskload_epi32(int const *__X, __m128i __M)
921 return (__m128i)__builtin_ia32_maskloadd((const __v4si *)__X, (__v4si)__M);
924 static __inline__ __m128i __DEFAULT_FN_ATTRS
925 _mm_maskload_epi64(long long const *__X, __m128i __M)
927 return (__m128i)__builtin_ia32_maskloadq((const __v2di *)__X, (__v2di)__M);
930 static __inline__ void __DEFAULT_FN_ATTRS
931 _mm256_maskstore_epi32(int *__X, __m256i __M, __m256i __Y)
933 __builtin_ia32_maskstored256((__v8si *)__X, (__v8si)__M, (__v8si)__Y);
936 static __inline__ void __DEFAULT_FN_ATTRS
937 _mm256_maskstore_epi64(long long *__X, __m256i __M, __m256i __Y)
939 __builtin_ia32_maskstoreq256((__v4di *)__X, __M, __Y);
942 static __inline__ void __DEFAULT_FN_ATTRS
943 _mm_maskstore_epi32(int *__X, __m128i __M, __m128i __Y)
945 __builtin_ia32_maskstored((__v4si *)__X, (__v4si)__M, (__v4si)__Y);
948 static __inline__ void __DEFAULT_FN_ATTRS
949 _mm_maskstore_epi64(long long *__X, __m128i __M, __m128i __Y)
951 __builtin_ia32_maskstoreq(( __v2di *)__X, __M, __Y);
954 static __inline__ __m256i __DEFAULT_FN_ATTRS
955 _mm256_sllv_epi32(__m256i __X, __m256i __Y)
957 return (__m256i)__builtin_ia32_psllv8si((__v8si)__X, (__v8si)__Y);
960 static __inline__ __m128i __DEFAULT_FN_ATTRS
961 _mm_sllv_epi32(__m128i __X, __m128i __Y)
963 return (__m128i)__builtin_ia32_psllv4si((__v4si)__X, (__v4si)__Y);
966 static __inline__ __m256i __DEFAULT_FN_ATTRS
967 _mm256_sllv_epi64(__m256i __X, __m256i __Y)
969 return (__m256i)__builtin_ia32_psllv4di(__X, __Y);
972 static __inline__ __m128i __DEFAULT_FN_ATTRS
973 _mm_sllv_epi64(__m128i __X, __m128i __Y)
975 return (__m128i)__builtin_ia32_psllv2di(__X, __Y);
978 static __inline__ __m256i __DEFAULT_FN_ATTRS
979 _mm256_srav_epi32(__m256i __X, __m256i __Y)
981 return (__m256i)__builtin_ia32_psrav8si((__v8si)__X, (__v8si)__Y);
984 static __inline__ __m128i __DEFAULT_FN_ATTRS
985 _mm_srav_epi32(__m128i __X, __m128i __Y)
987 return (__m128i)__builtin_ia32_psrav4si((__v4si)__X, (__v4si)__Y);
990 static __inline__ __m256i __DEFAULT_FN_ATTRS
991 _mm256_srlv_epi32(__m256i __X, __m256i __Y)
993 return (__m256i)__builtin_ia32_psrlv8si((__v8si)__X, (__v8si)__Y);
996 static __inline__ __m128i __DEFAULT_FN_ATTRS
997 _mm_srlv_epi32(__m128i __X, __m128i __Y)
999 return (__m128i)__builtin_ia32_psrlv4si((__v4si)__X, (__v4si)__Y);
1002 static __inline__ __m256i __DEFAULT_FN_ATTRS
1003 _mm256_srlv_epi64(__m256i __X, __m256i __Y)
1005 return (__m256i)__builtin_ia32_psrlv4di(__X, __Y);
1008 static __inline__ __m128i __DEFAULT_FN_ATTRS
1009 _mm_srlv_epi64(__m128i __X, __m128i __Y)
1011 return (__m128i)__builtin_ia32_psrlv2di(__X, __Y);
1014 #define _mm_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \
1015 __m128d __a = (a); \
1016 double const *__m = (m); \
1017 __m128i __i = (i); \
1018 __m128d __mask = (mask); \
1019 (__m128d)__builtin_ia32_gatherd_pd((__v2df)__a, (const __v2df *)__m, \
1020 (__v4si)__i, (__v2df)__mask, (s)); })
1022 #define _mm256_mask_i32gather_pd(a, m, i, mask, s) __extension__ ({ \
1023 __m256d __a = (a); \
1024 double const *__m = (m); \
1025 __m128i __i = (i); \
1026 __m256d __mask = (mask); \
1027 (__m256d)__builtin_ia32_gatherd_pd256((__v4df)__a, (const __v4df *)__m, \
1028 (__v4si)__i, (__v4df)__mask, (s)); })
1030 #define _mm_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \
1031 __m128d __a = (a); \
1032 double const *__m = (m); \
1033 __m128i __i = (i); \
1034 __m128d __mask = (mask); \
1035 (__m128d)__builtin_ia32_gatherq_pd((__v2df)__a, (const __v2df *)__m, \
1036 (__v2di)__i, (__v2df)__mask, (s)); })
1038 #define _mm256_mask_i64gather_pd(a, m, i, mask, s) __extension__ ({ \
1039 __m256d __a = (a); \
1040 double const *__m = (m); \
1041 __m256i __i = (i); \
1042 __m256d __mask = (mask); \
1043 (__m256d)__builtin_ia32_gatherq_pd256((__v4df)__a, (const __v4df *)__m, \
1044 (__v4di)__i, (__v4df)__mask, (s)); })
1046 #define _mm_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \
1048 float const *__m = (m); \
1049 __m128i __i = (i); \
1050 __m128 __mask = (mask); \
1051 (__m128)__builtin_ia32_gatherd_ps((__v4sf)__a, (const __v4sf *)__m, \
1052 (__v4si)__i, (__v4sf)__mask, (s)); })
1054 #define _mm256_mask_i32gather_ps(a, m, i, mask, s) __extension__ ({ \
1056 float const *__m = (m); \
1057 __m256i __i = (i); \
1058 __m256 __mask = (mask); \
1059 (__m256)__builtin_ia32_gatherd_ps256((__v8sf)__a, (const __v8sf *)__m, \
1060 (__v8si)__i, (__v8sf)__mask, (s)); })
1062 #define _mm_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \
1064 float const *__m = (m); \
1065 __m128i __i = (i); \
1066 __m128 __mask = (mask); \
1067 (__m128)__builtin_ia32_gatherq_ps((__v4sf)__a, (const __v4sf *)__m, \
1068 (__v2di)__i, (__v4sf)__mask, (s)); })
1070 #define _mm256_mask_i64gather_ps(a, m, i, mask, s) __extension__ ({ \
1072 float const *__m = (m); \
1073 __m256i __i = (i); \
1074 __m128 __mask = (mask); \
1075 (__m128)__builtin_ia32_gatherq_ps256((__v4sf)__a, (const __v4sf *)__m, \
1076 (__v4di)__i, (__v4sf)__mask, (s)); })
1078 #define _mm_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \
1079 __m128i __a = (a); \
1080 int const *__m = (m); \
1081 __m128i __i = (i); \
1082 __m128i __mask = (mask); \
1083 (__m128i)__builtin_ia32_gatherd_d((__v4si)__a, (const __v4si *)__m, \
1084 (__v4si)__i, (__v4si)__mask, (s)); })
1086 #define _mm256_mask_i32gather_epi32(a, m, i, mask, s) __extension__ ({ \
1087 __m256i __a = (a); \
1088 int const *__m = (m); \
1089 __m256i __i = (i); \
1090 __m256i __mask = (mask); \
1091 (__m256i)__builtin_ia32_gatherd_d256((__v8si)__a, (const __v8si *)__m, \
1092 (__v8si)__i, (__v8si)__mask, (s)); })
1094 #define _mm_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \
1095 __m128i __a = (a); \
1096 int const *__m = (m); \
1097 __m128i __i = (i); \
1098 __m128i __mask = (mask); \
1099 (__m128i)__builtin_ia32_gatherq_d((__v4si)__a, (const __v4si *)__m, \
1100 (__v2di)__i, (__v4si)__mask, (s)); })
1102 #define _mm256_mask_i64gather_epi32(a, m, i, mask, s) __extension__ ({ \
1103 __m128i __a = (a); \
1104 int const *__m = (m); \
1105 __m256i __i = (i); \
1106 __m128i __mask = (mask); \
1107 (__m128i)__builtin_ia32_gatherq_d256((__v4si)__a, (const __v4si *)__m, \
1108 (__v4di)__i, (__v4si)__mask, (s)); })
1110 #define _mm_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \
1111 __m128i __a = (a); \
1112 long long const *__m = (m); \
1113 __m128i __i = (i); \
1114 __m128i __mask = (mask); \
1115 (__m128i)__builtin_ia32_gatherd_q((__v2di)__a, (const __v2di *)__m, \
1116 (__v4si)__i, (__v2di)__mask, (s)); })
1118 #define _mm256_mask_i32gather_epi64(a, m, i, mask, s) __extension__ ({ \
1119 __m256i __a = (a); \
1120 long long const *__m = (m); \
1121 __m128i __i = (i); \
1122 __m256i __mask = (mask); \
1123 (__m256i)__builtin_ia32_gatherd_q256((__v4di)__a, (const __v4di *)__m, \
1124 (__v4si)__i, (__v4di)__mask, (s)); })
1126 #define _mm_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \
1127 __m128i __a = (a); \
1128 long long const *__m = (m); \
1129 __m128i __i = (i); \
1130 __m128i __mask = (mask); \
1131 (__m128i)__builtin_ia32_gatherq_q((__v2di)__a, (const __v2di *)__m, \
1132 (__v2di)__i, (__v2di)__mask, (s)); })
1134 #define _mm256_mask_i64gather_epi64(a, m, i, mask, s) __extension__ ({ \
1135 __m256i __a = (a); \
1136 long long const *__m = (m); \
1137 __m256i __i = (i); \
1138 __m256i __mask = (mask); \
1139 (__m256i)__builtin_ia32_gatherq_q256((__v4di)__a, (const __v4di *)__m, \
1140 (__v4di)__i, (__v4di)__mask, (s)); })
1142 #define _mm_i32gather_pd(m, i, s) __extension__ ({ \
1143 double const *__m = (m); \
1144 __m128i __i = (i); \
1145 (__m128d)__builtin_ia32_gatherd_pd((__v2df)_mm_setzero_pd(), \
1146 (const __v2df *)__m, (__v4si)__i, \
1147 (__v2df)_mm_set1_pd((double)(long long int)-1), (s)); })
1149 #define _mm256_i32gather_pd(m, i, s) __extension__ ({ \
1150 double const *__m = (m); \
1151 __m128i __i = (i); \
1152 (__m256d)__builtin_ia32_gatherd_pd256((__v4df)_mm256_setzero_pd(), \
1153 (const __v4df *)__m, (__v4si)__i, \
1154 (__v4df)_mm256_set1_pd((double)(long long int)-1), (s)); })
1156 #define _mm_i64gather_pd(m, i, s) __extension__ ({ \
1157 double const *__m = (m); \
1158 __m128i __i = (i); \
1159 (__m128d)__builtin_ia32_gatherq_pd((__v2df)_mm_setzero_pd(), \
1160 (const __v2df *)__m, (__v2di)__i, \
1161 (__v2df)_mm_set1_pd((double)(long long int)-1), (s)); })
1163 #define _mm256_i64gather_pd(m, i, s) __extension__ ({ \
1164 double const *__m = (m); \
1165 __m256i __i = (i); \
1166 (__m256d)__builtin_ia32_gatherq_pd256((__v4df)_mm256_setzero_pd(), \
1167 (const __v4df *)__m, (__v4di)__i, \
1168 (__v4df)_mm256_set1_pd((double)(long long int)-1), (s)); })
1170 #define _mm_i32gather_ps(m, i, s) __extension__ ({ \
1171 float const *__m = (m); \
1172 __m128i __i = (i); \
1173 (__m128)__builtin_ia32_gatherd_ps((__v4sf)_mm_setzero_ps(), \
1174 (const __v4sf *)__m, (__v4si)__i, \
1175 (__v4sf)_mm_set1_ps((float)(int)-1), (s)); })
1177 #define _mm256_i32gather_ps(m, i, s) __extension__ ({ \
1178 float const *__m = (m); \
1179 __m256i __i = (i); \
1180 (__m256)__builtin_ia32_gatherd_ps256((__v8sf)_mm256_setzero_ps(), \
1181 (const __v8sf *)__m, (__v8si)__i, \
1182 (__v8sf)_mm256_set1_ps((float)(int)-1), (s)); })
1184 #define _mm_i64gather_ps(m, i, s) __extension__ ({ \
1185 float const *__m = (m); \
1186 __m128i __i = (i); \
1187 (__m128)__builtin_ia32_gatherq_ps((__v4sf)_mm_setzero_ps(), \
1188 (const __v4sf *)__m, (__v2di)__i, \
1189 (__v4sf)_mm_set1_ps((float)(int)-1), (s)); })
1191 #define _mm256_i64gather_ps(m, i, s) __extension__ ({ \
1192 float const *__m = (m); \
1193 __m256i __i = (i); \
1194 (__m128)__builtin_ia32_gatherq_ps256((__v4sf)_mm_setzero_ps(), \
1195 (const __v4sf *)__m, (__v4di)__i, \
1196 (__v4sf)_mm_set1_ps((float)(int)-1), (s)); })
1198 #define _mm_i32gather_epi32(m, i, s) __extension__ ({ \
1199 int const *__m = (m); \
1200 __m128i __i = (i); \
1201 (__m128i)__builtin_ia32_gatherd_d((__v4si)_mm_setzero_si128(), \
1202 (const __v4si *)__m, (__v4si)__i, \
1203 (__v4si)_mm_set1_epi32(-1), (s)); })
1205 #define _mm256_i32gather_epi32(m, i, s) __extension__ ({ \
1206 int const *__m = (m); \
1207 __m256i __i = (i); \
1208 (__m256i)__builtin_ia32_gatherd_d256((__v8si)_mm256_setzero_si256(), \
1209 (const __v8si *)__m, (__v8si)__i, \
1210 (__v8si)_mm256_set1_epi32(-1), (s)); })
1212 #define _mm_i64gather_epi32(m, i, s) __extension__ ({ \
1213 int const *__m = (m); \
1214 __m128i __i = (i); \
1215 (__m128i)__builtin_ia32_gatherq_d((__v4si)_mm_setzero_si128(), \
1216 (const __v4si *)__m, (__v2di)__i, \
1217 (__v4si)_mm_set1_epi32(-1), (s)); })
1219 #define _mm256_i64gather_epi32(m, i, s) __extension__ ({ \
1220 int const *__m = (m); \
1221 __m256i __i = (i); \
1222 (__m128i)__builtin_ia32_gatherq_d256((__v4si)_mm_setzero_si128(), \
1223 (const __v4si *)__m, (__v4di)__i, \
1224 (__v4si)_mm_set1_epi32(-1), (s)); })
1226 #define _mm_i32gather_epi64(m, i, s) __extension__ ({ \
1227 long long const *__m = (m); \
1228 __m128i __i = (i); \
1229 (__m128i)__builtin_ia32_gatherd_q((__v2di)_mm_setzero_si128(), \
1230 (const __v2di *)__m, (__v4si)__i, \
1231 (__v2di)_mm_set1_epi64x(-1), (s)); })
1233 #define _mm256_i32gather_epi64(m, i, s) __extension__ ({ \
1234 long long const *__m = (m); \
1235 __m128i __i = (i); \
1236 (__m256i)__builtin_ia32_gatherd_q256((__v4di)_mm256_setzero_si256(), \
1237 (const __v4di *)__m, (__v4si)__i, \
1238 (__v4di)_mm256_set1_epi64x(-1), (s)); })
1240 #define _mm_i64gather_epi64(m, i, s) __extension__ ({ \
1241 long long const *__m = (m); \
1242 __m128i __i = (i); \
1243 (__m128i)__builtin_ia32_gatherq_q((__v2di)_mm_setzero_si128(), \
1244 (const __v2di *)__m, (__v2di)__i, \
1245 (__v2di)_mm_set1_epi64x(-1), (s)); })
1247 #define _mm256_i64gather_epi64(m, i, s) __extension__ ({ \
1248 long long const *__m = (m); \
1249 __m256i __i = (i); \
1250 (__m256i)__builtin_ia32_gatherq_q256((__v4di)_mm256_setzero_si256(), \
1251 (const __v4di *)__m, (__v4di)__i, \
1252 (__v4di)_mm256_set1_epi64x(-1), (s)); })
1254 #undef __DEFAULT_FN_ATTRS
1256 #endif /* __AVX2INTRIN_H */