1 /*===------------- avx512vlvbmi2intrin.h - VBMI2 intrinsics -----------------===
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 *===-----------------------------------------------------------------------===
25 #error "Never use <avx512vlvbmi2intrin.h> directly; include <immintrin.h> instead."
28 #ifndef __AVX512VLVBMI2INTRIN_H
29 #define __AVX512VLVBMI2INTRIN_H
31 /* Define the default attributes for the functions in this file. */
32 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("avx512vl,avx512vbmi2")))
34 static __inline__ __m128i __DEFAULT_FN_ATTRS
35 _mm_mask_compress_epi16(__m128i __S, __mmask8 __U, __m128i __D)
37 return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D,
42 static __inline__ __m128i __DEFAULT_FN_ATTRS
43 _mm_maskz_compress_epi16(__mmask8 __U, __m128i __D)
45 return (__m128i) __builtin_ia32_compresshi128_mask ((__v8hi) __D,
46 (__v8hi) _mm_setzero_si128(),
50 static __inline__ __m128i __DEFAULT_FN_ATTRS
51 _mm_mask_compress_epi8(__m128i __S, __mmask16 __U, __m128i __D)
53 return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D,
58 static __inline__ __m128i __DEFAULT_FN_ATTRS
59 _mm_maskz_compress_epi8(__mmask16 __U, __m128i __D)
61 return (__m128i) __builtin_ia32_compressqi128_mask ((__v16qi) __D,
62 (__v16qi) _mm_setzero_si128(),
66 static __inline__ void __DEFAULT_FN_ATTRS
67 _mm_mask_compressstoreu_epi16(void *__P, __mmask8 __U, __m128i __D)
69 __builtin_ia32_compressstorehi128_mask ((__v8hi *) __P, (__v8hi) __D,
73 static __inline__ void __DEFAULT_FN_ATTRS
74 _mm_mask_compressstoreu_epi8(void *__P, __mmask16 __U, __m128i __D)
76 __builtin_ia32_compressstoreqi128_mask ((__v16qi *) __P, (__v16qi) __D,
80 static __inline__ __m128i __DEFAULT_FN_ATTRS
81 _mm_mask_expand_epi16(__m128i __S, __mmask8 __U, __m128i __D)
83 return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D,
88 static __inline__ __m128i __DEFAULT_FN_ATTRS
89 _mm_maskz_expand_epi16(__mmask8 __U, __m128i __D)
91 return (__m128i) __builtin_ia32_expandhi128_mask ((__v8hi) __D,
92 (__v8hi) _mm_setzero_si128(),
96 static __inline__ __m128i __DEFAULT_FN_ATTRS
97 _mm_mask_expand_epi8(__m128i __S, __mmask16 __U, __m128i __D)
99 return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D,
104 static __inline__ __m128i __DEFAULT_FN_ATTRS
105 _mm_maskz_expand_epi8(__mmask16 __U, __m128i __D)
107 return (__m128i) __builtin_ia32_expandqi128_mask ((__v16qi) __D,
108 (__v16qi) _mm_setzero_si128(),
112 static __inline__ __m128i __DEFAULT_FN_ATTRS
113 _mm_mask_expandloadu_epi16(__m128i __S, __mmask8 __U, void const *__P)
115 return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P,
120 static __inline__ __m128i __DEFAULT_FN_ATTRS
121 _mm_maskz_expandloadu_epi16(__mmask8 __U, void const *__P)
123 return (__m128i) __builtin_ia32_expandloadhi128_mask ((const __v8hi *)__P,
124 (__v8hi) _mm_setzero_si128(),
128 static __inline__ __m128i __DEFAULT_FN_ATTRS
129 _mm_mask_expandloadu_epi8(__m128i __S, __mmask16 __U, void const *__P)
131 return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P,
136 static __inline__ __m128i __DEFAULT_FN_ATTRS
137 _mm_maskz_expandloadu_epi8(__mmask16 __U, void const *__P)
139 return (__m128i) __builtin_ia32_expandloadqi128_mask ((const __v16qi *)__P,
140 (__v16qi) _mm_setzero_si128(),
144 static __inline__ __m256i __DEFAULT_FN_ATTRS
145 _mm256_mask_compress_epi16(__m256i __S, __mmask16 __U, __m256i __D)
147 return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __D,
152 static __inline__ __m256i __DEFAULT_FN_ATTRS
153 _mm256_maskz_compress_epi16(__mmask16 __U, __m256i __D)
155 return (__m256i) __builtin_ia32_compresshi256_mask ((__v16hi) __D,
156 (__v16hi) _mm256_setzero_si256(),
160 static __inline__ __m256i __DEFAULT_FN_ATTRS
161 _mm256_mask_compress_epi8(__m256i __S, __mmask32 __U, __m256i __D)
163 return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __D,
168 static __inline__ __m256i __DEFAULT_FN_ATTRS
169 _mm256_maskz_compress_epi8(__mmask32 __U, __m256i __D)
171 return (__m256i) __builtin_ia32_compressqi256_mask ((__v32qi) __D,
172 (__v32qi) _mm256_setzero_si256(),
176 static __inline__ void __DEFAULT_FN_ATTRS
177 _mm256_mask_compressstoreu_epi16(void *__P, __mmask16 __U, __m256i __D)
179 __builtin_ia32_compressstorehi256_mask ((__v16hi *) __P, (__v16hi) __D,
183 static __inline__ void __DEFAULT_FN_ATTRS
184 _mm256_mask_compressstoreu_epi8(void *__P, __mmask32 __U, __m256i __D)
186 __builtin_ia32_compressstoreqi256_mask ((__v32qi *) __P, (__v32qi) __D,
190 static __inline__ __m256i __DEFAULT_FN_ATTRS
191 _mm256_mask_expand_epi16(__m256i __S, __mmask16 __U, __m256i __D)
193 return (__m256i) __builtin_ia32_expandhi256_mask ((__v16hi) __D,
198 static __inline__ __m256i __DEFAULT_FN_ATTRS
199 _mm256_maskz_expand_epi16(__mmask16 __U, __m256i __D)
201 return (__m256i) __builtin_ia32_expandhi256_mask ((__v16hi) __D,
202 (__v16hi) _mm256_setzero_si256(),
206 static __inline__ __m256i __DEFAULT_FN_ATTRS
207 _mm256_mask_expand_epi8(__m256i __S, __mmask32 __U, __m256i __D)
209 return (__m256i) __builtin_ia32_expandqi256_mask ((__v32qi) __D,
214 static __inline__ __m256i __DEFAULT_FN_ATTRS
215 _mm256_maskz_expand_epi8(__mmask32 __U, __m256i __D)
217 return (__m256i) __builtin_ia32_expandqi256_mask ((__v32qi) __D,
218 (__v32qi) _mm256_setzero_si256(),
222 static __inline__ __m256i __DEFAULT_FN_ATTRS
223 _mm256_mask_expandloadu_epi16(__m256i __S, __mmask16 __U, void const *__P)
225 return (__m256i) __builtin_ia32_expandloadhi256_mask ((const __v16hi *)__P,
230 static __inline__ __m256i __DEFAULT_FN_ATTRS
231 _mm256_maskz_expandloadu_epi16(__mmask16 __U, void const *__P)
233 return (__m256i) __builtin_ia32_expandloadhi256_mask ((const __v16hi *)__P,
234 (__v16hi) _mm256_setzero_si256(),
238 static __inline__ __m256i __DEFAULT_FN_ATTRS
239 _mm256_mask_expandloadu_epi8(__m256i __S, __mmask32 __U, void const *__P)
241 return (__m256i) __builtin_ia32_expandloadqi256_mask ((const __v32qi *)__P,
246 static __inline__ __m256i __DEFAULT_FN_ATTRS
247 _mm256_maskz_expandloadu_epi8(__mmask32 __U, void const *__P)
249 return (__m256i) __builtin_ia32_expandloadqi256_mask ((const __v32qi *)__P,
250 (__v32qi) _mm256_setzero_si256(),
254 #define _mm256_mask_shldi_epi64(S, U, A, B, I) __extension__ ({ \
255 (__m256i)__builtin_ia32_vpshldq256_mask((__v4di)(A), \
261 #define _mm256_maskz_shldi_epi64(U, A, B, I) \
262 _mm256_mask_shldi_epi64(_mm256_setzero_si256(), (U), (A), (B), (I))
264 #define _mm256_shldi_epi64(A, B, I) \
265 _mm256_mask_shldi_epi64(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
267 #define _mm_mask_shldi_epi64(S, U, A, B, I) __extension__ ({ \
268 (__m128i)__builtin_ia32_vpshldq128_mask((__v2di)(A), \
274 #define _mm_maskz_shldi_epi64(U, A, B, I) \
275 _mm_mask_shldi_epi64(_mm_setzero_si128(), (U), (A), (B), (I))
277 #define _mm_shldi_epi64(A, B, I) \
278 _mm_mask_shldi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
280 #define _mm256_mask_shldi_epi32(S, U, A, B, I) __extension__ ({ \
281 (__m256i)__builtin_ia32_vpshldd256_mask((__v8si)(A), \
287 #define _mm256_maskz_shldi_epi32(U, A, B, I) \
288 _mm256_mask_shldi_epi32(_mm256_setzero_si256(), (U), (A), (B), (I))
290 #define _mm256_shldi_epi32(A, B, I) \
291 _mm256_mask_shldi_epi32(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
293 #define _mm_mask_shldi_epi32(S, U, A, B, I) __extension__ ({ \
294 (__m128i)__builtin_ia32_vpshldd128_mask((__v4si)(A), \
300 #define _mm_maskz_shldi_epi32(U, A, B, I) \
301 _mm_mask_shldi_epi32(_mm_setzero_si128(), (U), (A), (B), (I))
303 #define _mm_shldi_epi32(A, B, I) \
304 _mm_mask_shldi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
306 #define _mm256_mask_shldi_epi16(S, U, A, B, I) __extension__ ({ \
307 (__m256i)__builtin_ia32_vpshldw256_mask((__v16hi)(A), \
313 #define _mm256_maskz_shldi_epi16(U, A, B, I) \
314 _mm256_mask_shldi_epi16(_mm256_setzero_si256(), (U), (A), (B), (I))
316 #define _mm256_shldi_epi16(A, B, I) \
317 _mm256_mask_shldi_epi16(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
319 #define _mm_mask_shldi_epi16(S, U, A, B, I) __extension__ ({ \
320 (__m128i)__builtin_ia32_vpshldw128_mask((__v8hi)(A), \
326 #define _mm_maskz_shldi_epi16(U, A, B, I) \
327 _mm_mask_shldi_epi16(_mm_setzero_si128(), (U), (A), (B), (I))
329 #define _mm_shldi_epi16(A, B, I) \
330 _mm_mask_shldi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
332 #define _mm256_mask_shrdi_epi64(S, U, A, B, I) __extension__ ({ \
333 (__m256i)__builtin_ia32_vpshrdq256_mask((__v4di)(A), \
339 #define _mm256_maskz_shrdi_epi64(U, A, B, I) \
340 _mm256_mask_shrdi_epi64(_mm256_setzero_si256(), (U), (A), (B), (I))
342 #define _mm256_shrdi_epi64(A, B, I) \
343 _mm256_mask_shrdi_epi64(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
345 #define _mm_mask_shrdi_epi64(S, U, A, B, I) __extension__ ({ \
346 (__m128i)__builtin_ia32_vpshrdq128_mask((__v2di)(A), \
352 #define _mm_maskz_shrdi_epi64(U, A, B, I) \
353 _mm_mask_shrdi_epi64(_mm_setzero_si128(), (U), (A), (B), (I))
355 #define _mm_shrdi_epi64(A, B, I) \
356 _mm_mask_shrdi_epi64(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
358 #define _mm256_mask_shrdi_epi32(S, U, A, B, I) __extension__ ({ \
359 (__m256i)__builtin_ia32_vpshrdd256_mask((__v8si)(A), \
365 #define _mm256_maskz_shrdi_epi32(U, A, B, I) \
366 _mm256_mask_shrdi_epi32(_mm256_setzero_si256(), (U), (A), (B), (I))
368 #define _mm256_shrdi_epi32(A, B, I) \
369 _mm256_mask_shrdi_epi32(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
371 #define _mm_mask_shrdi_epi32(S, U, A, B, I) __extension__ ({ \
372 (__m128i)__builtin_ia32_vpshrdd128_mask((__v4si)(A), \
378 #define _mm_maskz_shrdi_epi32(U, A, B, I) \
379 _mm_mask_shrdi_epi32(_mm_setzero_si128(), (U), (A), (B), (I))
381 #define _mm_shrdi_epi32(A, B, I) \
382 _mm_mask_shrdi_epi32(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
384 #define _mm256_mask_shrdi_epi16(S, U, A, B, I) __extension__ ({ \
385 (__m256i)__builtin_ia32_vpshrdw256_mask((__v16hi)(A), \
391 #define _mm256_maskz_shrdi_epi16(U, A, B, I) \
392 _mm256_mask_shrdi_epi16(_mm256_setzero_si256(), (U), (A), (B), (I))
394 #define _mm256_shrdi_epi16(A, B, I) \
395 _mm256_mask_shrdi_epi16(_mm256_undefined_si256(), (__mmask8)(-1), (A), (B), (I))
397 #define _mm_mask_shrdi_epi16(S, U, A, B, I) __extension__ ({ \
398 (__m128i)__builtin_ia32_vpshrdw128_mask((__v8hi)(A), \
404 #define _mm_maskz_shrdi_epi16(U, A, B, I) \
405 _mm_mask_shrdi_epi16(_mm_setzero_si128(), (U), (A), (B), (I))
407 #define _mm_shrdi_epi16(A, B, I) \
408 _mm_mask_shrdi_epi16(_mm_undefined_si128(), (__mmask8)(-1), (A), (B), (I))
410 static __inline__ __m256i __DEFAULT_FN_ATTRS
411 _mm256_mask_shldv_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
413 return (__m256i) __builtin_ia32_vpshldvq256_mask ((__v4di) __S,
419 static __inline__ __m256i __DEFAULT_FN_ATTRS
420 _mm256_maskz_shldv_epi64(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
422 return (__m256i) __builtin_ia32_vpshldvq256_maskz ((__v4di) __S,
428 static __inline__ __m256i __DEFAULT_FN_ATTRS
429 _mm256_shldv_epi64(__m256i __S, __m256i __A, __m256i __B)
431 return (__m256i) __builtin_ia32_vpshldvq256_mask ((__v4di) __S,
437 static __inline__ __m128i __DEFAULT_FN_ATTRS
438 _mm_mask_shldv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
440 return (__m128i) __builtin_ia32_vpshldvq128_mask ((__v2di) __S,
446 static __inline__ __m128i __DEFAULT_FN_ATTRS
447 _mm_maskz_shldv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
449 return (__m128i) __builtin_ia32_vpshldvq128_maskz ((__v2di) __S,
455 static __inline__ __m128i __DEFAULT_FN_ATTRS
456 _mm_shldv_epi64(__m128i __S, __m128i __A, __m128i __B)
458 return (__m128i) __builtin_ia32_vpshldvq128_mask ((__v2di) __S,
464 static __inline__ __m256i __DEFAULT_FN_ATTRS
465 _mm256_mask_shldv_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
467 return (__m256i) __builtin_ia32_vpshldvd256_mask ((__v8si) __S,
473 static __inline__ __m256i __DEFAULT_FN_ATTRS
474 _mm256_maskz_shldv_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
476 return (__m256i) __builtin_ia32_vpshldvd256_maskz ((__v8si) __S,
482 static __inline__ __m256i __DEFAULT_FN_ATTRS
483 _mm256_shldv_epi32(__m256i __S, __m256i __A, __m256i __B)
485 return (__m256i) __builtin_ia32_vpshldvd256_mask ((__v8si) __S,
491 static __inline__ __m128i __DEFAULT_FN_ATTRS
492 _mm_mask_shldv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
494 return (__m128i) __builtin_ia32_vpshldvd128_mask ((__v4si) __S,
500 static __inline__ __m128i __DEFAULT_FN_ATTRS
501 _mm_maskz_shldv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
503 return (__m128i) __builtin_ia32_vpshldvd128_maskz ((__v4si) __S,
509 static __inline__ __m128i __DEFAULT_FN_ATTRS
510 _mm_shldv_epi32(__m128i __S, __m128i __A, __m128i __B)
512 return (__m128i) __builtin_ia32_vpshldvd128_mask ((__v4si) __S,
518 static __inline__ __m256i __DEFAULT_FN_ATTRS
519 _mm256_mask_shldv_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B)
521 return (__m256i) __builtin_ia32_vpshldvw256_mask ((__v16hi) __S,
527 static __inline__ __m256i __DEFAULT_FN_ATTRS
528 _mm256_maskz_shldv_epi16(__mmask16 __U, __m256i __S, __m256i __A, __m256i __B)
530 return (__m256i) __builtin_ia32_vpshldvw256_maskz ((__v16hi) __S,
536 static __inline__ __m256i __DEFAULT_FN_ATTRS
537 _mm256_shldv_epi16(__m256i __S, __m256i __A, __m256i __B)
539 return (__m256i) __builtin_ia32_vpshldvw256_mask ((__v16hi) __S,
545 static __inline__ __m128i __DEFAULT_FN_ATTRS
546 _mm_mask_shldv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
548 return (__m128i) __builtin_ia32_vpshldvw128_mask ((__v8hi) __S,
554 static __inline__ __m128i __DEFAULT_FN_ATTRS
555 _mm_maskz_shldv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
557 return (__m128i) __builtin_ia32_vpshldvw128_maskz ((__v8hi) __S,
563 static __inline__ __m128i __DEFAULT_FN_ATTRS
564 _mm_shldv_epi16(__m128i __S, __m128i __A, __m128i __B)
566 return (__m128i) __builtin_ia32_vpshldvw128_mask ((__v8hi) __S,
572 static __inline__ __m256i __DEFAULT_FN_ATTRS
573 _mm256_mask_shrdv_epi64(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
575 return (__m256i) __builtin_ia32_vpshrdvq256_mask ((__v4di) __S,
581 static __inline__ __m256i __DEFAULT_FN_ATTRS
582 _mm256_maskz_shrdv_epi64(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
584 return (__m256i) __builtin_ia32_vpshrdvq256_maskz ((__v4di) __S,
590 static __inline__ __m256i __DEFAULT_FN_ATTRS
591 _mm256_shrdv_epi64(__m256i __S, __m256i __A, __m256i __B)
593 return (__m256i) __builtin_ia32_vpshrdvq256_mask ((__v4di) __S,
599 static __inline__ __m128i __DEFAULT_FN_ATTRS
600 _mm_mask_shrdv_epi64(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
602 return (__m128i) __builtin_ia32_vpshrdvq128_mask ((__v2di) __S,
608 static __inline__ __m128i __DEFAULT_FN_ATTRS
609 _mm_maskz_shrdv_epi64(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
611 return (__m128i) __builtin_ia32_vpshrdvq128_maskz ((__v2di) __S,
617 static __inline__ __m128i __DEFAULT_FN_ATTRS
618 _mm_shrdv_epi64(__m128i __S, __m128i __A, __m128i __B)
620 return (__m128i) __builtin_ia32_vpshrdvq128_mask ((__v2di) __S,
626 static __inline__ __m256i __DEFAULT_FN_ATTRS
627 _mm256_mask_shrdv_epi32(__m256i __S, __mmask8 __U, __m256i __A, __m256i __B)
629 return (__m256i) __builtin_ia32_vpshrdvd256_mask ((__v8si) __S,
635 static __inline__ __m256i __DEFAULT_FN_ATTRS
636 _mm256_maskz_shrdv_epi32(__mmask8 __U, __m256i __S, __m256i __A, __m256i __B)
638 return (__m256i) __builtin_ia32_vpshrdvd256_maskz ((__v8si) __S,
644 static __inline__ __m256i __DEFAULT_FN_ATTRS
645 _mm256_shrdv_epi32(__m256i __S, __m256i __A, __m256i __B)
647 return (__m256i) __builtin_ia32_vpshrdvd256_mask ((__v8si) __S,
653 static __inline__ __m128i __DEFAULT_FN_ATTRS
654 _mm_mask_shrdv_epi32(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
656 return (__m128i) __builtin_ia32_vpshrdvd128_mask ((__v4si) __S,
662 static __inline__ __m128i __DEFAULT_FN_ATTRS
663 _mm_maskz_shrdv_epi32(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
665 return (__m128i) __builtin_ia32_vpshrdvd128_maskz ((__v4si) __S,
671 static __inline__ __m128i __DEFAULT_FN_ATTRS
672 _mm_shrdv_epi32(__m128i __S, __m128i __A, __m128i __B)
674 return (__m128i) __builtin_ia32_vpshrdvd128_mask ((__v4si) __S,
680 static __inline__ __m256i __DEFAULT_FN_ATTRS
681 _mm256_mask_shrdv_epi16(__m256i __S, __mmask16 __U, __m256i __A, __m256i __B)
683 return (__m256i) __builtin_ia32_vpshrdvw256_mask ((__v16hi) __S,
689 static __inline__ __m256i __DEFAULT_FN_ATTRS
690 _mm256_maskz_shrdv_epi16(__mmask16 __U, __m256i __S, __m256i __A, __m256i __B)
692 return (__m256i) __builtin_ia32_vpshrdvw256_maskz ((__v16hi) __S,
698 static __inline__ __m256i __DEFAULT_FN_ATTRS
699 _mm256_shrdv_epi16(__m256i __S, __m256i __A, __m256i __B)
701 return (__m256i) __builtin_ia32_vpshrdvw256_mask ((__v16hi) __S,
707 static __inline__ __m128i __DEFAULT_FN_ATTRS
708 _mm_mask_shrdv_epi16(__m128i __S, __mmask8 __U, __m128i __A, __m128i __B)
710 return (__m128i) __builtin_ia32_vpshrdvw128_mask ((__v8hi) __S,
716 static __inline__ __m128i __DEFAULT_FN_ATTRS
717 _mm_maskz_shrdv_epi16(__mmask8 __U, __m128i __S, __m128i __A, __m128i __B)
719 return (__m128i) __builtin_ia32_vpshrdvw128_maskz ((__v8hi) __S,
725 static __inline__ __m128i __DEFAULT_FN_ATTRS
726 _mm_shrdv_epi16(__m128i __S, __m128i __A, __m128i __B)
728 return (__m128i) __builtin_ia32_vpshrdvw128_mask ((__v8hi) __S,
735 #undef __DEFAULT_FN_ATTRS