1 /*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===
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27 #include <xmmintrin.h>
29 typedef double __m128d __attribute__((__vector_size__(16)));
30 typedef long long __m128i __attribute__((__vector_size__(16)));
33 typedef double __v2df __attribute__ ((__vector_size__ (16)));
34 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
35 typedef short __v8hi __attribute__((__vector_size__(16)));
36 typedef char __v16qi __attribute__((__vector_size__(16)));
39 typedef unsigned long long __v2du __attribute__ ((__vector_size__ (16)));
40 typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
41 typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
43 /* We need an explicitly signed variant for char. Note that this shouldn't
44 * appear in the interface though. */
45 typedef signed char __v16qs __attribute__((__vector_size__(16)));
47 #include <f16cintrin.h>
49 /* Define the default attributes for the functions in this file. */
50 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
52 /// \brief Adds lower double-precision values in both operands and returns the
53 /// sum in the lower 64 bits of the result. The upper 64 bits of the result
54 /// are copied from the upper double-precision value of the first operand.
56 /// \headerfile <x86intrin.h>
58 /// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
61 /// A 128-bit vector of [2 x double] containing one of the source operands.
63 /// A 128-bit vector of [2 x double] containing one of the source operands.
64 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
65 /// sum of the lower 64 bits of both operands. The upper 64 bits are copied
66 /// from the upper 64 bits of the first source operand.
67 static __inline__ __m128d __DEFAULT_FN_ATTRS
68 _mm_add_sd(__m128d __a, __m128d __b)
74 /// \brief Adds two 128-bit vectors of [2 x double].
76 /// \headerfile <x86intrin.h>
78 /// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
81 /// A 128-bit vector of [2 x double] containing one of the source operands.
83 /// A 128-bit vector of [2 x double] containing one of the source operands.
84 /// \returns A 128-bit vector of [2 x double] containing the sums of both
86 static __inline__ __m128d __DEFAULT_FN_ATTRS
87 _mm_add_pd(__m128d __a, __m128d __b)
89 return (__m128d)((__v2df)__a + (__v2df)__b);
92 /// \brief Subtracts the lower double-precision value of the second operand
93 /// from the lower double-precision value of the first operand and returns
94 /// the difference in the lower 64 bits of the result. The upper 64 bits of
95 /// the result are copied from the upper double-precision value of the first
98 /// \headerfile <x86intrin.h>
100 /// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
103 /// A 128-bit vector of [2 x double] containing the minuend.
105 /// A 128-bit vector of [2 x double] containing the subtrahend.
106 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
107 /// difference of the lower 64 bits of both operands. The upper 64 bits are
108 /// copied from the upper 64 bits of the first source operand.
109 static __inline__ __m128d __DEFAULT_FN_ATTRS
110 _mm_sub_sd(__m128d __a, __m128d __b)
116 /// \brief Subtracts two 128-bit vectors of [2 x double].
118 /// \headerfile <x86intrin.h>
120 /// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
123 /// A 128-bit vector of [2 x double] containing the minuend.
125 /// A 128-bit vector of [2 x double] containing the subtrahend.
126 /// \returns A 128-bit vector of [2 x double] containing the differences between
128 static __inline__ __m128d __DEFAULT_FN_ATTRS
129 _mm_sub_pd(__m128d __a, __m128d __b)
131 return (__m128d)((__v2df)__a - (__v2df)__b);
134 /// \brief Multiplies lower double-precision values in both operands and returns
135 /// the product in the lower 64 bits of the result. The upper 64 bits of the
136 /// result are copied from the upper double-precision value of the first
139 /// \headerfile <x86intrin.h>
141 /// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
144 /// A 128-bit vector of [2 x double] containing one of the source operands.
146 /// A 128-bit vector of [2 x double] containing one of the source operands.
147 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
148 /// product of the lower 64 bits of both operands. The upper 64 bits are
149 /// copied from the upper 64 bits of the first source operand.
150 static __inline__ __m128d __DEFAULT_FN_ATTRS
151 _mm_mul_sd(__m128d __a, __m128d __b)
157 /// \brief Multiplies two 128-bit vectors of [2 x double].
159 /// \headerfile <x86intrin.h>
161 /// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
164 /// A 128-bit vector of [2 x double] containing one of the operands.
166 /// A 128-bit vector of [2 x double] containing one of the operands.
167 /// \returns A 128-bit vector of [2 x double] containing the products of both
169 static __inline__ __m128d __DEFAULT_FN_ATTRS
170 _mm_mul_pd(__m128d __a, __m128d __b)
172 return (__m128d)((__v2df)__a * (__v2df)__b);
175 /// \brief Divides the lower double-precision value of the first operand by the
176 /// lower double-precision value of the second operand and returns the
177 /// quotient in the lower 64 bits of the result. The upper 64 bits of the
178 /// result are copied from the upper double-precision value of the first
181 /// \headerfile <x86intrin.h>
183 /// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
186 /// A 128-bit vector of [2 x double] containing the dividend.
188 /// A 128-bit vector of [2 x double] containing divisor.
189 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
190 /// quotient of the lower 64 bits of both operands. The upper 64 bits are
191 /// copied from the upper 64 bits of the first source operand.
192 static __inline__ __m128d __DEFAULT_FN_ATTRS
193 _mm_div_sd(__m128d __a, __m128d __b)
199 /// \brief Performs an element-by-element division of two 128-bit vectors of
202 /// \headerfile <x86intrin.h>
204 /// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
207 /// A 128-bit vector of [2 x double] containing the dividend.
209 /// A 128-bit vector of [2 x double] containing the divisor.
210 /// \returns A 128-bit vector of [2 x double] containing the quotients of both
212 static __inline__ __m128d __DEFAULT_FN_ATTRS
213 _mm_div_pd(__m128d __a, __m128d __b)
215 return (__m128d)((__v2df)__a / (__v2df)__b);
218 /// \brief Calculates the square root of the lower double-precision value of
219 /// the second operand and returns it in the lower 64 bits of the result.
220 /// The upper 64 bits of the result are copied from the upper
221 /// double-precision value of the first operand.
223 /// \headerfile <x86intrin.h>
225 /// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
228 /// A 128-bit vector of [2 x double] containing one of the operands. The
229 /// upper 64 bits of this operand are copied to the upper 64 bits of the
232 /// A 128-bit vector of [2 x double] containing one of the operands. The
233 /// square root is calculated using the lower 64 bits of this operand.
234 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
235 /// square root of the lower 64 bits of operand \a __b, and whose upper 64
236 /// bits are copied from the upper 64 bits of operand \a __a.
237 static __inline__ __m128d __DEFAULT_FN_ATTRS
238 _mm_sqrt_sd(__m128d __a, __m128d __b)
240 __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
241 return (__m128d) { __c[0], __a[1] };
244 /// \brief Calculates the square root of the each of two values stored in a
245 /// 128-bit vector of [2 x double].
247 /// \headerfile <x86intrin.h>
249 /// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
252 /// A 128-bit vector of [2 x double].
253 /// \returns A 128-bit vector of [2 x double] containing the square roots of the
254 /// values in the operand.
255 static __inline__ __m128d __DEFAULT_FN_ATTRS
256 _mm_sqrt_pd(__m128d __a)
258 return __builtin_ia32_sqrtpd((__v2df)__a);
261 /// \brief Compares lower 64-bit double-precision values of both operands, and
262 /// returns the lesser of the pair of values in the lower 64-bits of the
263 /// result. The upper 64 bits of the result are copied from the upper
264 /// double-precision value of the first operand.
266 /// \headerfile <x86intrin.h>
268 /// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
271 /// A 128-bit vector of [2 x double] containing one of the operands. The
272 /// lower 64 bits of this operand are used in the comparison.
274 /// A 128-bit vector of [2 x double] containing one of the operands. The
275 /// lower 64 bits of this operand are used in the comparison.
276 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
277 /// minimum value between both operands. The upper 64 bits are copied from
278 /// the upper 64 bits of the first source operand.
279 static __inline__ __m128d __DEFAULT_FN_ATTRS
280 _mm_min_sd(__m128d __a, __m128d __b)
282 return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
285 /// \brief Performs element-by-element comparison of the two 128-bit vectors of
286 /// [2 x double] and returns the vector containing the lesser of each pair of
289 /// \headerfile <x86intrin.h>
291 /// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
294 /// A 128-bit vector of [2 x double] containing one of the operands.
296 /// A 128-bit vector of [2 x double] containing one of the operands.
297 /// \returns A 128-bit vector of [2 x double] containing the minimum values
298 /// between both operands.
299 static __inline__ __m128d __DEFAULT_FN_ATTRS
300 _mm_min_pd(__m128d __a, __m128d __b)
302 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
305 /// \brief Compares lower 64-bit double-precision values of both operands, and
306 /// returns the greater of the pair of values in the lower 64-bits of the
307 /// result. The upper 64 bits of the result are copied from the upper
308 /// double-precision value of the first operand.
310 /// \headerfile <x86intrin.h>
312 /// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
315 /// A 128-bit vector of [2 x double] containing one of the operands. The
316 /// lower 64 bits of this operand are used in the comparison.
318 /// A 128-bit vector of [2 x double] containing one of the operands. The
319 /// lower 64 bits of this operand are used in the comparison.
320 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
321 /// maximum value between both operands. The upper 64 bits are copied from
322 /// the upper 64 bits of the first source operand.
323 static __inline__ __m128d __DEFAULT_FN_ATTRS
324 _mm_max_sd(__m128d __a, __m128d __b)
326 return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
329 /// \brief Performs element-by-element comparison of the two 128-bit vectors of
330 /// [2 x double] and returns the vector containing the greater of each pair
333 /// \headerfile <x86intrin.h>
335 /// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
338 /// A 128-bit vector of [2 x double] containing one of the operands.
340 /// A 128-bit vector of [2 x double] containing one of the operands.
341 /// \returns A 128-bit vector of [2 x double] containing the maximum values
342 /// between both operands.
343 static __inline__ __m128d __DEFAULT_FN_ATTRS
344 _mm_max_pd(__m128d __a, __m128d __b)
346 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
349 /// \brief Performs a bitwise AND of two 128-bit vectors of [2 x double].
351 /// \headerfile <x86intrin.h>
353 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
356 /// A 128-bit vector of [2 x double] containing one of the source operands.
358 /// A 128-bit vector of [2 x double] containing one of the source operands.
359 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
360 /// values between both operands.
361 static __inline__ __m128d __DEFAULT_FN_ATTRS
362 _mm_and_pd(__m128d __a, __m128d __b)
364 return (__m128d)((__v2du)__a & (__v2du)__b);
367 /// \brief Performs a bitwise AND of two 128-bit vectors of [2 x double], using
368 /// the one's complement of the values contained in the first source operand.
370 /// \headerfile <x86intrin.h>
372 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
375 /// A 128-bit vector of [2 x double] containing the left source operand. The
376 /// one's complement of this value is used in the bitwise AND.
378 /// A 128-bit vector of [2 x double] containing the right source operand.
379 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
380 /// values in the second operand and the one's complement of the first
382 static __inline__ __m128d __DEFAULT_FN_ATTRS
383 _mm_andnot_pd(__m128d __a, __m128d __b)
385 return (__m128d)(~(__v2du)__a & (__v2du)__b);
388 /// \brief Performs a bitwise OR of two 128-bit vectors of [2 x double].
390 /// \headerfile <x86intrin.h>
392 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
395 /// A 128-bit vector of [2 x double] containing one of the source operands.
397 /// A 128-bit vector of [2 x double] containing one of the source operands.
398 /// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
399 /// values between both operands.
400 static __inline__ __m128d __DEFAULT_FN_ATTRS
401 _mm_or_pd(__m128d __a, __m128d __b)
403 return (__m128d)((__v2du)__a | (__v2du)__b);
406 /// \brief Performs a bitwise XOR of two 128-bit vectors of [2 x double].
408 /// \headerfile <x86intrin.h>
410 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
413 /// A 128-bit vector of [2 x double] containing one of the source operands.
415 /// A 128-bit vector of [2 x double] containing one of the source operands.
416 /// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
417 /// values between both operands.
418 static __inline__ __m128d __DEFAULT_FN_ATTRS
419 _mm_xor_pd(__m128d __a, __m128d __b)
421 return (__m128d)((__v2du)__a ^ (__v2du)__b);
424 /// \brief Compares each of the corresponding double-precision values of the
425 /// 128-bit vectors of [2 x double] for equality. Each comparison yields 0h
426 /// for false, FFFFFFFFFFFFFFFFh for true.
428 /// \headerfile <x86intrin.h>
430 /// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
433 /// A 128-bit vector of [2 x double].
435 /// A 128-bit vector of [2 x double].
436 /// \returns A 128-bit vector containing the comparison results.
437 static __inline__ __m128d __DEFAULT_FN_ATTRS
438 _mm_cmpeq_pd(__m128d __a, __m128d __b)
440 return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
443 /// \brief Compares each of the corresponding double-precision values of the
444 /// 128-bit vectors of [2 x double] to determine if the values in the first
445 /// operand are less than those in the second operand. Each comparison
446 /// yields 0h for false, FFFFFFFFFFFFFFFFh for true.
448 /// \headerfile <x86intrin.h>
450 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
453 /// A 128-bit vector of [2 x double].
455 /// A 128-bit vector of [2 x double].
456 /// \returns A 128-bit vector containing the comparison results.
457 static __inline__ __m128d __DEFAULT_FN_ATTRS
458 _mm_cmplt_pd(__m128d __a, __m128d __b)
460 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
463 /// \brief Compares each of the corresponding double-precision values of the
464 /// 128-bit vectors of [2 x double] to determine if the values in the first
465 /// operand are less than or equal to those in the second operand.
467 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
469 /// \headerfile <x86intrin.h>
471 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
474 /// A 128-bit vector of [2 x double].
476 /// A 128-bit vector of [2 x double].
477 /// \returns A 128-bit vector containing the comparison results.
478 static __inline__ __m128d __DEFAULT_FN_ATTRS
479 _mm_cmple_pd(__m128d __a, __m128d __b)
481 return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
484 /// \brief Compares each of the corresponding double-precision values of the
485 /// 128-bit vectors of [2 x double] to determine if the values in the first
486 /// operand are greater than those in the second operand.
488 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
490 /// \headerfile <x86intrin.h>
492 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
495 /// A 128-bit vector of [2 x double].
497 /// A 128-bit vector of [2 x double].
498 /// \returns A 128-bit vector containing the comparison results.
499 static __inline__ __m128d __DEFAULT_FN_ATTRS
500 _mm_cmpgt_pd(__m128d __a, __m128d __b)
502 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
505 /// \brief Compares each of the corresponding double-precision values of the
506 /// 128-bit vectors of [2 x double] to determine if the values in the first
507 /// operand are greater than or equal to those in the second operand.
509 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
511 /// \headerfile <x86intrin.h>
513 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
516 /// A 128-bit vector of [2 x double].
518 /// A 128-bit vector of [2 x double].
519 /// \returns A 128-bit vector containing the comparison results.
520 static __inline__ __m128d __DEFAULT_FN_ATTRS
521 _mm_cmpge_pd(__m128d __a, __m128d __b)
523 return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
526 /// \brief Compares each of the corresponding double-precision values of the
527 /// 128-bit vectors of [2 x double] to determine if the values in the first
528 /// operand are ordered with respect to those in the second operand.
530 /// A pair of double-precision values are "ordered" with respect to each
531 /// other if neither value is a NaN. Each comparison yields 0h for false,
532 /// FFFFFFFFFFFFFFFFh for true.
534 /// \headerfile <x86intrin.h>
536 /// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
539 /// A 128-bit vector of [2 x double].
541 /// A 128-bit vector of [2 x double].
542 /// \returns A 128-bit vector containing the comparison results.
543 static __inline__ __m128d __DEFAULT_FN_ATTRS
544 _mm_cmpord_pd(__m128d __a, __m128d __b)
546 return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
549 /// \brief Compares each of the corresponding double-precision values of the
550 /// 128-bit vectors of [2 x double] to determine if the values in the first
551 /// operand are unordered with respect to those in the second operand.
553 /// A pair of double-precision values are "unordered" with respect to each
554 /// other if one or both values are NaN. Each comparison yields 0h for false,
555 /// FFFFFFFFFFFFFFFFh for true.
557 /// \headerfile <x86intrin.h>
559 /// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>
563 /// A 128-bit vector of [2 x double].
565 /// A 128-bit vector of [2 x double].
566 /// \returns A 128-bit vector containing the comparison results.
567 static __inline__ __m128d __DEFAULT_FN_ATTRS
568 _mm_cmpunord_pd(__m128d __a, __m128d __b)
570 return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
573 /// \brief Compares each of the corresponding double-precision values of the
574 /// 128-bit vectors of [2 x double] to determine if the values in the first
575 /// operand are unequal to those in the second operand.
577 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
579 /// \headerfile <x86intrin.h>
581 /// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
584 /// A 128-bit vector of [2 x double].
586 /// A 128-bit vector of [2 x double].
587 /// \returns A 128-bit vector containing the comparison results.
588 static __inline__ __m128d __DEFAULT_FN_ATTRS
589 _mm_cmpneq_pd(__m128d __a, __m128d __b)
591 return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
594 /// \brief Compares each of the corresponding double-precision values of the
595 /// 128-bit vectors of [2 x double] to determine if the values in the first
596 /// operand are not less than those in the second operand.
598 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
600 /// \headerfile <x86intrin.h>
602 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
605 /// A 128-bit vector of [2 x double].
607 /// A 128-bit vector of [2 x double].
608 /// \returns A 128-bit vector containing the comparison results.
609 static __inline__ __m128d __DEFAULT_FN_ATTRS
610 _mm_cmpnlt_pd(__m128d __a, __m128d __b)
612 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
615 /// \brief Compares each of the corresponding double-precision values of the
616 /// 128-bit vectors of [2 x double] to determine if the values in the first
617 /// operand are not less than or equal to those in the second operand.
619 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
621 /// \headerfile <x86intrin.h>
623 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
626 /// A 128-bit vector of [2 x double].
628 /// A 128-bit vector of [2 x double].
629 /// \returns A 128-bit vector containing the comparison results.
630 static __inline__ __m128d __DEFAULT_FN_ATTRS
631 _mm_cmpnle_pd(__m128d __a, __m128d __b)
633 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
636 /// \brief Compares each of the corresponding double-precision values of the
637 /// 128-bit vectors of [2 x double] to determine if the values in the first
638 /// operand are not greater than those in the second operand.
640 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
642 /// \headerfile <x86intrin.h>
644 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
647 /// A 128-bit vector of [2 x double].
649 /// A 128-bit vector of [2 x double].
650 /// \returns A 128-bit vector containing the comparison results.
651 static __inline__ __m128d __DEFAULT_FN_ATTRS
652 _mm_cmpngt_pd(__m128d __a, __m128d __b)
654 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
657 /// \brief Compares each of the corresponding double-precision values of the
658 /// 128-bit vectors of [2 x double] to determine if the values in the first
659 /// operand are not greater than or equal to those in the second operand.
661 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
663 /// \headerfile <x86intrin.h>
665 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
668 /// A 128-bit vector of [2 x double].
670 /// A 128-bit vector of [2 x double].
671 /// \returns A 128-bit vector containing the comparison results.
672 static __inline__ __m128d __DEFAULT_FN_ATTRS
673 _mm_cmpnge_pd(__m128d __a, __m128d __b)
675 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
678 /// \brief Compares the lower double-precision floating-point values in each of
679 /// the two 128-bit floating-point vectors of [2 x double] for equality.
681 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
683 /// \headerfile <x86intrin.h>
685 /// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
688 /// A 128-bit vector of [2 x double]. The lower double-precision value is
689 /// compared to the lower double-precision value of \a __b.
691 /// A 128-bit vector of [2 x double]. The lower double-precision value is
692 /// compared to the lower double-precision value of \a __a.
693 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
694 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
695 static __inline__ __m128d __DEFAULT_FN_ATTRS
696 _mm_cmpeq_sd(__m128d __a, __m128d __b)
698 return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
701 /// \brief Compares the lower double-precision floating-point values in each of
702 /// the two 128-bit floating-point vectors of [2 x double] to determine if
703 /// the value in the first parameter is less than the corresponding value in
704 /// the second parameter.
706 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
708 /// \headerfile <x86intrin.h>
710 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
713 /// A 128-bit vector of [2 x double]. The lower double-precision value is
714 /// compared to the lower double-precision value of \a __b.
716 /// A 128-bit vector of [2 x double]. The lower double-precision value is
717 /// compared to the lower double-precision value of \a __a.
718 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
719 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
720 static __inline__ __m128d __DEFAULT_FN_ATTRS
721 _mm_cmplt_sd(__m128d __a, __m128d __b)
723 return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
726 /// \brief Compares the lower double-precision floating-point values in each of
727 /// the two 128-bit floating-point vectors of [2 x double] to determine if
728 /// the value in the first parameter is less than or equal to the
729 /// corresponding value in the second parameter.
731 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
733 /// \headerfile <x86intrin.h>
735 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
738 /// A 128-bit vector of [2 x double]. The lower double-precision value is
739 /// compared to the lower double-precision value of \a __b.
741 /// A 128-bit vector of [2 x double]. The lower double-precision value is
742 /// compared to the lower double-precision value of \a __a.
743 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
744 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
745 static __inline__ __m128d __DEFAULT_FN_ATTRS
746 _mm_cmple_sd(__m128d __a, __m128d __b)
748 return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
751 /// \brief Compares the lower double-precision floating-point values in each of
752 /// the two 128-bit floating-point vectors of [2 x double] to determine if
753 /// the value in the first parameter is greater than the corresponding value
754 /// in the second parameter.
756 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
758 /// \headerfile <x86intrin.h>
760 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
763 /// A 128-bit vector of [2 x double]. The lower double-precision value is
764 /// compared to the lower double-precision value of \a __b.
766 /// A 128-bit vector of [2 x double]. The lower double-precision value is
767 /// compared to the lower double-precision value of \a __a.
768 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
769 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
770 static __inline__ __m128d __DEFAULT_FN_ATTRS
771 _mm_cmpgt_sd(__m128d __a, __m128d __b)
773 __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
774 return (__m128d) { __c[0], __a[1] };
777 /// \brief Compares the lower double-precision floating-point values in each of
778 /// the two 128-bit floating-point vectors of [2 x double] to determine if
779 /// the value in the first parameter is greater than or equal to the
780 /// corresponding value in the second parameter.
782 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
784 /// \headerfile <x86intrin.h>
786 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
789 /// A 128-bit vector of [2 x double]. The lower double-precision value is
790 /// compared to the lower double-precision value of \a __b.
792 /// A 128-bit vector of [2 x double]. The lower double-precision value is
793 /// compared to the lower double-precision value of \a __a.
794 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
795 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
796 static __inline__ __m128d __DEFAULT_FN_ATTRS
797 _mm_cmpge_sd(__m128d __a, __m128d __b)
799 __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
800 return (__m128d) { __c[0], __a[1] };
803 /// \brief Compares the lower double-precision floating-point values in each of
804 /// the two 128-bit floating-point vectors of [2 x double] to determine if
805 /// the value in the first parameter is "ordered" with respect to the
806 /// corresponding value in the second parameter.
808 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true. A pair of
809 /// double-precision values are "ordered" with respect to each other if
810 /// neither value is a NaN.
812 /// \headerfile <x86intrin.h>
814 /// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
817 /// A 128-bit vector of [2 x double]. The lower double-precision value is
818 /// compared to the lower double-precision value of \a __b.
820 /// A 128-bit vector of [2 x double]. The lower double-precision value is
821 /// compared to the lower double-precision value of \a __a.
822 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
823 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
824 static __inline__ __m128d __DEFAULT_FN_ATTRS
825 _mm_cmpord_sd(__m128d __a, __m128d __b)
827 return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
830 /// \brief Compares the lower double-precision floating-point values in each of
831 /// the two 128-bit floating-point vectors of [2 x double] to determine if
832 /// the value in the first parameter is "unordered" with respect to the
833 /// corresponding value in the second parameter.
835 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true. A pair of
836 /// double-precision values are "unordered" with respect to each other if one
837 /// or both values are NaN.
839 /// \headerfile <x86intrin.h>
841 /// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>
845 /// A 128-bit vector of [2 x double]. The lower double-precision value is
846 /// compared to the lower double-precision value of \a __b.
848 /// A 128-bit vector of [2 x double]. The lower double-precision value is
849 /// compared to the lower double-precision value of \a __a.
850 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
851 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
852 static __inline__ __m128d __DEFAULT_FN_ATTRS
853 _mm_cmpunord_sd(__m128d __a, __m128d __b)
855 return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
858 /// \brief Compares the lower double-precision floating-point values in each of
859 /// the two 128-bit floating-point vectors of [2 x double] to determine if
860 /// the value in the first parameter is unequal to the corresponding value in
861 /// the second parameter.
863 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
865 /// \headerfile <x86intrin.h>
867 /// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
870 /// A 128-bit vector of [2 x double]. The lower double-precision value is
871 /// compared to the lower double-precision value of \a __b.
873 /// A 128-bit vector of [2 x double]. The lower double-precision value is
874 /// compared to the lower double-precision value of \a __a.
875 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
876 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
877 static __inline__ __m128d __DEFAULT_FN_ATTRS
878 _mm_cmpneq_sd(__m128d __a, __m128d __b)
880 return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
883 /// \brief Compares the lower double-precision floating-point values in each of
884 /// the two 128-bit floating-point vectors of [2 x double] to determine if
885 /// the value in the first parameter is not less than the corresponding
886 /// value in the second parameter.
888 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
890 /// \headerfile <x86intrin.h>
892 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
895 /// A 128-bit vector of [2 x double]. The lower double-precision value is
896 /// compared to the lower double-precision value of \a __b.
898 /// A 128-bit vector of [2 x double]. The lower double-precision value is
899 /// compared to the lower double-precision value of \a __a.
900 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
901 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
902 static __inline__ __m128d __DEFAULT_FN_ATTRS
903 _mm_cmpnlt_sd(__m128d __a, __m128d __b)
905 return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
908 /// \brief Compares the lower double-precision floating-point values in each of
909 /// the two 128-bit floating-point vectors of [2 x double] to determine if
910 /// the value in the first parameter is not less than or equal to the
911 /// corresponding value in the second parameter.
913 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
915 /// \headerfile <x86intrin.h>
917 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
920 /// A 128-bit vector of [2 x double]. The lower double-precision value is
921 /// compared to the lower double-precision value of \a __b.
923 /// A 128-bit vector of [2 x double]. The lower double-precision value is
924 /// compared to the lower double-precision value of \a __a.
925 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
926 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
927 static __inline__ __m128d __DEFAULT_FN_ATTRS
928 _mm_cmpnle_sd(__m128d __a, __m128d __b)
930 return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
933 /// \brief Compares the lower double-precision floating-point values in each of
934 /// the two 128-bit floating-point vectors of [2 x double] to determine if
935 /// the value in the first parameter is not greater than the corresponding
936 /// value in the second parameter.
938 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
940 /// \headerfile <x86intrin.h>
942 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
945 /// A 128-bit vector of [2 x double]. The lower double-precision value is
946 /// compared to the lower double-precision value of \a __b.
948 /// A 128-bit vector of [2 x double]. The lower double-precision value is
949 /// compared to the lower double-precision value of \a __a.
950 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
951 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
952 static __inline__ __m128d __DEFAULT_FN_ATTRS
953 _mm_cmpngt_sd(__m128d __a, __m128d __b)
955 __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
956 return (__m128d) { __c[0], __a[1] };
959 /// \brief Compares the lower double-precision floating-point values in each of
960 /// the two 128-bit floating-point vectors of [2 x double] to determine if
961 /// the value in the first parameter is not greater than or equal to the
962 /// corresponding value in the second parameter.
964 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
966 /// \headerfile <x86intrin.h>
968 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
971 /// A 128-bit vector of [2 x double]. The lower double-precision value is
972 /// compared to the lower double-precision value of \a __b.
974 /// A 128-bit vector of [2 x double]. The lower double-precision value is
975 /// compared to the lower double-precision value of \a __a.
976 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
977 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
978 static __inline__ __m128d __DEFAULT_FN_ATTRS
979 _mm_cmpnge_sd(__m128d __a, __m128d __b)
981 __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
982 return (__m128d) { __c[0], __a[1] };
985 /// \brief Compares the lower double-precision floating-point values in each of
986 /// the two 128-bit floating-point vectors of [2 x double] for equality.
988 /// The comparison yields 0 for false, 1 for true. If either of the two
989 /// lower double-precision values is NaN, 0 is returned.
991 /// \headerfile <x86intrin.h>
993 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
996 /// A 128-bit vector of [2 x double]. The lower double-precision value is
997 /// compared to the lower double-precision value of \a __b.
999 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1000 /// compared to the lower double-precision value of \a __a.
1001 /// \returns An integer containing the comparison results. If either of the two
1002 /// lower double-precision values is NaN, 0 is returned.
1003 static __inline__ int __DEFAULT_FN_ATTRS
1004 _mm_comieq_sd(__m128d __a, __m128d __b)
1006 return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
1009 /// \brief Compares the lower double-precision floating-point values in each of
1010 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1011 /// the value in the first parameter is less than the corresponding value in
1012 /// the second parameter.
1014 /// The comparison yields 0 for false, 1 for true. If either of the two
1015 /// lower double-precision values is NaN, 0 is returned.
1017 /// \headerfile <x86intrin.h>
1019 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1022 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1023 /// compared to the lower double-precision value of \a __b.
1025 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1026 /// compared to the lower double-precision value of \a __a.
1027 /// \returns An integer containing the comparison results. If either of the two
1028 /// lower double-precision values is NaN, 0 is returned.
1029 static __inline__ int __DEFAULT_FN_ATTRS
1030 _mm_comilt_sd(__m128d __a, __m128d __b)
1032 return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
1035 /// \brief Compares the lower double-precision floating-point values in each of
1036 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1037 /// the value in the first parameter is less than or equal to the
1038 /// corresponding value in the second parameter.
1040 /// The comparison yields 0 for false, 1 for true. If either of the two
1041 /// lower double-precision values is NaN, 0 is returned.
1043 /// \headerfile <x86intrin.h>
1045 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1048 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1049 /// compared to the lower double-precision value of \a __b.
1051 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1052 /// compared to the lower double-precision value of \a __a.
1053 /// \returns An integer containing the comparison results. If either of the two
1054 /// lower double-precision values is NaN, 0 is returned.
1055 static __inline__ int __DEFAULT_FN_ATTRS
1056 _mm_comile_sd(__m128d __a, __m128d __b)
1058 return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
1061 /// \brief Compares the lower double-precision floating-point values in each of
1062 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1063 /// the value in the first parameter is greater than the corresponding value
1064 /// in the second parameter.
1066 /// The comparison yields 0 for false, 1 for true. If either of the two
1067 /// lower double-precision values is NaN, 0 is returned.
1069 /// \headerfile <x86intrin.h>
1071 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1074 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1075 /// compared to the lower double-precision value of \a __b.
1077 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1078 /// compared to the lower double-precision value of \a __a.
1079 /// \returns An integer containing the comparison results. If either of the two
1080 /// lower double-precision values is NaN, 0 is returned.
1081 static __inline__ int __DEFAULT_FN_ATTRS
1082 _mm_comigt_sd(__m128d __a, __m128d __b)
1084 return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
1087 /// \brief Compares the lower double-precision floating-point values in each of
1088 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1089 /// the value in the first parameter is greater than or equal to the
1090 /// corresponding value in the second parameter.
1092 /// The comparison yields 0 for false, 1 for true. If either of the two
1093 /// lower double-precision values is NaN, 0 is returned.
1095 /// \headerfile <x86intrin.h>
1097 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1100 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1101 /// compared to the lower double-precision value of \a __b.
1103 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1104 /// compared to the lower double-precision value of \a __a.
1105 /// \returns An integer containing the comparison results. If either of the two
1106 /// lower double-precision values is NaN, 0 is returned.
1107 static __inline__ int __DEFAULT_FN_ATTRS
1108 _mm_comige_sd(__m128d __a, __m128d __b)
1110 return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
1113 /// \brief Compares the lower double-precision floating-point values in each of
1114 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1115 /// the value in the first parameter is unequal to the corresponding value in
1116 /// the second parameter.
1118 /// The comparison yields 0 for false, 1 for true. If either of the two
1119 /// lower double-precision values is NaN, 1 is returned.
1121 /// \headerfile <x86intrin.h>
1123 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1126 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1127 /// compared to the lower double-precision value of \a __b.
1129 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1130 /// compared to the lower double-precision value of \a __a.
1131 /// \returns An integer containing the comparison results. If either of the two
1132 /// lower double-precision values is NaN, 1 is returned.
1133 static __inline__ int __DEFAULT_FN_ATTRS
1134 _mm_comineq_sd(__m128d __a, __m128d __b)
1136 return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
1139 /// \brief Compares the lower double-precision floating-point values in each of
1140 /// the two 128-bit floating-point vectors of [2 x double] for equality. The
1141 /// comparison yields 0 for false, 1 for true.
1143 /// If either of the two lower double-precision values is NaN, 0 is returned.
1145 /// \headerfile <x86intrin.h>
1147 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1150 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1151 /// compared to the lower double-precision value of \a __b.
1153 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1154 /// compared to the lower double-precision value of \a __a.
1155 /// \returns An integer containing the comparison results. If either of the two
1156 /// lower double-precision values is NaN, 0 is returned.
1157 static __inline__ int __DEFAULT_FN_ATTRS
1158 _mm_ucomieq_sd(__m128d __a, __m128d __b)
1160 return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
1163 /// \brief Compares the lower double-precision floating-point values in each of
1164 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1165 /// the value in the first parameter is less than the corresponding value in
1166 /// the second parameter.
1168 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1169 /// double-precision values is NaN, 0 is returned.
1171 /// \headerfile <x86intrin.h>
1173 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1176 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1177 /// compared to the lower double-precision value of \a __b.
1179 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1180 /// compared to the lower double-precision value of \a __a.
1181 /// \returns An integer containing the comparison results. If either of the two
1182 /// lower double-precision values is NaN, 0 is returned.
1183 static __inline__ int __DEFAULT_FN_ATTRS
1184 _mm_ucomilt_sd(__m128d __a, __m128d __b)
1186 return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
1189 /// \brief Compares the lower double-precision floating-point values in each of
1190 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1191 /// the value in the first parameter is less than or equal to the
1192 /// corresponding value in the second parameter.
1194 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1195 /// double-precision values is NaN, 0 is returned.
1197 /// \headerfile <x86intrin.h>
1199 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1202 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1203 /// compared to the lower double-precision value of \a __b.
1205 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1206 /// compared to the lower double-precision value of \a __a.
1207 /// \returns An integer containing the comparison results. If either of the two
1208 /// lower double-precision values is NaN, 0 is returned.
1209 static __inline__ int __DEFAULT_FN_ATTRS
1210 _mm_ucomile_sd(__m128d __a, __m128d __b)
1212 return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
1215 /// \brief Compares the lower double-precision floating-point values in each of
1216 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1217 /// the value in the first parameter is greater than the corresponding value
1218 /// in the second parameter.
1220 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1221 /// double-precision values is NaN, 0 is returned.
1223 /// \headerfile <x86intrin.h>
1225 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1228 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1229 /// compared to the lower double-precision value of \a __b.
1231 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1232 /// compared to the lower double-precision value of \a __a.
1233 /// \returns An integer containing the comparison results. If either of the two
1234 /// lower double-precision values is NaN, 0 is returned.
1235 static __inline__ int __DEFAULT_FN_ATTRS
1236 _mm_ucomigt_sd(__m128d __a, __m128d __b)
1238 return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
1241 /// \brief Compares the lower double-precision floating-point values in each of
1242 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1243 /// the value in the first parameter is greater than or equal to the
1244 /// corresponding value in the second parameter.
1246 /// The comparison yields 0 for false, 1 for true. If either of the two
1247 /// lower double-precision values is NaN, 0 is returned.
1249 /// \headerfile <x86intrin.h>
1251 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1254 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1255 /// compared to the lower double-precision value of \a __b.
1257 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1258 /// compared to the lower double-precision value of \a __a.
1259 /// \returns An integer containing the comparison results. If either of the two
1260 /// lower double-precision values is NaN, 0 is returned.
1261 static __inline__ int __DEFAULT_FN_ATTRS
1262 _mm_ucomige_sd(__m128d __a, __m128d __b)
1264 return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
1267 /// \brief Compares the lower double-precision floating-point values in each of
1268 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1269 /// the value in the first parameter is unequal to the corresponding value in
1270 /// the second parameter.
1272 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1273 /// double-precision values is NaN, 1 is returned.
1275 /// \headerfile <x86intrin.h>
1277 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1280 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1281 /// compared to the lower double-precision value of \a __b.
1283 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1284 /// compared to the lower double-precision value of \a __a.
1285 /// \returns An integer containing the comparison result. If either of the two
1286 /// lower double-precision values is NaN, 1 is returned.
1287 static __inline__ int __DEFAULT_FN_ATTRS
1288 _mm_ucomineq_sd(__m128d __a, __m128d __b)
1290 return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
1293 /// \brief Converts the two double-precision floating-point elements of a
1294 /// 128-bit vector of [2 x double] into two single-precision floating-point
1295 /// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].
1296 /// The upper 64 bits of the result vector are set to zero.
1298 /// \headerfile <x86intrin.h>
1300 /// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
1303 /// A 128-bit vector of [2 x double].
1304 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1305 /// converted values. The upper 64 bits are set to zero.
1306 static __inline__ __m128 __DEFAULT_FN_ATTRS
1307 _mm_cvtpd_ps(__m128d __a)
1309 return __builtin_ia32_cvtpd2ps((__v2df)__a);
1312 /// \brief Converts the lower two single-precision floating-point elements of a
1313 /// 128-bit vector of [4 x float] into two double-precision floating-point
1314 /// values, returned in a 128-bit vector of [2 x double]. The upper two
1315 /// elements of the input vector are unused.
1317 /// \headerfile <x86intrin.h>
1319 /// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
1322 /// A 128-bit vector of [4 x float]. The lower two single-precision
1323 /// floating-point elements are converted to double-precision values. The
1324 /// upper two elements are unused.
1325 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1326 static __inline__ __m128d __DEFAULT_FN_ATTRS
1327 _mm_cvtps_pd(__m128 __a)
1329 return (__m128d) __builtin_convertvector(
1330 __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
1333 /// \brief Converts the lower two integer elements of a 128-bit vector of
1334 /// [4 x i32] into two double-precision floating-point values, returned in a
1335 /// 128-bit vector of [2 x double].
1337 /// The upper two elements of the input vector are unused.
1339 /// \headerfile <x86intrin.h>
1341 /// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
1344 /// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
1345 /// converted to double-precision values.
1347 /// The upper two elements are unused.
1348 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1349 static __inline__ __m128d __DEFAULT_FN_ATTRS
1350 _mm_cvtepi32_pd(__m128i __a)
1352 return (__m128d) __builtin_convertvector(
1353 __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
1356 /// \brief Converts the two double-precision floating-point elements of a
1357 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1358 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper
1359 /// 64 bits of the result vector are set to zero.
1361 /// \headerfile <x86intrin.h>
1363 /// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
1366 /// A 128-bit vector of [2 x double].
1367 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1368 /// converted values. The upper 64 bits are set to zero.
1369 static __inline__ __m128i __DEFAULT_FN_ATTRS
1370 _mm_cvtpd_epi32(__m128d __a)
1372 return __builtin_ia32_cvtpd2dq((__v2df)__a);
1375 /// \brief Converts the low-order element of a 128-bit vector of [2 x double]
1376 /// into a 32-bit signed integer value.
1378 /// \headerfile <x86intrin.h>
1380 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
1383 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1385 /// \returns A 32-bit signed integer containing the converted value.
1386 static __inline__ int __DEFAULT_FN_ATTRS
1387 _mm_cvtsd_si32(__m128d __a)
1389 return __builtin_ia32_cvtsd2si((__v2df)__a);
1392 /// \brief Converts the lower double-precision floating-point element of a
1393 /// 128-bit vector of [2 x double], in the second parameter, into a
1394 /// single-precision floating-point value, returned in the lower 32 bits of a
1395 /// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are
1396 /// copied from the upper 96 bits of the first parameter.
1398 /// \headerfile <x86intrin.h>
1400 /// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
1403 /// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
1404 /// copied to the upper 96 bits of the result.
1406 /// A 128-bit vector of [2 x double]. The lower double-precision
1407 /// floating-point element is used in the conversion.
1408 /// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
1409 /// converted value from the second parameter. The upper 96 bits are copied
1410 /// from the upper 96 bits of the first parameter.
1411 static __inline__ __m128 __DEFAULT_FN_ATTRS
1412 _mm_cvtsd_ss(__m128 __a, __m128d __b)
1414 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
1417 /// \brief Converts a 32-bit signed integer value, in the second parameter, into
1418 /// a double-precision floating-point value, returned in the lower 64 bits of
1419 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1420 /// are copied from the upper 64 bits of the first parameter.
1422 /// \headerfile <x86intrin.h>
1424 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
1427 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1428 /// copied to the upper 64 bits of the result.
1430 /// A 32-bit signed integer containing the value to be converted.
1431 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1432 /// converted value from the second parameter. The upper 64 bits are copied
1433 /// from the upper 64 bits of the first parameter.
1434 static __inline__ __m128d __DEFAULT_FN_ATTRS
1435 _mm_cvtsi32_sd(__m128d __a, int __b)
1441 /// \brief Converts the lower single-precision floating-point element of a
1442 /// 128-bit vector of [4 x float], in the second parameter, into a
1443 /// double-precision floating-point value, returned in the lower 64 bits of
1444 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1445 /// are copied from the upper 64 bits of the first parameter.
1447 /// \headerfile <x86intrin.h>
1449 /// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
1452 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1453 /// copied to the upper 64 bits of the result.
1455 /// A 128-bit vector of [4 x float]. The lower single-precision
1456 /// floating-point element is used in the conversion.
1457 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1458 /// converted value from the second parameter. The upper 64 bits are copied
1459 /// from the upper 64 bits of the first parameter.
1460 static __inline__ __m128d __DEFAULT_FN_ATTRS
1461 _mm_cvtss_sd(__m128d __a, __m128 __b)
1467 /// \brief Converts the two double-precision floating-point elements of a
1468 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1469 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32].
1471 /// If the result of either conversion is inexact, the result is truncated
1472 /// (rounded towards zero) regardless of the current MXCSR setting. The upper
1473 /// 64 bits of the result vector are set to zero.
1475 /// \headerfile <x86intrin.h>
1477 /// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>
1481 /// A 128-bit vector of [2 x double].
1482 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1483 /// converted values. The upper 64 bits are set to zero.
1484 static __inline__ __m128i __DEFAULT_FN_ATTRS
1485 _mm_cvttpd_epi32(__m128d __a)
1487 return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
1490 /// \brief Converts the low-order element of a [2 x double] vector into a 32-bit
1491 /// signed integer value, truncating the result when it is inexact.
1493 /// \headerfile <x86intrin.h>
1495 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
1499 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1501 /// \returns A 32-bit signed integer containing the converted value.
1502 static __inline__ int __DEFAULT_FN_ATTRS
1503 _mm_cvttsd_si32(__m128d __a)
1505 return __builtin_ia32_cvttsd2si((__v2df)__a);
1508 /// \brief Converts the two double-precision floating-point elements of a
1509 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1510 /// returned in a 64-bit vector of [2 x i32].
1512 /// \headerfile <x86intrin.h>
1514 /// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
1517 /// A 128-bit vector of [2 x double].
1518 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1519 static __inline__ __m64 __DEFAULT_FN_ATTRS
1520 _mm_cvtpd_pi32(__m128d __a)
1522 return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
1525 /// \brief Converts the two double-precision floating-point elements of a
1526 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1527 /// returned in a 64-bit vector of [2 x i32].
1529 /// If the result of either conversion is inexact, the result is truncated
1530 /// (rounded towards zero) regardless of the current MXCSR setting.
1532 /// \headerfile <x86intrin.h>
1534 /// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
1537 /// A 128-bit vector of [2 x double].
1538 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1539 static __inline__ __m64 __DEFAULT_FN_ATTRS
1540 _mm_cvttpd_pi32(__m128d __a)
1542 return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
1545 /// \brief Converts the two signed 32-bit integer elements of a 64-bit vector of
1546 /// [2 x i32] into two double-precision floating-point values, returned in a
1547 /// 128-bit vector of [2 x double].
1549 /// \headerfile <x86intrin.h>
1551 /// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
1554 /// A 64-bit vector of [2 x i32].
1555 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1556 static __inline__ __m128d __DEFAULT_FN_ATTRS
1557 _mm_cvtpi32_pd(__m64 __a)
1559 return __builtin_ia32_cvtpi2pd((__v2si)__a);
1562 /// \brief Returns the low-order element of a 128-bit vector of [2 x double] as
1563 /// a double-precision floating-point value.
1565 /// \headerfile <x86intrin.h>
1567 /// This intrinsic has no corresponding instruction.
1570 /// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
1571 /// \returns A double-precision floating-point value copied from the lower 64
1573 static __inline__ double __DEFAULT_FN_ATTRS
1574 _mm_cvtsd_f64(__m128d __a)
1579 /// \brief Loads a 128-bit floating-point vector of [2 x double] from an aligned
1580 /// memory location.
1582 /// \headerfile <x86intrin.h>
1584 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
1587 /// A pointer to a 128-bit memory location. The address of the memory
1588 /// location has to be 16-byte aligned.
1589 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1590 static __inline__ __m128d __DEFAULT_FN_ATTRS
1591 _mm_load_pd(double const *__dp)
1593 return *(__m128d*)__dp;
1596 /// \brief Loads a double-precision floating-point value from a specified memory
1597 /// location and duplicates it to both vector elements of a 128-bit vector of
1600 /// \headerfile <x86intrin.h>
1602 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
1605 /// A pointer to a memory location containing a double-precision value.
1606 /// \returns A 128-bit vector of [2 x double] containing the loaded and
1607 /// duplicated values.
1608 static __inline__ __m128d __DEFAULT_FN_ATTRS
1609 _mm_load1_pd(double const *__dp)
1611 struct __mm_load1_pd_struct {
1613 } __attribute__((__packed__, __may_alias__));
1614 double __u = ((struct __mm_load1_pd_struct*)__dp)->__u;
1615 return (__m128d){ __u, __u };
1618 #define _mm_load_pd1(dp) _mm_load1_pd(dp)
1620 /// \brief Loads two double-precision values, in reverse order, from an aligned
1621 /// memory location into a 128-bit vector of [2 x double].
1623 /// \headerfile <x86intrin.h>
1625 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +
1626 /// needed shuffling instructions. In AVX mode, the shuffling may be combined
1627 /// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
1630 /// A 16-byte aligned pointer to an array of double-precision values to be
1631 /// loaded in reverse order.
1632 /// \returns A 128-bit vector of [2 x double] containing the reversed loaded
1634 static __inline__ __m128d __DEFAULT_FN_ATTRS
1635 _mm_loadr_pd(double const *__dp)
1637 __m128d __u = *(__m128d*)__dp;
1638 return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
1641 /// \brief Loads a 128-bit floating-point vector of [2 x double] from an
1642 /// unaligned memory location.
1644 /// \headerfile <x86intrin.h>
1646 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1649 /// A pointer to a 128-bit memory location. The address of the memory
1650 /// location does not have to be aligned.
1651 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1652 static __inline__ __m128d __DEFAULT_FN_ATTRS
1653 _mm_loadu_pd(double const *__dp)
1657 } __attribute__((__packed__, __may_alias__));
1658 return ((struct __loadu_pd*)__dp)->__v;
1661 /// \brief Loads a 64-bit integer value to the low element of a 128-bit integer
1662 /// vector and clears the upper element.
1664 /// \headerfile <x86intrin.h>
1666 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1669 /// A pointer to a 64-bit memory location. The address of the memory
1670 /// location does not have to be aligned.
1671 /// \returns A 128-bit vector of [2 x i64] containing the loaded value.
1672 static __inline__ __m128i __DEFAULT_FN_ATTRS
1673 _mm_loadu_si64(void const *__a)
1675 struct __loadu_si64 {
1677 } __attribute__((__packed__, __may_alias__));
1678 long long __u = ((struct __loadu_si64*)__a)->__v;
1679 return (__m128i){__u, 0L};
1682 /// \brief Loads a 64-bit double-precision value to the low element of a
1683 /// 128-bit integer vector and clears the upper element.
1685 /// \headerfile <x86intrin.h>
1687 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1690 /// A pointer to a memory location containing a double-precision value.
1691 /// The address of the memory location does not have to be aligned.
1692 /// \returns A 128-bit vector of [2 x double] containing the loaded value.
1693 static __inline__ __m128d __DEFAULT_FN_ATTRS
1694 _mm_load_sd(double const *__dp)
1696 struct __mm_load_sd_struct {
1698 } __attribute__((__packed__, __may_alias__));
1699 double __u = ((struct __mm_load_sd_struct*)__dp)->__u;
1700 return (__m128d){ __u, 0 };
1703 /// \brief Loads a double-precision value into the high-order bits of a 128-bit
1704 /// vector of [2 x double]. The low-order bits are copied from the low-order
1705 /// bits of the first operand.
1707 /// \headerfile <x86intrin.h>
1709 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1712 /// A 128-bit vector of [2 x double]. \n
1713 /// Bits [63:0] are written to bits [63:0] of the result.
1715 /// A pointer to a 64-bit memory location containing a double-precision
1716 /// floating-point value that is loaded. The loaded value is written to bits
1717 /// [127:64] of the result. The address of the memory location does not have
1719 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1720 static __inline__ __m128d __DEFAULT_FN_ATTRS
1721 _mm_loadh_pd(__m128d __a, double const *__dp)
1723 struct __mm_loadh_pd_struct {
1725 } __attribute__((__packed__, __may_alias__));
1726 double __u = ((struct __mm_loadh_pd_struct*)__dp)->__u;
1727 return (__m128d){ __a[0], __u };
1730 /// \brief Loads a double-precision value into the low-order bits of a 128-bit
1731 /// vector of [2 x double]. The high-order bits are copied from the
1732 /// high-order bits of the first operand.
1734 /// \headerfile <x86intrin.h>
1736 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1739 /// A 128-bit vector of [2 x double]. \n
1740 /// Bits [127:64] are written to bits [127:64] of the result.
1742 /// A pointer to a 64-bit memory location containing a double-precision
1743 /// floating-point value that is loaded. The loaded value is written to bits
1744 /// [63:0] of the result. The address of the memory location does not have to
1746 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1747 static __inline__ __m128d __DEFAULT_FN_ATTRS
1748 _mm_loadl_pd(__m128d __a, double const *__dp)
1750 struct __mm_loadl_pd_struct {
1752 } __attribute__((__packed__, __may_alias__));
1753 double __u = ((struct __mm_loadl_pd_struct*)__dp)->__u;
1754 return (__m128d){ __u, __a[1] };
1757 /// \brief Constructs a 128-bit floating-point vector of [2 x double] with
1758 /// unspecified content. This could be used as an argument to another
1759 /// intrinsic function where the argument is required but the value is not
1762 /// \headerfile <x86intrin.h>
1764 /// This intrinsic has no corresponding instruction.
1766 /// \returns A 128-bit floating-point vector of [2 x double] with unspecified
1768 static __inline__ __m128d __DEFAULT_FN_ATTRS
1769 _mm_undefined_pd(void)
1771 return (__m128d)__builtin_ia32_undef128();
1774 /// \brief Constructs a 128-bit floating-point vector of [2 x double]. The lower
1775 /// 64 bits of the vector are initialized with the specified double-precision
1776 /// floating-point value. The upper 64 bits are set to zero.
1778 /// \headerfile <x86intrin.h>
1780 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1783 /// A double-precision floating-point value used to initialize the lower 64
1784 /// bits of the result.
1785 /// \returns An initialized 128-bit floating-point vector of [2 x double]. The
1786 /// lower 64 bits contain the value of the parameter. The upper 64 bits are
1788 static __inline__ __m128d __DEFAULT_FN_ATTRS
1789 _mm_set_sd(double __w)
1791 return (__m128d){ __w, 0 };
1794 /// \brief Constructs a 128-bit floating-point vector of [2 x double], with each
1795 /// of the two double-precision floating-point vector elements set to the
1796 /// specified double-precision floating-point value.
1798 /// \headerfile <x86intrin.h>
1800 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1803 /// A double-precision floating-point value used to initialize each vector
1804 /// element of the result.
1805 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1806 static __inline__ __m128d __DEFAULT_FN_ATTRS
1807 _mm_set1_pd(double __w)
1809 return (__m128d){ __w, __w };
1812 /// \brief Constructs a 128-bit floating-point vector of [2 x double], with each
1813 /// of the two double-precision floating-point vector elements set to the
1814 /// specified double-precision floating-point value.
1816 /// \headerfile <x86intrin.h>
1818 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1821 /// A double-precision floating-point value used to initialize each vector
1822 /// element of the result.
1823 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1824 static __inline__ __m128d __DEFAULT_FN_ATTRS
1825 _mm_set_pd1(double __w)
1827 return _mm_set1_pd(__w);
1830 /// \brief Constructs a 128-bit floating-point vector of [2 x double]
1831 /// initialized with the specified double-precision floating-point values.
1833 /// \headerfile <x86intrin.h>
1835 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1838 /// A double-precision floating-point value used to initialize the upper 64
1839 /// bits of the result.
1841 /// A double-precision floating-point value used to initialize the lower 64
1842 /// bits of the result.
1843 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1844 static __inline__ __m128d __DEFAULT_FN_ATTRS
1845 _mm_set_pd(double __w, double __x)
1847 return (__m128d){ __x, __w };
1850 /// \brief Constructs a 128-bit floating-point vector of [2 x double],
1851 /// initialized in reverse order with the specified double-precision
1852 /// floating-point values.
1854 /// \headerfile <x86intrin.h>
1856 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1859 /// A double-precision floating-point value used to initialize the lower 64
1860 /// bits of the result.
1862 /// A double-precision floating-point value used to initialize the upper 64
1863 /// bits of the result.
1864 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1865 static __inline__ __m128d __DEFAULT_FN_ATTRS
1866 _mm_setr_pd(double __w, double __x)
1868 return (__m128d){ __w, __x };
1871 /// \brief Constructs a 128-bit floating-point vector of [2 x double]
1872 /// initialized to zero.
1874 /// \headerfile <x86intrin.h>
1876 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1878 /// \returns An initialized 128-bit floating-point vector of [2 x double] with
1879 /// all elements set to zero.
1880 static __inline__ __m128d __DEFAULT_FN_ATTRS
1881 _mm_setzero_pd(void)
1883 return (__m128d){ 0, 0 };
1886 /// \brief Constructs a 128-bit floating-point vector of [2 x double]. The lower
1887 /// 64 bits are set to the lower 64 bits of the second parameter. The upper
1888 /// 64 bits are set to the upper 64 bits of the first parameter.
1890 /// \headerfile <x86intrin.h>
1892 /// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
1895 /// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
1896 /// upper 64 bits of the result.
1898 /// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
1899 /// lower 64 bits of the result.
1900 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1901 static __inline__ __m128d __DEFAULT_FN_ATTRS
1902 _mm_move_sd(__m128d __a, __m128d __b)
1904 return (__m128d){ __b[0], __a[1] };
1907 /// \brief Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
1908 /// memory location.
1910 /// \headerfile <x86intrin.h>
1912 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1915 /// A pointer to a 64-bit memory location.
1917 /// A 128-bit vector of [2 x double] containing the value to be stored.
1918 static __inline__ void __DEFAULT_FN_ATTRS
1919 _mm_store_sd(double *__dp, __m128d __a)
1921 struct __mm_store_sd_struct {
1923 } __attribute__((__packed__, __may_alias__));
1924 ((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
1927 /// \brief Moves packed double-precision values from a 128-bit vector of
1928 /// [2 x double] to a memory location.
1930 /// \headerfile <x86intrin.h>
1932 /// This intrinsic corresponds to the <c>VMOVAPD / MOVAPS</c> instruction.
1935 /// A pointer to an aligned memory location that can store two
1936 /// double-precision values.
1938 /// A packed 128-bit vector of [2 x double] containing the values to be
1940 static __inline__ void __DEFAULT_FN_ATTRS
1941 _mm_store_pd(double *__dp, __m128d __a)
1943 *(__m128d*)__dp = __a;
1946 /// \brief Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
1947 /// the upper and lower 64 bits of a memory location.
1949 /// \headerfile <x86intrin.h>
1951 /// This intrinsic corresponds to the
1952 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
1955 /// A pointer to a memory location that can store two double-precision
1958 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
1959 /// of the values in \a __dp.
1960 static __inline__ void __DEFAULT_FN_ATTRS
1961 _mm_store1_pd(double *__dp, __m128d __a)
1963 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
1964 _mm_store_pd(__dp, __a);
1967 /// \brief Moves the lower 64 bits of a 128-bit vector of [2 x double] twice to
1968 /// the upper and lower 64 bits of a memory location.
1970 /// \headerfile <x86intrin.h>
1972 /// This intrinsic corresponds to the
1973 /// <c> VMOVDDUP + VMOVAPD / MOVLHPS + MOVAPS </c> instruction.
1976 /// A pointer to a memory location that can store two double-precision
1979 /// A 128-bit vector of [2 x double] whose lower 64 bits are copied to each
1980 /// of the values in \a __dp.
1981 static __inline__ void __DEFAULT_FN_ATTRS
1982 _mm_store_pd1(double *__dp, __m128d __a)
1984 return _mm_store1_pd(__dp, __a);
1987 /// \brief Stores a 128-bit vector of [2 x double] into an unaligned memory
1990 /// \headerfile <x86intrin.h>
1992 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1995 /// A pointer to a 128-bit memory location. The address of the memory
1996 /// location does not have to be aligned.
1998 /// A 128-bit vector of [2 x double] containing the values to be stored.
1999 static __inline__ void __DEFAULT_FN_ATTRS
2000 _mm_storeu_pd(double *__dp, __m128d __a)
2002 struct __storeu_pd {
2004 } __attribute__((__packed__, __may_alias__));
2005 ((struct __storeu_pd*)__dp)->__v = __a;
2008 /// \brief Stores two double-precision values, in reverse order, from a 128-bit
2009 /// vector of [2 x double] to a 16-byte aligned memory location.
2011 /// \headerfile <x86intrin.h>
2013 /// This intrinsic corresponds to a shuffling instruction followed by a
2014 /// <c> VMOVAPD / MOVAPD </c> instruction.
2017 /// A pointer to a 16-byte aligned memory location that can store two
2018 /// double-precision values.
2020 /// A 128-bit vector of [2 x double] containing the values to be reversed and
2022 static __inline__ void __DEFAULT_FN_ATTRS
2023 _mm_storer_pd(double *__dp, __m128d __a)
2025 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
2026 *(__m128d *)__dp = __a;
2029 /// \brief Stores the upper 64 bits of a 128-bit vector of [2 x double] to a
2030 /// memory location.
2032 /// \headerfile <x86intrin.h>
2034 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
2037 /// A pointer to a 64-bit memory location.
2039 /// A 128-bit vector of [2 x double] containing the value to be stored.
2040 static __inline__ void __DEFAULT_FN_ATTRS
2041 _mm_storeh_pd(double *__dp, __m128d __a)
2043 struct __mm_storeh_pd_struct {
2045 } __attribute__((__packed__, __may_alias__));
2046 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
2049 /// \brief Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
2050 /// memory location.
2052 /// \headerfile <x86intrin.h>
2054 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
2057 /// A pointer to a 64-bit memory location.
2059 /// A 128-bit vector of [2 x double] containing the value to be stored.
2060 static __inline__ void __DEFAULT_FN_ATTRS
2061 _mm_storel_pd(double *__dp, __m128d __a)
2063 struct __mm_storeh_pd_struct {
2065 } __attribute__((__packed__, __may_alias__));
2066 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
2069 /// \brief Adds the corresponding elements of two 128-bit vectors of [16 x i8],
2070 /// saving the lower 8 bits of each sum in the corresponding element of a
2071 /// 128-bit result vector of [16 x i8].
2073 /// The integer elements of both parameters can be either signed or unsigned.
2075 /// \headerfile <x86intrin.h>
2077 /// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
2080 /// A 128-bit vector of [16 x i8].
2082 /// A 128-bit vector of [16 x i8].
2083 /// \returns A 128-bit vector of [16 x i8] containing the sums of both
2085 static __inline__ __m128i __DEFAULT_FN_ATTRS
2086 _mm_add_epi8(__m128i __a, __m128i __b)
2088 return (__m128i)((__v16qu)__a + (__v16qu)__b);
2091 /// \brief Adds the corresponding elements of two 128-bit vectors of [8 x i16],
2092 /// saving the lower 16 bits of each sum in the corresponding element of a
2093 /// 128-bit result vector of [8 x i16].
2095 /// The integer elements of both parameters can be either signed or unsigned.
2097 /// \headerfile <x86intrin.h>
2099 /// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
2102 /// A 128-bit vector of [8 x i16].
2104 /// A 128-bit vector of [8 x i16].
2105 /// \returns A 128-bit vector of [8 x i16] containing the sums of both
2107 static __inline__ __m128i __DEFAULT_FN_ATTRS
2108 _mm_add_epi16(__m128i __a, __m128i __b)
2110 return (__m128i)((__v8hu)__a + (__v8hu)__b);
2113 /// \brief Adds the corresponding elements of two 128-bit vectors of [4 x i32],
2114 /// saving the lower 32 bits of each sum in the corresponding element of a
2115 /// 128-bit result vector of [4 x i32].
2117 /// The integer elements of both parameters can be either signed or unsigned.
2119 /// \headerfile <x86intrin.h>
2121 /// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
2124 /// A 128-bit vector of [4 x i32].
2126 /// A 128-bit vector of [4 x i32].
2127 /// \returns A 128-bit vector of [4 x i32] containing the sums of both
2129 static __inline__ __m128i __DEFAULT_FN_ATTRS
2130 _mm_add_epi32(__m128i __a, __m128i __b)
2132 return (__m128i)((__v4su)__a + (__v4su)__b);
2135 /// \brief Adds two signed or unsigned 64-bit integer values, returning the
2136 /// lower 64 bits of the sum.
2138 /// \headerfile <x86intrin.h>
2140 /// This intrinsic corresponds to the <c> PADDQ </c> instruction.
2143 /// A 64-bit integer.
2145 /// A 64-bit integer.
2146 /// \returns A 64-bit integer containing the sum of both parameters.
2147 static __inline__ __m64 __DEFAULT_FN_ATTRS
2148 _mm_add_si64(__m64 __a, __m64 __b)
2150 return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
2153 /// \brief Adds the corresponding elements of two 128-bit vectors of [2 x i64],
2154 /// saving the lower 64 bits of each sum in the corresponding element of a
2155 /// 128-bit result vector of [2 x i64].
2157 /// The integer elements of both parameters can be either signed or unsigned.
2159 /// \headerfile <x86intrin.h>
2161 /// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
2164 /// A 128-bit vector of [2 x i64].
2166 /// A 128-bit vector of [2 x i64].
2167 /// \returns A 128-bit vector of [2 x i64] containing the sums of both
2169 static __inline__ __m128i __DEFAULT_FN_ATTRS
2170 _mm_add_epi64(__m128i __a, __m128i __b)
2172 return (__m128i)((__v2du)__a + (__v2du)__b);
2175 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2176 /// signed [16 x i8] vectors, saving each sum in the corresponding element of
2177 /// a 128-bit result vector of [16 x i8]. Positive sums greater than 7Fh are
2178 /// saturated to 7Fh. Negative sums less than 80h are saturated to 80h.
2180 /// \headerfile <x86intrin.h>
2182 /// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
2185 /// A 128-bit signed [16 x i8] vector.
2187 /// A 128-bit signed [16 x i8] vector.
2188 /// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
2189 /// both parameters.
2190 static __inline__ __m128i __DEFAULT_FN_ATTRS
2191 _mm_adds_epi8(__m128i __a, __m128i __b)
2193 return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
2196 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2197 /// signed [8 x i16] vectors, saving each sum in the corresponding element of
2198 /// a 128-bit result vector of [8 x i16]. Positive sums greater than 7FFFh
2199 /// are saturated to 7FFFh. Negative sums less than 8000h are saturated to
2202 /// \headerfile <x86intrin.h>
2204 /// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
2207 /// A 128-bit signed [8 x i16] vector.
2209 /// A 128-bit signed [8 x i16] vector.
2210 /// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
2211 /// both parameters.
2212 static __inline__ __m128i __DEFAULT_FN_ATTRS
2213 _mm_adds_epi16(__m128i __a, __m128i __b)
2215 return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
2218 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2219 /// unsigned [16 x i8] vectors, saving each sum in the corresponding element
2220 /// of a 128-bit result vector of [16 x i8]. Positive sums greater than FFh
2221 /// are saturated to FFh. Negative sums are saturated to 00h.
2223 /// \headerfile <x86intrin.h>
2225 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2228 /// A 128-bit unsigned [16 x i8] vector.
2230 /// A 128-bit unsigned [16 x i8] vector.
2231 /// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
2232 /// of both parameters.
2233 static __inline__ __m128i __DEFAULT_FN_ATTRS
2234 _mm_adds_epu8(__m128i __a, __m128i __b)
2236 return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
2239 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2240 /// unsigned [8 x i16] vectors, saving each sum in the corresponding element
2241 /// of a 128-bit result vector of [8 x i16]. Positive sums greater than FFFFh
2242 /// are saturated to FFFFh. Negative sums are saturated to 0000h.
2244 /// \headerfile <x86intrin.h>
2246 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2249 /// A 128-bit unsigned [8 x i16] vector.
2251 /// A 128-bit unsigned [8 x i16] vector.
2252 /// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
2253 /// of both parameters.
2254 static __inline__ __m128i __DEFAULT_FN_ATTRS
2255 _mm_adds_epu16(__m128i __a, __m128i __b)
2257 return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
2260 /// \brief Computes the rounded avarages of corresponding elements of two
2261 /// 128-bit unsigned [16 x i8] vectors, saving each result in the
2262 /// corresponding element of a 128-bit result vector of [16 x i8].
2264 /// \headerfile <x86intrin.h>
2266 /// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
2269 /// A 128-bit unsigned [16 x i8] vector.
2271 /// A 128-bit unsigned [16 x i8] vector.
2272 /// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
2273 /// averages of both parameters.
2274 static __inline__ __m128i __DEFAULT_FN_ATTRS
2275 _mm_avg_epu8(__m128i __a, __m128i __b)
2277 typedef unsigned short __v16hu __attribute__ ((__vector_size__ (32)));
2278 return (__m128i)__builtin_convertvector(
2279 ((__builtin_convertvector((__v16qu)__a, __v16hu) +
2280 __builtin_convertvector((__v16qu)__b, __v16hu)) + 1)
2284 /// \brief Computes the rounded avarages of corresponding elements of two
2285 /// 128-bit unsigned [8 x i16] vectors, saving each result in the
2286 /// corresponding element of a 128-bit result vector of [8 x i16].
2288 /// \headerfile <x86intrin.h>
2290 /// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
2293 /// A 128-bit unsigned [8 x i16] vector.
2295 /// A 128-bit unsigned [8 x i16] vector.
2296 /// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
2297 /// averages of both parameters.
2298 static __inline__ __m128i __DEFAULT_FN_ATTRS
2299 _mm_avg_epu16(__m128i __a, __m128i __b)
2301 typedef unsigned int __v8su __attribute__ ((__vector_size__ (32)));
2302 return (__m128i)__builtin_convertvector(
2303 ((__builtin_convertvector((__v8hu)__a, __v8su) +
2304 __builtin_convertvector((__v8hu)__b, __v8su)) + 1)
2308 /// \brief Multiplies the corresponding elements of two 128-bit signed [8 x i16]
2309 /// vectors, producing eight intermediate 32-bit signed integer products, and
2310 /// adds the consecutive pairs of 32-bit products to form a 128-bit signed
2311 /// [4 x i32] vector.
2313 /// For example, bits [15:0] of both parameters are multiplied producing a
2314 /// 32-bit product, bits [31:16] of both parameters are multiplied producing
2315 /// a 32-bit product, and the sum of those two products becomes bits [31:0]
2318 /// \headerfile <x86intrin.h>
2320 /// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
2323 /// A 128-bit signed [8 x i16] vector.
2325 /// A 128-bit signed [8 x i16] vector.
2326 /// \returns A 128-bit signed [4 x i32] vector containing the sums of products
2327 /// of both parameters.
2328 static __inline__ __m128i __DEFAULT_FN_ATTRS
2329 _mm_madd_epi16(__m128i __a, __m128i __b)
2331 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
2334 /// \brief Compares corresponding elements of two 128-bit signed [8 x i16]
2335 /// vectors, saving the greater value from each comparison in the
2336 /// corresponding element of a 128-bit result vector of [8 x i16].
2338 /// \headerfile <x86intrin.h>
2340 /// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
2343 /// A 128-bit signed [8 x i16] vector.
2345 /// A 128-bit signed [8 x i16] vector.
2346 /// \returns A 128-bit signed [8 x i16] vector containing the greater value of
2347 /// each comparison.
2348 static __inline__ __m128i __DEFAULT_FN_ATTRS
2349 _mm_max_epi16(__m128i __a, __m128i __b)
2351 return (__m128i)__builtin_ia32_pmaxsw128((__v8hi)__a, (__v8hi)__b);
2354 /// \brief Compares corresponding elements of two 128-bit unsigned [16 x i8]
2355 /// vectors, saving the greater value from each comparison in the
2356 /// corresponding element of a 128-bit result vector of [16 x i8].
2358 /// \headerfile <x86intrin.h>
2360 /// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
2363 /// A 128-bit unsigned [16 x i8] vector.
2365 /// A 128-bit unsigned [16 x i8] vector.
2366 /// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
2367 /// each comparison.
2368 static __inline__ __m128i __DEFAULT_FN_ATTRS
2369 _mm_max_epu8(__m128i __a, __m128i __b)
2371 return (__m128i)__builtin_ia32_pmaxub128((__v16qi)__a, (__v16qi)__b);
2374 /// \brief Compares corresponding elements of two 128-bit signed [8 x i16]
2375 /// vectors, saving the smaller value from each comparison in the
2376 /// corresponding element of a 128-bit result vector of [8 x i16].
2378 /// \headerfile <x86intrin.h>
2380 /// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
2383 /// A 128-bit signed [8 x i16] vector.
2385 /// A 128-bit signed [8 x i16] vector.
2386 /// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
2387 /// each comparison.
2388 static __inline__ __m128i __DEFAULT_FN_ATTRS
2389 _mm_min_epi16(__m128i __a, __m128i __b)
2391 return (__m128i)__builtin_ia32_pminsw128((__v8hi)__a, (__v8hi)__b);
2394 /// \brief Compares corresponding elements of two 128-bit unsigned [16 x i8]
2395 /// vectors, saving the smaller value from each comparison in the
2396 /// corresponding element of a 128-bit result vector of [16 x i8].
2398 /// \headerfile <x86intrin.h>
2400 /// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
2403 /// A 128-bit unsigned [16 x i8] vector.
2405 /// A 128-bit unsigned [16 x i8] vector.
2406 /// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
2407 /// each comparison.
2408 static __inline__ __m128i __DEFAULT_FN_ATTRS
2409 _mm_min_epu8(__m128i __a, __m128i __b)
2411 return (__m128i)__builtin_ia32_pminub128((__v16qi)__a, (__v16qi)__b);
2414 /// \brief Multiplies the corresponding elements of two signed [8 x i16]
2415 /// vectors, saving the upper 16 bits of each 32-bit product in the
2416 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2418 /// \headerfile <x86intrin.h>
2420 /// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
2423 /// A 128-bit signed [8 x i16] vector.
2425 /// A 128-bit signed [8 x i16] vector.
2426 /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
2427 /// each of the eight 32-bit products.
2428 static __inline__ __m128i __DEFAULT_FN_ATTRS
2429 _mm_mulhi_epi16(__m128i __a, __m128i __b)
2431 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
2434 /// \brief Multiplies the corresponding elements of two unsigned [8 x i16]
2435 /// vectors, saving the upper 16 bits of each 32-bit product in the
2436 /// corresponding element of a 128-bit unsigned [8 x i16] result vector.
2438 /// \headerfile <x86intrin.h>
2440 /// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
2443 /// A 128-bit unsigned [8 x i16] vector.
2445 /// A 128-bit unsigned [8 x i16] vector.
2446 /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
2447 /// of each of the eight 32-bit products.
2448 static __inline__ __m128i __DEFAULT_FN_ATTRS
2449 _mm_mulhi_epu16(__m128i __a, __m128i __b)
2451 return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
2454 /// \brief Multiplies the corresponding elements of two signed [8 x i16]
2455 /// vectors, saving the lower 16 bits of each 32-bit product in the
2456 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2458 /// \headerfile <x86intrin.h>
2460 /// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
2463 /// A 128-bit signed [8 x i16] vector.
2465 /// A 128-bit signed [8 x i16] vector.
2466 /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
2467 /// each of the eight 32-bit products.
2468 static __inline__ __m128i __DEFAULT_FN_ATTRS
2469 _mm_mullo_epi16(__m128i __a, __m128i __b)
2471 return (__m128i)((__v8hu)__a * (__v8hu)__b);
2474 /// \brief Multiplies 32-bit unsigned integer values contained in the lower bits
2475 /// of the two 64-bit integer vectors and returns the 64-bit unsigned
2478 /// \headerfile <x86intrin.h>
2480 /// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
2483 /// A 64-bit integer containing one of the source operands.
2485 /// A 64-bit integer containing one of the source operands.
2486 /// \returns A 64-bit integer vector containing the product of both operands.
2487 static __inline__ __m64 __DEFAULT_FN_ATTRS
2488 _mm_mul_su32(__m64 __a, __m64 __b)
2490 return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
2493 /// \brief Multiplies 32-bit unsigned integer values contained in the lower
2494 /// bits of the corresponding elements of two [2 x i64] vectors, and returns
2495 /// the 64-bit products in the corresponding elements of a [2 x i64] vector.
2497 /// \headerfile <x86intrin.h>
2499 /// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
2502 /// A [2 x i64] vector containing one of the source operands.
2504 /// A [2 x i64] vector containing one of the source operands.
2505 /// \returns A [2 x i64] vector containing the product of both operands.
2506 static __inline__ __m128i __DEFAULT_FN_ATTRS
2507 _mm_mul_epu32(__m128i __a, __m128i __b)
2509 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
2512 /// \brief Computes the absolute differences of corresponding 8-bit integer
2513 /// values in two 128-bit vectors. Sums the first 8 absolute differences, and
2514 /// separately sums the second 8 absolute differences. Packs these two
2515 /// unsigned 16-bit integer sums into the upper and lower elements of a
2516 /// [2 x i64] vector.
2518 /// \headerfile <x86intrin.h>
2520 /// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
2523 /// A 128-bit integer vector containing one of the source operands.
2525 /// A 128-bit integer vector containing one of the source operands.
2526 /// \returns A [2 x i64] vector containing the sums of the sets of absolute
2527 /// differences between both operands.
2528 static __inline__ __m128i __DEFAULT_FN_ATTRS
2529 _mm_sad_epu8(__m128i __a, __m128i __b)
2531 return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
2534 /// \brief Subtracts the corresponding 8-bit integer values in the operands.
2536 /// \headerfile <x86intrin.h>
2538 /// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
2541 /// A 128-bit integer vector containing the minuends.
2543 /// A 128-bit integer vector containing the subtrahends.
2544 /// \returns A 128-bit integer vector containing the differences of the values
2545 /// in the operands.
2546 static __inline__ __m128i __DEFAULT_FN_ATTRS
2547 _mm_sub_epi8(__m128i __a, __m128i __b)
2549 return (__m128i)((__v16qu)__a - (__v16qu)__b);
2552 /// \brief Subtracts the corresponding 16-bit integer values in the operands.
2554 /// \headerfile <x86intrin.h>
2556 /// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
2559 /// A 128-bit integer vector containing the minuends.
2561 /// A 128-bit integer vector containing the subtrahends.
2562 /// \returns A 128-bit integer vector containing the differences of the values
2563 /// in the operands.
2564 static __inline__ __m128i __DEFAULT_FN_ATTRS
2565 _mm_sub_epi16(__m128i __a, __m128i __b)
2567 return (__m128i)((__v8hu)__a - (__v8hu)__b);
2570 /// \brief Subtracts the corresponding 32-bit integer values in the operands.
2572 /// \headerfile <x86intrin.h>
2574 /// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
2577 /// A 128-bit integer vector containing the minuends.
2579 /// A 128-bit integer vector containing the subtrahends.
2580 /// \returns A 128-bit integer vector containing the differences of the values
2581 /// in the operands.
2582 static __inline__ __m128i __DEFAULT_FN_ATTRS
2583 _mm_sub_epi32(__m128i __a, __m128i __b)
2585 return (__m128i)((__v4su)__a - (__v4su)__b);
2588 /// \brief Subtracts signed or unsigned 64-bit integer values and writes the
2589 /// difference to the corresponding bits in the destination.
2591 /// \headerfile <x86intrin.h>
2593 /// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
2596 /// A 64-bit integer vector containing the minuend.
2598 /// A 64-bit integer vector containing the subtrahend.
2599 /// \returns A 64-bit integer vector containing the difference of the values in
2601 static __inline__ __m64 __DEFAULT_FN_ATTRS
2602 _mm_sub_si64(__m64 __a, __m64 __b)
2604 return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
2607 /// \brief Subtracts the corresponding elements of two [2 x i64] vectors.
2609 /// \headerfile <x86intrin.h>
2611 /// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
2614 /// A 128-bit integer vector containing the minuends.
2616 /// A 128-bit integer vector containing the subtrahends.
2617 /// \returns A 128-bit integer vector containing the differences of the values
2618 /// in the operands.
2619 static __inline__ __m128i __DEFAULT_FN_ATTRS
2620 _mm_sub_epi64(__m128i __a, __m128i __b)
2622 return (__m128i)((__v2du)__a - (__v2du)__b);
2625 /// \brief Subtracts corresponding 8-bit signed integer values in the input and
2626 /// returns the differences in the corresponding bytes in the destination.
2627 /// Differences greater than 7Fh are saturated to 7Fh, and differences less
2628 /// than 80h are saturated to 80h.
2630 /// \headerfile <x86intrin.h>
2632 /// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
2635 /// A 128-bit integer vector containing the minuends.
2637 /// A 128-bit integer vector containing the subtrahends.
2638 /// \returns A 128-bit integer vector containing the differences of the values
2639 /// in the operands.
2640 static __inline__ __m128i __DEFAULT_FN_ATTRS
2641 _mm_subs_epi8(__m128i __a, __m128i __b)
2643 return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
2646 /// \brief Subtracts corresponding 16-bit signed integer values in the input and
2647 /// returns the differences in the corresponding bytes in the destination.
2648 /// Differences greater than 7FFFh are saturated to 7FFFh, and values less
2649 /// than 8000h are saturated to 8000h.
2651 /// \headerfile <x86intrin.h>
2653 /// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
2656 /// A 128-bit integer vector containing the minuends.
2658 /// A 128-bit integer vector containing the subtrahends.
2659 /// \returns A 128-bit integer vector containing the differences of the values
2660 /// in the operands.
2661 static __inline__ __m128i __DEFAULT_FN_ATTRS
2662 _mm_subs_epi16(__m128i __a, __m128i __b)
2664 return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
2667 /// \brief Subtracts corresponding 8-bit unsigned integer values in the input
2668 /// and returns the differences in the corresponding bytes in the
2669 /// destination. Differences less than 00h are saturated to 00h.
2671 /// \headerfile <x86intrin.h>
2673 /// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
2676 /// A 128-bit integer vector containing the minuends.
2678 /// A 128-bit integer vector containing the subtrahends.
2679 /// \returns A 128-bit integer vector containing the unsigned integer
2680 /// differences of the values in the operands.
2681 static __inline__ __m128i __DEFAULT_FN_ATTRS
2682 _mm_subs_epu8(__m128i __a, __m128i __b)
2684 return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
2687 /// \brief Subtracts corresponding 16-bit unsigned integer values in the input
2688 /// and returns the differences in the corresponding bytes in the
2689 /// destination. Differences less than 0000h are saturated to 0000h.
2691 /// \headerfile <x86intrin.h>
2693 /// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
2696 /// A 128-bit integer vector containing the minuends.
2698 /// A 128-bit integer vector containing the subtrahends.
2699 /// \returns A 128-bit integer vector containing the unsigned integer
2700 /// differences of the values in the operands.
2701 static __inline__ __m128i __DEFAULT_FN_ATTRS
2702 _mm_subs_epu16(__m128i __a, __m128i __b)
2704 return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
2707 /// \brief Performs a bitwise AND of two 128-bit integer vectors.
2709 /// \headerfile <x86intrin.h>
2711 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
2714 /// A 128-bit integer vector containing one of the source operands.
2716 /// A 128-bit integer vector containing one of the source operands.
2717 /// \returns A 128-bit integer vector containing the bitwise AND of the values
2718 /// in both operands.
2719 static __inline__ __m128i __DEFAULT_FN_ATTRS
2720 _mm_and_si128(__m128i __a, __m128i __b)
2722 return (__m128i)((__v2du)__a & (__v2du)__b);
2725 /// \brief Performs a bitwise AND of two 128-bit integer vectors, using the
2726 /// one's complement of the values contained in the first source operand.
2728 /// \headerfile <x86intrin.h>
2730 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
2733 /// A 128-bit vector containing the left source operand. The one's complement
2734 /// of this value is used in the bitwise AND.
2736 /// A 128-bit vector containing the right source operand.
2737 /// \returns A 128-bit integer vector containing the bitwise AND of the one's
2738 /// complement of the first operand and the values in the second operand.
2739 static __inline__ __m128i __DEFAULT_FN_ATTRS
2740 _mm_andnot_si128(__m128i __a, __m128i __b)
2742 return (__m128i)(~(__v2du)__a & (__v2du)__b);
2744 /// \brief Performs a bitwise OR of two 128-bit integer vectors.
2746 /// \headerfile <x86intrin.h>
2748 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
2751 /// A 128-bit integer vector containing one of the source operands.
2753 /// A 128-bit integer vector containing one of the source operands.
2754 /// \returns A 128-bit integer vector containing the bitwise OR of the values
2755 /// in both operands.
2756 static __inline__ __m128i __DEFAULT_FN_ATTRS
2757 _mm_or_si128(__m128i __a, __m128i __b)
2759 return (__m128i)((__v2du)__a | (__v2du)__b);
2762 /// \brief Performs a bitwise exclusive OR of two 128-bit integer vectors.
2764 /// \headerfile <x86intrin.h>
2766 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
2769 /// A 128-bit integer vector containing one of the source operands.
2771 /// A 128-bit integer vector containing one of the source operands.
2772 /// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
2773 /// values in both operands.
2774 static __inline__ __m128i __DEFAULT_FN_ATTRS
2775 _mm_xor_si128(__m128i __a, __m128i __b)
2777 return (__m128i)((__v2du)__a ^ (__v2du)__b);
2780 /// \brief Left-shifts the 128-bit integer vector operand by the specified
2781 /// number of bytes. Low-order bits are cleared.
2783 /// \headerfile <x86intrin.h>
2786 /// __m128i _mm_slli_si128(__m128i a, const int imm);
2789 /// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
2792 /// A 128-bit integer vector containing the source operand.
2794 /// An immediate value specifying the number of bytes to left-shift operand
2796 /// \returns A 128-bit integer vector containing the left-shifted value.
2797 #define _mm_slli_si128(a, imm) __extension__ ({ \
2798 (__m128i)__builtin_shufflevector( \
2799 (__v16qi)_mm_setzero_si128(), \
2800 (__v16qi)(__m128i)(a), \
2801 ((char)(imm)&0xF0) ? 0 : 16 - (char)(imm), \
2802 ((char)(imm)&0xF0) ? 1 : 17 - (char)(imm), \
2803 ((char)(imm)&0xF0) ? 2 : 18 - (char)(imm), \
2804 ((char)(imm)&0xF0) ? 3 : 19 - (char)(imm), \
2805 ((char)(imm)&0xF0) ? 4 : 20 - (char)(imm), \
2806 ((char)(imm)&0xF0) ? 5 : 21 - (char)(imm), \
2807 ((char)(imm)&0xF0) ? 6 : 22 - (char)(imm), \
2808 ((char)(imm)&0xF0) ? 7 : 23 - (char)(imm), \
2809 ((char)(imm)&0xF0) ? 8 : 24 - (char)(imm), \
2810 ((char)(imm)&0xF0) ? 9 : 25 - (char)(imm), \
2811 ((char)(imm)&0xF0) ? 10 : 26 - (char)(imm), \
2812 ((char)(imm)&0xF0) ? 11 : 27 - (char)(imm), \
2813 ((char)(imm)&0xF0) ? 12 : 28 - (char)(imm), \
2814 ((char)(imm)&0xF0) ? 13 : 29 - (char)(imm), \
2815 ((char)(imm)&0xF0) ? 14 : 30 - (char)(imm), \
2816 ((char)(imm)&0xF0) ? 15 : 31 - (char)(imm)); })
2818 #define _mm_bslli_si128(a, imm) \
2819 _mm_slli_si128((a), (imm))
2821 /// \brief Left-shifts each 16-bit value in the 128-bit integer vector operand
2822 /// by the specified number of bits. Low-order bits are cleared.
2824 /// \headerfile <x86intrin.h>
2826 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2829 /// A 128-bit integer vector containing the source operand.
2831 /// An integer value specifying the number of bits to left-shift each value
2832 /// in operand \a __a.
2833 /// \returns A 128-bit integer vector containing the left-shifted values.
2834 static __inline__ __m128i __DEFAULT_FN_ATTRS
2835 _mm_slli_epi16(__m128i __a, int __count)
2837 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
2840 /// \brief Left-shifts each 16-bit value in the 128-bit integer vector operand
2841 /// by the specified number of bits. Low-order bits are cleared.
2843 /// \headerfile <x86intrin.h>
2845 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2848 /// A 128-bit integer vector containing the source operand.
2850 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2851 /// to left-shift each value in operand \a __a.
2852 /// \returns A 128-bit integer vector containing the left-shifted values.
2853 static __inline__ __m128i __DEFAULT_FN_ATTRS
2854 _mm_sll_epi16(__m128i __a, __m128i __count)
2856 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
2859 /// \brief Left-shifts each 32-bit value in the 128-bit integer vector operand
2860 /// by the specified number of bits. Low-order bits are cleared.
2862 /// \headerfile <x86intrin.h>
2864 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2867 /// A 128-bit integer vector containing the source operand.
2869 /// An integer value specifying the number of bits to left-shift each value
2870 /// in operand \a __a.
2871 /// \returns A 128-bit integer vector containing the left-shifted values.
2872 static __inline__ __m128i __DEFAULT_FN_ATTRS
2873 _mm_slli_epi32(__m128i __a, int __count)
2875 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
2878 /// \brief Left-shifts each 32-bit value in the 128-bit integer vector operand
2879 /// by the specified number of bits. Low-order bits are cleared.
2881 /// \headerfile <x86intrin.h>
2883 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2886 /// A 128-bit integer vector containing the source operand.
2888 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2889 /// to left-shift each value in operand \a __a.
2890 /// \returns A 128-bit integer vector containing the left-shifted values.
2891 static __inline__ __m128i __DEFAULT_FN_ATTRS
2892 _mm_sll_epi32(__m128i __a, __m128i __count)
2894 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
2897 /// \brief Left-shifts each 64-bit value in the 128-bit integer vector operand
2898 /// by the specified number of bits. Low-order bits are cleared.
2900 /// \headerfile <x86intrin.h>
2902 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2905 /// A 128-bit integer vector containing the source operand.
2907 /// An integer value specifying the number of bits to left-shift each value
2908 /// in operand \a __a.
2909 /// \returns A 128-bit integer vector containing the left-shifted values.
2910 static __inline__ __m128i __DEFAULT_FN_ATTRS
2911 _mm_slli_epi64(__m128i __a, int __count)
2913 return __builtin_ia32_psllqi128((__v2di)__a, __count);
2916 /// \brief Left-shifts each 64-bit value in the 128-bit integer vector operand
2917 /// by the specified number of bits. Low-order bits are cleared.
2919 /// \headerfile <x86intrin.h>
2921 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2924 /// A 128-bit integer vector containing the source operand.
2926 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2927 /// to left-shift each value in operand \a __a.
2928 /// \returns A 128-bit integer vector containing the left-shifted values.
2929 static __inline__ __m128i __DEFAULT_FN_ATTRS
2930 _mm_sll_epi64(__m128i __a, __m128i __count)
2932 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
2935 /// \brief Right-shifts each 16-bit value in the 128-bit integer vector operand
2936 /// by the specified number of bits. High-order bits are filled with the sign
2937 /// bit of the initial value.
2939 /// \headerfile <x86intrin.h>
2941 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2944 /// A 128-bit integer vector containing the source operand.
2946 /// An integer value specifying the number of bits to right-shift each value
2947 /// in operand \a __a.
2948 /// \returns A 128-bit integer vector containing the right-shifted values.
2949 static __inline__ __m128i __DEFAULT_FN_ATTRS
2950 _mm_srai_epi16(__m128i __a, int __count)
2952 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
2955 /// \brief Right-shifts each 16-bit value in the 128-bit integer vector operand
2956 /// by the specified number of bits. High-order bits are filled with the sign
2957 /// bit of the initial value.
2959 /// \headerfile <x86intrin.h>
2961 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2964 /// A 128-bit integer vector containing the source operand.
2966 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2967 /// to right-shift each value in operand \a __a.
2968 /// \returns A 128-bit integer vector containing the right-shifted values.
2969 static __inline__ __m128i __DEFAULT_FN_ATTRS
2970 _mm_sra_epi16(__m128i __a, __m128i __count)
2972 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
2975 /// \brief Right-shifts each 32-bit value in the 128-bit integer vector operand
2976 /// by the specified number of bits. High-order bits are filled with the sign
2977 /// bit of the initial value.
2979 /// \headerfile <x86intrin.h>
2981 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
2984 /// A 128-bit integer vector containing the source operand.
2986 /// An integer value specifying the number of bits to right-shift each value
2987 /// in operand \a __a.
2988 /// \returns A 128-bit integer vector containing the right-shifted values.
2989 static __inline__ __m128i __DEFAULT_FN_ATTRS
2990 _mm_srai_epi32(__m128i __a, int __count)
2992 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
2995 /// \brief Right-shifts each 32-bit value in the 128-bit integer vector operand
2996 /// by the specified number of bits. High-order bits are filled with the sign
2997 /// bit of the initial value.
2999 /// \headerfile <x86intrin.h>
3001 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
3004 /// A 128-bit integer vector containing the source operand.
3006 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3007 /// to right-shift each value in operand \a __a.
3008 /// \returns A 128-bit integer vector containing the right-shifted values.
3009 static __inline__ __m128i __DEFAULT_FN_ATTRS
3010 _mm_sra_epi32(__m128i __a, __m128i __count)
3012 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
3015 /// \brief Right-shifts the 128-bit integer vector operand by the specified
3016 /// number of bytes. High-order bits are cleared.
3018 /// \headerfile <x86intrin.h>
3021 /// __m128i _mm_srli_si128(__m128i a, const int imm);
3024 /// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
3027 /// A 128-bit integer vector containing the source operand.
3029 /// An immediate value specifying the number of bytes to right-shift operand
3031 /// \returns A 128-bit integer vector containing the right-shifted value.
3032 #define _mm_srli_si128(a, imm) __extension__ ({ \
3033 (__m128i)__builtin_shufflevector( \
3034 (__v16qi)(__m128i)(a), \
3035 (__v16qi)_mm_setzero_si128(), \
3036 ((char)(imm)&0xF0) ? 16 : (char)(imm) + 0, \
3037 ((char)(imm)&0xF0) ? 17 : (char)(imm) + 1, \
3038 ((char)(imm)&0xF0) ? 18 : (char)(imm) + 2, \
3039 ((char)(imm)&0xF0) ? 19 : (char)(imm) + 3, \
3040 ((char)(imm)&0xF0) ? 20 : (char)(imm) + 4, \
3041 ((char)(imm)&0xF0) ? 21 : (char)(imm) + 5, \
3042 ((char)(imm)&0xF0) ? 22 : (char)(imm) + 6, \
3043 ((char)(imm)&0xF0) ? 23 : (char)(imm) + 7, \
3044 ((char)(imm)&0xF0) ? 24 : (char)(imm) + 8, \
3045 ((char)(imm)&0xF0) ? 25 : (char)(imm) + 9, \
3046 ((char)(imm)&0xF0) ? 26 : (char)(imm) + 10, \
3047 ((char)(imm)&0xF0) ? 27 : (char)(imm) + 11, \
3048 ((char)(imm)&0xF0) ? 28 : (char)(imm) + 12, \
3049 ((char)(imm)&0xF0) ? 29 : (char)(imm) + 13, \
3050 ((char)(imm)&0xF0) ? 30 : (char)(imm) + 14, \
3051 ((char)(imm)&0xF0) ? 31 : (char)(imm) + 15); })
3053 #define _mm_bsrli_si128(a, imm) \
3054 _mm_srli_si128((a), (imm))
3056 /// \brief Right-shifts each of 16-bit values in the 128-bit integer vector
3057 /// operand by the specified number of bits. High-order bits are cleared.
3059 /// \headerfile <x86intrin.h>
3061 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3064 /// A 128-bit integer vector containing the source operand.
3066 /// An integer value specifying the number of bits to right-shift each value
3067 /// in operand \a __a.
3068 /// \returns A 128-bit integer vector containing the right-shifted values.
3069 static __inline__ __m128i __DEFAULT_FN_ATTRS
3070 _mm_srli_epi16(__m128i __a, int __count)
3072 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
3075 /// \brief Right-shifts each of 16-bit values in the 128-bit integer vector
3076 /// operand by the specified number of bits. High-order bits are cleared.
3078 /// \headerfile <x86intrin.h>
3080 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3083 /// A 128-bit integer vector containing the source operand.
3085 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3086 /// to right-shift each value in operand \a __a.
3087 /// \returns A 128-bit integer vector containing the right-shifted values.
3088 static __inline__ __m128i __DEFAULT_FN_ATTRS
3089 _mm_srl_epi16(__m128i __a, __m128i __count)
3091 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
3094 /// \brief Right-shifts each of 32-bit values in the 128-bit integer vector
3095 /// operand by the specified number of bits. High-order bits are cleared.
3097 /// \headerfile <x86intrin.h>
3099 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3102 /// A 128-bit integer vector containing the source operand.
3104 /// An integer value specifying the number of bits to right-shift each value
3105 /// in operand \a __a.
3106 /// \returns A 128-bit integer vector containing the right-shifted values.
3107 static __inline__ __m128i __DEFAULT_FN_ATTRS
3108 _mm_srli_epi32(__m128i __a, int __count)
3110 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
3113 /// \brief Right-shifts each of 32-bit values in the 128-bit integer vector
3114 /// operand by the specified number of bits. High-order bits are cleared.
3116 /// \headerfile <x86intrin.h>
3118 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3121 /// A 128-bit integer vector containing the source operand.
3123 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3124 /// to right-shift each value in operand \a __a.
3125 /// \returns A 128-bit integer vector containing the right-shifted values.
3126 static __inline__ __m128i __DEFAULT_FN_ATTRS
3127 _mm_srl_epi32(__m128i __a, __m128i __count)
3129 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
3132 /// \brief Right-shifts each of 64-bit values in the 128-bit integer vector
3133 /// operand by the specified number of bits. High-order bits are cleared.
3135 /// \headerfile <x86intrin.h>
3137 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3140 /// A 128-bit integer vector containing the source operand.
3142 /// An integer value specifying the number of bits to right-shift each value
3143 /// in operand \a __a.
3144 /// \returns A 128-bit integer vector containing the right-shifted values.
3145 static __inline__ __m128i __DEFAULT_FN_ATTRS
3146 _mm_srli_epi64(__m128i __a, int __count)
3148 return __builtin_ia32_psrlqi128((__v2di)__a, __count);
3151 /// \brief Right-shifts each of 64-bit values in the 128-bit integer vector
3152 /// operand by the specified number of bits. High-order bits are cleared.
3154 /// \headerfile <x86intrin.h>
3156 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3159 /// A 128-bit integer vector containing the source operand.
3161 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3162 /// to right-shift each value in operand \a __a.
3163 /// \returns A 128-bit integer vector containing the right-shifted values.
3164 static __inline__ __m128i __DEFAULT_FN_ATTRS
3165 _mm_srl_epi64(__m128i __a, __m128i __count)
3167 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
3170 /// \brief Compares each of the corresponding 8-bit values of the 128-bit
3171 /// integer vectors for equality. Each comparison yields 0h for false, FFh
3174 /// \headerfile <x86intrin.h>
3176 /// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
3179 /// A 128-bit integer vector.
3181 /// A 128-bit integer vector.
3182 /// \returns A 128-bit integer vector containing the comparison results.
3183 static __inline__ __m128i __DEFAULT_FN_ATTRS
3184 _mm_cmpeq_epi8(__m128i __a, __m128i __b)
3186 return (__m128i)((__v16qi)__a == (__v16qi)__b);
3189 /// \brief Compares each of the corresponding 16-bit values of the 128-bit
3190 /// integer vectors for equality. Each comparison yields 0h for false, FFFFh
3193 /// \headerfile <x86intrin.h>
3195 /// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
3198 /// A 128-bit integer vector.
3200 /// A 128-bit integer vector.
3201 /// \returns A 128-bit integer vector containing the comparison results.
3202 static __inline__ __m128i __DEFAULT_FN_ATTRS
3203 _mm_cmpeq_epi16(__m128i __a, __m128i __b)
3205 return (__m128i)((__v8hi)__a == (__v8hi)__b);
3208 /// \brief Compares each of the corresponding 32-bit values of the 128-bit
3209 /// integer vectors for equality. Each comparison yields 0h for false,
3210 /// FFFFFFFFh for true.
3212 /// \headerfile <x86intrin.h>
3214 /// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
3217 /// A 128-bit integer vector.
3219 /// A 128-bit integer vector.
3220 /// \returns A 128-bit integer vector containing the comparison results.
3221 static __inline__ __m128i __DEFAULT_FN_ATTRS
3222 _mm_cmpeq_epi32(__m128i __a, __m128i __b)
3224 return (__m128i)((__v4si)__a == (__v4si)__b);
3227 /// \brief Compares each of the corresponding signed 8-bit values of the 128-bit
3228 /// integer vectors to determine if the values in the first operand are
3229 /// greater than those in the second operand. Each comparison yields 0h for
3230 /// false, FFh for true.
3232 /// \headerfile <x86intrin.h>
3234 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3237 /// A 128-bit integer vector.
3239 /// A 128-bit integer vector.
3240 /// \returns A 128-bit integer vector containing the comparison results.
3241 static __inline__ __m128i __DEFAULT_FN_ATTRS
3242 _mm_cmpgt_epi8(__m128i __a, __m128i __b)
3244 /* This function always performs a signed comparison, but __v16qi is a char
3245 which may be signed or unsigned, so use __v16qs. */
3246 return (__m128i)((__v16qs)__a > (__v16qs)__b);
3249 /// \brief Compares each of the corresponding signed 16-bit values of the
3250 /// 128-bit integer vectors to determine if the values in the first operand
3251 /// are greater than those in the second operand.
3253 /// Each comparison yields 0h for false, FFFFh for true.
3255 /// \headerfile <x86intrin.h>
3257 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3260 /// A 128-bit integer vector.
3262 /// A 128-bit integer vector.
3263 /// \returns A 128-bit integer vector containing the comparison results.
3264 static __inline__ __m128i __DEFAULT_FN_ATTRS
3265 _mm_cmpgt_epi16(__m128i __a, __m128i __b)
3267 return (__m128i)((__v8hi)__a > (__v8hi)__b);
3270 /// \brief Compares each of the corresponding signed 32-bit values of the
3271 /// 128-bit integer vectors to determine if the values in the first operand
3272 /// are greater than those in the second operand.
3274 /// Each comparison yields 0h for false, FFFFFFFFh for true.
3276 /// \headerfile <x86intrin.h>
3278 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3281 /// A 128-bit integer vector.
3283 /// A 128-bit integer vector.
3284 /// \returns A 128-bit integer vector containing the comparison results.
3285 static __inline__ __m128i __DEFAULT_FN_ATTRS
3286 _mm_cmpgt_epi32(__m128i __a, __m128i __b)
3288 return (__m128i)((__v4si)__a > (__v4si)__b);
3291 /// \brief Compares each of the corresponding signed 8-bit values of the 128-bit
3292 /// integer vectors to determine if the values in the first operand are less
3293 /// than those in the second operand.
3295 /// Each comparison yields 0h for false, FFh for true.
3297 /// \headerfile <x86intrin.h>
3299 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3302 /// A 128-bit integer vector.
3304 /// A 128-bit integer vector.
3305 /// \returns A 128-bit integer vector containing the comparison results.
3306 static __inline__ __m128i __DEFAULT_FN_ATTRS
3307 _mm_cmplt_epi8(__m128i __a, __m128i __b)
3309 return _mm_cmpgt_epi8(__b, __a);
3312 /// \brief Compares each of the corresponding signed 16-bit values of the
3313 /// 128-bit integer vectors to determine if the values in the first operand
3314 /// are less than those in the second operand.
3316 /// Each comparison yields 0h for false, FFFFh for true.
3318 /// \headerfile <x86intrin.h>
3320 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3323 /// A 128-bit integer vector.
3325 /// A 128-bit integer vector.
3326 /// \returns A 128-bit integer vector containing the comparison results.
3327 static __inline__ __m128i __DEFAULT_FN_ATTRS
3328 _mm_cmplt_epi16(__m128i __a, __m128i __b)
3330 return _mm_cmpgt_epi16(__b, __a);
3333 /// \brief Compares each of the corresponding signed 32-bit values of the
3334 /// 128-bit integer vectors to determine if the values in the first operand
3335 /// are less than those in the second operand.
3337 /// Each comparison yields 0h for false, FFFFFFFFh for true.
3339 /// \headerfile <x86intrin.h>
3341 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3344 /// A 128-bit integer vector.
3346 /// A 128-bit integer vector.
3347 /// \returns A 128-bit integer vector containing the comparison results.
3348 static __inline__ __m128i __DEFAULT_FN_ATTRS
3349 _mm_cmplt_epi32(__m128i __a, __m128i __b)
3351 return _mm_cmpgt_epi32(__b, __a);
3355 /// \brief Converts a 64-bit signed integer value from the second operand into a
3356 /// double-precision value and returns it in the lower element of a [2 x
3357 /// double] vector; the upper element of the returned vector is copied from
3358 /// the upper element of the first operand.
3360 /// \headerfile <x86intrin.h>
3362 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
3365 /// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
3366 /// copied to the upper 64 bits of the destination.
3368 /// A 64-bit signed integer operand containing the value to be converted.
3369 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
3370 /// converted value of the second operand. The upper 64 bits are copied from
3371 /// the upper 64 bits of the first operand.
3372 static __inline__ __m128d __DEFAULT_FN_ATTRS
3373 _mm_cvtsi64_sd(__m128d __a, long long __b)
3379 /// \brief Converts the first (lower) element of a vector of [2 x double] into a
3380 /// 64-bit signed integer value, according to the current rounding mode.
3382 /// \headerfile <x86intrin.h>
3384 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
3387 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3389 /// \returns A 64-bit signed integer containing the converted value.
3390 static __inline__ long long __DEFAULT_FN_ATTRS
3391 _mm_cvtsd_si64(__m128d __a)
3393 return __builtin_ia32_cvtsd2si64((__v2df)__a);
3396 /// \brief Converts the first (lower) element of a vector of [2 x double] into a
3397 /// 64-bit signed integer value, truncating the result when it is inexact.
3399 /// \headerfile <x86intrin.h>
3401 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
3405 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3407 /// \returns A 64-bit signed integer containing the converted value.
3408 static __inline__ long long __DEFAULT_FN_ATTRS
3409 _mm_cvttsd_si64(__m128d __a)
3411 return __builtin_ia32_cvttsd2si64((__v2df)__a);
3415 /// \brief Converts a vector of [4 x i32] into a vector of [4 x float].
3417 /// \headerfile <x86intrin.h>
3419 /// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
3422 /// A 128-bit integer vector.
3423 /// \returns A 128-bit vector of [4 x float] containing the converted values.
3424 static __inline__ __m128 __DEFAULT_FN_ATTRS
3425 _mm_cvtepi32_ps(__m128i __a)
3427 return __builtin_ia32_cvtdq2ps((__v4si)__a);
3430 /// \brief Converts a vector of [4 x float] into a vector of [4 x i32].
3432 /// \headerfile <x86intrin.h>
3434 /// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
3437 /// A 128-bit vector of [4 x float].
3438 /// \returns A 128-bit integer vector of [4 x i32] containing the converted
3440 static __inline__ __m128i __DEFAULT_FN_ATTRS
3441 _mm_cvtps_epi32(__m128 __a)
3443 return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
3446 /// \brief Converts a vector of [4 x float] into a vector of [4 x i32],
3447 /// truncating the result when it is inexact.
3449 /// \headerfile <x86intrin.h>
3451 /// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>
3455 /// A 128-bit vector of [4 x float].
3456 /// \returns A 128-bit vector of [4 x i32] containing the converted values.
3457 static __inline__ __m128i __DEFAULT_FN_ATTRS
3458 _mm_cvttps_epi32(__m128 __a)
3460 return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
3463 /// \brief Returns a vector of [4 x i32] where the lowest element is the input
3464 /// operand and the remaining elements are zero.
3466 /// \headerfile <x86intrin.h>
3468 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3471 /// A 32-bit signed integer operand.
3472 /// \returns A 128-bit vector of [4 x i32].
3473 static __inline__ __m128i __DEFAULT_FN_ATTRS
3474 _mm_cvtsi32_si128(int __a)
3476 return (__m128i)(__v4si){ __a, 0, 0, 0 };
3480 /// \brief Returns a vector of [2 x i64] where the lower element is the input
3481 /// operand and the upper element is zero.
3483 /// \headerfile <x86intrin.h>
3485 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3488 /// A 64-bit signed integer operand containing the value to be converted.
3489 /// \returns A 128-bit vector of [2 x i64] containing the converted value.
3490 static __inline__ __m128i __DEFAULT_FN_ATTRS
3491 _mm_cvtsi64_si128(long long __a)
3493 return (__m128i){ __a, 0 };
3497 /// \brief Moves the least significant 32 bits of a vector of [4 x i32] to a
3498 /// 32-bit signed integer value.
3500 /// \headerfile <x86intrin.h>
3502 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3505 /// A vector of [4 x i32]. The least significant 32 bits are moved to the
3507 /// \returns A 32-bit signed integer containing the moved value.
3508 static __inline__ int __DEFAULT_FN_ATTRS
3509 _mm_cvtsi128_si32(__m128i __a)
3511 __v4si __b = (__v4si)__a;
3516 /// \brief Moves the least significant 64 bits of a vector of [2 x i64] to a
3517 /// 64-bit signed integer value.
3519 /// \headerfile <x86intrin.h>
3521 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3524 /// A vector of [2 x i64]. The least significant 64 bits are moved to the
3526 /// \returns A 64-bit signed integer containing the moved value.
3527 static __inline__ long long __DEFAULT_FN_ATTRS
3528 _mm_cvtsi128_si64(__m128i __a)
3534 /// \brief Moves packed integer values from an aligned 128-bit memory location
3535 /// to elements in a 128-bit integer vector.
3537 /// \headerfile <x86intrin.h>
3539 /// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
3542 /// An aligned pointer to a memory location containing integer values.
3543 /// \returns A 128-bit integer vector containing the moved values.
3544 static __inline__ __m128i __DEFAULT_FN_ATTRS
3545 _mm_load_si128(__m128i const *__p)
3550 /// \brief Moves packed integer values from an unaligned 128-bit memory location
3551 /// to elements in a 128-bit integer vector.
3553 /// \headerfile <x86intrin.h>
3555 /// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
3558 /// A pointer to a memory location containing integer values.
3559 /// \returns A 128-bit integer vector containing the moved values.
3560 static __inline__ __m128i __DEFAULT_FN_ATTRS
3561 _mm_loadu_si128(__m128i const *__p)
3563 struct __loadu_si128 {
3565 } __attribute__((__packed__, __may_alias__));
3566 return ((struct __loadu_si128*)__p)->__v;
3569 /// \brief Returns a vector of [2 x i64] where the lower element is taken from
3570 /// the lower element of the operand, and the upper element is zero.
3572 /// \headerfile <x86intrin.h>
3574 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3577 /// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
3578 /// the destination.
3579 /// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
3580 /// moved value. The higher order bits are cleared.
3581 static __inline__ __m128i __DEFAULT_FN_ATTRS
3582 _mm_loadl_epi64(__m128i const *__p)
3584 struct __mm_loadl_epi64_struct {
3586 } __attribute__((__packed__, __may_alias__));
3587 return (__m128i) { ((struct __mm_loadl_epi64_struct*)__p)->__u, 0};
3590 /// \brief Generates a 128-bit vector of [4 x i32] with unspecified content.
3591 /// This could be used as an argument to another intrinsic function where the
3592 /// argument is required but the value is not actually used.
3594 /// \headerfile <x86intrin.h>
3596 /// This intrinsic has no corresponding instruction.
3598 /// \returns A 128-bit vector of [4 x i32] with unspecified content.
3599 static __inline__ __m128i __DEFAULT_FN_ATTRS
3600 _mm_undefined_si128(void)
3602 return (__m128i)__builtin_ia32_undef128();
3605 /// \brief Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3606 /// the specified 64-bit integer values.
3608 /// \headerfile <x86intrin.h>
3610 /// This intrinsic is a utility function and does not correspond to a specific
3614 /// A 64-bit integer value used to initialize the upper 64 bits of the
3615 /// destination vector of [2 x i64].
3617 /// A 64-bit integer value used to initialize the lower 64 bits of the
3618 /// destination vector of [2 x i64].
3619 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3620 /// provided in the operands.
3621 static __inline__ __m128i __DEFAULT_FN_ATTRS
3622 _mm_set_epi64x(long long __q1, long long __q0)
3624 return (__m128i){ __q0, __q1 };
3627 /// \brief Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3628 /// the specified 64-bit integer values.
3630 /// \headerfile <x86intrin.h>
3632 /// This intrinsic is a utility function and does not correspond to a specific
3636 /// A 64-bit integer value used to initialize the upper 64 bits of the
3637 /// destination vector of [2 x i64].
3639 /// A 64-bit integer value used to initialize the lower 64 bits of the
3640 /// destination vector of [2 x i64].
3641 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3642 /// provided in the operands.
3643 static __inline__ __m128i __DEFAULT_FN_ATTRS
3644 _mm_set_epi64(__m64 __q1, __m64 __q0)
3646 return (__m128i){ (long long)__q0, (long long)__q1 };
3649 /// \brief Initializes the 32-bit values in a 128-bit vector of [4 x i32] with
3650 /// the specified 32-bit integer values.
3652 /// \headerfile <x86intrin.h>
3654 /// This intrinsic is a utility function and does not correspond to a specific
3658 /// A 32-bit integer value used to initialize bits [127:96] of the
3659 /// destination vector.
3661 /// A 32-bit integer value used to initialize bits [95:64] of the destination
3664 /// A 32-bit integer value used to initialize bits [63:32] of the destination
3667 /// A 32-bit integer value used to initialize bits [31:0] of the destination
3669 /// \returns An initialized 128-bit vector of [4 x i32] containing the values
3670 /// provided in the operands.
3671 static __inline__ __m128i __DEFAULT_FN_ATTRS
3672 _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
3674 return (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3677 /// \brief Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
3678 /// the specified 16-bit integer values.
3680 /// \headerfile <x86intrin.h>
3682 /// This intrinsic is a utility function and does not correspond to a specific
3686 /// A 16-bit integer value used to initialize bits [127:112] of the
3687 /// destination vector.
3689 /// A 16-bit integer value used to initialize bits [111:96] of the
3690 /// destination vector.
3692 /// A 16-bit integer value used to initialize bits [95:80] of the destination
3695 /// A 16-bit integer value used to initialize bits [79:64] of the destination
3698 /// A 16-bit integer value used to initialize bits [63:48] of the destination
3701 /// A 16-bit integer value used to initialize bits [47:32] of the destination
3704 /// A 16-bit integer value used to initialize bits [31:16] of the destination
3707 /// A 16-bit integer value used to initialize bits [15:0] of the destination
3709 /// \returns An initialized 128-bit vector of [8 x i16] containing the values
3710 /// provided in the operands.
3711 static __inline__ __m128i __DEFAULT_FN_ATTRS
3712 _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short __w2, short __w1, short __w0)
3714 return (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3717 /// \brief Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
3718 /// the specified 8-bit integer values.
3720 /// \headerfile <x86intrin.h>
3722 /// This intrinsic is a utility function and does not correspond to a specific
3726 /// Initializes bits [127:120] of the destination vector.
3728 /// Initializes bits [119:112] of the destination vector.
3730 /// Initializes bits [111:104] of the destination vector.
3732 /// Initializes bits [103:96] of the destination vector.
3734 /// Initializes bits [95:88] of the destination vector.
3736 /// Initializes bits [87:80] of the destination vector.
3738 /// Initializes bits [79:72] of the destination vector.
3740 /// Initializes bits [71:64] of the destination vector.
3742 /// Initializes bits [63:56] of the destination vector.
3744 /// Initializes bits [55:48] of the destination vector.
3746 /// Initializes bits [47:40] of the destination vector.
3748 /// Initializes bits [39:32] of the destination vector.
3750 /// Initializes bits [31:24] of the destination vector.
3752 /// Initializes bits [23:16] of the destination vector.
3754 /// Initializes bits [15:8] of the destination vector.
3756 /// Initializes bits [7:0] of the destination vector.
3757 /// \returns An initialized 128-bit vector of [16 x i8] containing the values
3758 /// provided in the operands.
3759 static __inline__ __m128i __DEFAULT_FN_ATTRS
3760 _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b9, char __b8, char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, char __b1, char __b0)
3762 return (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3765 /// \brief Initializes both values in a 128-bit integer vector with the
3766 /// specified 64-bit integer value.
3768 /// \headerfile <x86intrin.h>
3770 /// This intrinsic is a utility function and does not correspond to a specific
3774 /// Integer value used to initialize the elements of the destination integer
3776 /// \returns An initialized 128-bit integer vector of [2 x i64] with both
3777 /// elements containing the value provided in the operand.
3778 static __inline__ __m128i __DEFAULT_FN_ATTRS
3779 _mm_set1_epi64x(long long __q)
3781 return (__m128i){ __q, __q };
3784 /// \brief Initializes both values in a 128-bit vector of [2 x i64] with the
3785 /// specified 64-bit value.
3787 /// \headerfile <x86intrin.h>
3789 /// This intrinsic is a utility function and does not correspond to a specific
3793 /// A 64-bit value used to initialize the elements of the destination integer
3795 /// \returns An initialized 128-bit vector of [2 x i64] with all elements
3796 /// containing the value provided in the operand.
3797 static __inline__ __m128i __DEFAULT_FN_ATTRS
3798 _mm_set1_epi64(__m64 __q)
3800 return (__m128i){ (long long)__q, (long long)__q };
3803 /// \brief Initializes all values in a 128-bit vector of [4 x i32] with the
3804 /// specified 32-bit value.
3806 /// \headerfile <x86intrin.h>
3808 /// This intrinsic is a utility function and does not correspond to a specific
3812 /// A 32-bit value used to initialize the elements of the destination integer
3814 /// \returns An initialized 128-bit vector of [4 x i32] with all elements
3815 /// containing the value provided in the operand.
3816 static __inline__ __m128i __DEFAULT_FN_ATTRS
3817 _mm_set1_epi32(int __i)
3819 return (__m128i)(__v4si){ __i, __i, __i, __i };
3822 /// \brief Initializes all values in a 128-bit vector of [8 x i16] with the
3823 /// specified 16-bit value.
3825 /// \headerfile <x86intrin.h>
3827 /// This intrinsic is a utility function and does not correspond to a specific
3831 /// A 16-bit value used to initialize the elements of the destination integer
3833 /// \returns An initialized 128-bit vector of [8 x i16] with all elements
3834 /// containing the value provided in the operand.
3835 static __inline__ __m128i __DEFAULT_FN_ATTRS
3836 _mm_set1_epi16(short __w)
3838 return (__m128i)(__v8hi){ __w, __w, __w, __w, __w, __w, __w, __w };
3841 /// \brief Initializes all values in a 128-bit vector of [16 x i8] with the
3842 /// specified 8-bit value.
3844 /// \headerfile <x86intrin.h>
3846 /// This intrinsic is a utility function and does not correspond to a specific
3850 /// An 8-bit value used to initialize the elements of the destination integer
3852 /// \returns An initialized 128-bit vector of [16 x i8] with all elements
3853 /// containing the value provided in the operand.
3854 static __inline__ __m128i __DEFAULT_FN_ATTRS
3855 _mm_set1_epi8(char __b)
3857 return (__m128i)(__v16qi){ __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b };
3860 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3861 /// with the specified 64-bit integral values.
3863 /// \headerfile <x86intrin.h>
3865 /// This intrinsic does not correspond to a specific instruction.
3868 /// A 64-bit integral value used to initialize the lower 64 bits of the
3871 /// A 64-bit integral value used to initialize the upper 64 bits of the
3873 /// \returns An initialized 128-bit integer vector.
3874 static __inline__ __m128i __DEFAULT_FN_ATTRS
3875 _mm_setr_epi64(__m64 __q0, __m64 __q1)
3877 return (__m128i){ (long long)__q0, (long long)__q1 };
3880 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3881 /// with the specified 32-bit integral values.
3883 /// \headerfile <x86intrin.h>
3885 /// This intrinsic is a utility function and does not correspond to a specific
3889 /// A 32-bit integral value used to initialize bits [31:0] of the result.
3891 /// A 32-bit integral value used to initialize bits [63:32] of the result.
3893 /// A 32-bit integral value used to initialize bits [95:64] of the result.
3895 /// A 32-bit integral value used to initialize bits [127:96] of the result.
3896 /// \returns An initialized 128-bit integer vector.
3897 static __inline__ __m128i __DEFAULT_FN_ATTRS
3898 _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
3900 return (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3903 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3904 /// with the specified 16-bit integral values.
3906 /// \headerfile <x86intrin.h>
3908 /// This intrinsic is a utility function and does not correspond to a specific
3912 /// A 16-bit integral value used to initialize bits [15:0] of the result.
3914 /// A 16-bit integral value used to initialize bits [31:16] of the result.
3916 /// A 16-bit integral value used to initialize bits [47:32] of the result.
3918 /// A 16-bit integral value used to initialize bits [63:48] of the result.
3920 /// A 16-bit integral value used to initialize bits [79:64] of the result.
3922 /// A 16-bit integral value used to initialize bits [95:80] of the result.
3924 /// A 16-bit integral value used to initialize bits [111:96] of the result.
3926 /// A 16-bit integral value used to initialize bits [127:112] of the result.
3927 /// \returns An initialized 128-bit integer vector.
3928 static __inline__ __m128i __DEFAULT_FN_ATTRS
3929 _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short __w5, short __w6, short __w7)
3931 return (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3934 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3935 /// with the specified 8-bit integral values.
3937 /// \headerfile <x86intrin.h>
3939 /// This intrinsic is a utility function and does not correspond to a specific
3943 /// An 8-bit integral value used to initialize bits [7:0] of the result.
3945 /// An 8-bit integral value used to initialize bits [15:8] of the result.
3947 /// An 8-bit integral value used to initialize bits [23:16] of the result.
3949 /// An 8-bit integral value used to initialize bits [31:24] of the result.
3951 /// An 8-bit integral value used to initialize bits [39:32] of the result.
3953 /// An 8-bit integral value used to initialize bits [47:40] of the result.
3955 /// An 8-bit integral value used to initialize bits [55:48] of the result.
3957 /// An 8-bit integral value used to initialize bits [63:56] of the result.
3959 /// An 8-bit integral value used to initialize bits [71:64] of the result.
3961 /// An 8-bit integral value used to initialize bits [79:72] of the result.
3963 /// An 8-bit integral value used to initialize bits [87:80] of the result.
3965 /// An 8-bit integral value used to initialize bits [95:88] of the result.
3967 /// An 8-bit integral value used to initialize bits [103:96] of the result.
3969 /// An 8-bit integral value used to initialize bits [111:104] of the result.
3971 /// An 8-bit integral value used to initialize bits [119:112] of the result.
3973 /// An 8-bit integral value used to initialize bits [127:120] of the result.
3974 /// \returns An initialized 128-bit integer vector.
3975 static __inline__ __m128i __DEFAULT_FN_ATTRS
3976 _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, char __b6, char __b7, char __b8, char __b9, char __b10, char __b11, char __b12, char __b13, char __b14, char __b15)
3978 return (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3981 /// \brief Creates a 128-bit integer vector initialized to zero.
3983 /// \headerfile <x86intrin.h>
3985 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
3987 /// \returns An initialized 128-bit integer vector with all elements set to
3989 static __inline__ __m128i __DEFAULT_FN_ATTRS
3990 _mm_setzero_si128(void)
3992 return (__m128i){ 0LL, 0LL };
3995 /// \brief Stores a 128-bit integer vector to a memory location aligned on a
3996 /// 128-bit boundary.
3998 /// \headerfile <x86intrin.h>
4000 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
4003 /// A pointer to an aligned memory location that will receive the integer
4006 /// A 128-bit integer vector containing the values to be moved.
4007 static __inline__ void __DEFAULT_FN_ATTRS
4008 _mm_store_si128(__m128i *__p, __m128i __b)
4013 /// \brief Stores a 128-bit integer vector to an unaligned memory location.
4015 /// \headerfile <x86intrin.h>
4017 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
4020 /// A pointer to a memory location that will receive the integer values.
4022 /// A 128-bit integer vector containing the values to be moved.
4023 static __inline__ void __DEFAULT_FN_ATTRS
4024 _mm_storeu_si128(__m128i *__p, __m128i __b)
4026 struct __storeu_si128 {
4028 } __attribute__((__packed__, __may_alias__));
4029 ((struct __storeu_si128*)__p)->__v = __b;
4032 /// \brief Moves bytes selected by the mask from the first operand to the
4033 /// specified unaligned memory location. When a mask bit is 1, the
4034 /// corresponding byte is written, otherwise it is not written.
4036 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4037 /// used again soon). Exception and trap behavior for elements not selected
4038 /// for storage to memory are implementation dependent.
4040 /// \headerfile <x86intrin.h>
4042 /// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>
4046 /// A 128-bit integer vector containing the values to be moved.
4048 /// A 128-bit integer vector containing the mask. The most significant bit of
4049 /// each byte represents the mask bits.
4051 /// A pointer to an unaligned 128-bit memory location where the specified
4052 /// values are moved.
4053 static __inline__ void __DEFAULT_FN_ATTRS
4054 _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
4056 __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
4059 /// \brief Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to
4060 /// a memory location.
4062 /// \headerfile <x86intrin.h>
4064 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
4067 /// A pointer to a 64-bit memory location that will receive the lower 64 bits
4068 /// of the integer vector parameter.
4070 /// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
4071 /// value to be stored.
4072 static __inline__ void __DEFAULT_FN_ATTRS
4073 _mm_storel_epi64(__m128i *__p, __m128i __a)
4075 struct __mm_storel_epi64_struct {
4077 } __attribute__((__packed__, __may_alias__));
4078 ((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
4081 /// \brief Stores a 128-bit floating point vector of [2 x double] to a 128-bit
4082 /// aligned memory location.
4084 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4085 /// used again soon).
4087 /// \headerfile <x86intrin.h>
4089 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4092 /// A pointer to the 128-bit aligned memory location used to store the value.
4094 /// A vector of [2 x double] containing the 64-bit values to be stored.
4095 static __inline__ void __DEFAULT_FN_ATTRS
4096 _mm_stream_pd(double *__p, __m128d __a)
4098 __builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
4101 /// \brief Stores a 128-bit integer vector to a 128-bit aligned memory location.
4103 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4104 /// used again soon).
4106 /// \headerfile <x86intrin.h>
4108 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4111 /// A pointer to the 128-bit aligned memory location used to store the value.
4113 /// A 128-bit integer vector containing the values to be stored.
4114 static __inline__ void __DEFAULT_FN_ATTRS
4115 _mm_stream_si128(__m128i *__p, __m128i __a)
4117 __builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
4120 /// \brief Stores a 32-bit integer value in the specified memory location.
4122 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4123 /// used again soon).
4125 /// \headerfile <x86intrin.h>
4127 /// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
4130 /// A pointer to the 32-bit memory location used to store the value.
4132 /// A 32-bit integer containing the value to be stored.
4133 static __inline__ void __DEFAULT_FN_ATTRS
4134 _mm_stream_si32(int *__p, int __a)
4136 __builtin_ia32_movnti(__p, __a);
4140 /// \brief Stores a 64-bit integer value in the specified memory location.
4142 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4143 /// used again soon).
4145 /// \headerfile <x86intrin.h>
4147 /// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
4150 /// A pointer to the 64-bit memory location used to store the value.
4152 /// A 64-bit integer containing the value to be stored.
4153 static __inline__ void __DEFAULT_FN_ATTRS
4154 _mm_stream_si64(long long *__p, long long __a)
4156 __builtin_ia32_movnti64(__p, __a);
4160 #if defined(__cplusplus)
4164 /// \brief The cache line containing \a __p is flushed and invalidated from all
4165 /// caches in the coherency domain.
4167 /// \headerfile <x86intrin.h>
4169 /// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
4172 /// A pointer to the memory location used to identify the cache line to be
4174 void _mm_clflush(void const * __p);
4176 /// \brief Forces strong memory ordering (serialization) between load
4177 /// instructions preceding this instruction and load instructions following
4178 /// this instruction, ensuring the system completes all previous loads before
4179 /// executing subsequent loads.
4181 /// \headerfile <x86intrin.h>
4183 /// This intrinsic corresponds to the <c> LFENCE </c> instruction.
4185 void _mm_lfence(void);
4187 /// \brief Forces strong memory ordering (serialization) between load and store
4188 /// instructions preceding this instruction and load and store instructions
4189 /// following this instruction, ensuring that the system completes all
4190 /// previous memory accesses before executing subsequent memory accesses.
4192 /// \headerfile <x86intrin.h>
4194 /// This intrinsic corresponds to the <c> MFENCE </c> instruction.
4196 void _mm_mfence(void);
4198 #if defined(__cplusplus)
4202 /// \brief Converts 16-bit signed integers from both 128-bit integer vector
4203 /// operands into 8-bit signed integers, and packs the results into the
4204 /// destination. Positive values greater than 0x7F are saturated to 0x7F.
4205 /// Negative values less than 0x80 are saturated to 0x80.
4207 /// \headerfile <x86intrin.h>
4209 /// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
4212 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4213 /// a signed integer and is converted to a 8-bit signed integer with
4214 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4215 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4216 /// written to the lower 64 bits of the result.
4218 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4219 /// a signed integer and is converted to a 8-bit signed integer with
4220 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4221 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4222 /// written to the higher 64 bits of the result.
4223 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4224 static __inline__ __m128i __DEFAULT_FN_ATTRS
4225 _mm_packs_epi16(__m128i __a, __m128i __b)
4227 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
4230 /// \brief Converts 32-bit signed integers from both 128-bit integer vector
4231 /// operands into 16-bit signed integers, and packs the results into the
4232 /// destination. Positive values greater than 0x7FFF are saturated to 0x7FFF.
4233 /// Negative values less than 0x8000 are saturated to 0x8000.
4235 /// \headerfile <x86intrin.h>
4237 /// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
4240 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4241 /// a signed integer and is converted to a 16-bit signed integer with
4242 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4243 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4244 /// are written to the lower 64 bits of the result.
4246 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4247 /// a signed integer and is converted to a 16-bit signed integer with
4248 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4249 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4250 /// are written to the higher 64 bits of the result.
4251 /// \returns A 128-bit vector of [8 x i16] containing the converted values.
4252 static __inline__ __m128i __DEFAULT_FN_ATTRS
4253 _mm_packs_epi32(__m128i __a, __m128i __b)
4255 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
4258 /// \brief Converts 16-bit signed integers from both 128-bit integer vector
4259 /// operands into 8-bit unsigned integers, and packs the results into the
4260 /// destination. Values greater than 0xFF are saturated to 0xFF. Values less
4261 /// than 0x00 are saturated to 0x00.
4263 /// \headerfile <x86intrin.h>
4265 /// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
4268 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4269 /// a signed integer and is converted to an 8-bit unsigned integer with
4270 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4271 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4272 /// written to the lower 64 bits of the result.
4274 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4275 /// a signed integer and is converted to an 8-bit unsigned integer with
4276 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4277 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4278 /// written to the higher 64 bits of the result.
4279 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4280 static __inline__ __m128i __DEFAULT_FN_ATTRS
4281 _mm_packus_epi16(__m128i __a, __m128i __b)
4283 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
4286 /// \brief Extracts 16 bits from a 128-bit integer vector of [8 x i16], using
4287 /// the immediate-value parameter as a selector.
4289 /// \headerfile <x86intrin.h>
4291 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
4294 /// A 128-bit integer vector.
4296 /// An immediate value. Bits [2:0] selects values from \a __a to be assigned
4297 /// to bits[15:0] of the result. \n
4298 /// 000: assign values from bits [15:0] of \a __a. \n
4299 /// 001: assign values from bits [31:16] of \a __a. \n
4300 /// 010: assign values from bits [47:32] of \a __a. \n
4301 /// 011: assign values from bits [63:48] of \a __a. \n
4302 /// 100: assign values from bits [79:64] of \a __a. \n
4303 /// 101: assign values from bits [95:80] of \a __a. \n
4304 /// 110: assign values from bits [111:96] of \a __a. \n
4305 /// 111: assign values from bits [127:112] of \a __a.
4306 /// \returns An integer, whose lower 16 bits are selected from the 128-bit
4307 /// integer vector parameter and the remaining bits are assigned zeros.
4308 static __inline__ int __DEFAULT_FN_ATTRS
4309 _mm_extract_epi16(__m128i __a, int __imm)
4311 __v8hi __b = (__v8hi)__a;
4312 return (unsigned short)__b[__imm & 7];
4315 /// \brief Constructs a 128-bit integer vector by first making a copy of the
4316 /// 128-bit integer vector parameter, and then inserting the lower 16 bits
4317 /// of an integer parameter into an offset specified by the immediate-value
4320 /// \headerfile <x86intrin.h>
4322 /// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
4325 /// A 128-bit integer vector of [8 x i16]. This vector is copied to the
4326 /// result and then one of the eight elements in the result is replaced by
4327 /// the lower 16 bits of \a __b.
4329 /// An integer. The lower 16 bits of this parameter are written to the
4330 /// result beginning at an offset specified by \a __imm.
4332 /// An immediate value specifying the bit offset in the result at which the
4333 /// lower 16 bits of \a __b are written.
4334 /// \returns A 128-bit integer vector containing the constructed values.
4335 static __inline__ __m128i __DEFAULT_FN_ATTRS
4336 _mm_insert_epi16(__m128i __a, int __b, int __imm)
4338 __v8hi __c = (__v8hi)__a;
4339 __c[__imm & 7] = __b;
4340 return (__m128i)__c;
4343 /// \brief Copies the values of the most significant bits from each 8-bit
4344 /// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
4345 /// value, zero-extends the value, and writes it to the destination.
4347 /// \headerfile <x86intrin.h>
4349 /// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
4352 /// A 128-bit integer vector containing the values with bits to be extracted.
4353 /// \returns The most significant bits from each 8-bit element in \a __a,
4354 /// written to bits [15:0]. The other bits are assigned zeros.
4355 static __inline__ int __DEFAULT_FN_ATTRS
4356 _mm_movemask_epi8(__m128i __a)
4358 return __builtin_ia32_pmovmskb128((__v16qi)__a);
4361 /// \brief Constructs a 128-bit integer vector by shuffling four 32-bit
4362 /// elements of a 128-bit integer vector parameter, using the immediate-value
4363 /// parameter as a specifier.
4365 /// \headerfile <x86intrin.h>
4368 /// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
4371 /// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
4374 /// A 128-bit integer vector containing the values to be copied.
4376 /// An immediate value containing an 8-bit value specifying which elements to
4377 /// copy from a. The destinations within the 128-bit destination are assigned
4378 /// values as follows: \n
4379 /// Bits [1:0] are used to assign values to bits [31:0] of the result. \n
4380 /// Bits [3:2] are used to assign values to bits [63:32] of the result. \n
4381 /// Bits [5:4] are used to assign values to bits [95:64] of the result. \n
4382 /// Bits [7:6] are used to assign values to bits [127:96] of the result. \n
4383 /// Bit value assignments: \n
4384 /// 00: assign values from bits [31:0] of \a a. \n
4385 /// 01: assign values from bits [63:32] of \a a. \n
4386 /// 10: assign values from bits [95:64] of \a a. \n
4387 /// 11: assign values from bits [127:96] of \a a.
4388 /// \returns A 128-bit integer vector containing the shuffled values.
4389 #define _mm_shuffle_epi32(a, imm) __extension__ ({ \
4390 (__m128i)__builtin_shufflevector((__v4si)(__m128i)(a), \
4391 (__v4si)_mm_undefined_si128(), \
4392 ((imm) >> 0) & 0x3, ((imm) >> 2) & 0x3, \
4393 ((imm) >> 4) & 0x3, ((imm) >> 6) & 0x3); })
4395 /// \brief Constructs a 128-bit integer vector by shuffling four lower 16-bit
4396 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4397 /// value parameter as a specifier.
4399 /// \headerfile <x86intrin.h>
4402 /// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
4405 /// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
4408 /// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
4409 /// [127:64] of the result.
4411 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4412 /// Bits[1:0] are used to assign values to bits [15:0] of the result. \n
4413 /// Bits[3:2] are used to assign values to bits [31:16] of the result. \n
4414 /// Bits[5:4] are used to assign values to bits [47:32] of the result. \n
4415 /// Bits[7:6] are used to assign values to bits [63:48] of the result. \n
4416 /// Bit value assignments: \n
4417 /// 00: assign values from bits [15:0] of \a a. \n
4418 /// 01: assign values from bits [31:16] of \a a. \n
4419 /// 10: assign values from bits [47:32] of \a a. \n
4420 /// 11: assign values from bits [63:48] of \a a. \n
4421 /// \returns A 128-bit integer vector containing the shuffled values.
4422 #define _mm_shufflelo_epi16(a, imm) __extension__ ({ \
4423 (__m128i)__builtin_shufflevector((__v8hi)(__m128i)(a), \
4424 (__v8hi)_mm_undefined_si128(), \
4425 ((imm) >> 0) & 0x3, ((imm) >> 2) & 0x3, \
4426 ((imm) >> 4) & 0x3, ((imm) >> 6) & 0x3, \
4429 /// \brief Constructs a 128-bit integer vector by shuffling four upper 16-bit
4430 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4431 /// value parameter as a specifier.
4433 /// \headerfile <x86intrin.h>
4436 /// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
4439 /// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
4442 /// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
4443 /// [63:0] of the result.
4445 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4446 /// Bits[1:0] are used to assign values to bits [79:64] of the result. \n
4447 /// Bits[3:2] are used to assign values to bits [95:80] of the result. \n
4448 /// Bits[5:4] are used to assign values to bits [111:96] of the result. \n
4449 /// Bits[7:6] are used to assign values to bits [127:112] of the result. \n
4450 /// Bit value assignments: \n
4451 /// 00: assign values from bits [79:64] of \a a. \n
4452 /// 01: assign values from bits [95:80] of \a a. \n
4453 /// 10: assign values from bits [111:96] of \a a. \n
4454 /// 11: assign values from bits [127:112] of \a a. \n
4455 /// \returns A 128-bit integer vector containing the shuffled values.
4456 #define _mm_shufflehi_epi16(a, imm) __extension__ ({ \
4457 (__m128i)__builtin_shufflevector((__v8hi)(__m128i)(a), \
4458 (__v8hi)_mm_undefined_si128(), \
4460 4 + (((imm) >> 0) & 0x3), \
4461 4 + (((imm) >> 2) & 0x3), \
4462 4 + (((imm) >> 4) & 0x3), \
4463 4 + (((imm) >> 6) & 0x3)); })
4465 /// \brief Unpacks the high-order (index 8-15) values from two 128-bit vectors
4466 /// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4468 /// \headerfile <x86intrin.h>
4470 /// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>
4474 /// A 128-bit vector of [16 x i8].
4475 /// Bits [71:64] are written to bits [7:0] of the result. \n
4476 /// Bits [79:72] are written to bits [23:16] of the result. \n
4477 /// Bits [87:80] are written to bits [39:32] of the result. \n
4478 /// Bits [95:88] are written to bits [55:48] of the result. \n
4479 /// Bits [103:96] are written to bits [71:64] of the result. \n
4480 /// Bits [111:104] are written to bits [87:80] of the result. \n
4481 /// Bits [119:112] are written to bits [103:96] of the result. \n
4482 /// Bits [127:120] are written to bits [119:112] of the result.
4484 /// A 128-bit vector of [16 x i8]. \n
4485 /// Bits [71:64] are written to bits [15:8] of the result. \n
4486 /// Bits [79:72] are written to bits [31:24] of the result. \n
4487 /// Bits [87:80] are written to bits [47:40] of the result. \n
4488 /// Bits [95:88] are written to bits [63:56] of the result. \n
4489 /// Bits [103:96] are written to bits [79:72] of the result. \n
4490 /// Bits [111:104] are written to bits [95:88] of the result. \n
4491 /// Bits [119:112] are written to bits [111:104] of the result. \n
4492 /// Bits [127:120] are written to bits [127:120] of the result.
4493 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4494 static __inline__ __m128i __DEFAULT_FN_ATTRS
4495 _mm_unpackhi_epi8(__m128i __a, __m128i __b)
4497 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
4500 /// \brief Unpacks the high-order (index 4-7) values from two 128-bit vectors of
4501 /// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].
4503 /// \headerfile <x86intrin.h>
4505 /// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>
4509 /// A 128-bit vector of [8 x i16].
4510 /// Bits [79:64] are written to bits [15:0] of the result. \n
4511 /// Bits [95:80] are written to bits [47:32] of the result. \n
4512 /// Bits [111:96] are written to bits [79:64] of the result. \n
4513 /// Bits [127:112] are written to bits [111:96] of the result.
4515 /// A 128-bit vector of [8 x i16].
4516 /// Bits [79:64] are written to bits [31:16] of the result. \n
4517 /// Bits [95:80] are written to bits [63:48] of the result. \n
4518 /// Bits [111:96] are written to bits [95:80] of the result. \n
4519 /// Bits [127:112] are written to bits [127:112] of the result.
4520 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4521 static __inline__ __m128i __DEFAULT_FN_ATTRS
4522 _mm_unpackhi_epi16(__m128i __a, __m128i __b)
4524 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8+4, 5, 8+5, 6, 8+6, 7, 8+7);
4527 /// \brief Unpacks the high-order (index 2,3) values from two 128-bit vectors of
4528 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4530 /// \headerfile <x86intrin.h>
4532 /// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>
4536 /// A 128-bit vector of [4 x i32]. \n
4537 /// Bits [95:64] are written to bits [31:0] of the destination. \n
4538 /// Bits [127:96] are written to bits [95:64] of the destination.
4540 /// A 128-bit vector of [4 x i32]. \n
4541 /// Bits [95:64] are written to bits [64:32] of the destination. \n
4542 /// Bits [127:96] are written to bits [127:96] of the destination.
4543 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4544 static __inline__ __m128i __DEFAULT_FN_ATTRS
4545 _mm_unpackhi_epi32(__m128i __a, __m128i __b)
4547 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4+2, 3, 4+3);
4550 /// \brief Unpacks the high-order 64-bit elements from two 128-bit vectors of
4551 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4553 /// \headerfile <x86intrin.h>
4555 /// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>
4559 /// A 128-bit vector of [2 x i64]. \n
4560 /// Bits [127:64] are written to bits [63:0] of the destination.
4562 /// A 128-bit vector of [2 x i64]. \n
4563 /// Bits [127:64] are written to bits [127:64] of the destination.
4564 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4565 static __inline__ __m128i __DEFAULT_FN_ATTRS
4566 _mm_unpackhi_epi64(__m128i __a, __m128i __b)
4568 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
4571 /// \brief Unpacks the low-order (index 0-7) values from two 128-bit vectors of
4572 /// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4574 /// \headerfile <x86intrin.h>
4576 /// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>
4580 /// A 128-bit vector of [16 x i8]. \n
4581 /// Bits [7:0] are written to bits [7:0] of the result. \n
4582 /// Bits [15:8] are written to bits [23:16] of the result. \n
4583 /// Bits [23:16] are written to bits [39:32] of the result. \n
4584 /// Bits [31:24] are written to bits [55:48] of the result. \n
4585 /// Bits [39:32] are written to bits [71:64] of the result. \n
4586 /// Bits [47:40] are written to bits [87:80] of the result. \n
4587 /// Bits [55:48] are written to bits [103:96] of the result. \n
4588 /// Bits [63:56] are written to bits [119:112] of the result.
4590 /// A 128-bit vector of [16 x i8].
4591 /// Bits [7:0] are written to bits [15:8] of the result. \n
4592 /// Bits [15:8] are written to bits [31:24] of the result. \n
4593 /// Bits [23:16] are written to bits [47:40] of the result. \n
4594 /// Bits [31:24] are written to bits [63:56] of the result. \n
4595 /// Bits [39:32] are written to bits [79:72] of the result. \n
4596 /// Bits [47:40] are written to bits [95:88] of the result. \n
4597 /// Bits [55:48] are written to bits [111:104] of the result. \n
4598 /// Bits [63:56] are written to bits [127:120] of the result.
4599 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4600 static __inline__ __m128i __DEFAULT_FN_ATTRS
4601 _mm_unpacklo_epi8(__m128i __a, __m128i __b)
4603 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7);
4606 /// \brief Unpacks the low-order (index 0-3) values from each of the two 128-bit
4607 /// vectors of [8 x i16] and interleaves them into a 128-bit vector of
4610 /// \headerfile <x86intrin.h>
4612 /// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>
4616 /// A 128-bit vector of [8 x i16].
4617 /// Bits [15:0] are written to bits [15:0] of the result. \n
4618 /// Bits [31:16] are written to bits [47:32] of the result. \n
4619 /// Bits [47:32] are written to bits [79:64] of the result. \n
4620 /// Bits [63:48] are written to bits [111:96] of the result.
4622 /// A 128-bit vector of [8 x i16].
4623 /// Bits [15:0] are written to bits [31:16] of the result. \n
4624 /// Bits [31:16] are written to bits [63:48] of the result. \n
4625 /// Bits [47:32] are written to bits [95:80] of the result. \n
4626 /// Bits [63:48] are written to bits [127:112] of the result.
4627 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4628 static __inline__ __m128i __DEFAULT_FN_ATTRS
4629 _mm_unpacklo_epi16(__m128i __a, __m128i __b)
4631 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8+0, 1, 8+1, 2, 8+2, 3, 8+3);
4634 /// \brief Unpacks the low-order (index 0,1) values from two 128-bit vectors of
4635 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4637 /// \headerfile <x86intrin.h>
4639 /// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>
4643 /// A 128-bit vector of [4 x i32]. \n
4644 /// Bits [31:0] are written to bits [31:0] of the destination. \n
4645 /// Bits [63:32] are written to bits [95:64] of the destination.
4647 /// A 128-bit vector of [4 x i32]. \n
4648 /// Bits [31:0] are written to bits [64:32] of the destination. \n
4649 /// Bits [63:32] are written to bits [127:96] of the destination.
4650 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4651 static __inline__ __m128i __DEFAULT_FN_ATTRS
4652 _mm_unpacklo_epi32(__m128i __a, __m128i __b)
4654 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4+0, 1, 4+1);
4657 /// \brief Unpacks the low-order 64-bit elements from two 128-bit vectors of
4658 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4660 /// \headerfile <x86intrin.h>
4662 /// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
4666 /// A 128-bit vector of [2 x i64]. \n
4667 /// Bits [63:0] are written to bits [63:0] of the destination. \n
4669 /// A 128-bit vector of [2 x i64]. \n
4670 /// Bits [63:0] are written to bits [127:64] of the destination. \n
4671 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4672 static __inline__ __m128i __DEFAULT_FN_ATTRS
4673 _mm_unpacklo_epi64(__m128i __a, __m128i __b)
4675 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
4678 /// \brief Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
4681 /// \headerfile <x86intrin.h>
4683 /// This intrinsic corresponds to the <c> MOVDQ2Q </c> instruction.
4686 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4688 /// \returns A 64-bit integer containing the lower 64 bits of the parameter.
4689 static __inline__ __m64 __DEFAULT_FN_ATTRS
4690 _mm_movepi64_pi64(__m128i __a)
4692 return (__m64)__a[0];
4695 /// \brief Moves the 64-bit operand to a 128-bit integer vector, zeroing the
4698 /// \headerfile <x86intrin.h>
4700 /// This intrinsic corresponds to the <c> MOVD+VMOVQ </c> instruction.
4704 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4705 /// the operand. The upper 64 bits are assigned zeros.
4706 static __inline__ __m128i __DEFAULT_FN_ATTRS
4707 _mm_movpi64_epi64(__m64 __a)
4709 return (__m128i){ (long long)__a, 0 };
4712 /// \brief Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
4713 /// integer vector, zeroing the upper bits.
4715 /// \headerfile <x86intrin.h>
4717 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4720 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4722 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4723 /// the operand. The upper 64 bits are assigned zeros.
4724 static __inline__ __m128i __DEFAULT_FN_ATTRS
4725 _mm_move_epi64(__m128i __a)
4727 return __builtin_shufflevector((__v2di)__a, (__m128i){ 0 }, 0, 2);
4730 /// \brief Unpacks the high-order 64-bit elements from two 128-bit vectors of
4731 /// [2 x double] and interleaves them into a 128-bit vector of [2 x
4734 /// \headerfile <x86intrin.h>
4736 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
4739 /// A 128-bit vector of [2 x double]. \n
4740 /// Bits [127:64] are written to bits [63:0] of the destination.
4742 /// A 128-bit vector of [2 x double]. \n
4743 /// Bits [127:64] are written to bits [127:64] of the destination.
4744 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4745 static __inline__ __m128d __DEFAULT_FN_ATTRS
4746 _mm_unpackhi_pd(__m128d __a, __m128d __b)
4748 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
4751 /// \brief Unpacks the low-order 64-bit elements from two 128-bit vectors
4752 /// of [2 x double] and interleaves them into a 128-bit vector of [2 x
4755 /// \headerfile <x86intrin.h>
4757 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
4760 /// A 128-bit vector of [2 x double]. \n
4761 /// Bits [63:0] are written to bits [63:0] of the destination.
4763 /// A 128-bit vector of [2 x double]. \n
4764 /// Bits [63:0] are written to bits [127:64] of the destination.
4765 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4766 static __inline__ __m128d __DEFAULT_FN_ATTRS
4767 _mm_unpacklo_pd(__m128d __a, __m128d __b)
4769 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
4772 /// \brief Extracts the sign bits of the double-precision values in the 128-bit
4773 /// vector of [2 x double], zero-extends the value, and writes it to the
4774 /// low-order bits of the destination.
4776 /// \headerfile <x86intrin.h>
4778 /// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
4781 /// A 128-bit vector of [2 x double] containing the values with sign bits to
4783 /// \returns The sign bits from each of the double-precision elements in \a __a,
4784 /// written to bits [1:0]. The remaining bits are assigned values of zero.
4785 static __inline__ int __DEFAULT_FN_ATTRS
4786 _mm_movemask_pd(__m128d __a)
4788 return __builtin_ia32_movmskpd((__v2df)__a);
4792 /// \brief Constructs a 128-bit floating-point vector of [2 x double] from two
4793 /// 128-bit vector parameters of [2 x double], using the immediate-value
4794 /// parameter as a specifier.
4796 /// \headerfile <x86intrin.h>
4799 /// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
4802 /// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
4805 /// A 128-bit vector of [2 x double].
4807 /// A 128-bit vector of [2 x double].
4809 /// An 8-bit immediate value. The least significant two bits specify which
4810 /// elements to copy from \a a and \a b: \n
4811 /// Bit[0] = 0: lower element of \a a copied to lower element of result. \n
4812 /// Bit[0] = 1: upper element of \a a copied to lower element of result. \n
4813 /// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
4814 /// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
4815 /// \returns A 128-bit vector of [2 x double] containing the shuffled values.
4816 #define _mm_shuffle_pd(a, b, i) __extension__ ({ \
4817 (__m128d)__builtin_shufflevector((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
4818 0 + (((i) >> 0) & 0x1), \
4819 2 + (((i) >> 1) & 0x1)); })
4821 /// \brief Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4822 /// floating-point vector of [4 x float].
4824 /// \headerfile <x86intrin.h>
4826 /// This intrinsic has no corresponding instruction.
4829 /// A 128-bit floating-point vector of [2 x double].
4830 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4831 /// bitwise pattern as the parameter.
4832 static __inline__ __m128 __DEFAULT_FN_ATTRS
4833 _mm_castpd_ps(__m128d __a)
4838 /// \brief Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4841 /// \headerfile <x86intrin.h>
4843 /// This intrinsic has no corresponding instruction.
4846 /// A 128-bit floating-point vector of [2 x double].
4847 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4849 static __inline__ __m128i __DEFAULT_FN_ATTRS
4850 _mm_castpd_si128(__m128d __a)
4852 return (__m128i)__a;
4855 /// \brief Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4856 /// floating-point vector of [2 x double].
4858 /// \headerfile <x86intrin.h>
4860 /// This intrinsic has no corresponding instruction.
4863 /// A 128-bit floating-point vector of [4 x float].
4864 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4865 /// bitwise pattern as the parameter.
4866 static __inline__ __m128d __DEFAULT_FN_ATTRS
4867 _mm_castps_pd(__m128 __a)
4869 return (__m128d)__a;
4872 /// \brief Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4875 /// \headerfile <x86intrin.h>
4877 /// This intrinsic has no corresponding instruction.
4880 /// A 128-bit floating-point vector of [4 x float].
4881 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4883 static __inline__ __m128i __DEFAULT_FN_ATTRS
4884 _mm_castps_si128(__m128 __a)
4886 return (__m128i)__a;
4889 /// \brief Casts a 128-bit integer vector into a 128-bit floating-point vector
4892 /// \headerfile <x86intrin.h>
4894 /// This intrinsic has no corresponding instruction.
4897 /// A 128-bit integer vector.
4898 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4899 /// bitwise pattern as the parameter.
4900 static __inline__ __m128 __DEFAULT_FN_ATTRS
4901 _mm_castsi128_ps(__m128i __a)
4906 /// \brief Casts a 128-bit integer vector into a 128-bit floating-point vector
4907 /// of [2 x double].
4909 /// \headerfile <x86intrin.h>
4911 /// This intrinsic has no corresponding instruction.
4914 /// A 128-bit integer vector.
4915 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4916 /// bitwise pattern as the parameter.
4917 static __inline__ __m128d __DEFAULT_FN_ATTRS
4918 _mm_castsi128_pd(__m128i __a)
4920 return (__m128d)__a;
4923 #if defined(__cplusplus)
4927 /// \brief Indicates that a spin loop is being executed for the purposes of
4928 /// optimizing power consumption during the loop.
4930 /// \headerfile <x86intrin.h>
4932 /// This intrinsic corresponds to the <c> PAUSE </c> instruction.
4934 void _mm_pause(void);
4936 #if defined(__cplusplus)
4939 #undef __DEFAULT_FN_ATTRS
4941 #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
4943 #define _MM_DENORMALS_ZERO_ON (0x0040)
4944 #define _MM_DENORMALS_ZERO_OFF (0x0000)
4946 #define _MM_DENORMALS_ZERO_MASK (0x0040)
4948 #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
4949 #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
4951 #endif /* __EMMINTRIN_H */