1 /*===---- emmintrin.h - SSE2 intrinsics ------------------------------------===
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27 #include <xmmintrin.h>
29 typedef double __m128d __attribute__((__vector_size__(16)));
30 typedef long long __m128i __attribute__((__vector_size__(16)));
33 typedef double __v2df __attribute__ ((__vector_size__ (16)));
34 typedef long long __v2di __attribute__ ((__vector_size__ (16)));
35 typedef short __v8hi __attribute__((__vector_size__(16)));
36 typedef char __v16qi __attribute__((__vector_size__(16)));
39 typedef unsigned long long __v2du __attribute__ ((__vector_size__ (16)));
40 typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
41 typedef unsigned char __v16qu __attribute__((__vector_size__(16)));
43 /* We need an explicitly signed variant for char. Note that this shouldn't
44 * appear in the interface though. */
45 typedef signed char __v16qs __attribute__((__vector_size__(16)));
47 #include <f16cintrin.h>
49 /* Define the default attributes for the functions in this file. */
50 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2")))
52 /// \brief Adds lower double-precision values in both operands and returns the
53 /// sum in the lower 64 bits of the result. The upper 64 bits of the result
54 /// are copied from the upper double-precision value of the first operand.
56 /// \headerfile <x86intrin.h>
58 /// This intrinsic corresponds to the <c> VADDSD / ADDSD </c> instruction.
61 /// A 128-bit vector of [2 x double] containing one of the source operands.
63 /// A 128-bit vector of [2 x double] containing one of the source operands.
64 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
65 /// sum of the lower 64 bits of both operands. The upper 64 bits are copied
66 /// from the upper 64 bits of the first source operand.
67 static __inline__ __m128d __DEFAULT_FN_ATTRS
68 _mm_add_sd(__m128d __a, __m128d __b)
74 /// \brief Adds two 128-bit vectors of [2 x double].
76 /// \headerfile <x86intrin.h>
78 /// This intrinsic corresponds to the <c> VADDPD / ADDPD </c> instruction.
81 /// A 128-bit vector of [2 x double] containing one of the source operands.
83 /// A 128-bit vector of [2 x double] containing one of the source operands.
84 /// \returns A 128-bit vector of [2 x double] containing the sums of both
86 static __inline__ __m128d __DEFAULT_FN_ATTRS
87 _mm_add_pd(__m128d __a, __m128d __b)
89 return (__m128d)((__v2df)__a + (__v2df)__b);
92 /// \brief Subtracts the lower double-precision value of the second operand
93 /// from the lower double-precision value of the first operand and returns
94 /// the difference in the lower 64 bits of the result. The upper 64 bits of
95 /// the result are copied from the upper double-precision value of the first
98 /// \headerfile <x86intrin.h>
100 /// This intrinsic corresponds to the <c> VSUBSD / SUBSD </c> instruction.
103 /// A 128-bit vector of [2 x double] containing the minuend.
105 /// A 128-bit vector of [2 x double] containing the subtrahend.
106 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
107 /// difference of the lower 64 bits of both operands. The upper 64 bits are
108 /// copied from the upper 64 bits of the first source operand.
109 static __inline__ __m128d __DEFAULT_FN_ATTRS
110 _mm_sub_sd(__m128d __a, __m128d __b)
116 /// \brief Subtracts two 128-bit vectors of [2 x double].
118 /// \headerfile <x86intrin.h>
120 /// This intrinsic corresponds to the <c> VSUBPD / SUBPD </c> instruction.
123 /// A 128-bit vector of [2 x double] containing the minuend.
125 /// A 128-bit vector of [2 x double] containing the subtrahend.
126 /// \returns A 128-bit vector of [2 x double] containing the differences between
128 static __inline__ __m128d __DEFAULT_FN_ATTRS
129 _mm_sub_pd(__m128d __a, __m128d __b)
131 return (__m128d)((__v2df)__a - (__v2df)__b);
134 /// \brief Multiplies lower double-precision values in both operands and returns
135 /// the product in the lower 64 bits of the result. The upper 64 bits of the
136 /// result are copied from the upper double-precision value of the first
139 /// \headerfile <x86intrin.h>
141 /// This intrinsic corresponds to the <c> VMULSD / MULSD </c> instruction.
144 /// A 128-bit vector of [2 x double] containing one of the source operands.
146 /// A 128-bit vector of [2 x double] containing one of the source operands.
147 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
148 /// product of the lower 64 bits of both operands. The upper 64 bits are
149 /// copied from the upper 64 bits of the first source operand.
150 static __inline__ __m128d __DEFAULT_FN_ATTRS
151 _mm_mul_sd(__m128d __a, __m128d __b)
157 /// \brief Multiplies two 128-bit vectors of [2 x double].
159 /// \headerfile <x86intrin.h>
161 /// This intrinsic corresponds to the <c> VMULPD / MULPD </c> instruction.
164 /// A 128-bit vector of [2 x double] containing one of the operands.
166 /// A 128-bit vector of [2 x double] containing one of the operands.
167 /// \returns A 128-bit vector of [2 x double] containing the products of both
169 static __inline__ __m128d __DEFAULT_FN_ATTRS
170 _mm_mul_pd(__m128d __a, __m128d __b)
172 return (__m128d)((__v2df)__a * (__v2df)__b);
175 /// \brief Divides the lower double-precision value of the first operand by the
176 /// lower double-precision value of the second operand and returns the
177 /// quotient in the lower 64 bits of the result. The upper 64 bits of the
178 /// result are copied from the upper double-precision value of the first
181 /// \headerfile <x86intrin.h>
183 /// This intrinsic corresponds to the <c> VDIVSD / DIVSD </c> instruction.
186 /// A 128-bit vector of [2 x double] containing the dividend.
188 /// A 128-bit vector of [2 x double] containing divisor.
189 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
190 /// quotient of the lower 64 bits of both operands. The upper 64 bits are
191 /// copied from the upper 64 bits of the first source operand.
192 static __inline__ __m128d __DEFAULT_FN_ATTRS
193 _mm_div_sd(__m128d __a, __m128d __b)
199 /// \brief Performs an element-by-element division of two 128-bit vectors of
202 /// \headerfile <x86intrin.h>
204 /// This intrinsic corresponds to the <c> VDIVPD / DIVPD </c> instruction.
207 /// A 128-bit vector of [2 x double] containing the dividend.
209 /// A 128-bit vector of [2 x double] containing the divisor.
210 /// \returns A 128-bit vector of [2 x double] containing the quotients of both
212 static __inline__ __m128d __DEFAULT_FN_ATTRS
213 _mm_div_pd(__m128d __a, __m128d __b)
215 return (__m128d)((__v2df)__a / (__v2df)__b);
218 /// \brief Calculates the square root of the lower double-precision value of
219 /// the second operand and returns it in the lower 64 bits of the result.
220 /// The upper 64 bits of the result are copied from the upper double-
221 /// precision value of the first operand.
223 /// \headerfile <x86intrin.h>
225 /// This intrinsic corresponds to the <c> VSQRTSD / SQRTSD </c> instruction.
228 /// A 128-bit vector of [2 x double] containing one of the operands. The
229 /// upper 64 bits of this operand are copied to the upper 64 bits of the
232 /// A 128-bit vector of [2 x double] containing one of the operands. The
233 /// square root is calculated using the lower 64 bits of this operand.
234 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
235 /// square root of the lower 64 bits of operand \a __b, and whose upper 64
236 /// bits are copied from the upper 64 bits of operand \a __a.
237 static __inline__ __m128d __DEFAULT_FN_ATTRS
238 _mm_sqrt_sd(__m128d __a, __m128d __b)
240 __m128d __c = __builtin_ia32_sqrtsd((__v2df)__b);
241 return (__m128d) { __c[0], __a[1] };
244 /// \brief Calculates the square root of the each of two values stored in a
245 /// 128-bit vector of [2 x double].
247 /// \headerfile <x86intrin.h>
249 /// This intrinsic corresponds to the <c> VSQRTPD / SQRTPD </c> instruction.
252 /// A 128-bit vector of [2 x double].
253 /// \returns A 128-bit vector of [2 x double] containing the square roots of the
254 /// values in the operand.
255 static __inline__ __m128d __DEFAULT_FN_ATTRS
256 _mm_sqrt_pd(__m128d __a)
258 return __builtin_ia32_sqrtpd((__v2df)__a);
261 /// \brief Compares lower 64-bit double-precision values of both operands, and
262 /// returns the lesser of the pair of values in the lower 64-bits of the
263 /// result. The upper 64 bits of the result are copied from the upper double-
264 /// precision value of the first operand.
266 /// \headerfile <x86intrin.h>
268 /// This intrinsic corresponds to the <c> VMINSD / MINSD </c> instruction.
271 /// A 128-bit vector of [2 x double] containing one of the operands. The
272 /// lower 64 bits of this operand are used in the comparison.
274 /// A 128-bit vector of [2 x double] containing one of the operands. The
275 /// lower 64 bits of this operand are used in the comparison.
276 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
277 /// minimum value between both operands. The upper 64 bits are copied from
278 /// the upper 64 bits of the first source operand.
279 static __inline__ __m128d __DEFAULT_FN_ATTRS
280 _mm_min_sd(__m128d __a, __m128d __b)
282 return __builtin_ia32_minsd((__v2df)__a, (__v2df)__b);
285 /// \brief Performs element-by-element comparison of the two 128-bit vectors of
286 /// [2 x double] and returns the vector containing the lesser of each pair of
289 /// \headerfile <x86intrin.h>
291 /// This intrinsic corresponds to the <c> VMINPD / MINPD </c> instruction.
294 /// A 128-bit vector of [2 x double] containing one of the operands.
296 /// A 128-bit vector of [2 x double] containing one of the operands.
297 /// \returns A 128-bit vector of [2 x double] containing the minimum values
298 /// between both operands.
299 static __inline__ __m128d __DEFAULT_FN_ATTRS
300 _mm_min_pd(__m128d __a, __m128d __b)
302 return __builtin_ia32_minpd((__v2df)__a, (__v2df)__b);
305 /// \brief Compares lower 64-bits double-precision values of both operands, and
306 /// returns the greater of the pair of values in the lower 64-bits of the
307 /// result. The upper 64 bits of the result are copied from the upper double-
308 /// precision value of the first operand.
310 /// \headerfile <x86intrin.h>
312 /// This intrinsic corresponds to the <c> VMAXSD / MAXSD </c> instruction.
315 /// A 128-bit vector of [2 x double] containing one of the operands. The
316 /// lower 64 bits of this operand are used in the comparison.
318 /// A 128-bit vector of [2 x double] containing one of the operands. The
319 /// lower 64 bits of this operand are used in the comparison.
320 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
321 /// maximum value between both operands. The upper 64 bits are copied from
322 /// the upper 64 bits of the first source operand.
323 static __inline__ __m128d __DEFAULT_FN_ATTRS
324 _mm_max_sd(__m128d __a, __m128d __b)
326 return __builtin_ia32_maxsd((__v2df)__a, (__v2df)__b);
329 /// \brief Performs element-by-element comparison of the two 128-bit vectors of
330 /// [2 x double] and returns the vector containing the greater of each pair
333 /// \headerfile <x86intrin.h>
335 /// This intrinsic corresponds to the <c> VMAXPD / MAXPD </c> instruction.
338 /// A 128-bit vector of [2 x double] containing one of the operands.
340 /// A 128-bit vector of [2 x double] containing one of the operands.
341 /// \returns A 128-bit vector of [2 x double] containing the maximum values
342 /// between both operands.
343 static __inline__ __m128d __DEFAULT_FN_ATTRS
344 _mm_max_pd(__m128d __a, __m128d __b)
346 return __builtin_ia32_maxpd((__v2df)__a, (__v2df)__b);
349 /// \brief Performs a bitwise AND of two 128-bit vectors of [2 x double].
351 /// \headerfile <x86intrin.h>
353 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
356 /// A 128-bit vector of [2 x double] containing one of the source operands.
358 /// A 128-bit vector of [2 x double] containing one of the source operands.
359 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
360 /// values between both operands.
361 static __inline__ __m128d __DEFAULT_FN_ATTRS
362 _mm_and_pd(__m128d __a, __m128d __b)
364 return (__m128d)((__v2du)__a & (__v2du)__b);
367 /// \brief Performs a bitwise AND of two 128-bit vectors of [2 x double], using
368 /// the one's complement of the values contained in the first source operand.
370 /// \headerfile <x86intrin.h>
372 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
375 /// A 128-bit vector of [2 x double] containing the left source operand. The
376 /// one's complement of this value is used in the bitwise AND.
378 /// A 128-bit vector of [2 x double] containing the right source operand.
379 /// \returns A 128-bit vector of [2 x double] containing the bitwise AND of the
380 /// values in the second operand and the one's complement of the first
382 static __inline__ __m128d __DEFAULT_FN_ATTRS
383 _mm_andnot_pd(__m128d __a, __m128d __b)
385 return (__m128d)(~(__v2du)__a & (__v2du)__b);
388 /// \brief Performs a bitwise OR of two 128-bit vectors of [2 x double].
390 /// \headerfile <x86intrin.h>
392 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
395 /// A 128-bit vector of [2 x double] containing one of the source operands.
397 /// A 128-bit vector of [2 x double] containing one of the source operands.
398 /// \returns A 128-bit vector of [2 x double] containing the bitwise OR of the
399 /// values between both operands.
400 static __inline__ __m128d __DEFAULT_FN_ATTRS
401 _mm_or_pd(__m128d __a, __m128d __b)
403 return (__m128d)((__v2du)__a | (__v2du)__b);
406 /// \brief Performs a bitwise XOR of two 128-bit vectors of [2 x double].
408 /// \headerfile <x86intrin.h>
410 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
413 /// A 128-bit vector of [2 x double] containing one of the source operands.
415 /// A 128-bit vector of [2 x double] containing one of the source operands.
416 /// \returns A 128-bit vector of [2 x double] containing the bitwise XOR of the
417 /// values between both operands.
418 static __inline__ __m128d __DEFAULT_FN_ATTRS
419 _mm_xor_pd(__m128d __a, __m128d __b)
421 return (__m128d)((__v2du)__a ^ (__v2du)__b);
424 /// \brief Compares each of the corresponding double-precision values of the
425 /// 128-bit vectors of [2 x double] for equality. Each comparison yields 0h
426 /// for false, FFFFFFFFFFFFFFFFh for true.
428 /// \headerfile <x86intrin.h>
430 /// This intrinsic corresponds to the <c> VCMPEQPD / CMPEQPD </c> instruction.
433 /// A 128-bit vector of [2 x double].
435 /// A 128-bit vector of [2 x double].
436 /// \returns A 128-bit vector containing the comparison results.
437 static __inline__ __m128d __DEFAULT_FN_ATTRS
438 _mm_cmpeq_pd(__m128d __a, __m128d __b)
440 return (__m128d)__builtin_ia32_cmpeqpd((__v2df)__a, (__v2df)__b);
443 /// \brief Compares each of the corresponding double-precision values of the
444 /// 128-bit vectors of [2 x double] to determine if the values in the first
445 /// operand are less than those in the second operand. Each comparison
446 /// yields 0h for false, FFFFFFFFFFFFFFFFh for true.
448 /// \headerfile <x86intrin.h>
450 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
453 /// A 128-bit vector of [2 x double].
455 /// A 128-bit vector of [2 x double].
456 /// \returns A 128-bit vector containing the comparison results.
457 static __inline__ __m128d __DEFAULT_FN_ATTRS
458 _mm_cmplt_pd(__m128d __a, __m128d __b)
460 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__a, (__v2df)__b);
463 /// \brief Compares each of the corresponding double-precision values of the
464 /// 128-bit vectors of [2 x double] to determine if the values in the first
465 /// operand are less than or equal to those in the second operand.
467 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
469 /// \headerfile <x86intrin.h>
471 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
474 /// A 128-bit vector of [2 x double].
476 /// A 128-bit vector of [2 x double].
477 /// \returns A 128-bit vector containing the comparison results.
478 static __inline__ __m128d __DEFAULT_FN_ATTRS
479 _mm_cmple_pd(__m128d __a, __m128d __b)
481 return (__m128d)__builtin_ia32_cmplepd((__v2df)__a, (__v2df)__b);
484 /// \brief Compares each of the corresponding double-precision values of the
485 /// 128-bit vectors of [2 x double] to determine if the values in the first
486 /// operand are greater than those in the second operand.
488 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
490 /// \headerfile <x86intrin.h>
492 /// This intrinsic corresponds to the <c> VCMPLTPD / CMPLTPD </c> instruction.
495 /// A 128-bit vector of [2 x double].
497 /// A 128-bit vector of [2 x double].
498 /// \returns A 128-bit vector containing the comparison results.
499 static __inline__ __m128d __DEFAULT_FN_ATTRS
500 _mm_cmpgt_pd(__m128d __a, __m128d __b)
502 return (__m128d)__builtin_ia32_cmpltpd((__v2df)__b, (__v2df)__a);
505 /// \brief Compares each of the corresponding double-precision values of the
506 /// 128-bit vectors of [2 x double] to determine if the values in the first
507 /// operand are greater than or equal to those in the second operand.
509 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
511 /// \headerfile <x86intrin.h>
513 /// This intrinsic corresponds to the <c> VCMPLEPD / CMPLEPD </c> instruction.
516 /// A 128-bit vector of [2 x double].
518 /// A 128-bit vector of [2 x double].
519 /// \returns A 128-bit vector containing the comparison results.
520 static __inline__ __m128d __DEFAULT_FN_ATTRS
521 _mm_cmpge_pd(__m128d __a, __m128d __b)
523 return (__m128d)__builtin_ia32_cmplepd((__v2df)__b, (__v2df)__a);
526 /// \brief Compares each of the corresponding double-precision values of the
527 /// 128-bit vectors of [2 x double] to determine if the values in the first
528 /// operand are ordered with respect to those in the second operand.
530 /// A pair of double-precision values are "ordered" with respect to each
531 /// other if neither value is a NaN. Each comparison yields 0h for false,
532 /// FFFFFFFFFFFFFFFFh for true.
534 /// \headerfile <x86intrin.h>
536 /// This intrinsic corresponds to the <c> VCMPORDPD / CMPORDPD </c> instruction.
539 /// A 128-bit vector of [2 x double].
541 /// A 128-bit vector of [2 x double].
542 /// \returns A 128-bit vector containing the comparison results.
543 static __inline__ __m128d __DEFAULT_FN_ATTRS
544 _mm_cmpord_pd(__m128d __a, __m128d __b)
546 return (__m128d)__builtin_ia32_cmpordpd((__v2df)__a, (__v2df)__b);
549 /// \brief Compares each of the corresponding double-precision values of the
550 /// 128-bit vectors of [2 x double] to determine if the values in the first
551 /// operand are unordered with respect to those in the second operand.
553 /// A pair of double-precision values are "unordered" with respect to each
554 /// other if one or both values are NaN. Each comparison yields 0h for false,
555 /// FFFFFFFFFFFFFFFFh for true.
557 /// \headerfile <x86intrin.h>
559 /// This intrinsic corresponds to the <c> VCMPUNORDPD / CMPUNORDPD </c>
563 /// A 128-bit vector of [2 x double].
565 /// A 128-bit vector of [2 x double].
566 /// \returns A 128-bit vector containing the comparison results.
567 static __inline__ __m128d __DEFAULT_FN_ATTRS
568 _mm_cmpunord_pd(__m128d __a, __m128d __b)
570 return (__m128d)__builtin_ia32_cmpunordpd((__v2df)__a, (__v2df)__b);
573 /// \brief Compares each of the corresponding double-precision values of the
574 /// 128-bit vectors of [2 x double] to determine if the values in the first
575 /// operand are unequal to those in the second operand.
577 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
579 /// \headerfile <x86intrin.h>
581 /// This intrinsic corresponds to the <c> VCMPNEQPD / CMPNEQPD </c> instruction.
584 /// A 128-bit vector of [2 x double].
586 /// A 128-bit vector of [2 x double].
587 /// \returns A 128-bit vector containing the comparison results.
588 static __inline__ __m128d __DEFAULT_FN_ATTRS
589 _mm_cmpneq_pd(__m128d __a, __m128d __b)
591 return (__m128d)__builtin_ia32_cmpneqpd((__v2df)__a, (__v2df)__b);
594 /// \brief Compares each of the corresponding double-precision values of the
595 /// 128-bit vectors of [2 x double] to determine if the values in the first
596 /// operand are not less than those in the second operand.
598 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
600 /// \headerfile <x86intrin.h>
602 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
605 /// A 128-bit vector of [2 x double].
607 /// A 128-bit vector of [2 x double].
608 /// \returns A 128-bit vector containing the comparison results.
609 static __inline__ __m128d __DEFAULT_FN_ATTRS
610 _mm_cmpnlt_pd(__m128d __a, __m128d __b)
612 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__a, (__v2df)__b);
615 /// \brief Compares each of the corresponding double-precision values of the
616 /// 128-bit vectors of [2 x double] to determine if the values in the first
617 /// operand are not less than or equal to those in the second operand.
619 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
621 /// \headerfile <x86intrin.h>
623 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
626 /// A 128-bit vector of [2 x double].
628 /// A 128-bit vector of [2 x double].
629 /// \returns A 128-bit vector containing the comparison results.
630 static __inline__ __m128d __DEFAULT_FN_ATTRS
631 _mm_cmpnle_pd(__m128d __a, __m128d __b)
633 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__a, (__v2df)__b);
636 /// \brief Compares each of the corresponding double-precision values of the
637 /// 128-bit vectors of [2 x double] to determine if the values in the first
638 /// operand are not greater than those in the second operand.
640 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
642 /// \headerfile <x86intrin.h>
644 /// This intrinsic corresponds to the <c> VCMPNLTPD / CMPNLTPD </c> instruction.
647 /// A 128-bit vector of [2 x double].
649 /// A 128-bit vector of [2 x double].
650 /// \returns A 128-bit vector containing the comparison results.
651 static __inline__ __m128d __DEFAULT_FN_ATTRS
652 _mm_cmpngt_pd(__m128d __a, __m128d __b)
654 return (__m128d)__builtin_ia32_cmpnltpd((__v2df)__b, (__v2df)__a);
657 /// \brief Compares each of the corresponding double-precision values of the
658 /// 128-bit vectors of [2 x double] to determine if the values in the first
659 /// operand are not greater than or equal to those in the second operand.
661 /// Each comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
663 /// \headerfile <x86intrin.h>
665 /// This intrinsic corresponds to the <c> VCMPNLEPD / CMPNLEPD </c> instruction.
668 /// A 128-bit vector of [2 x double].
670 /// A 128-bit vector of [2 x double].
671 /// \returns A 128-bit vector containing the comparison results.
672 static __inline__ __m128d __DEFAULT_FN_ATTRS
673 _mm_cmpnge_pd(__m128d __a, __m128d __b)
675 return (__m128d)__builtin_ia32_cmpnlepd((__v2df)__b, (__v2df)__a);
678 /// \brief Compares the lower double-precision floating-point values in each of
679 /// the two 128-bit floating-point vectors of [2 x double] for equality.
681 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
683 /// \headerfile <x86intrin.h>
685 /// This intrinsic corresponds to the <c> VCMPEQSD / CMPEQSD </c> instruction.
688 /// A 128-bit vector of [2 x double]. The lower double-precision value is
689 /// compared to the lower double-precision value of \a __b.
691 /// A 128-bit vector of [2 x double]. The lower double-precision value is
692 /// compared to the lower double-precision value of \a __a.
693 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
694 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
695 static __inline__ __m128d __DEFAULT_FN_ATTRS
696 _mm_cmpeq_sd(__m128d __a, __m128d __b)
698 return (__m128d)__builtin_ia32_cmpeqsd((__v2df)__a, (__v2df)__b);
701 /// \brief Compares the lower double-precision floating-point values in each of
702 /// the two 128-bit floating-point vectors of [2 x double] to determine if
703 /// the value in the first parameter is less than the corresponding value in
704 /// the second parameter.
706 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
708 /// \headerfile <x86intrin.h>
710 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
713 /// A 128-bit vector of [2 x double]. The lower double-precision value is
714 /// compared to the lower double-precision value of \a __b.
716 /// A 128-bit vector of [2 x double]. The lower double-precision value is
717 /// compared to the lower double-precision value of \a __a.
718 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
719 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
720 static __inline__ __m128d __DEFAULT_FN_ATTRS
721 _mm_cmplt_sd(__m128d __a, __m128d __b)
723 return (__m128d)__builtin_ia32_cmpltsd((__v2df)__a, (__v2df)__b);
726 /// \brief Compares the lower double-precision floating-point values in each of
727 /// the two 128-bit floating-point vectors of [2 x double] to determine if
728 /// the value in the first parameter is less than or equal to the
729 /// corresponding value in the second parameter.
731 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
733 /// \headerfile <x86intrin.h>
735 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
738 /// A 128-bit vector of [2 x double]. The lower double-precision value is
739 /// compared to the lower double-precision value of \a __b.
741 /// A 128-bit vector of [2 x double]. The lower double-precision value is
742 /// compared to the lower double-precision value of \a __a.
743 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
744 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
745 static __inline__ __m128d __DEFAULT_FN_ATTRS
746 _mm_cmple_sd(__m128d __a, __m128d __b)
748 return (__m128d)__builtin_ia32_cmplesd((__v2df)__a, (__v2df)__b);
751 /// \brief Compares the lower double-precision floating-point values in each of
752 /// the two 128-bit floating-point vectors of [2 x double] to determine if
753 /// the value in the first parameter is greater than the corresponding value
754 /// in the second parameter.
756 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
758 /// \headerfile <x86intrin.h>
760 /// This intrinsic corresponds to the <c> VCMPLTSD / CMPLTSD </c> instruction.
763 /// A 128-bit vector of [2 x double]. The lower double-precision value is
764 /// compared to the lower double-precision value of \a __b.
766 /// A 128-bit vector of [2 x double]. The lower double-precision value is
767 /// compared to the lower double-precision value of \a __a.
768 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
769 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
770 static __inline__ __m128d __DEFAULT_FN_ATTRS
771 _mm_cmpgt_sd(__m128d __a, __m128d __b)
773 __m128d __c = __builtin_ia32_cmpltsd((__v2df)__b, (__v2df)__a);
774 return (__m128d) { __c[0], __a[1] };
777 /// \brief Compares the lower double-precision floating-point values in each of
778 /// the two 128-bit floating-point vectors of [2 x double] to determine if
779 /// the value in the first parameter is greater than or equal to the
780 /// corresponding value in the second parameter.
782 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
784 /// \headerfile <x86intrin.h>
786 /// This intrinsic corresponds to the <c> VCMPLESD / CMPLESD </c> instruction.
789 /// A 128-bit vector of [2 x double]. The lower double-precision value is
790 /// compared to the lower double-precision value of \a __b.
792 /// A 128-bit vector of [2 x double]. The lower double-precision value is
793 /// compared to the lower double-precision value of \a __a.
794 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
795 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
796 static __inline__ __m128d __DEFAULT_FN_ATTRS
797 _mm_cmpge_sd(__m128d __a, __m128d __b)
799 __m128d __c = __builtin_ia32_cmplesd((__v2df)__b, (__v2df)__a);
800 return (__m128d) { __c[0], __a[1] };
803 /// \brief Compares the lower double-precision floating-point values in each of
804 /// the two 128-bit floating-point vectors of [2 x double] to determine if
805 /// the value in the first parameter is "ordered" with respect to the
806 /// corresponding value in the second parameter.
808 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true. A pair of
809 /// double-precision values are "ordered" with respect to each other if
810 /// neither value is a NaN.
812 /// \headerfile <x86intrin.h>
814 /// This intrinsic corresponds to the <c> VCMPORDSD / CMPORDSD </c> instruction.
817 /// A 128-bit vector of [2 x double]. The lower double-precision value is
818 /// compared to the lower double-precision value of \a __b.
820 /// A 128-bit vector of [2 x double]. The lower double-precision value is
821 /// compared to the lower double-precision value of \a __a.
822 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
823 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
824 static __inline__ __m128d __DEFAULT_FN_ATTRS
825 _mm_cmpord_sd(__m128d __a, __m128d __b)
827 return (__m128d)__builtin_ia32_cmpordsd((__v2df)__a, (__v2df)__b);
830 /// \brief Compares the lower double-precision floating-point values in each of
831 /// the two 128-bit floating-point vectors of [2 x double] to determine if
832 /// the value in the first parameter is "unordered" with respect to the
833 /// corresponding value in the second parameter.
835 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true. A pair of
836 /// double-precision values are "unordered" with respect to each other if one
837 /// or both values are NaN.
839 /// \headerfile <x86intrin.h>
841 /// This intrinsic corresponds to the <c> VCMPUNORDSD / CMPUNORDSD </c>
845 /// A 128-bit vector of [2 x double]. The lower double-precision value is
846 /// compared to the lower double-precision value of \a __b.
848 /// A 128-bit vector of [2 x double]. The lower double-precision value is
849 /// compared to the lower double-precision value of \a __a.
850 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
851 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
852 static __inline__ __m128d __DEFAULT_FN_ATTRS
853 _mm_cmpunord_sd(__m128d __a, __m128d __b)
855 return (__m128d)__builtin_ia32_cmpunordsd((__v2df)__a, (__v2df)__b);
858 /// \brief Compares the lower double-precision floating-point values in each of
859 /// the two 128-bit floating-point vectors of [2 x double] to determine if
860 /// the value in the first parameter is unequal to the corresponding value in
861 /// the second parameter.
863 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
865 /// \headerfile <x86intrin.h>
867 /// This intrinsic corresponds to the <c> VCMPNEQSD / CMPNEQSD </c> instruction.
870 /// A 128-bit vector of [2 x double]. The lower double-precision value is
871 /// compared to the lower double-precision value of \a __b.
873 /// A 128-bit vector of [2 x double]. The lower double-precision value is
874 /// compared to the lower double-precision value of \a __a.
875 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
876 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
877 static __inline__ __m128d __DEFAULT_FN_ATTRS
878 _mm_cmpneq_sd(__m128d __a, __m128d __b)
880 return (__m128d)__builtin_ia32_cmpneqsd((__v2df)__a, (__v2df)__b);
883 /// \brief Compares the lower double-precision floating-point values in each of
884 /// the two 128-bit floating-point vectors of [2 x double] to determine if
885 /// the value in the first parameter is not less than the corresponding
886 /// value in the second parameter.
888 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
890 /// \headerfile <x86intrin.h>
892 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
895 /// A 128-bit vector of [2 x double]. The lower double-precision value is
896 /// compared to the lower double-precision value of \a __b.
898 /// A 128-bit vector of [2 x double]. The lower double-precision value is
899 /// compared to the lower double-precision value of \a __a.
900 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
901 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
902 static __inline__ __m128d __DEFAULT_FN_ATTRS
903 _mm_cmpnlt_sd(__m128d __a, __m128d __b)
905 return (__m128d)__builtin_ia32_cmpnltsd((__v2df)__a, (__v2df)__b);
908 /// \brief Compares the lower double-precision floating-point values in each of
909 /// the two 128-bit floating-point vectors of [2 x double] to determine if
910 /// the value in the first parameter is not less than or equal to the
911 /// corresponding value in the second parameter.
913 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
915 /// \headerfile <x86intrin.h>
917 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
920 /// A 128-bit vector of [2 x double]. The lower double-precision value is
921 /// compared to the lower double-precision value of \a __b.
923 /// A 128-bit vector of [2 x double]. The lower double-precision value is
924 /// compared to the lower double-precision value of \a __a.
925 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
926 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
927 static __inline__ __m128d __DEFAULT_FN_ATTRS
928 _mm_cmpnle_sd(__m128d __a, __m128d __b)
930 return (__m128d)__builtin_ia32_cmpnlesd((__v2df)__a, (__v2df)__b);
933 /// \brief Compares the lower double-precision floating-point values in each of
934 /// the two 128-bit floating-point vectors of [2 x double] to determine if
935 /// the value in the first parameter is not greater than the corresponding
936 /// value in the second parameter.
938 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
940 /// \headerfile <x86intrin.h>
942 /// This intrinsic corresponds to the <c> VCMPNLTSD / CMPNLTSD </c> instruction.
945 /// A 128-bit vector of [2 x double]. The lower double-precision value is
946 /// compared to the lower double-precision value of \a __b.
948 /// A 128-bit vector of [2 x double]. The lower double-precision value is
949 /// compared to the lower double-precision value of \a __a.
950 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
951 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
952 static __inline__ __m128d __DEFAULT_FN_ATTRS
953 _mm_cmpngt_sd(__m128d __a, __m128d __b)
955 __m128d __c = __builtin_ia32_cmpnltsd((__v2df)__b, (__v2df)__a);
956 return (__m128d) { __c[0], __a[1] };
959 /// \brief Compares the lower double-precision floating-point values in each of
960 /// the two 128-bit floating-point vectors of [2 x double] to determine if
961 /// the value in the first parameter is not greater than or equal to the
962 /// corresponding value in the second parameter.
964 /// The comparison yields 0h for false, FFFFFFFFFFFFFFFFh for true.
966 /// \headerfile <x86intrin.h>
968 /// This intrinsic corresponds to the <c> VCMPNLESD / CMPNLESD </c> instruction.
971 /// A 128-bit vector of [2 x double]. The lower double-precision value is
972 /// compared to the lower double-precision value of \a __b.
974 /// A 128-bit vector of [2 x double]. The lower double-precision value is
975 /// compared to the lower double-precision value of \a __a.
976 /// \returns A 128-bit vector. The lower 64 bits contains the comparison
977 /// results. The upper 64 bits are copied from the upper 64 bits of \a __a.
978 static __inline__ __m128d __DEFAULT_FN_ATTRS
979 _mm_cmpnge_sd(__m128d __a, __m128d __b)
981 __m128d __c = __builtin_ia32_cmpnlesd((__v2df)__b, (__v2df)__a);
982 return (__m128d) { __c[0], __a[1] };
985 /// \brief Compares the lower double-precision floating-point values in each of
986 /// the two 128-bit floating-point vectors of [2 x double] for equality. The
987 /// comparison yields 0 for false, 1 for true.
989 /// \headerfile <x86intrin.h>
991 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
994 /// A 128-bit vector of [2 x double]. The lower double-precision value is
995 /// compared to the lower double-precision value of \a __b.
997 /// A 128-bit vector of [2 x double]. The lower double-precision value is
998 /// compared to the lower double-precision value of \a __a.
999 /// \returns An integer containing the comparison results.
1000 static __inline__ int __DEFAULT_FN_ATTRS
1001 _mm_comieq_sd(__m128d __a, __m128d __b)
1003 return __builtin_ia32_comisdeq((__v2df)__a, (__v2df)__b);
1006 /// \brief Compares the lower double-precision floating-point values in each of
1007 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1008 /// the value in the first parameter is less than the corresponding value in
1009 /// the second parameter.
1011 /// The comparison yields 0 for false, 1 for true.
1013 /// \headerfile <x86intrin.h>
1015 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1018 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1019 /// compared to the lower double-precision value of \a __b.
1021 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1022 /// compared to the lower double-precision value of \a __a.
1023 /// \returns An integer containing the comparison results.
1024 static __inline__ int __DEFAULT_FN_ATTRS
1025 _mm_comilt_sd(__m128d __a, __m128d __b)
1027 return __builtin_ia32_comisdlt((__v2df)__a, (__v2df)__b);
1030 /// \brief Compares the lower double-precision floating-point values in each of
1031 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1032 /// the value in the first parameter is less than or equal to the
1033 /// corresponding value in the second parameter.
1035 /// The comparison yields 0 for false, 1 for true.
1037 /// \headerfile <x86intrin.h>
1039 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1042 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1043 /// compared to the lower double-precision value of \a __b.
1045 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1046 /// compared to the lower double-precision value of \a __a.
1047 /// \returns An integer containing the comparison results.
1048 static __inline__ int __DEFAULT_FN_ATTRS
1049 _mm_comile_sd(__m128d __a, __m128d __b)
1051 return __builtin_ia32_comisdle((__v2df)__a, (__v2df)__b);
1054 /// \brief Compares the lower double-precision floating-point values in each of
1055 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1056 /// the value in the first parameter is greater than the corresponding value
1057 /// in the second parameter.
1059 /// The comparison yields 0 for false, 1 for true.
1061 /// \headerfile <x86intrin.h>
1063 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1066 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1067 /// compared to the lower double-precision value of \a __b.
1069 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1070 /// compared to the lower double-precision value of \a __a.
1071 /// \returns An integer containing the comparison results.
1072 static __inline__ int __DEFAULT_FN_ATTRS
1073 _mm_comigt_sd(__m128d __a, __m128d __b)
1075 return __builtin_ia32_comisdgt((__v2df)__a, (__v2df)__b);
1078 /// \brief Compares the lower double-precision floating-point values in each of
1079 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1080 /// the value in the first parameter is greater than or equal to the
1081 /// corresponding value in the second parameter.
1083 /// The comparison yields 0 for false, 1 for true.
1085 /// \headerfile <x86intrin.h>
1087 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1090 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1091 /// compared to the lower double-precision value of \a __b.
1093 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1094 /// compared to the lower double-precision value of \a __a.
1095 /// \returns An integer containing the comparison results.
1096 static __inline__ int __DEFAULT_FN_ATTRS
1097 _mm_comige_sd(__m128d __a, __m128d __b)
1099 return __builtin_ia32_comisdge((__v2df)__a, (__v2df)__b);
1102 /// \brief Compares the lower double-precision floating-point values in each of
1103 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1104 /// the value in the first parameter is unequal to the corresponding value in
1105 /// the second parameter.
1107 /// The comparison yields 0 for false, 1 for true.
1109 /// \headerfile <x86intrin.h>
1111 /// This intrinsic corresponds to the <c> VCOMISD / COMISD </c> instruction.
1114 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1115 /// compared to the lower double-precision value of \a __b.
1117 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1118 /// compared to the lower double-precision value of \a __a.
1119 /// \returns An integer containing the comparison results.
1120 static __inline__ int __DEFAULT_FN_ATTRS
1121 _mm_comineq_sd(__m128d __a, __m128d __b)
1123 return __builtin_ia32_comisdneq((__v2df)__a, (__v2df)__b);
1126 /// \brief Compares the lower double-precision floating-point values in each of
1127 /// the two 128-bit floating-point vectors of [2 x double] for equality. The
1128 /// comparison yields 0 for false, 1 for true.
1130 /// If either of the two lower double-precision values is NaN, 1 is returned.
1132 /// \headerfile <x86intrin.h>
1134 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1137 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1138 /// compared to the lower double-precision value of \a __b.
1140 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1141 /// compared to the lower double-precision value of \a __a.
1142 /// \returns An integer containing the comparison results. If either of the two
1143 /// lower double-precision values is NaN, 1 is returned.
1144 static __inline__ int __DEFAULT_FN_ATTRS
1145 _mm_ucomieq_sd(__m128d __a, __m128d __b)
1147 return __builtin_ia32_ucomisdeq((__v2df)__a, (__v2df)__b);
1150 /// \brief Compares the lower double-precision floating-point values in each of
1151 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1152 /// the value in the first parameter is less than the corresponding value in
1153 /// the second parameter.
1155 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1156 /// double-precision values is NaN, 1 is returned.
1158 /// \headerfile <x86intrin.h>
1160 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1163 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1164 /// compared to the lower double-precision value of \a __b.
1166 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1167 /// compared to the lower double-precision value of \a __a.
1168 /// \returns An integer containing the comparison results. If either of the two
1169 /// lower double-precision values is NaN, 1 is returned.
1170 static __inline__ int __DEFAULT_FN_ATTRS
1171 _mm_ucomilt_sd(__m128d __a, __m128d __b)
1173 return __builtin_ia32_ucomisdlt((__v2df)__a, (__v2df)__b);
1176 /// \brief Compares the lower double-precision floating-point values in each of
1177 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1178 /// the value in the first parameter is less than or equal to the
1179 /// corresponding value in the second parameter.
1181 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1182 /// double-precision values is NaN, 1 is returned.
1184 /// \headerfile <x86intrin.h>
1186 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1189 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1190 /// compared to the lower double-precision value of \a __b.
1192 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1193 /// compared to the lower double-precision value of \a __a.
1194 /// \returns An integer containing the comparison results. If either of the two
1195 /// lower double-precision values is NaN, 1 is returned.
1196 static __inline__ int __DEFAULT_FN_ATTRS
1197 _mm_ucomile_sd(__m128d __a, __m128d __b)
1199 return __builtin_ia32_ucomisdle((__v2df)__a, (__v2df)__b);
1202 /// \brief Compares the lower double-precision floating-point values in each of
1203 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1204 /// the value in the first parameter is greater than the corresponding value
1205 /// in the second parameter.
1207 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1208 /// double-precision values is NaN, 0 is returned.
1210 /// \headerfile <x86intrin.h>
1212 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1215 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1216 /// compared to the lower double-precision value of \a __b.
1218 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1219 /// compared to the lower double-precision value of \a __a.
1220 /// \returns An integer containing the comparison results. If either of the two
1221 /// lower double-precision values is NaN, 0 is returned.
1222 static __inline__ int __DEFAULT_FN_ATTRS
1223 _mm_ucomigt_sd(__m128d __a, __m128d __b)
1225 return __builtin_ia32_ucomisdgt((__v2df)__a, (__v2df)__b);
1228 /// \brief Compares the lower double-precision floating-point values in each of
1229 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1230 /// the value in the first parameter is greater than or equal to the
1231 /// corresponding value in the second parameter.
1233 /// The comparison yields 0 for false, 1 for true. If either of the two
1234 /// lower double-precision values is NaN, 0 is returned.
1236 /// \headerfile <x86intrin.h>
1238 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1241 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1242 /// compared to the lower double-precision value of \a __b.
1244 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1245 /// compared to the lower double-precision value of \a __a.
1246 /// \returns An integer containing the comparison results. If either of the two
1247 /// lower double-precision values is NaN, 0 is returned.
1248 static __inline__ int __DEFAULT_FN_ATTRS
1249 _mm_ucomige_sd(__m128d __a, __m128d __b)
1251 return __builtin_ia32_ucomisdge((__v2df)__a, (__v2df)__b);
1254 /// \brief Compares the lower double-precision floating-point values in each of
1255 /// the two 128-bit floating-point vectors of [2 x double] to determine if
1256 /// the value in the first parameter is unequal to the corresponding value in
1257 /// the second parameter.
1259 /// The comparison yields 0 for false, 1 for true. If either of the two lower
1260 /// double-precision values is NaN, 0 is returned.
1262 /// \headerfile <x86intrin.h>
1264 /// This intrinsic corresponds to the <c> VUCOMISD / UCOMISD </c> instruction.
1267 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1268 /// compared to the lower double-precision value of \a __b.
1270 /// A 128-bit vector of [2 x double]. The lower double-precision value is
1271 /// compared to the lower double-precision value of \a __a.
1272 /// \returns An integer containing the comparison result. If either of the two
1273 /// lower double-precision values is NaN, 0 is returned.
1274 static __inline__ int __DEFAULT_FN_ATTRS
1275 _mm_ucomineq_sd(__m128d __a, __m128d __b)
1277 return __builtin_ia32_ucomisdneq((__v2df)__a, (__v2df)__b);
1280 /// \brief Converts the two double-precision floating-point elements of a
1281 /// 128-bit vector of [2 x double] into two single-precision floating-point
1282 /// values, returned in the lower 64 bits of a 128-bit vector of [4 x float].
1283 /// The upper 64 bits of the result vector are set to zero.
1285 /// \headerfile <x86intrin.h>
1287 /// This intrinsic corresponds to the <c> VCVTPD2PS / CVTPD2PS </c> instruction.
1290 /// A 128-bit vector of [2 x double].
1291 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1292 /// converted values. The upper 64 bits are set to zero.
1293 static __inline__ __m128 __DEFAULT_FN_ATTRS
1294 _mm_cvtpd_ps(__m128d __a)
1296 return __builtin_ia32_cvtpd2ps((__v2df)__a);
1299 /// \brief Converts the lower two single-precision floating-point elements of a
1300 /// 128-bit vector of [4 x float] into two double-precision floating-point
1301 /// values, returned in a 128-bit vector of [2 x double]. The upper two
1302 /// elements of the input vector are unused.
1304 /// \headerfile <x86intrin.h>
1306 /// This intrinsic corresponds to the <c> VCVTPS2PD / CVTPS2PD </c> instruction.
1309 /// A 128-bit vector of [4 x float]. The lower two single-precision
1310 /// floating-point elements are converted to double-precision values. The
1311 /// upper two elements are unused.
1312 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1313 static __inline__ __m128d __DEFAULT_FN_ATTRS
1314 _mm_cvtps_pd(__m128 __a)
1316 return (__m128d) __builtin_convertvector(
1317 __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 1), __v2df);
1320 /// \brief Converts the lower two integer elements of a 128-bit vector of
1321 /// [4 x i32] into two double-precision floating-point values, returned in a
1322 /// 128-bit vector of [2 x double].
1324 /// The upper two elements of the input vector are unused.
1326 /// \headerfile <x86intrin.h>
1328 /// This intrinsic corresponds to the <c> VCVTDQ2PD / CVTDQ2PD </c> instruction.
1331 /// A 128-bit integer vector of [4 x i32]. The lower two integer elements are
1332 /// converted to double-precision values.
1334 /// The upper two elements are unused.
1335 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1336 static __inline__ __m128d __DEFAULT_FN_ATTRS
1337 _mm_cvtepi32_pd(__m128i __a)
1339 return (__m128d) __builtin_convertvector(
1340 __builtin_shufflevector((__v4si)__a, (__v4si)__a, 0, 1), __v2df);
1343 /// \brief Converts the two double-precision floating-point elements of a
1344 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1345 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32]. The upper
1346 /// 64 bits of the result vector are set to zero.
1348 /// \headerfile <x86intrin.h>
1350 /// This intrinsic corresponds to the <c> VCVTPD2DQ / CVTPD2DQ </c> instruction.
1353 /// A 128-bit vector of [2 x double].
1354 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1355 /// converted values. The upper 64 bits are set to zero.
1356 static __inline__ __m128i __DEFAULT_FN_ATTRS
1357 _mm_cvtpd_epi32(__m128d __a)
1359 return __builtin_ia32_cvtpd2dq((__v2df)__a);
1362 /// \brief Converts the low-order element of a 128-bit vector of [2 x double]
1363 /// into a 32-bit signed integer value.
1365 /// \headerfile <x86intrin.h>
1367 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
1370 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1372 /// \returns A 32-bit signed integer containing the converted value.
1373 static __inline__ int __DEFAULT_FN_ATTRS
1374 _mm_cvtsd_si32(__m128d __a)
1376 return __builtin_ia32_cvtsd2si((__v2df)__a);
1379 /// \brief Converts the lower double-precision floating-point element of a
1380 /// 128-bit vector of [2 x double], in the second parameter, into a
1381 /// single-precision floating-point value, returned in the lower 32 bits of a
1382 /// 128-bit vector of [4 x float]. The upper 96 bits of the result vector are
1383 /// copied from the upper 96 bits of the first parameter.
1385 /// \headerfile <x86intrin.h>
1387 /// This intrinsic corresponds to the <c> VCVTSD2SS / CVTSD2SS </c> instruction.
1390 /// A 128-bit vector of [4 x float]. The upper 96 bits of this parameter are
1391 /// copied to the upper 96 bits of the result.
1393 /// A 128-bit vector of [2 x double]. The lower double-precision
1394 /// floating-point element is used in the conversion.
1395 /// \returns A 128-bit vector of [4 x float]. The lower 32 bits contain the
1396 /// converted value from the second parameter. The upper 96 bits are copied
1397 /// from the upper 96 bits of the first parameter.
1398 static __inline__ __m128 __DEFAULT_FN_ATTRS
1399 _mm_cvtsd_ss(__m128 __a, __m128d __b)
1401 return (__m128)__builtin_ia32_cvtsd2ss((__v4sf)__a, (__v2df)__b);
1404 /// \brief Converts a 32-bit signed integer value, in the second parameter, into
1405 /// a double-precision floating-point value, returned in the lower 64 bits of
1406 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1407 /// are copied from the upper 64 bits of the first parameter.
1409 /// \headerfile <x86intrin.h>
1411 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
1414 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1415 /// copied to the upper 64 bits of the result.
1417 /// A 32-bit signed integer containing the value to be converted.
1418 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1419 /// converted value from the second parameter. The upper 64 bits are copied
1420 /// from the upper 64 bits of the first parameter.
1421 static __inline__ __m128d __DEFAULT_FN_ATTRS
1422 _mm_cvtsi32_sd(__m128d __a, int __b)
1428 /// \brief Converts the lower single-precision floating-point element of a
1429 /// 128-bit vector of [4 x float], in the second parameter, into a
1430 /// double-precision floating-point value, returned in the lower 64 bits of
1431 /// a 128-bit vector of [2 x double]. The upper 64 bits of the result vector
1432 /// are copied from the upper 64 bits of the first parameter.
1434 /// \headerfile <x86intrin.h>
1436 /// This intrinsic corresponds to the <c> VCVTSS2SD / CVTSS2SD </c> instruction.
1439 /// A 128-bit vector of [2 x double]. The upper 64 bits of this parameter are
1440 /// copied to the upper 64 bits of the result.
1442 /// A 128-bit vector of [4 x float]. The lower single-precision
1443 /// floating-point element is used in the conversion.
1444 /// \returns A 128-bit vector of [2 x double]. The lower 64 bits contain the
1445 /// converted value from the second parameter. The upper 64 bits are copied
1446 /// from the upper 64 bits of the first parameter.
1447 static __inline__ __m128d __DEFAULT_FN_ATTRS
1448 _mm_cvtss_sd(__m128d __a, __m128 __b)
1454 /// \brief Converts the two double-precision floating-point elements of a
1455 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1456 /// returned in the lower 64 bits of a 128-bit vector of [4 x i32].
1458 /// If the result of either conversion is inexact, the result is truncated
1459 /// (rounded towards zero) regardless of the current MXCSR setting. The upper
1460 /// 64 bits of the result vector are set to zero.
1462 /// \headerfile <x86intrin.h>
1464 /// This intrinsic corresponds to the <c> VCVTTPD2DQ / CVTTPD2DQ </c>
1468 /// A 128-bit vector of [2 x double].
1469 /// \returns A 128-bit vector of [4 x i32] whose lower 64 bits contain the
1470 /// converted values. The upper 64 bits are set to zero.
1471 static __inline__ __m128i __DEFAULT_FN_ATTRS
1472 _mm_cvttpd_epi32(__m128d __a)
1474 return (__m128i)__builtin_ia32_cvttpd2dq((__v2df)__a);
1477 /// \brief Converts the low-order element of a [2 x double] vector into a 32-bit
1478 /// signed integer value, truncating the result when it is inexact.
1480 /// \headerfile <x86intrin.h>
1482 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
1486 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
1488 /// \returns A 32-bit signed integer containing the converted value.
1489 static __inline__ int __DEFAULT_FN_ATTRS
1490 _mm_cvttsd_si32(__m128d __a)
1492 return __builtin_ia32_cvttsd2si((__v2df)__a);
1495 /// \brief Converts the two double-precision floating-point elements of a
1496 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1497 /// returned in a 64-bit vector of [2 x i32].
1499 /// \headerfile <x86intrin.h>
1501 /// This intrinsic corresponds to the <c> CVTPD2PI </c> instruction.
1504 /// A 128-bit vector of [2 x double].
1505 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1506 static __inline__ __m64 __DEFAULT_FN_ATTRS
1507 _mm_cvtpd_pi32(__m128d __a)
1509 return (__m64)__builtin_ia32_cvtpd2pi((__v2df)__a);
1512 /// \brief Converts the two double-precision floating-point elements of a
1513 /// 128-bit vector of [2 x double] into two signed 32-bit integer values,
1514 /// returned in a 64-bit vector of [2 x i32].
1516 /// If the result of either conversion is inexact, the result is truncated
1517 /// (rounded towards zero) regardless of the current MXCSR setting.
1519 /// \headerfile <x86intrin.h>
1521 /// This intrinsic corresponds to the <c> CVTTPD2PI </c> instruction.
1524 /// A 128-bit vector of [2 x double].
1525 /// \returns A 64-bit vector of [2 x i32] containing the converted values.
1526 static __inline__ __m64 __DEFAULT_FN_ATTRS
1527 _mm_cvttpd_pi32(__m128d __a)
1529 return (__m64)__builtin_ia32_cvttpd2pi((__v2df)__a);
1532 /// \brief Converts the two signed 32-bit integer elements of a 64-bit vector of
1533 /// [2 x i32] into two double-precision floating-point values, returned in a
1534 /// 128-bit vector of [2 x double].
1536 /// \headerfile <x86intrin.h>
1538 /// This intrinsic corresponds to the <c> CVTPI2PD </c> instruction.
1541 /// A 64-bit vector of [2 x i32].
1542 /// \returns A 128-bit vector of [2 x double] containing the converted values.
1543 static __inline__ __m128d __DEFAULT_FN_ATTRS
1544 _mm_cvtpi32_pd(__m64 __a)
1546 return __builtin_ia32_cvtpi2pd((__v2si)__a);
1549 /// \brief Returns the low-order element of a 128-bit vector of [2 x double] as
1550 /// a double-precision floating-point value.
1552 /// \headerfile <x86intrin.h>
1554 /// This intrinsic has no corresponding instruction.
1557 /// A 128-bit vector of [2 x double]. The lower 64 bits are returned.
1558 /// \returns A double-precision floating-point value copied from the lower 64
1560 static __inline__ double __DEFAULT_FN_ATTRS
1561 _mm_cvtsd_f64(__m128d __a)
1566 /// \brief Loads a 128-bit floating-point vector of [2 x double] from an aligned
1567 /// memory location.
1569 /// \headerfile <x86intrin.h>
1571 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
1574 /// A pointer to a 128-bit memory location. The address of the memory
1575 /// location has to be 16-byte aligned.
1576 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1577 static __inline__ __m128d __DEFAULT_FN_ATTRS
1578 _mm_load_pd(double const *__dp)
1580 return *(__m128d*)__dp;
1583 /// \brief Loads a double-precision floating-point value from a specified memory
1584 /// location and duplicates it to both vector elements of a 128-bit vector of
1587 /// \headerfile <x86intrin.h>
1589 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVDDUP </c> instruction.
1592 /// A pointer to a memory location containing a double-precision value.
1593 /// \returns A 128-bit vector of [2 x double] containing the loaded and
1594 /// duplicated values.
1595 static __inline__ __m128d __DEFAULT_FN_ATTRS
1596 _mm_load1_pd(double const *__dp)
1598 struct __mm_load1_pd_struct {
1600 } __attribute__((__packed__, __may_alias__));
1601 double __u = ((struct __mm_load1_pd_struct*)__dp)->__u;
1602 return (__m128d){ __u, __u };
1605 #define _mm_load_pd1(dp) _mm_load1_pd(dp)
1607 /// \brief Loads two double-precision values, in reverse order, from an aligned
1608 /// memory location into a 128-bit vector of [2 x double].
1610 /// \headerfile <x86intrin.h>
1612 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction +
1613 /// needed shuffling instructions. In AVX mode, the shuffling may be combined
1614 /// with the \c VMOVAPD, resulting in only a \c VPERMILPD instruction.
1617 /// A 16-byte aligned pointer to an array of double-precision values to be
1618 /// loaded in reverse order.
1619 /// \returns A 128-bit vector of [2 x double] containing the reversed loaded
1621 static __inline__ __m128d __DEFAULT_FN_ATTRS
1622 _mm_loadr_pd(double const *__dp)
1624 __m128d __u = *(__m128d*)__dp;
1625 return __builtin_shufflevector((__v2df)__u, (__v2df)__u, 1, 0);
1628 /// \brief Loads a 128-bit floating-point vector of [2 x double] from an
1629 /// unaligned memory location.
1631 /// \headerfile <x86intrin.h>
1633 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1636 /// A pointer to a 128-bit memory location. The address of the memory
1637 /// location does not have to be aligned.
1638 /// \returns A 128-bit vector of [2 x double] containing the loaded values.
1639 static __inline__ __m128d __DEFAULT_FN_ATTRS
1640 _mm_loadu_pd(double const *__dp)
1644 } __attribute__((__packed__, __may_alias__));
1645 return ((struct __loadu_pd*)__dp)->__v;
1648 /// \brief Loads a 64-bit integer value to the low element of a 128-bit integer
1649 /// vector and clears the upper element.
1651 /// \headerfile <x86intrin.h>
1653 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1656 /// A pointer to a 64-bit memory location. The address of the memory
1657 /// location does not have to be aligned.
1658 /// \returns A 128-bit vector of [2 x i64] containing the loaded value.
1659 static __inline__ __m128i __DEFAULT_FN_ATTRS
1660 _mm_loadu_si64(void const *__a)
1662 struct __loadu_si64 {
1664 } __attribute__((__packed__, __may_alias__));
1665 long long __u = ((struct __loadu_si64*)__a)->__v;
1666 return (__m128i){__u, 0L};
1669 /// \brief Loads a 64-bit double-precision value to the low element of a
1670 /// 128-bit integer vector and clears the upper element.
1672 /// \headerfile <x86intrin.h>
1674 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1677 /// An pointer to a memory location containing a double-precision value.
1678 /// The address of the memory location does not have to be aligned.
1679 /// \returns A 128-bit vector of [2 x double] containing the loaded value.
1680 static __inline__ __m128d __DEFAULT_FN_ATTRS
1681 _mm_load_sd(double const *__dp)
1683 struct __mm_load_sd_struct {
1685 } __attribute__((__packed__, __may_alias__));
1686 double __u = ((struct __mm_load_sd_struct*)__dp)->__u;
1687 return (__m128d){ __u, 0 };
1690 /// \brief Loads a double-precision value into the high-order bits of a 128-bit
1691 /// vector of [2 x double]. The low-order bits are copied from the low-order
1692 /// bits of the first operand.
1694 /// \headerfile <x86intrin.h>
1696 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1699 /// A 128-bit vector of [2 x double]. \n
1700 /// Bits [63:0] are written to bits [63:0] of the result.
1702 /// A pointer to a 64-bit memory location containing a double-precision
1703 /// floating-point value that is loaded. The loaded value is written to bits
1704 /// [127:64] of the result. The address of the memory location does not have
1706 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1707 static __inline__ __m128d __DEFAULT_FN_ATTRS
1708 _mm_loadh_pd(__m128d __a, double const *__dp)
1710 struct __mm_loadh_pd_struct {
1712 } __attribute__((__packed__, __may_alias__));
1713 double __u = ((struct __mm_loadh_pd_struct*)__dp)->__u;
1714 return (__m128d){ __a[0], __u };
1717 /// \brief Loads a double-precision value into the low-order bits of a 128-bit
1718 /// vector of [2 x double]. The high-order bits are copied from the
1719 /// high-order bits of the first operand.
1721 /// \headerfile <x86intrin.h>
1723 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1726 /// A 128-bit vector of [2 x double]. \n
1727 /// Bits [127:64] are written to bits [127:64] of the result.
1729 /// A pointer to a 64-bit memory location containing a double-precision
1730 /// floating-point value that is loaded. The loaded value is written to bits
1731 /// [63:0] of the result. The address of the memory location does not have to
1733 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1734 static __inline__ __m128d __DEFAULT_FN_ATTRS
1735 _mm_loadl_pd(__m128d __a, double const *__dp)
1737 struct __mm_loadl_pd_struct {
1739 } __attribute__((__packed__, __may_alias__));
1740 double __u = ((struct __mm_loadl_pd_struct*)__dp)->__u;
1741 return (__m128d){ __u, __a[1] };
1744 /// \brief Constructs a 128-bit floating-point vector of [2 x double] with
1745 /// unspecified content. This could be used as an argument to another
1746 /// intrinsic function where the argument is required but the value is not
1749 /// \headerfile <x86intrin.h>
1751 /// This intrinsic has no corresponding instruction.
1753 /// \returns A 128-bit floating-point vector of [2 x double] with unspecified
1755 static __inline__ __m128d __DEFAULT_FN_ATTRS
1756 _mm_undefined_pd(void)
1758 return (__m128d)__builtin_ia32_undef128();
1761 /// \brief Constructs a 128-bit floating-point vector of [2 x double]. The lower
1762 /// 64 bits of the vector are initialized with the specified double-precision
1763 /// floating-point value. The upper 64 bits are set to zero.
1765 /// \headerfile <x86intrin.h>
1767 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
1770 /// A double-precision floating-point value used to initialize the lower 64
1771 /// bits of the result.
1772 /// \returns An initialized 128-bit floating-point vector of [2 x double]. The
1773 /// lower 64 bits contain the value of the parameter. The upper 64 bits are
1775 static __inline__ __m128d __DEFAULT_FN_ATTRS
1776 _mm_set_sd(double __w)
1778 return (__m128d){ __w, 0 };
1781 /// \brief Constructs a 128-bit floating-point vector of [2 x double], with each
1782 /// of the two double-precision floating-point vector elements set to the
1783 /// specified double-precision floating-point value.
1785 /// \headerfile <x86intrin.h>
1787 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1790 /// A double-precision floating-point value used to initialize each vector
1791 /// element of the result.
1792 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1793 static __inline__ __m128d __DEFAULT_FN_ATTRS
1794 _mm_set1_pd(double __w)
1796 return (__m128d){ __w, __w };
1799 /// \brief Constructs a 128-bit floating-point vector of [2 x double], with each
1800 /// of the two double-precision floating-point vector elements set to the
1801 /// specified double-precision floating-point value.
1803 /// \headerfile <x86intrin.h>
1805 /// This intrinsic corresponds to the <c> VMOVDDUP / MOVLHPS </c> instruction.
1808 /// A double-precision floating-point value used to initialize each vector
1809 /// element of the result.
1810 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1811 static __inline__ __m128d __DEFAULT_FN_ATTRS
1812 _mm_set_pd1(double __w)
1814 return _mm_set1_pd(__w);
1817 /// \brief Constructs a 128-bit floating-point vector of [2 x double]
1818 /// initialized with the specified double-precision floating-point values.
1820 /// \headerfile <x86intrin.h>
1822 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1825 /// A double-precision floating-point value used to initialize the upper 64
1826 /// bits of the result.
1828 /// A double-precision floating-point value used to initialize the lower 64
1829 /// bits of the result.
1830 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1831 static __inline__ __m128d __DEFAULT_FN_ATTRS
1832 _mm_set_pd(double __w, double __x)
1834 return (__m128d){ __x, __w };
1837 /// \brief Constructs a 128-bit floating-point vector of [2 x double],
1838 /// initialized in reverse order with the specified double-precision
1839 /// floating-point values.
1841 /// \headerfile <x86intrin.h>
1843 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
1846 /// A double-precision floating-point value used to initialize the lower 64
1847 /// bits of the result.
1849 /// A double-precision floating-point value used to initialize the upper 64
1850 /// bits of the result.
1851 /// \returns An initialized 128-bit floating-point vector of [2 x double].
1852 static __inline__ __m128d __DEFAULT_FN_ATTRS
1853 _mm_setr_pd(double __w, double __x)
1855 return (__m128d){ __w, __x };
1858 /// \brief Constructs a 128-bit floating-point vector of [2 x double]
1859 /// initialized to zero.
1861 /// \headerfile <x86intrin.h>
1863 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1865 /// \returns An initialized 128-bit floating-point vector of [2 x double] with
1866 /// all elements set to zero.
1867 static __inline__ __m128d __DEFAULT_FN_ATTRS
1868 _mm_setzero_pd(void)
1870 return (__m128d){ 0, 0 };
1873 /// \brief Constructs a 128-bit floating-point vector of [2 x double]. The lower
1874 /// 64 bits are set to the lower 64 bits of the second parameter. The upper
1875 /// 64 bits are set to the upper 64 bits of the first parameter.
1877 /// \headerfile <x86intrin.h>
1879 /// This intrinsic corresponds to the <c> VBLENDPD / BLENDPD </c> instruction.
1882 /// A 128-bit vector of [2 x double]. The upper 64 bits are written to the
1883 /// upper 64 bits of the result.
1885 /// A 128-bit vector of [2 x double]. The lower 64 bits are written to the
1886 /// lower 64 bits of the result.
1887 /// \returns A 128-bit vector of [2 x double] containing the moved values.
1888 static __inline__ __m128d __DEFAULT_FN_ATTRS
1889 _mm_move_sd(__m128d __a, __m128d __b)
1891 return (__m128d){ __b[0], __a[1] };
1894 /// \brief Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
1895 /// memory location.
1897 /// \headerfile <x86intrin.h>
1899 /// This intrinsic corresponds to the <c> VMOVSD / MOVSD </c> instruction.
1902 /// A pointer to a 64-bit memory location.
1904 /// A 128-bit vector of [2 x double] containing the value to be stored.
1905 static __inline__ void __DEFAULT_FN_ATTRS
1906 _mm_store_sd(double *__dp, __m128d __a)
1908 struct __mm_store_sd_struct {
1910 } __attribute__((__packed__, __may_alias__));
1911 ((struct __mm_store_sd_struct*)__dp)->__u = __a[0];
1914 static __inline__ void __DEFAULT_FN_ATTRS
1915 _mm_store_pd(double *__dp, __m128d __a)
1917 *(__m128d*)__dp = __a;
1920 static __inline__ void __DEFAULT_FN_ATTRS
1921 _mm_store1_pd(double *__dp, __m128d __a)
1923 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 0, 0);
1924 _mm_store_pd(__dp, __a);
1927 /// \brief Stores a 128-bit vector of [2 x double] into an aligned memory
1930 /// \headerfile <x86intrin.h>
1932 /// This intrinsic corresponds to the <c> VMOVAPD / MOVAPD </c> instruction.
1935 /// A pointer to a 128-bit memory location. The address of the memory
1936 /// location has to be 16-byte aligned.
1938 /// A 128-bit vector of [2 x double] containing the values to be stored.
1939 static __inline__ void __DEFAULT_FN_ATTRS
1940 _mm_store_pd1(double *__dp, __m128d __a)
1942 return _mm_store1_pd(__dp, __a);
1945 /// \brief Stores a 128-bit vector of [2 x double] into an unaligned memory
1948 /// \headerfile <x86intrin.h>
1950 /// This intrinsic corresponds to the <c> VMOVUPD / MOVUPD </c> instruction.
1953 /// A pointer to a 128-bit memory location. The address of the memory
1954 /// location does not have to be aligned.
1956 /// A 128-bit vector of [2 x double] containing the values to be stored.
1957 static __inline__ void __DEFAULT_FN_ATTRS
1958 _mm_storeu_pd(double *__dp, __m128d __a)
1960 struct __storeu_pd {
1962 } __attribute__((__packed__, __may_alias__));
1963 ((struct __storeu_pd*)__dp)->__v = __a;
1966 /// \brief Stores two double-precision values, in reverse order, from a 128-bit
1967 /// vector of [2 x double] to a 16-byte aligned memory location.
1969 /// \headerfile <x86intrin.h>
1971 /// This intrinsic corresponds to a shuffling instruction followed by a
1972 /// <c> VMOVAPD / MOVAPD </c> instruction.
1975 /// A pointer to a 16-byte aligned memory location that can store two
1976 /// double-precision values.
1978 /// A 128-bit vector of [2 x double] containing the values to be reversed and
1980 static __inline__ void __DEFAULT_FN_ATTRS
1981 _mm_storer_pd(double *__dp, __m128d __a)
1983 __a = __builtin_shufflevector((__v2df)__a, (__v2df)__a, 1, 0);
1984 *(__m128d *)__dp = __a;
1987 /// \brief Stores the upper 64 bits of a 128-bit vector of [2 x double] to a
1988 /// memory location.
1990 /// \headerfile <x86intrin.h>
1992 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1995 /// A pointer to a 64-bit memory location.
1997 /// A 128-bit vector of [2 x double] containing the value to be stored.
1998 static __inline__ void __DEFAULT_FN_ATTRS
1999 _mm_storeh_pd(double *__dp, __m128d __a)
2001 struct __mm_storeh_pd_struct {
2003 } __attribute__((__packed__, __may_alias__));
2004 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[1];
2007 /// \brief Stores the lower 64 bits of a 128-bit vector of [2 x double] to a
2008 /// memory location.
2010 /// \headerfile <x86intrin.h>
2012 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
2015 /// A pointer to a 64-bit memory location.
2017 /// A 128-bit vector of [2 x double] containing the value to be stored.
2018 static __inline__ void __DEFAULT_FN_ATTRS
2019 _mm_storel_pd(double *__dp, __m128d __a)
2021 struct __mm_storeh_pd_struct {
2023 } __attribute__((__packed__, __may_alias__));
2024 ((struct __mm_storeh_pd_struct*)__dp)->__u = __a[0];
2027 /// \brief Adds the corresponding elements of two 128-bit vectors of [16 x i8],
2028 /// saving the lower 8 bits of each sum in the corresponding element of a
2029 /// 128-bit result vector of [16 x i8].
2031 /// The integer elements of both parameters can be either signed or unsigned.
2033 /// \headerfile <x86intrin.h>
2035 /// This intrinsic corresponds to the <c> VPADDB / PADDB </c> instruction.
2038 /// A 128-bit vector of [16 x i8].
2040 /// A 128-bit vector of [16 x i8].
2041 /// \returns A 128-bit vector of [16 x i8] containing the sums of both
2043 static __inline__ __m128i __DEFAULT_FN_ATTRS
2044 _mm_add_epi8(__m128i __a, __m128i __b)
2046 return (__m128i)((__v16qu)__a + (__v16qu)__b);
2049 /// \brief Adds the corresponding elements of two 128-bit vectors of [8 x i16],
2050 /// saving the lower 16 bits of each sum in the corresponding element of a
2051 /// 128-bit result vector of [8 x i16].
2053 /// The integer elements of both parameters can be either signed or unsigned.
2055 /// \headerfile <x86intrin.h>
2057 /// This intrinsic corresponds to the <c> VPADDW / PADDW </c> instruction.
2060 /// A 128-bit vector of [8 x i16].
2062 /// A 128-bit vector of [8 x i16].
2063 /// \returns A 128-bit vector of [8 x i16] containing the sums of both
2065 static __inline__ __m128i __DEFAULT_FN_ATTRS
2066 _mm_add_epi16(__m128i __a, __m128i __b)
2068 return (__m128i)((__v8hu)__a + (__v8hu)__b);
2071 /// \brief Adds the corresponding elements of two 128-bit vectors of [4 x i32],
2072 /// saving the lower 32 bits of each sum in the corresponding element of a
2073 /// 128-bit result vector of [4 x i32].
2075 /// The integer elements of both parameters can be either signed or unsigned.
2077 /// \headerfile <x86intrin.h>
2079 /// This intrinsic corresponds to the <c> VPADDD / PADDD </c> instruction.
2082 /// A 128-bit vector of [4 x i32].
2084 /// A 128-bit vector of [4 x i32].
2085 /// \returns A 128-bit vector of [4 x i32] containing the sums of both
2087 static __inline__ __m128i __DEFAULT_FN_ATTRS
2088 _mm_add_epi32(__m128i __a, __m128i __b)
2090 return (__m128i)((__v4su)__a + (__v4su)__b);
2093 /// \brief Adds two signed or unsigned 64-bit integer values, returning the
2094 /// lower 64 bits of the sum.
2096 /// \headerfile <x86intrin.h>
2098 /// This intrinsic corresponds to the <c> PADDQ </c> instruction.
2101 /// A 64-bit integer.
2103 /// A 64-bit integer.
2104 /// \returns A 64-bit integer containing the sum of both parameters.
2105 static __inline__ __m64 __DEFAULT_FN_ATTRS
2106 _mm_add_si64(__m64 __a, __m64 __b)
2108 return (__m64)__builtin_ia32_paddq((__v1di)__a, (__v1di)__b);
2111 /// \brief Adds the corresponding elements of two 128-bit vectors of [2 x i64],
2112 /// saving the lower 64 bits of each sum in the corresponding element of a
2113 /// 128-bit result vector of [2 x i64].
2115 /// The integer elements of both parameters can be either signed or unsigned.
2117 /// \headerfile <x86intrin.h>
2119 /// This intrinsic corresponds to the <c> VPADDQ / PADDQ </c> instruction.
2122 /// A 128-bit vector of [2 x i64].
2124 /// A 128-bit vector of [2 x i64].
2125 /// \returns A 128-bit vector of [2 x i64] containing the sums of both
2127 static __inline__ __m128i __DEFAULT_FN_ATTRS
2128 _mm_add_epi64(__m128i __a, __m128i __b)
2130 return (__m128i)((__v2du)__a + (__v2du)__b);
2133 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2134 /// signed [16 x i8] vectors, saving each sum in the corresponding element of
2135 /// a 128-bit result vector of [16 x i8]. Positive sums greater than 7Fh are
2136 /// saturated to 7Fh. Negative sums less than 80h are saturated to 80h.
2138 /// \headerfile <x86intrin.h>
2140 /// This intrinsic corresponds to the <c> VPADDSB / PADDSB </c> instruction.
2143 /// A 128-bit signed [16 x i8] vector.
2145 /// A 128-bit signed [16 x i8] vector.
2146 /// \returns A 128-bit signed [16 x i8] vector containing the saturated sums of
2147 /// both parameters.
2148 static __inline__ __m128i __DEFAULT_FN_ATTRS
2149 _mm_adds_epi8(__m128i __a, __m128i __b)
2151 return (__m128i)__builtin_ia32_paddsb128((__v16qi)__a, (__v16qi)__b);
2154 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2155 /// signed [8 x i16] vectors, saving each sum in the corresponding element of
2156 /// a 128-bit result vector of [8 x i16]. Positive sums greater than 7FFFh
2157 /// are saturated to 7FFFh. Negative sums less than 8000h are saturated to
2160 /// \headerfile <x86intrin.h>
2162 /// This intrinsic corresponds to the <c> VPADDSW / PADDSW </c> instruction.
2165 /// A 128-bit signed [8 x i16] vector.
2167 /// A 128-bit signed [8 x i16] vector.
2168 /// \returns A 128-bit signed [8 x i16] vector containing the saturated sums of
2169 /// both parameters.
2170 static __inline__ __m128i __DEFAULT_FN_ATTRS
2171 _mm_adds_epi16(__m128i __a, __m128i __b)
2173 return (__m128i)__builtin_ia32_paddsw128((__v8hi)__a, (__v8hi)__b);
2176 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2177 /// unsigned [16 x i8] vectors, saving each sum in the corresponding element
2178 /// of a 128-bit result vector of [16 x i8]. Positive sums greater than FFh
2179 /// are saturated to FFh. Negative sums are saturated to 00h.
2181 /// \headerfile <x86intrin.h>
2183 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2186 /// A 128-bit unsigned [16 x i8] vector.
2188 /// A 128-bit unsigned [16 x i8] vector.
2189 /// \returns A 128-bit unsigned [16 x i8] vector containing the saturated sums
2190 /// of both parameters.
2191 static __inline__ __m128i __DEFAULT_FN_ATTRS
2192 _mm_adds_epu8(__m128i __a, __m128i __b)
2194 return (__m128i)__builtin_ia32_paddusb128((__v16qi)__a, (__v16qi)__b);
2197 /// \brief Adds, with saturation, the corresponding elements of two 128-bit
2198 /// unsigned [8 x i16] vectors, saving each sum in the corresponding element
2199 /// of a 128-bit result vector of [8 x i16]. Positive sums greater than FFFFh
2200 /// are saturated to FFFFh. Negative sums are saturated to 0000h.
2202 /// \headerfile <x86intrin.h>
2204 /// This intrinsic corresponds to the <c> VPADDUSB / PADDUSB </c> instruction.
2207 /// A 128-bit unsigned [8 x i16] vector.
2209 /// A 128-bit unsigned [8 x i16] vector.
2210 /// \returns A 128-bit unsigned [8 x i16] vector containing the saturated sums
2211 /// of both parameters.
2212 static __inline__ __m128i __DEFAULT_FN_ATTRS
2213 _mm_adds_epu16(__m128i __a, __m128i __b)
2215 return (__m128i)__builtin_ia32_paddusw128((__v8hi)__a, (__v8hi)__b);
2218 /// \brief Computes the rounded avarages of corresponding elements of two
2219 /// 128-bit unsigned [16 x i8] vectors, saving each result in the
2220 /// corresponding element of a 128-bit result vector of [16 x i8].
2222 /// \headerfile <x86intrin.h>
2224 /// This intrinsic corresponds to the <c> VPAVGB / PAVGB </c> instruction.
2227 /// A 128-bit unsigned [16 x i8] vector.
2229 /// A 128-bit unsigned [16 x i8] vector.
2230 /// \returns A 128-bit unsigned [16 x i8] vector containing the rounded
2231 /// averages of both parameters.
2232 static __inline__ __m128i __DEFAULT_FN_ATTRS
2233 _mm_avg_epu8(__m128i __a, __m128i __b)
2235 return (__m128i)__builtin_ia32_pavgb128((__v16qi)__a, (__v16qi)__b);
2238 /// \brief Computes the rounded avarages of corresponding elements of two
2239 /// 128-bit unsigned [8 x i16] vectors, saving each result in the
2240 /// corresponding element of a 128-bit result vector of [8 x i16].
2242 /// \headerfile <x86intrin.h>
2244 /// This intrinsic corresponds to the <c> VPAVGW / PAVGW </c> instruction.
2247 /// A 128-bit unsigned [8 x i16] vector.
2249 /// A 128-bit unsigned [8 x i16] vector.
2250 /// \returns A 128-bit unsigned [8 x i16] vector containing the rounded
2251 /// averages of both parameters.
2252 static __inline__ __m128i __DEFAULT_FN_ATTRS
2253 _mm_avg_epu16(__m128i __a, __m128i __b)
2255 return (__m128i)__builtin_ia32_pavgw128((__v8hi)__a, (__v8hi)__b);
2258 /// \brief Multiplies the corresponding elements of two 128-bit signed [8 x i16]
2259 /// vectors, producing eight intermediate 32-bit signed integer products, and
2260 /// adds the consecutive pairs of 32-bit products to form a 128-bit signed
2261 /// [4 x i32] vector.
2263 /// For example, bits [15:0] of both parameters are multiplied producing a
2264 /// 32-bit product, bits [31:16] of both parameters are multiplied producing
2265 /// a 32-bit product, and the sum of those two products becomes bits [31:0]
2268 /// \headerfile <x86intrin.h>
2270 /// This intrinsic corresponds to the <c> VPMADDWD / PMADDWD </c> instruction.
2273 /// A 128-bit signed [8 x i16] vector.
2275 /// A 128-bit signed [8 x i16] vector.
2276 /// \returns A 128-bit signed [4 x i32] vector containing the sums of products
2277 /// of both parameters.
2278 static __inline__ __m128i __DEFAULT_FN_ATTRS
2279 _mm_madd_epi16(__m128i __a, __m128i __b)
2281 return (__m128i)__builtin_ia32_pmaddwd128((__v8hi)__a, (__v8hi)__b);
2284 /// \brief Compares corresponding elements of two 128-bit signed [8 x i16]
2285 /// vectors, saving the greater value from each comparison in the
2286 /// corresponding element of a 128-bit result vector of [8 x i16].
2288 /// \headerfile <x86intrin.h>
2290 /// This intrinsic corresponds to the <c> VPMAXSW / PMAXSW </c> instruction.
2293 /// A 128-bit signed [8 x i16] vector.
2295 /// A 128-bit signed [8 x i16] vector.
2296 /// \returns A 128-bit signed [8 x i16] vector containing the greater value of
2297 /// each comparison.
2298 static __inline__ __m128i __DEFAULT_FN_ATTRS
2299 _mm_max_epi16(__m128i __a, __m128i __b)
2301 return (__m128i)__builtin_ia32_pmaxsw128((__v8hi)__a, (__v8hi)__b);
2304 /// \brief Compares corresponding elements of two 128-bit unsigned [16 x i8]
2305 /// vectors, saving the greater value from each comparison in the
2306 /// corresponding element of a 128-bit result vector of [16 x i8].
2308 /// \headerfile <x86intrin.h>
2310 /// This intrinsic corresponds to the <c> VPMAXUB / PMAXUB </c> instruction.
2313 /// A 128-bit unsigned [16 x i8] vector.
2315 /// A 128-bit unsigned [16 x i8] vector.
2316 /// \returns A 128-bit unsigned [16 x i8] vector containing the greater value of
2317 /// each comparison.
2318 static __inline__ __m128i __DEFAULT_FN_ATTRS
2319 _mm_max_epu8(__m128i __a, __m128i __b)
2321 return (__m128i)__builtin_ia32_pmaxub128((__v16qi)__a, (__v16qi)__b);
2324 /// \brief Compares corresponding elements of two 128-bit signed [8 x i16]
2325 /// vectors, saving the smaller value from each comparison in the
2326 /// corresponding element of a 128-bit result vector of [8 x i16].
2328 /// \headerfile <x86intrin.h>
2330 /// This intrinsic corresponds to the <c> VPMINSW / PMINSW </c> instruction.
2333 /// A 128-bit signed [8 x i16] vector.
2335 /// A 128-bit signed [8 x i16] vector.
2336 /// \returns A 128-bit signed [8 x i16] vector containing the smaller value of
2337 /// each comparison.
2338 static __inline__ __m128i __DEFAULT_FN_ATTRS
2339 _mm_min_epi16(__m128i __a, __m128i __b)
2341 return (__m128i)__builtin_ia32_pminsw128((__v8hi)__a, (__v8hi)__b);
2344 /// \brief Compares corresponding elements of two 128-bit unsigned [16 x i8]
2345 /// vectors, saving the smaller value from each comparison in the
2346 /// corresponding element of a 128-bit result vector of [16 x i8].
2348 /// \headerfile <x86intrin.h>
2350 /// This intrinsic corresponds to the <c> VPMINUB / PMINUB </c> instruction.
2353 /// A 128-bit unsigned [16 x i8] vector.
2355 /// A 128-bit unsigned [16 x i8] vector.
2356 /// \returns A 128-bit unsigned [16 x i8] vector containing the smaller value of
2357 /// each comparison.
2358 static __inline__ __m128i __DEFAULT_FN_ATTRS
2359 _mm_min_epu8(__m128i __a, __m128i __b)
2361 return (__m128i)__builtin_ia32_pminub128((__v16qi)__a, (__v16qi)__b);
2364 /// \brief Multiplies the corresponding elements of two signed [8 x i16]
2365 /// vectors, saving the upper 16 bits of each 32-bit product in the
2366 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2368 /// \headerfile <x86intrin.h>
2370 /// This intrinsic corresponds to the <c> VPMULHW / PMULHW </c> instruction.
2373 /// A 128-bit signed [8 x i16] vector.
2375 /// A 128-bit signed [8 x i16] vector.
2376 /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
2377 /// each of the eight 32-bit products.
2378 static __inline__ __m128i __DEFAULT_FN_ATTRS
2379 _mm_mulhi_epi16(__m128i __a, __m128i __b)
2381 return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
2384 /// \brief Multiplies the corresponding elements of two unsigned [8 x i16]
2385 /// vectors, saving the upper 16 bits of each 32-bit product in the
2386 /// corresponding element of a 128-bit unsigned [8 x i16] result vector.
2388 /// \headerfile <x86intrin.h>
2390 /// This intrinsic corresponds to the <c> VPMULHUW / PMULHUW </c> instruction.
2393 /// A 128-bit unsigned [8 x i16] vector.
2395 /// A 128-bit unsigned [8 x i16] vector.
2396 /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
2397 /// of each of the eight 32-bit products.
2398 static __inline__ __m128i __DEFAULT_FN_ATTRS
2399 _mm_mulhi_epu16(__m128i __a, __m128i __b)
2401 return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
2404 /// \brief Multiplies the corresponding elements of two signed [8 x i16]
2405 /// vectors, saving the lower 16 bits of each 32-bit product in the
2406 /// corresponding element of a 128-bit signed [8 x i16] result vector.
2408 /// \headerfile <x86intrin.h>
2410 /// This intrinsic corresponds to the <c> VPMULLW / PMULLW </c> instruction.
2413 /// A 128-bit signed [8 x i16] vector.
2415 /// A 128-bit signed [8 x i16] vector.
2416 /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
2417 /// each of the eight 32-bit products.
2418 static __inline__ __m128i __DEFAULT_FN_ATTRS
2419 _mm_mullo_epi16(__m128i __a, __m128i __b)
2421 return (__m128i)((__v8hu)__a * (__v8hu)__b);
2424 /// \brief Multiplies 32-bit unsigned integer values contained in the lower bits
2425 /// of the two 64-bit integer vectors and returns the 64-bit unsigned
2428 /// \headerfile <x86intrin.h>
2430 /// This intrinsic corresponds to the <c> PMULUDQ </c> instruction.
2433 /// A 64-bit integer containing one of the source operands.
2435 /// A 64-bit integer containing one of the source operands.
2436 /// \returns A 64-bit integer vector containing the product of both operands.
2437 static __inline__ __m64 __DEFAULT_FN_ATTRS
2438 _mm_mul_su32(__m64 __a, __m64 __b)
2440 return __builtin_ia32_pmuludq((__v2si)__a, (__v2si)__b);
2443 /// \brief Multiplies 32-bit unsigned integer values contained in the lower
2444 /// bits of the corresponding elements of two [2 x i64] vectors, and returns
2445 /// the 64-bit products in the corresponding elements of a [2 x i64] vector.
2447 /// \headerfile <x86intrin.h>
2449 /// This intrinsic corresponds to the <c> VPMULUDQ / PMULUDQ </c> instruction.
2452 /// A [2 x i64] vector containing one of the source operands.
2454 /// A [2 x i64] vector containing one of the source operands.
2455 /// \returns A [2 x i64] vector containing the product of both operands.
2456 static __inline__ __m128i __DEFAULT_FN_ATTRS
2457 _mm_mul_epu32(__m128i __a, __m128i __b)
2459 return __builtin_ia32_pmuludq128((__v4si)__a, (__v4si)__b);
2462 /// \brief Computes the absolute differences of corresponding 8-bit integer
2463 /// values in two 128-bit vectors. Sums the first 8 absolute differences, and
2464 /// separately sums the second 8 absolute differences. Packs these two
2465 /// unsigned 16-bit integer sums into the upper and lower elements of a
2466 /// [2 x i64] vector.
2468 /// \headerfile <x86intrin.h>
2470 /// This intrinsic corresponds to the <c> VPSADBW / PSADBW </c> instruction.
2473 /// A 128-bit integer vector containing one of the source operands.
2475 /// A 128-bit integer vector containing one of the source operands.
2476 /// \returns A [2 x i64] vector containing the sums of the sets of absolute
2477 /// differences between both operands.
2478 static __inline__ __m128i __DEFAULT_FN_ATTRS
2479 _mm_sad_epu8(__m128i __a, __m128i __b)
2481 return __builtin_ia32_psadbw128((__v16qi)__a, (__v16qi)__b);
2484 /// \brief Subtracts the corresponding 8-bit integer values in the operands.
2486 /// \headerfile <x86intrin.h>
2488 /// This intrinsic corresponds to the <c> VPSUBB / PSUBB </c> instruction.
2491 /// A 128-bit integer vector containing the minuends.
2493 /// A 128-bit integer vector containing the subtrahends.
2494 /// \returns A 128-bit integer vector containing the differences of the values
2495 /// in the operands.
2496 static __inline__ __m128i __DEFAULT_FN_ATTRS
2497 _mm_sub_epi8(__m128i __a, __m128i __b)
2499 return (__m128i)((__v16qu)__a - (__v16qu)__b);
2502 /// \brief Subtracts the corresponding 16-bit integer values in the operands.
2504 /// \headerfile <x86intrin.h>
2506 /// This intrinsic corresponds to the <c> VPSUBW / PSUBW </c> instruction.
2509 /// A 128-bit integer vector containing the minuends.
2511 /// A 128-bit integer vector containing the subtrahends.
2512 /// \returns A 128-bit integer vector containing the differences of the values
2513 /// in the operands.
2514 static __inline__ __m128i __DEFAULT_FN_ATTRS
2515 _mm_sub_epi16(__m128i __a, __m128i __b)
2517 return (__m128i)((__v8hu)__a - (__v8hu)__b);
2520 /// \brief Subtracts the corresponding 32-bit integer values in the operands.
2522 /// \headerfile <x86intrin.h>
2524 /// This intrinsic corresponds to the <c> VPSUBD / PSUBD </c> instruction.
2527 /// A 128-bit integer vector containing the minuends.
2529 /// A 128-bit integer vector containing the subtrahends.
2530 /// \returns A 128-bit integer vector containing the differences of the values
2531 /// in the operands.
2532 static __inline__ __m128i __DEFAULT_FN_ATTRS
2533 _mm_sub_epi32(__m128i __a, __m128i __b)
2535 return (__m128i)((__v4su)__a - (__v4su)__b);
2538 /// \brief Subtracts signed or unsigned 64-bit integer values and writes the
2539 /// difference to the corresponding bits in the destination.
2541 /// \headerfile <x86intrin.h>
2543 /// This intrinsic corresponds to the <c> PSUBQ </c> instruction.
2546 /// A 64-bit integer vector containing the minuend.
2548 /// A 64-bit integer vector containing the subtrahend.
2549 /// \returns A 64-bit integer vector containing the difference of the values in
2551 static __inline__ __m64 __DEFAULT_FN_ATTRS
2552 _mm_sub_si64(__m64 __a, __m64 __b)
2554 return (__m64)__builtin_ia32_psubq((__v1di)__a, (__v1di)__b);
2557 /// \brief Subtracts the corresponding elements of two [2 x i64] vectors.
2559 /// \headerfile <x86intrin.h>
2561 /// This intrinsic corresponds to the <c> VPSUBQ / PSUBQ </c> instruction.
2564 /// A 128-bit integer vector containing the minuends.
2566 /// A 128-bit integer vector containing the subtrahends.
2567 /// \returns A 128-bit integer vector containing the differences of the values
2568 /// in the operands.
2569 static __inline__ __m128i __DEFAULT_FN_ATTRS
2570 _mm_sub_epi64(__m128i __a, __m128i __b)
2572 return (__m128i)((__v2du)__a - (__v2du)__b);
2575 /// \brief Subtracts corresponding 8-bit signed integer values in the input and
2576 /// returns the differences in the corresponding bytes in the destination.
2577 /// Differences greater than 7Fh are saturated to 7Fh, and differences less
2578 /// than 80h are saturated to 80h.
2580 /// \headerfile <x86intrin.h>
2582 /// This intrinsic corresponds to the <c> VPSUBSB / PSUBSB </c> instruction.
2585 /// A 128-bit integer vector containing the minuends.
2587 /// A 128-bit integer vector containing the subtrahends.
2588 /// \returns A 128-bit integer vector containing the differences of the values
2589 /// in the operands.
2590 static __inline__ __m128i __DEFAULT_FN_ATTRS
2591 _mm_subs_epi8(__m128i __a, __m128i __b)
2593 return (__m128i)__builtin_ia32_psubsb128((__v16qi)__a, (__v16qi)__b);
2596 /// \brief Subtracts corresponding 16-bit signed integer values in the input and
2597 /// returns the differences in the corresponding bytes in the destination.
2598 /// Differences greater than 7FFFh are saturated to 7FFFh, and values less
2599 /// than 8000h are saturated to 8000h.
2601 /// \headerfile <x86intrin.h>
2603 /// This intrinsic corresponds to the <c> VPSUBSW / PSUBSW </c> instruction.
2606 /// A 128-bit integer vector containing the minuends.
2608 /// A 128-bit integer vector containing the subtrahends.
2609 /// \returns A 128-bit integer vector containing the differences of the values
2610 /// in the operands.
2611 static __inline__ __m128i __DEFAULT_FN_ATTRS
2612 _mm_subs_epi16(__m128i __a, __m128i __b)
2614 return (__m128i)__builtin_ia32_psubsw128((__v8hi)__a, (__v8hi)__b);
2617 /// \brief Subtracts corresponding 8-bit unsigned integer values in the input
2618 /// and returns the differences in the corresponding bytes in the
2619 /// destination. Differences less than 00h are saturated to 00h.
2621 /// \headerfile <x86intrin.h>
2623 /// This intrinsic corresponds to the <c> VPSUBUSB / PSUBUSB </c> instruction.
2626 /// A 128-bit integer vector containing the minuends.
2628 /// A 128-bit integer vector containing the subtrahends.
2629 /// \returns A 128-bit integer vector containing the unsigned integer
2630 /// differences of the values in the operands.
2631 static __inline__ __m128i __DEFAULT_FN_ATTRS
2632 _mm_subs_epu8(__m128i __a, __m128i __b)
2634 return (__m128i)__builtin_ia32_psubusb128((__v16qi)__a, (__v16qi)__b);
2637 /// \brief Subtracts corresponding 16-bit unsigned integer values in the input
2638 /// and returns the differences in the corresponding bytes in the
2639 /// destination. Differences less than 0000h are saturated to 0000h.
2641 /// \headerfile <x86intrin.h>
2643 /// This intrinsic corresponds to the <c> VPSUBUSW / PSUBUSW </c> instruction.
2646 /// A 128-bit integer vector containing the minuends.
2648 /// A 128-bit integer vector containing the subtrahends.
2649 /// \returns A 128-bit integer vector containing the unsigned integer
2650 /// differences of the values in the operands.
2651 static __inline__ __m128i __DEFAULT_FN_ATTRS
2652 _mm_subs_epu16(__m128i __a, __m128i __b)
2654 return (__m128i)__builtin_ia32_psubusw128((__v8hi)__a, (__v8hi)__b);
2657 /// \brief Performs a bitwise AND of two 128-bit integer vectors.
2659 /// \headerfile <x86intrin.h>
2661 /// This intrinsic corresponds to the <c> VPAND / PAND </c> instruction.
2664 /// A 128-bit integer vector containing one of the source operands.
2666 /// A 128-bit integer vector containing one of the source operands.
2667 /// \returns A 128-bit integer vector containing the bitwise AND of the values
2668 /// in both operands.
2669 static __inline__ __m128i __DEFAULT_FN_ATTRS
2670 _mm_and_si128(__m128i __a, __m128i __b)
2672 return (__m128i)((__v2du)__a & (__v2du)__b);
2675 /// \brief Performs a bitwise AND of two 128-bit integer vectors, using the
2676 /// one's complement of the values contained in the first source operand.
2678 /// \headerfile <x86intrin.h>
2680 /// This intrinsic corresponds to the <c> VPANDN / PANDN </c> instruction.
2683 /// A 128-bit vector containing the left source operand. The one's complement
2684 /// of this value is used in the bitwise AND.
2686 /// A 128-bit vector containing the right source operand.
2687 /// \returns A 128-bit integer vector containing the bitwise AND of the one's
2688 /// complement of the first operand and the values in the second operand.
2689 static __inline__ __m128i __DEFAULT_FN_ATTRS
2690 _mm_andnot_si128(__m128i __a, __m128i __b)
2692 return (__m128i)(~(__v2du)__a & (__v2du)__b);
2694 /// \brief Performs a bitwise OR of two 128-bit integer vectors.
2696 /// \headerfile <x86intrin.h>
2698 /// This intrinsic corresponds to the <c> VPOR / POR </c> instruction.
2701 /// A 128-bit integer vector containing one of the source operands.
2703 /// A 128-bit integer vector containing one of the source operands.
2704 /// \returns A 128-bit integer vector containing the bitwise OR of the values
2705 /// in both operands.
2706 static __inline__ __m128i __DEFAULT_FN_ATTRS
2707 _mm_or_si128(__m128i __a, __m128i __b)
2709 return (__m128i)((__v2du)__a | (__v2du)__b);
2712 /// \brief Performs a bitwise exclusive OR of two 128-bit integer vectors.
2714 /// \headerfile <x86intrin.h>
2716 /// This intrinsic corresponds to the <c> VPXOR / PXOR </c> instruction.
2719 /// A 128-bit integer vector containing one of the source operands.
2721 /// A 128-bit integer vector containing one of the source operands.
2722 /// \returns A 128-bit integer vector containing the bitwise exclusive OR of the
2723 /// values in both operands.
2724 static __inline__ __m128i __DEFAULT_FN_ATTRS
2725 _mm_xor_si128(__m128i __a, __m128i __b)
2727 return (__m128i)((__v2du)__a ^ (__v2du)__b);
2730 /// \brief Left-shifts the 128-bit integer vector operand by the specified
2731 /// number of bytes. Low-order bits are cleared.
2733 /// \headerfile <x86intrin.h>
2736 /// __m128i _mm_slli_si128(__m128i a, const int imm);
2739 /// This intrinsic corresponds to the <c> VPSLLDQ / PSLLDQ </c> instruction.
2742 /// A 128-bit integer vector containing the source operand.
2744 /// An immediate value specifying the number of bytes to left-shift operand
2746 /// \returns A 128-bit integer vector containing the left-shifted value.
2747 #define _mm_slli_si128(a, imm) __extension__ ({ \
2748 (__m128i)__builtin_shufflevector( \
2749 (__v16qi)_mm_setzero_si128(), \
2750 (__v16qi)(__m128i)(a), \
2751 ((char)(imm)&0xF0) ? 0 : 16 - (char)(imm), \
2752 ((char)(imm)&0xF0) ? 1 : 17 - (char)(imm), \
2753 ((char)(imm)&0xF0) ? 2 : 18 - (char)(imm), \
2754 ((char)(imm)&0xF0) ? 3 : 19 - (char)(imm), \
2755 ((char)(imm)&0xF0) ? 4 : 20 - (char)(imm), \
2756 ((char)(imm)&0xF0) ? 5 : 21 - (char)(imm), \
2757 ((char)(imm)&0xF0) ? 6 : 22 - (char)(imm), \
2758 ((char)(imm)&0xF0) ? 7 : 23 - (char)(imm), \
2759 ((char)(imm)&0xF0) ? 8 : 24 - (char)(imm), \
2760 ((char)(imm)&0xF0) ? 9 : 25 - (char)(imm), \
2761 ((char)(imm)&0xF0) ? 10 : 26 - (char)(imm), \
2762 ((char)(imm)&0xF0) ? 11 : 27 - (char)(imm), \
2763 ((char)(imm)&0xF0) ? 12 : 28 - (char)(imm), \
2764 ((char)(imm)&0xF0) ? 13 : 29 - (char)(imm), \
2765 ((char)(imm)&0xF0) ? 14 : 30 - (char)(imm), \
2766 ((char)(imm)&0xF0) ? 15 : 31 - (char)(imm)); })
2768 #define _mm_bslli_si128(a, imm) \
2769 _mm_slli_si128((a), (imm))
2771 /// \brief Left-shifts each 16-bit value in the 128-bit integer vector operand
2772 /// by the specified number of bits. Low-order bits are cleared.
2774 /// \headerfile <x86intrin.h>
2776 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2779 /// A 128-bit integer vector containing the source operand.
2781 /// An integer value specifying the number of bits to left-shift each value
2782 /// in operand \a __a.
2783 /// \returns A 128-bit integer vector containing the left-shifted values.
2784 static __inline__ __m128i __DEFAULT_FN_ATTRS
2785 _mm_slli_epi16(__m128i __a, int __count)
2787 return (__m128i)__builtin_ia32_psllwi128((__v8hi)__a, __count);
2790 /// \brief Left-shifts each 16-bit value in the 128-bit integer vector operand
2791 /// by the specified number of bits. Low-order bits are cleared.
2793 /// \headerfile <x86intrin.h>
2795 /// This intrinsic corresponds to the <c> VPSLLW / PSLLW </c> instruction.
2798 /// A 128-bit integer vector containing the source operand.
2800 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2801 /// to left-shift each value in operand \a __a.
2802 /// \returns A 128-bit integer vector containing the left-shifted values.
2803 static __inline__ __m128i __DEFAULT_FN_ATTRS
2804 _mm_sll_epi16(__m128i __a, __m128i __count)
2806 return (__m128i)__builtin_ia32_psllw128((__v8hi)__a, (__v8hi)__count);
2809 /// \brief Left-shifts each 32-bit value in the 128-bit integer vector operand
2810 /// by the specified number of bits. Low-order bits are cleared.
2812 /// \headerfile <x86intrin.h>
2814 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2817 /// A 128-bit integer vector containing the source operand.
2819 /// An integer value specifying the number of bits to left-shift each value
2820 /// in operand \a __a.
2821 /// \returns A 128-bit integer vector containing the left-shifted values.
2822 static __inline__ __m128i __DEFAULT_FN_ATTRS
2823 _mm_slli_epi32(__m128i __a, int __count)
2825 return (__m128i)__builtin_ia32_pslldi128((__v4si)__a, __count);
2828 /// \brief Left-shifts each 32-bit value in the 128-bit integer vector operand
2829 /// by the specified number of bits. Low-order bits are cleared.
2831 /// \headerfile <x86intrin.h>
2833 /// This intrinsic corresponds to the <c> VPSLLD / PSLLD </c> instruction.
2836 /// A 128-bit integer vector containing the source operand.
2838 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2839 /// to left-shift each value in operand \a __a.
2840 /// \returns A 128-bit integer vector containing the left-shifted values.
2841 static __inline__ __m128i __DEFAULT_FN_ATTRS
2842 _mm_sll_epi32(__m128i __a, __m128i __count)
2844 return (__m128i)__builtin_ia32_pslld128((__v4si)__a, (__v4si)__count);
2847 /// \brief Left-shifts each 64-bit value in the 128-bit integer vector operand
2848 /// by the specified number of bits. Low-order bits are cleared.
2850 /// \headerfile <x86intrin.h>
2852 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2855 /// A 128-bit integer vector containing the source operand.
2857 /// An integer value specifying the number of bits to left-shift each value
2858 /// in operand \a __a.
2859 /// \returns A 128-bit integer vector containing the left-shifted values.
2860 static __inline__ __m128i __DEFAULT_FN_ATTRS
2861 _mm_slli_epi64(__m128i __a, int __count)
2863 return __builtin_ia32_psllqi128((__v2di)__a, __count);
2866 /// \brief Left-shifts each 64-bit value in the 128-bit integer vector operand
2867 /// by the specified number of bits. Low-order bits are cleared.
2869 /// \headerfile <x86intrin.h>
2871 /// This intrinsic corresponds to the <c> VPSLLQ / PSLLQ </c> instruction.
2874 /// A 128-bit integer vector containing the source operand.
2876 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2877 /// to left-shift each value in operand \a __a.
2878 /// \returns A 128-bit integer vector containing the left-shifted values.
2879 static __inline__ __m128i __DEFAULT_FN_ATTRS
2880 _mm_sll_epi64(__m128i __a, __m128i __count)
2882 return __builtin_ia32_psllq128((__v2di)__a, (__v2di)__count);
2885 /// \brief Right-shifts each 16-bit value in the 128-bit integer vector operand
2886 /// by the specified number of bits. High-order bits are filled with the sign
2887 /// bit of the initial value.
2889 /// \headerfile <x86intrin.h>
2891 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2894 /// A 128-bit integer vector containing the source operand.
2896 /// An integer value specifying the number of bits to right-shift each value
2897 /// in operand \a __a.
2898 /// \returns A 128-bit integer vector containing the right-shifted values.
2899 static __inline__ __m128i __DEFAULT_FN_ATTRS
2900 _mm_srai_epi16(__m128i __a, int __count)
2902 return (__m128i)__builtin_ia32_psrawi128((__v8hi)__a, __count);
2905 /// \brief Right-shifts each 16-bit value in the 128-bit integer vector operand
2906 /// by the specified number of bits. High-order bits are filled with the sign
2907 /// bit of the initial value.
2909 /// \headerfile <x86intrin.h>
2911 /// This intrinsic corresponds to the <c> VPSRAW / PSRAW </c> instruction.
2914 /// A 128-bit integer vector containing the source operand.
2916 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2917 /// to right-shift each value in operand \a __a.
2918 /// \returns A 128-bit integer vector containing the right-shifted values.
2919 static __inline__ __m128i __DEFAULT_FN_ATTRS
2920 _mm_sra_epi16(__m128i __a, __m128i __count)
2922 return (__m128i)__builtin_ia32_psraw128((__v8hi)__a, (__v8hi)__count);
2925 /// \brief Right-shifts each 32-bit value in the 128-bit integer vector operand
2926 /// by the specified number of bits. High-order bits are filled with the sign
2927 /// bit of the initial value.
2929 /// \headerfile <x86intrin.h>
2931 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
2934 /// A 128-bit integer vector containing the source operand.
2936 /// An integer value specifying the number of bits to right-shift each value
2937 /// in operand \a __a.
2938 /// \returns A 128-bit integer vector containing the right-shifted values.
2939 static __inline__ __m128i __DEFAULT_FN_ATTRS
2940 _mm_srai_epi32(__m128i __a, int __count)
2942 return (__m128i)__builtin_ia32_psradi128((__v4si)__a, __count);
2945 /// \brief Right-shifts each 32-bit value in the 128-bit integer vector operand
2946 /// by the specified number of bits. High-order bits are filled with the sign
2947 /// bit of the initial value.
2949 /// \headerfile <x86intrin.h>
2951 /// This intrinsic corresponds to the <c> VPSRAD / PSRAD </c> instruction.
2954 /// A 128-bit integer vector containing the source operand.
2956 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
2957 /// to right-shift each value in operand \a __a.
2958 /// \returns A 128-bit integer vector containing the right-shifted values.
2959 static __inline__ __m128i __DEFAULT_FN_ATTRS
2960 _mm_sra_epi32(__m128i __a, __m128i __count)
2962 return (__m128i)__builtin_ia32_psrad128((__v4si)__a, (__v4si)__count);
2965 /// \brief Right-shifts the 128-bit integer vector operand by the specified
2966 /// number of bytes. High-order bits are cleared.
2968 /// \headerfile <x86intrin.h>
2971 /// __m128i _mm_srli_si128(__m128i a, const int imm);
2974 /// This intrinsic corresponds to the <c> VPSRLDQ / PSRLDQ </c> instruction.
2977 /// A 128-bit integer vector containing the source operand.
2979 /// An immediate value specifying the number of bytes to right-shift operand
2981 /// \returns A 128-bit integer vector containing the right-shifted value.
2982 #define _mm_srli_si128(a, imm) __extension__ ({ \
2983 (__m128i)__builtin_shufflevector( \
2984 (__v16qi)(__m128i)(a), \
2985 (__v16qi)_mm_setzero_si128(), \
2986 ((char)(imm)&0xF0) ? 16 : (char)(imm) + 0, \
2987 ((char)(imm)&0xF0) ? 17 : (char)(imm) + 1, \
2988 ((char)(imm)&0xF0) ? 18 : (char)(imm) + 2, \
2989 ((char)(imm)&0xF0) ? 19 : (char)(imm) + 3, \
2990 ((char)(imm)&0xF0) ? 20 : (char)(imm) + 4, \
2991 ((char)(imm)&0xF0) ? 21 : (char)(imm) + 5, \
2992 ((char)(imm)&0xF0) ? 22 : (char)(imm) + 6, \
2993 ((char)(imm)&0xF0) ? 23 : (char)(imm) + 7, \
2994 ((char)(imm)&0xF0) ? 24 : (char)(imm) + 8, \
2995 ((char)(imm)&0xF0) ? 25 : (char)(imm) + 9, \
2996 ((char)(imm)&0xF0) ? 26 : (char)(imm) + 10, \
2997 ((char)(imm)&0xF0) ? 27 : (char)(imm) + 11, \
2998 ((char)(imm)&0xF0) ? 28 : (char)(imm) + 12, \
2999 ((char)(imm)&0xF0) ? 29 : (char)(imm) + 13, \
3000 ((char)(imm)&0xF0) ? 30 : (char)(imm) + 14, \
3001 ((char)(imm)&0xF0) ? 31 : (char)(imm) + 15); })
3003 #define _mm_bsrli_si128(a, imm) \
3004 _mm_srli_si128((a), (imm))
3006 /// \brief Right-shifts each of 16-bit values in the 128-bit integer vector
3007 /// operand by the specified number of bits. High-order bits are cleared.
3009 /// \headerfile <x86intrin.h>
3011 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3014 /// A 128-bit integer vector containing the source operand.
3016 /// An integer value specifying the number of bits to right-shift each value
3017 /// in operand \a __a.
3018 /// \returns A 128-bit integer vector containing the right-shifted values.
3019 static __inline__ __m128i __DEFAULT_FN_ATTRS
3020 _mm_srli_epi16(__m128i __a, int __count)
3022 return (__m128i)__builtin_ia32_psrlwi128((__v8hi)__a, __count);
3025 /// \brief Right-shifts each of 16-bit values in the 128-bit integer vector
3026 /// operand by the specified number of bits. High-order bits are cleared.
3028 /// \headerfile <x86intrin.h>
3030 /// This intrinsic corresponds to the <c> VPSRLW / PSRLW </c> instruction.
3033 /// A 128-bit integer vector containing the source operand.
3035 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3036 /// to right-shift each value in operand \a __a.
3037 /// \returns A 128-bit integer vector containing the right-shifted values.
3038 static __inline__ __m128i __DEFAULT_FN_ATTRS
3039 _mm_srl_epi16(__m128i __a, __m128i __count)
3041 return (__m128i)__builtin_ia32_psrlw128((__v8hi)__a, (__v8hi)__count);
3044 /// \brief Right-shifts each of 32-bit values in the 128-bit integer vector
3045 /// operand by the specified number of bits. High-order bits are cleared.
3047 /// \headerfile <x86intrin.h>
3049 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3052 /// A 128-bit integer vector containing the source operand.
3054 /// An integer value specifying the number of bits to right-shift each value
3055 /// in operand \a __a.
3056 /// \returns A 128-bit integer vector containing the right-shifted values.
3057 static __inline__ __m128i __DEFAULT_FN_ATTRS
3058 _mm_srli_epi32(__m128i __a, int __count)
3060 return (__m128i)__builtin_ia32_psrldi128((__v4si)__a, __count);
3063 /// \brief Right-shifts each of 32-bit values in the 128-bit integer vector
3064 /// operand by the specified number of bits. High-order bits are cleared.
3066 /// \headerfile <x86intrin.h>
3068 /// This intrinsic corresponds to the <c> VPSRLD / PSRLD </c> instruction.
3071 /// A 128-bit integer vector containing the source operand.
3073 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3074 /// to right-shift each value in operand \a __a.
3075 /// \returns A 128-bit integer vector containing the right-shifted values.
3076 static __inline__ __m128i __DEFAULT_FN_ATTRS
3077 _mm_srl_epi32(__m128i __a, __m128i __count)
3079 return (__m128i)__builtin_ia32_psrld128((__v4si)__a, (__v4si)__count);
3082 /// \brief Right-shifts each of 64-bit values in the 128-bit integer vector
3083 /// operand by the specified number of bits. High-order bits are cleared.
3085 /// \headerfile <x86intrin.h>
3087 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3090 /// A 128-bit integer vector containing the source operand.
3092 /// An integer value specifying the number of bits to right-shift each value
3093 /// in operand \a __a.
3094 /// \returns A 128-bit integer vector containing the right-shifted values.
3095 static __inline__ __m128i __DEFAULT_FN_ATTRS
3096 _mm_srli_epi64(__m128i __a, int __count)
3098 return __builtin_ia32_psrlqi128((__v2di)__a, __count);
3101 /// \brief Right-shifts each of 64-bit values in the 128-bit integer vector
3102 /// operand by the specified number of bits. High-order bits are cleared.
3104 /// \headerfile <x86intrin.h>
3106 /// This intrinsic corresponds to the <c> VPSRLQ / PSRLQ </c> instruction.
3109 /// A 128-bit integer vector containing the source operand.
3111 /// A 128-bit integer vector in which bits [63:0] specify the number of bits
3112 /// to right-shift each value in operand \a __a.
3113 /// \returns A 128-bit integer vector containing the right-shifted values.
3114 static __inline__ __m128i __DEFAULT_FN_ATTRS
3115 _mm_srl_epi64(__m128i __a, __m128i __count)
3117 return __builtin_ia32_psrlq128((__v2di)__a, (__v2di)__count);
3120 /// \brief Compares each of the corresponding 8-bit values of the 128-bit
3121 /// integer vectors for equality. Each comparison yields 0h for false, FFh
3124 /// \headerfile <x86intrin.h>
3126 /// This intrinsic corresponds to the <c> VPCMPEQB / PCMPEQB </c> instruction.
3129 /// A 128-bit integer vector.
3131 /// A 128-bit integer vector.
3132 /// \returns A 128-bit integer vector containing the comparison results.
3133 static __inline__ __m128i __DEFAULT_FN_ATTRS
3134 _mm_cmpeq_epi8(__m128i __a, __m128i __b)
3136 return (__m128i)((__v16qi)__a == (__v16qi)__b);
3139 /// \brief Compares each of the corresponding 16-bit values of the 128-bit
3140 /// integer vectors for equality. Each comparison yields 0h for false, FFFFh
3143 /// \headerfile <x86intrin.h>
3145 /// This intrinsic corresponds to the <c> VPCMPEQW / PCMPEQW </c> instruction.
3148 /// A 128-bit integer vector.
3150 /// A 128-bit integer vector.
3151 /// \returns A 128-bit integer vector containing the comparison results.
3152 static __inline__ __m128i __DEFAULT_FN_ATTRS
3153 _mm_cmpeq_epi16(__m128i __a, __m128i __b)
3155 return (__m128i)((__v8hi)__a == (__v8hi)__b);
3158 /// \brief Compares each of the corresponding 32-bit values of the 128-bit
3159 /// integer vectors for equality. Each comparison yields 0h for false,
3160 /// FFFFFFFFh for true.
3162 /// \headerfile <x86intrin.h>
3164 /// This intrinsic corresponds to the <c> VPCMPEQD / PCMPEQD </c> instruction.
3167 /// A 128-bit integer vector.
3169 /// A 128-bit integer vector.
3170 /// \returns A 128-bit integer vector containing the comparison results.
3171 static __inline__ __m128i __DEFAULT_FN_ATTRS
3172 _mm_cmpeq_epi32(__m128i __a, __m128i __b)
3174 return (__m128i)((__v4si)__a == (__v4si)__b);
3177 /// \brief Compares each of the corresponding signed 8-bit values of the 128-bit
3178 /// integer vectors to determine if the values in the first operand are
3179 /// greater than those in the second operand. Each comparison yields 0h for
3180 /// false, FFh for true.
3182 /// \headerfile <x86intrin.h>
3184 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3187 /// A 128-bit integer vector.
3189 /// A 128-bit integer vector.
3190 /// \returns A 128-bit integer vector containing the comparison results.
3191 static __inline__ __m128i __DEFAULT_FN_ATTRS
3192 _mm_cmpgt_epi8(__m128i __a, __m128i __b)
3194 /* This function always performs a signed comparison, but __v16qi is a char
3195 which may be signed or unsigned, so use __v16qs. */
3196 return (__m128i)((__v16qs)__a > (__v16qs)__b);
3199 /// \brief Compares each of the corresponding signed 16-bit values of the
3200 /// 128-bit integer vectors to determine if the values in the first operand
3201 /// are greater than those in the second operand.
3203 /// Each comparison yields 0h for false, FFFFh for true.
3205 /// \headerfile <x86intrin.h>
3207 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3210 /// A 128-bit integer vector.
3212 /// A 128-bit integer vector.
3213 /// \returns A 128-bit integer vector containing the comparison results.
3214 static __inline__ __m128i __DEFAULT_FN_ATTRS
3215 _mm_cmpgt_epi16(__m128i __a, __m128i __b)
3217 return (__m128i)((__v8hi)__a > (__v8hi)__b);
3220 /// \brief Compares each of the corresponding signed 32-bit values of the
3221 /// 128-bit integer vectors to determine if the values in the first operand
3222 /// are greater than those in the second operand.
3224 /// Each comparison yields 0h for false, FFFFFFFFh for true.
3226 /// \headerfile <x86intrin.h>
3228 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3231 /// A 128-bit integer vector.
3233 /// A 128-bit integer vector.
3234 /// \returns A 128-bit integer vector containing the comparison results.
3235 static __inline__ __m128i __DEFAULT_FN_ATTRS
3236 _mm_cmpgt_epi32(__m128i __a, __m128i __b)
3238 return (__m128i)((__v4si)__a > (__v4si)__b);
3241 /// \brief Compares each of the corresponding signed 8-bit values of the 128-bit
3242 /// integer vectors to determine if the values in the first operand are less
3243 /// than those in the second operand.
3245 /// Each comparison yields 0h for false, FFh for true.
3247 /// \headerfile <x86intrin.h>
3249 /// This intrinsic corresponds to the <c> VPCMPGTB / PCMPGTB </c> instruction.
3252 /// A 128-bit integer vector.
3254 /// A 128-bit integer vector.
3255 /// \returns A 128-bit integer vector containing the comparison results.
3256 static __inline__ __m128i __DEFAULT_FN_ATTRS
3257 _mm_cmplt_epi8(__m128i __a, __m128i __b)
3259 return _mm_cmpgt_epi8(__b, __a);
3262 /// \brief Compares each of the corresponding signed 16-bit values of the
3263 /// 128-bit integer vectors to determine if the values in the first operand
3264 /// are less than those in the second operand.
3266 /// Each comparison yields 0h for false, FFFFh for true.
3268 /// \headerfile <x86intrin.h>
3270 /// This intrinsic corresponds to the <c> VPCMPGTW / PCMPGTW </c> instruction.
3273 /// A 128-bit integer vector.
3275 /// A 128-bit integer vector.
3276 /// \returns A 128-bit integer vector containing the comparison results.
3277 static __inline__ __m128i __DEFAULT_FN_ATTRS
3278 _mm_cmplt_epi16(__m128i __a, __m128i __b)
3280 return _mm_cmpgt_epi16(__b, __a);
3283 /// \brief Compares each of the corresponding signed 32-bit values of the
3284 /// 128-bit integer vectors to determine if the values in the first operand
3285 /// are less than those in the second operand.
3287 /// Each comparison yields 0h for false, FFFFFFFFh for true.
3289 /// \headerfile <x86intrin.h>
3291 /// This intrinsic corresponds to the <c> VPCMPGTD / PCMPGTD </c> instruction.
3294 /// A 128-bit integer vector.
3296 /// A 128-bit integer vector.
3297 /// \returns A 128-bit integer vector containing the comparison results.
3298 static __inline__ __m128i __DEFAULT_FN_ATTRS
3299 _mm_cmplt_epi32(__m128i __a, __m128i __b)
3301 return _mm_cmpgt_epi32(__b, __a);
3305 /// \brief Converts a 64-bit signed integer value from the second operand into a
3306 /// double-precision value and returns it in the lower element of a [2 x
3307 /// double] vector; the upper element of the returned vector is copied from
3308 /// the upper element of the first operand.
3310 /// \headerfile <x86intrin.h>
3312 /// This intrinsic corresponds to the <c> VCVTSI2SD / CVTSI2SD </c> instruction.
3315 /// A 128-bit vector of [2 x double]. The upper 64 bits of this operand are
3316 /// copied to the upper 64 bits of the destination.
3318 /// A 64-bit signed integer operand containing the value to be converted.
3319 /// \returns A 128-bit vector of [2 x double] whose lower 64 bits contain the
3320 /// converted value of the second operand. The upper 64 bits are copied from
3321 /// the upper 64 bits of the first operand.
3322 static __inline__ __m128d __DEFAULT_FN_ATTRS
3323 _mm_cvtsi64_sd(__m128d __a, long long __b)
3329 /// \brief Converts the first (lower) element of a vector of [2 x double] into a
3330 /// 64-bit signed integer value, according to the current rounding mode.
3332 /// \headerfile <x86intrin.h>
3334 /// This intrinsic corresponds to the <c> VCVTSD2SI / CVTSD2SI </c> instruction.
3337 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3339 /// \returns A 64-bit signed integer containing the converted value.
3340 static __inline__ long long __DEFAULT_FN_ATTRS
3341 _mm_cvtsd_si64(__m128d __a)
3343 return __builtin_ia32_cvtsd2si64((__v2df)__a);
3346 /// \brief Converts the first (lower) element of a vector of [2 x double] into a
3347 /// 64-bit signed integer value, truncating the result when it is inexact.
3349 /// \headerfile <x86intrin.h>
3351 /// This intrinsic corresponds to the <c> VCVTTSD2SI / CVTTSD2SI </c>
3355 /// A 128-bit vector of [2 x double]. The lower 64 bits are used in the
3357 /// \returns A 64-bit signed integer containing the converted value.
3358 static __inline__ long long __DEFAULT_FN_ATTRS
3359 _mm_cvttsd_si64(__m128d __a)
3361 return __builtin_ia32_cvttsd2si64((__v2df)__a);
3365 /// \brief Converts a vector of [4 x i32] into a vector of [4 x float].
3367 /// \headerfile <x86intrin.h>
3369 /// This intrinsic corresponds to the <c> VCVTDQ2PS / CVTDQ2PS </c> instruction.
3372 /// A 128-bit integer vector.
3373 /// \returns A 128-bit vector of [4 x float] containing the converted values.
3374 static __inline__ __m128 __DEFAULT_FN_ATTRS
3375 _mm_cvtepi32_ps(__m128i __a)
3377 return __builtin_ia32_cvtdq2ps((__v4si)__a);
3380 /// \brief Converts a vector of [4 x float] into a vector of [4 x i32].
3382 /// \headerfile <x86intrin.h>
3384 /// This intrinsic corresponds to the <c> VCVTPS2DQ / CVTPS2DQ </c> instruction.
3387 /// A 128-bit vector of [4 x float].
3388 /// \returns A 128-bit integer vector of [4 x i32] containing the converted
3390 static __inline__ __m128i __DEFAULT_FN_ATTRS
3391 _mm_cvtps_epi32(__m128 __a)
3393 return (__m128i)__builtin_ia32_cvtps2dq((__v4sf)__a);
3396 /// \brief Converts a vector of [4 x float] into a vector of [4 x i32],
3397 /// truncating the result when it is inexact.
3399 /// \headerfile <x86intrin.h>
3401 /// This intrinsic corresponds to the <c> VCVTTPS2DQ / CVTTPS2DQ </c>
3405 /// A 128-bit vector of [4 x float].
3406 /// \returns A 128-bit vector of [4 x i32] containing the converted values.
3407 static __inline__ __m128i __DEFAULT_FN_ATTRS
3408 _mm_cvttps_epi32(__m128 __a)
3410 return (__m128i)__builtin_ia32_cvttps2dq((__v4sf)__a);
3413 /// \brief Returns a vector of [4 x i32] where the lowest element is the input
3414 /// operand and the remaining elements are zero.
3416 /// \headerfile <x86intrin.h>
3418 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3421 /// A 32-bit signed integer operand.
3422 /// \returns A 128-bit vector of [4 x i32].
3423 static __inline__ __m128i __DEFAULT_FN_ATTRS
3424 _mm_cvtsi32_si128(int __a)
3426 return (__m128i)(__v4si){ __a, 0, 0, 0 };
3430 /// \brief Returns a vector of [2 x i64] where the lower element is the input
3431 /// operand and the upper element is zero.
3433 /// \headerfile <x86intrin.h>
3435 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3438 /// A 64-bit signed integer operand containing the value to be converted.
3439 /// \returns A 128-bit vector of [2 x i64] containing the converted value.
3440 static __inline__ __m128i __DEFAULT_FN_ATTRS
3441 _mm_cvtsi64_si128(long long __a)
3443 return (__m128i){ __a, 0 };
3447 /// \brief Moves the least significant 32 bits of a vector of [4 x i32] to a
3448 /// 32-bit signed integer value.
3450 /// \headerfile <x86intrin.h>
3452 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
3455 /// A vector of [4 x i32]. The least significant 32 bits are moved to the
3457 /// \returns A 32-bit signed integer containing the moved value.
3458 static __inline__ int __DEFAULT_FN_ATTRS
3459 _mm_cvtsi128_si32(__m128i __a)
3461 __v4si __b = (__v4si)__a;
3466 /// \brief Moves the least significant 64 bits of a vector of [2 x i64] to a
3467 /// 64-bit signed integer value.
3469 /// \headerfile <x86intrin.h>
3471 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3474 /// A vector of [2 x i64]. The least significant 64 bits are moved to the
3476 /// \returns A 64-bit signed integer containing the moved value.
3477 static __inline__ long long __DEFAULT_FN_ATTRS
3478 _mm_cvtsi128_si64(__m128i __a)
3484 /// \brief Moves packed integer values from an aligned 128-bit memory location
3485 /// to elements in a 128-bit integer vector.
3487 /// \headerfile <x86intrin.h>
3489 /// This intrinsic corresponds to the <c> VMOVDQA / MOVDQA </c> instruction.
3492 /// An aligned pointer to a memory location containing integer values.
3493 /// \returns A 128-bit integer vector containing the moved values.
3494 static __inline__ __m128i __DEFAULT_FN_ATTRS
3495 _mm_load_si128(__m128i const *__p)
3500 /// \brief Moves packed integer values from an unaligned 128-bit memory location
3501 /// to elements in a 128-bit integer vector.
3503 /// \headerfile <x86intrin.h>
3505 /// This intrinsic corresponds to the <c> VMOVDQU / MOVDQU </c> instruction.
3508 /// A pointer to a memory location containing integer values.
3509 /// \returns A 128-bit integer vector containing the moved values.
3510 static __inline__ __m128i __DEFAULT_FN_ATTRS
3511 _mm_loadu_si128(__m128i const *__p)
3513 struct __loadu_si128 {
3515 } __attribute__((__packed__, __may_alias__));
3516 return ((struct __loadu_si128*)__p)->__v;
3519 /// \brief Returns a vector of [2 x i64] where the lower element is taken from
3520 /// the lower element of the operand, and the upper element is zero.
3522 /// \headerfile <x86intrin.h>
3524 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
3527 /// A 128-bit vector of [2 x i64]. Bits [63:0] are written to bits [63:0] of
3528 /// the destination.
3529 /// \returns A 128-bit vector of [2 x i64]. The lower order bits contain the
3530 /// moved value. The higher order bits are cleared.
3531 static __inline__ __m128i __DEFAULT_FN_ATTRS
3532 _mm_loadl_epi64(__m128i const *__p)
3534 struct __mm_loadl_epi64_struct {
3536 } __attribute__((__packed__, __may_alias__));
3537 return (__m128i) { ((struct __mm_loadl_epi64_struct*)__p)->__u, 0};
3540 /// \brief Generates a 128-bit vector of [4 x i32] with unspecified content.
3541 /// This could be used as an argument to another intrinsic function where the
3542 /// argument is required but the value is not actually used.
3544 /// \headerfile <x86intrin.h>
3546 /// This intrinsic has no corresponding instruction.
3548 /// \returns A 128-bit vector of [4 x i32] with unspecified content.
3549 static __inline__ __m128i __DEFAULT_FN_ATTRS
3550 _mm_undefined_si128(void)
3552 return (__m128i)__builtin_ia32_undef128();
3555 /// \brief Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3556 /// the specified 64-bit integer values.
3558 /// \headerfile <x86intrin.h>
3560 /// This intrinsic is a utility function and does not correspond to a specific
3564 /// A 64-bit integer value used to initialize the upper 64 bits of the
3565 /// destination vector of [2 x i64].
3567 /// A 64-bit integer value used to initialize the lower 64 bits of the
3568 /// destination vector of [2 x i64].
3569 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3570 /// provided in the operands.
3571 static __inline__ __m128i __DEFAULT_FN_ATTRS
3572 _mm_set_epi64x(long long __q1, long long __q0)
3574 return (__m128i){ __q0, __q1 };
3577 /// \brief Initializes both 64-bit values in a 128-bit vector of [2 x i64] with
3578 /// the specified 64-bit integer values.
3580 /// \headerfile <x86intrin.h>
3582 /// This intrinsic is a utility function and does not correspond to a specific
3586 /// A 64-bit integer value used to initialize the upper 64 bits of the
3587 /// destination vector of [2 x i64].
3589 /// A 64-bit integer value used to initialize the lower 64 bits of the
3590 /// destination vector of [2 x i64].
3591 /// \returns An initialized 128-bit vector of [2 x i64] containing the values
3592 /// provided in the operands.
3593 static __inline__ __m128i __DEFAULT_FN_ATTRS
3594 _mm_set_epi64(__m64 __q1, __m64 __q0)
3596 return (__m128i){ (long long)__q0, (long long)__q1 };
3599 /// \brief Initializes the 32-bit values in a 128-bit vector of [4 x i32] with
3600 /// the specified 32-bit integer values.
3602 /// \headerfile <x86intrin.h>
3604 /// This intrinsic is a utility function and does not correspond to a specific
3608 /// A 32-bit integer value used to initialize bits [127:96] of the
3609 /// destination vector.
3611 /// A 32-bit integer value used to initialize bits [95:64] of the destination
3614 /// A 32-bit integer value used to initialize bits [63:32] of the destination
3617 /// A 32-bit integer value used to initialize bits [31:0] of the destination
3619 /// \returns An initialized 128-bit vector of [4 x i32] containing the values
3620 /// provided in the operands.
3621 static __inline__ __m128i __DEFAULT_FN_ATTRS
3622 _mm_set_epi32(int __i3, int __i2, int __i1, int __i0)
3624 return (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3627 /// \brief Initializes the 16-bit values in a 128-bit vector of [8 x i16] with
3628 /// the specified 16-bit integer values.
3630 /// \headerfile <x86intrin.h>
3632 /// This intrinsic is a utility function and does not correspond to a specific
3636 /// A 16-bit integer value used to initialize bits [127:112] of the
3637 /// destination vector.
3639 /// A 16-bit integer value used to initialize bits [111:96] of the
3640 /// destination vector.
3642 /// A 16-bit integer value used to initialize bits [95:80] of the destination
3645 /// A 16-bit integer value used to initialize bits [79:64] of the destination
3648 /// A 16-bit integer value used to initialize bits [63:48] of the destination
3651 /// A 16-bit integer value used to initialize bits [47:32] of the destination
3654 /// A 16-bit integer value used to initialize bits [31:16] of the destination
3657 /// A 16-bit integer value used to initialize bits [15:0] of the destination
3659 /// \returns An initialized 128-bit vector of [8 x i16] containing the values
3660 /// provided in the operands.
3661 static __inline__ __m128i __DEFAULT_FN_ATTRS
3662 _mm_set_epi16(short __w7, short __w6, short __w5, short __w4, short __w3, short __w2, short __w1, short __w0)
3664 return (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3667 /// \brief Initializes the 8-bit values in a 128-bit vector of [16 x i8] with
3668 /// the specified 8-bit integer values.
3670 /// \headerfile <x86intrin.h>
3672 /// This intrinsic is a utility function and does not correspond to a specific
3676 /// Initializes bits [127:120] of the destination vector.
3678 /// Initializes bits [119:112] of the destination vector.
3680 /// Initializes bits [111:104] of the destination vector.
3682 /// Initializes bits [103:96] of the destination vector.
3684 /// Initializes bits [95:88] of the destination vector.
3686 /// Initializes bits [87:80] of the destination vector.
3688 /// Initializes bits [79:72] of the destination vector.
3690 /// Initializes bits [71:64] of the destination vector.
3692 /// Initializes bits [63:56] of the destination vector.
3694 /// Initializes bits [55:48] of the destination vector.
3696 /// Initializes bits [47:40] of the destination vector.
3698 /// Initializes bits [39:32] of the destination vector.
3700 /// Initializes bits [31:24] of the destination vector.
3702 /// Initializes bits [23:16] of the destination vector.
3704 /// Initializes bits [15:8] of the destination vector.
3706 /// Initializes bits [7:0] of the destination vector.
3707 /// \returns An initialized 128-bit vector of [16 x i8] containing the values
3708 /// provided in the operands.
3709 static __inline__ __m128i __DEFAULT_FN_ATTRS
3710 _mm_set_epi8(char __b15, char __b14, char __b13, char __b12, char __b11, char __b10, char __b9, char __b8, char __b7, char __b6, char __b5, char __b4, char __b3, char __b2, char __b1, char __b0)
3712 return (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3715 /// \brief Initializes both values in a 128-bit integer vector with the
3716 /// specified 64-bit integer value.
3718 /// \headerfile <x86intrin.h>
3720 /// This intrinsic is a utility function and does not correspond to a specific
3724 /// Integer value used to initialize the elements of the destination integer
3726 /// \returns An initialized 128-bit integer vector of [2 x i64] with both
3727 /// elements containing the value provided in the operand.
3728 static __inline__ __m128i __DEFAULT_FN_ATTRS
3729 _mm_set1_epi64x(long long __q)
3731 return (__m128i){ __q, __q };
3734 /// \brief Initializes both values in a 128-bit vector of [2 x i64] with the
3735 /// specified 64-bit value.
3737 /// \headerfile <x86intrin.h>
3739 /// This intrinsic is a utility function and does not correspond to a specific
3743 /// A 64-bit value used to initialize the elements of the destination integer
3745 /// \returns An initialized 128-bit vector of [2 x i64] with all elements
3746 /// containing the value provided in the operand.
3747 static __inline__ __m128i __DEFAULT_FN_ATTRS
3748 _mm_set1_epi64(__m64 __q)
3750 return (__m128i){ (long long)__q, (long long)__q };
3753 /// \brief Initializes all values in a 128-bit vector of [4 x i32] with the
3754 /// specified 32-bit value.
3756 /// \headerfile <x86intrin.h>
3758 /// This intrinsic is a utility function and does not correspond to a specific
3762 /// A 32-bit value used to initialize the elements of the destination integer
3764 /// \returns An initialized 128-bit vector of [4 x i32] with all elements
3765 /// containing the value provided in the operand.
3766 static __inline__ __m128i __DEFAULT_FN_ATTRS
3767 _mm_set1_epi32(int __i)
3769 return (__m128i)(__v4si){ __i, __i, __i, __i };
3772 /// \brief Initializes all values in a 128-bit vector of [8 x i16] with the
3773 /// specified 16-bit value.
3775 /// \headerfile <x86intrin.h>
3777 /// This intrinsic is a utility function and does not correspond to a specific
3781 /// A 16-bit value used to initialize the elements of the destination integer
3783 /// \returns An initialized 128-bit vector of [8 x i16] with all elements
3784 /// containing the value provided in the operand.
3785 static __inline__ __m128i __DEFAULT_FN_ATTRS
3786 _mm_set1_epi16(short __w)
3788 return (__m128i)(__v8hi){ __w, __w, __w, __w, __w, __w, __w, __w };
3791 /// \brief Initializes all values in a 128-bit vector of [16 x i8] with the
3792 /// specified 8-bit value.
3794 /// \headerfile <x86intrin.h>
3796 /// This intrinsic is a utility function and does not correspond to a specific
3800 /// An 8-bit value used to initialize the elements of the destination integer
3802 /// \returns An initialized 128-bit vector of [16 x i8] with all elements
3803 /// containing the value provided in the operand.
3804 static __inline__ __m128i __DEFAULT_FN_ATTRS
3805 _mm_set1_epi8(char __b)
3807 return (__m128i)(__v16qi){ __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b, __b };
3810 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3811 /// with the specified 64-bit integral values.
3813 /// \headerfile <x86intrin.h>
3815 /// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
3819 /// A 64-bit integral value used to initialize the lower 64 bits of the
3822 /// A 64-bit integral value used to initialize the upper 64 bits of the
3824 /// \returns An initialized 128-bit integer vector.
3825 static __inline__ __m128i __DEFAULT_FN_ATTRS
3826 _mm_setr_epi64(__m64 __q0, __m64 __q1)
3828 return (__m128i){ (long long)__q0, (long long)__q1 };
3831 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3832 /// with the specified 32-bit integral values.
3834 /// \headerfile <x86intrin.h>
3836 /// This intrinsic is a utility function and does not correspond to a specific
3840 /// A 32-bit integral value used to initialize bits [31:0] of the result.
3842 /// A 32-bit integral value used to initialize bits [63:32] of the result.
3844 /// A 32-bit integral value used to initialize bits [95:64] of the result.
3846 /// A 32-bit integral value used to initialize bits [127:96] of the result.
3847 /// \returns An initialized 128-bit integer vector.
3848 static __inline__ __m128i __DEFAULT_FN_ATTRS
3849 _mm_setr_epi32(int __i0, int __i1, int __i2, int __i3)
3851 return (__m128i)(__v4si){ __i0, __i1, __i2, __i3};
3854 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3855 /// with the specified 16-bit integral values.
3857 /// \headerfile <x86intrin.h>
3859 /// This intrinsic is a utility function and does not correspond to a specific
3863 /// A 16-bit integral value used to initialize bits [15:0] of the result.
3865 /// A 16-bit integral value used to initialize bits [31:16] of the result.
3867 /// A 16-bit integral value used to initialize bits [47:32] of the result.
3869 /// A 16-bit integral value used to initialize bits [63:48] of the result.
3871 /// A 16-bit integral value used to initialize bits [79:64] of the result.
3873 /// A 16-bit integral value used to initialize bits [95:80] of the result.
3875 /// A 16-bit integral value used to initialize bits [111:96] of the result.
3877 /// A 16-bit integral value used to initialize bits [127:112] of the result.
3878 /// \returns An initialized 128-bit integer vector.
3879 static __inline__ __m128i __DEFAULT_FN_ATTRS
3880 _mm_setr_epi16(short __w0, short __w1, short __w2, short __w3, short __w4, short __w5, short __w6, short __w7)
3882 return (__m128i)(__v8hi){ __w0, __w1, __w2, __w3, __w4, __w5, __w6, __w7 };
3885 /// \brief Constructs a 128-bit integer vector, initialized in reverse order
3886 /// with the specified 8-bit integral values.
3888 /// \headerfile <x86intrin.h>
3890 /// This intrinsic is a utility function and does not correspond to a specific
3894 /// An 8-bit integral value used to initialize bits [7:0] of the result.
3896 /// An 8-bit integral value used to initialize bits [15:8] of the result.
3898 /// An 8-bit integral value used to initialize bits [23:16] of the result.
3900 /// An 8-bit integral value used to initialize bits [31:24] of the result.
3902 /// An 8-bit integral value used to initialize bits [39:32] of the result.
3904 /// An 8-bit integral value used to initialize bits [47:40] of the result.
3906 /// An 8-bit integral value used to initialize bits [55:48] of the result.
3908 /// An 8-bit integral value used to initialize bits [63:56] of the result.
3910 /// An 8-bit integral value used to initialize bits [71:64] of the result.
3912 /// An 8-bit integral value used to initialize bits [79:72] of the result.
3914 /// An 8-bit integral value used to initialize bits [87:80] of the result.
3916 /// An 8-bit integral value used to initialize bits [95:88] of the result.
3918 /// An 8-bit integral value used to initialize bits [103:96] of the result.
3920 /// An 8-bit integral value used to initialize bits [111:104] of the result.
3922 /// An 8-bit integral value used to initialize bits [119:112] of the result.
3924 /// An 8-bit integral value used to initialize bits [127:120] of the result.
3925 /// \returns An initialized 128-bit integer vector.
3926 static __inline__ __m128i __DEFAULT_FN_ATTRS
3927 _mm_setr_epi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5, char __b6, char __b7, char __b8, char __b9, char __b10, char __b11, char __b12, char __b13, char __b14, char __b15)
3929 return (__m128i)(__v16qi){ __b0, __b1, __b2, __b3, __b4, __b5, __b6, __b7, __b8, __b9, __b10, __b11, __b12, __b13, __b14, __b15 };
3932 /// \brief Creates a 128-bit integer vector initialized to zero.
3934 /// \headerfile <x86intrin.h>
3936 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
3938 /// \returns An initialized 128-bit integer vector with all elements set to
3940 static __inline__ __m128i __DEFAULT_FN_ATTRS
3941 _mm_setzero_si128(void)
3943 return (__m128i){ 0LL, 0LL };
3946 /// \brief Stores a 128-bit integer vector to a memory location aligned on a
3947 /// 128-bit boundary.
3949 /// \headerfile <x86intrin.h>
3951 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
3954 /// A pointer to an aligned memory location that will receive the integer
3957 /// A 128-bit integer vector containing the values to be moved.
3958 static __inline__ void __DEFAULT_FN_ATTRS
3959 _mm_store_si128(__m128i *__p, __m128i __b)
3964 /// \brief Stores a 128-bit integer vector to an unaligned memory location.
3966 /// \headerfile <x86intrin.h>
3968 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
3971 /// A pointer to a memory location that will receive the integer values.
3973 /// A 128-bit integer vector containing the values to be moved.
3974 static __inline__ void __DEFAULT_FN_ATTRS
3975 _mm_storeu_si128(__m128i *__p, __m128i __b)
3977 struct __storeu_si128 {
3979 } __attribute__((__packed__, __may_alias__));
3980 ((struct __storeu_si128*)__p)->__v = __b;
3983 /// \brief Moves bytes selected by the mask from the first operand to the
3984 /// specified unaligned memory location. When a mask bit is 1, the
3985 /// corresponding byte is written, otherwise it is not written.
3987 /// To minimize caching, the date is flagged as non-temporal (unlikely to be
3988 /// used again soon). Exception and trap behavior for elements not selected
3989 /// for storage to memory are implementation dependent.
3991 /// \headerfile <x86intrin.h>
3993 /// This intrinsic corresponds to the <c> VMASKMOVDQU / MASKMOVDQU </c>
3997 /// A 128-bit integer vector containing the values to be moved.
3999 /// A 128-bit integer vector containing the mask. The most significant bit of
4000 /// each byte represents the mask bits.
4002 /// A pointer to an unaligned 128-bit memory location where the specified
4003 /// values are moved.
4004 static __inline__ void __DEFAULT_FN_ATTRS
4005 _mm_maskmoveu_si128(__m128i __d, __m128i __n, char *__p)
4007 __builtin_ia32_maskmovdqu((__v16qi)__d, (__v16qi)__n, __p);
4010 /// \brief Stores the lower 64 bits of a 128-bit integer vector of [2 x i64] to
4011 /// a memory location.
4013 /// \headerfile <x86intrin.h>
4015 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
4018 /// A pointer to a 64-bit memory location that will receive the lower 64 bits
4019 /// of the integer vector parameter.
4021 /// A 128-bit integer vector of [2 x i64]. The lower 64 bits contain the
4022 /// value to be stored.
4023 static __inline__ void __DEFAULT_FN_ATTRS
4024 _mm_storel_epi64(__m128i *__p, __m128i __a)
4026 struct __mm_storel_epi64_struct {
4028 } __attribute__((__packed__, __may_alias__));
4029 ((struct __mm_storel_epi64_struct*)__p)->__u = __a[0];
4032 /// \brief Stores a 128-bit floating point vector of [2 x double] to a 128-bit
4033 /// aligned memory location.
4035 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4036 /// used again soon).
4038 /// \headerfile <x86intrin.h>
4040 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4043 /// A pointer to the 128-bit aligned memory location used to store the value.
4045 /// A vector of [2 x double] containing the 64-bit values to be stored.
4046 static __inline__ void __DEFAULT_FN_ATTRS
4047 _mm_stream_pd(double *__p, __m128d __a)
4049 __builtin_nontemporal_store((__v2df)__a, (__v2df*)__p);
4052 /// \brief Stores a 128-bit integer vector to a 128-bit aligned memory location.
4054 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4055 /// used again soon).
4057 /// \headerfile <x86intrin.h>
4059 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
4062 /// A pointer to the 128-bit aligned memory location used to store the value.
4064 /// A 128-bit integer vector containing the values to be stored.
4065 static __inline__ void __DEFAULT_FN_ATTRS
4066 _mm_stream_si128(__m128i *__p, __m128i __a)
4068 __builtin_nontemporal_store((__v2di)__a, (__v2di*)__p);
4071 /// \brief Stores a 32-bit integer value in the specified memory location.
4073 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4074 /// used again soon).
4076 /// \headerfile <x86intrin.h>
4078 /// This intrinsic corresponds to the <c> MOVNTI </c> instruction.
4081 /// A pointer to the 32-bit memory location used to store the value.
4083 /// A 32-bit integer containing the value to be stored.
4084 static __inline__ void __DEFAULT_FN_ATTRS
4085 _mm_stream_si32(int *__p, int __a)
4087 __builtin_ia32_movnti(__p, __a);
4091 /// \brief Stores a 64-bit integer value in the specified memory location.
4093 /// To minimize caching, the data is flagged as non-temporal (unlikely to be
4094 /// used again soon).
4096 /// \headerfile <x86intrin.h>
4098 /// This intrinsic corresponds to the <c> MOVNTIQ </c> instruction.
4101 /// A pointer to the 64-bit memory location used to store the value.
4103 /// A 64-bit integer containing the value to be stored.
4104 static __inline__ void __DEFAULT_FN_ATTRS
4105 _mm_stream_si64(long long *__p, long long __a)
4107 __builtin_ia32_movnti64(__p, __a);
4111 #if defined(__cplusplus)
4115 /// \brief The cache line containing \a __p is flushed and invalidated from all
4116 /// caches in the coherency domain.
4118 /// \headerfile <x86intrin.h>
4120 /// This intrinsic corresponds to the <c> CLFLUSH </c> instruction.
4123 /// A pointer to the memory location used to identify the cache line to be
4125 void _mm_clflush(void const * __p);
4127 /// \brief Forces strong memory ordering (serialization) between load
4128 /// instructions preceding this instruction and load instructions following
4129 /// this instruction, ensuring the system completes all previous loads before
4130 /// executing subsequent loads.
4132 /// \headerfile <x86intrin.h>
4134 /// This intrinsic corresponds to the <c> LFENCE </c> instruction.
4136 void _mm_lfence(void);
4138 /// \brief Forces strong memory ordering (serialization) between load and store
4139 /// instructions preceding this instruction and load and store instructions
4140 /// following this instruction, ensuring that the system completes all
4141 /// previous memory accesses before executing subsequent memory accesses.
4143 /// \headerfile <x86intrin.h>
4145 /// This intrinsic corresponds to the <c> MFENCE </c> instruction.
4147 void _mm_mfence(void);
4149 #if defined(__cplusplus)
4153 /// \brief Converts 16-bit signed integers from both 128-bit integer vector
4154 /// operands into 8-bit signed integers, and packs the results into the
4155 /// destination. Positive values greater than 0x7F are saturated to 0x7F.
4156 /// Negative values less than 0x80 are saturated to 0x80.
4158 /// \headerfile <x86intrin.h>
4160 /// This intrinsic corresponds to the <c> VPACKSSWB / PACKSSWB </c> instruction.
4163 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4164 /// a signed integer and is converted to a 8-bit signed integer with
4165 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4166 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4167 /// written to the lower 64 bits of the result.
4169 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4170 /// a signed integer and is converted to a 8-bit signed integer with
4171 /// saturation. Values greater than 0x7F are saturated to 0x7F. Values less
4172 /// than 0x80 are saturated to 0x80. The converted [8 x i8] values are
4173 /// written to the higher 64 bits of the result.
4174 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4175 static __inline__ __m128i __DEFAULT_FN_ATTRS
4176 _mm_packs_epi16(__m128i __a, __m128i __b)
4178 return (__m128i)__builtin_ia32_packsswb128((__v8hi)__a, (__v8hi)__b);
4181 /// \brief Converts 32-bit signed integers from both 128-bit integer vector
4182 /// operands into 16-bit signed integers, and packs the results into the
4183 /// destination. Positive values greater than 0x7FFF are saturated to 0x7FFF.
4184 /// Negative values less than 0x8000 are saturated to 0x8000.
4186 /// \headerfile <x86intrin.h>
4188 /// This intrinsic corresponds to the <c> VPACKSSDW / PACKSSDW </c> instruction.
4191 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4192 /// a signed integer and is converted to a 16-bit signed integer with
4193 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4194 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4195 /// are written to the lower 64 bits of the result.
4197 /// A 128-bit integer vector of [4 x i32]. Each 32-bit element is treated as
4198 /// a signed integer and is converted to a 16-bit signed integer with
4199 /// saturation. Values greater than 0x7FFF are saturated to 0x7FFF. Values
4200 /// less than 0x8000 are saturated to 0x8000. The converted [4 x i16] values
4201 /// are written to the higher 64 bits of the result.
4202 /// \returns A 128-bit vector of [8 x i16] containing the converted values.
4203 static __inline__ __m128i __DEFAULT_FN_ATTRS
4204 _mm_packs_epi32(__m128i __a, __m128i __b)
4206 return (__m128i)__builtin_ia32_packssdw128((__v4si)__a, (__v4si)__b);
4209 /// \brief Converts 16-bit signed integers from both 128-bit integer vector
4210 /// operands into 8-bit unsigned integers, and packs the results into the
4211 /// destination. Values greater than 0xFF are saturated to 0xFF. Values less
4212 /// than 0x00 are saturated to 0x00.
4214 /// \headerfile <x86intrin.h>
4216 /// This intrinsic corresponds to the <c> VPACKUSWB / PACKUSWB </c> instruction.
4219 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4220 /// a signed integer and is converted to an 8-bit unsigned integer with
4221 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4222 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4223 /// written to the lower 64 bits of the result.
4225 /// A 128-bit integer vector of [8 x i16]. Each 16-bit element is treated as
4226 /// a signed integer and is converted to an 8-bit unsigned integer with
4227 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
4228 /// than 0x00 are saturated to 0x00. The converted [8 x i8] values are
4229 /// written to the higher 64 bits of the result.
4230 /// \returns A 128-bit vector of [16 x i8] containing the converted values.
4231 static __inline__ __m128i __DEFAULT_FN_ATTRS
4232 _mm_packus_epi16(__m128i __a, __m128i __b)
4234 return (__m128i)__builtin_ia32_packuswb128((__v8hi)__a, (__v8hi)__b);
4237 /// \brief Extracts 16 bits from a 128-bit integer vector of [8 x i16], using
4238 /// the immediate-value parameter as a selector.
4240 /// \headerfile <x86intrin.h>
4242 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
4245 /// A 128-bit integer vector.
4247 /// An immediate value. Bits [2:0] selects values from \a __a to be assigned
4248 /// to bits[15:0] of the result. \n
4249 /// 000: assign values from bits [15:0] of \a __a. \n
4250 /// 001: assign values from bits [31:16] of \a __a. \n
4251 /// 010: assign values from bits [47:32] of \a __a. \n
4252 /// 011: assign values from bits [63:48] of \a __a. \n
4253 /// 100: assign values from bits [79:64] of \a __a. \n
4254 /// 101: assign values from bits [95:80] of \a __a. \n
4255 /// 110: assign values from bits [111:96] of \a __a. \n
4256 /// 111: assign values from bits [127:112] of \a __a.
4257 /// \returns An integer, whose lower 16 bits are selected from the 128-bit
4258 /// integer vector parameter and the remaining bits are assigned zeros.
4259 static __inline__ int __DEFAULT_FN_ATTRS
4260 _mm_extract_epi16(__m128i __a, int __imm)
4262 __v8hi __b = (__v8hi)__a;
4263 return (unsigned short)__b[__imm & 7];
4266 /// \brief Constructs a 128-bit integer vector by first making a copy of the
4267 /// 128-bit integer vector parameter, and then inserting the lower 16 bits
4268 /// of an integer parameter into an offset specified by the immediate-value
4271 /// \headerfile <x86intrin.h>
4273 /// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
4276 /// A 128-bit integer vector of [8 x i16]. This vector is copied to the
4277 /// result and then one of the eight elements in the result is replaced by
4278 /// the lower 16 bits of \a __b.
4280 /// An integer. The lower 16 bits of this parameter are written to the
4281 /// result beginning at an offset specified by \a __imm.
4283 /// An immediate value specifying the bit offset in the result at which the
4284 /// lower 16 bits of \a __b are written.
4285 /// \returns A 128-bit integer vector containing the constructed values.
4286 static __inline__ __m128i __DEFAULT_FN_ATTRS
4287 _mm_insert_epi16(__m128i __a, int __b, int __imm)
4289 __v8hi __c = (__v8hi)__a;
4290 __c[__imm & 7] = __b;
4291 return (__m128i)__c;
4294 /// \brief Copies the values of the most significant bits from each 8-bit
4295 /// element in a 128-bit integer vector of [16 x i8] to create a 16-bit mask
4296 /// value, zero-extends the value, and writes it to the destination.
4298 /// \headerfile <x86intrin.h>
4300 /// This intrinsic corresponds to the <c> VPMOVMSKB / PMOVMSKB </c> instruction.
4303 /// A 128-bit integer vector containing the values with bits to be extracted.
4304 /// \returns The most significant bits from each 8-bit element in \a __a,
4305 /// written to bits [15:0]. The other bits are assigned zeros.
4306 static __inline__ int __DEFAULT_FN_ATTRS
4307 _mm_movemask_epi8(__m128i __a)
4309 return __builtin_ia32_pmovmskb128((__v16qi)__a);
4312 /// \brief Constructs a 128-bit integer vector by shuffling four 32-bit
4313 /// elements of a 128-bit integer vector parameter, using the immediate-value
4314 /// parameter as a specifier.
4316 /// \headerfile <x86intrin.h>
4319 /// __m128i _mm_shuffle_epi32(__m128i a, const int imm);
4322 /// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
4325 /// A 128-bit integer vector containing the values to be copied.
4327 /// An immediate value containing an 8-bit value specifying which elements to
4328 /// copy from a. The destinations within the 128-bit destination are assigned
4329 /// values as follows: \n
4330 /// Bits [1:0] are used to assign values to bits [31:0] of the result. \n
4331 /// Bits [3:2] are used to assign values to bits [63:32] of the result. \n
4332 /// Bits [5:4] are used to assign values to bits [95:64] of the result. \n
4333 /// Bits [7:6] are used to assign values to bits [127:96] of the result. \n
4334 /// Bit value assignments: \n
4335 /// 00: assign values from bits [31:0] of \a a. \n
4336 /// 01: assign values from bits [63:32] of \a a. \n
4337 /// 10: assign values from bits [95:64] of \a a. \n
4338 /// 11: assign values from bits [127:96] of \a a.
4339 /// \returns A 128-bit integer vector containing the shuffled values.
4340 #define _mm_shuffle_epi32(a, imm) __extension__ ({ \
4341 (__m128i)__builtin_shufflevector((__v4si)(__m128i)(a), \
4342 (__v4si)_mm_undefined_si128(), \
4343 ((imm) >> 0) & 0x3, ((imm) >> 2) & 0x3, \
4344 ((imm) >> 4) & 0x3, ((imm) >> 6) & 0x3); })
4346 /// \brief Constructs a 128-bit integer vector by shuffling four lower 16-bit
4347 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4348 /// value parameter as a specifier.
4350 /// \headerfile <x86intrin.h>
4353 /// __m128i _mm_shufflelo_epi16(__m128i a, const int imm);
4356 /// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
4359 /// A 128-bit integer vector of [8 x i16]. Bits [127:64] are copied to bits
4360 /// [127:64] of the result.
4362 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4363 /// Bits[1:0] are used to assign values to bits [15:0] of the result. \n
4364 /// Bits[3:2] are used to assign values to bits [31:16] of the result. \n
4365 /// Bits[5:4] are used to assign values to bits [47:32] of the result. \n
4366 /// Bits[7:6] are used to assign values to bits [63:48] of the result. \n
4367 /// Bit value assignments: \n
4368 /// 00: assign values from bits [15:0] of \a a. \n
4369 /// 01: assign values from bits [31:16] of \a a. \n
4370 /// 10: assign values from bits [47:32] of \a a. \n
4371 /// 11: assign values from bits [63:48] of \a a. \n
4372 /// \returns A 128-bit integer vector containing the shuffled values.
4373 #define _mm_shufflelo_epi16(a, imm) __extension__ ({ \
4374 (__m128i)__builtin_shufflevector((__v8hi)(__m128i)(a), \
4375 (__v8hi)_mm_undefined_si128(), \
4376 ((imm) >> 0) & 0x3, ((imm) >> 2) & 0x3, \
4377 ((imm) >> 4) & 0x3, ((imm) >> 6) & 0x3, \
4380 /// \brief Constructs a 128-bit integer vector by shuffling four upper 16-bit
4381 /// elements of a 128-bit integer vector of [8 x i16], using the immediate
4382 /// value parameter as a specifier.
4384 /// \headerfile <x86intrin.h>
4387 /// __m128i _mm_shufflehi_epi16(__m128i a, const int imm);
4390 /// This intrinsic corresponds to the <c> VPSHUFHW / PSHUFHW </c> instruction.
4393 /// A 128-bit integer vector of [8 x i16]. Bits [63:0] are copied to bits
4394 /// [63:0] of the result.
4396 /// An 8-bit immediate value specifying which elements to copy from \a a. \n
4397 /// Bits[1:0] are used to assign values to bits [79:64] of the result. \n
4398 /// Bits[3:2] are used to assign values to bits [95:80] of the result. \n
4399 /// Bits[5:4] are used to assign values to bits [111:96] of the result. \n
4400 /// Bits[7:6] are used to assign values to bits [127:112] of the result. \n
4401 /// Bit value assignments: \n
4402 /// 00: assign values from bits [79:64] of \a a. \n
4403 /// 01: assign values from bits [95:80] of \a a. \n
4404 /// 10: assign values from bits [111:96] of \a a. \n
4405 /// 11: assign values from bits [127:112] of \a a. \n
4406 /// \returns A 128-bit integer vector containing the shuffled values.
4407 #define _mm_shufflehi_epi16(a, imm) __extension__ ({ \
4408 (__m128i)__builtin_shufflevector((__v8hi)(__m128i)(a), \
4409 (__v8hi)_mm_undefined_si128(), \
4411 4 + (((imm) >> 0) & 0x3), \
4412 4 + (((imm) >> 2) & 0x3), \
4413 4 + (((imm) >> 4) & 0x3), \
4414 4 + (((imm) >> 6) & 0x3)); })
4416 /// \brief Unpacks the high-order (index 8-15) values from two 128-bit vectors
4417 /// of [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4419 /// \headerfile <x86intrin.h>
4421 /// This intrinsic corresponds to the <c> VPUNPCKHBW / PUNPCKHBW </c>
4425 /// A 128-bit vector of [16 x i8].
4426 /// Bits [71:64] are written to bits [7:0] of the result. \n
4427 /// Bits [79:72] are written to bits [23:16] of the result. \n
4428 /// Bits [87:80] are written to bits [39:32] of the result. \n
4429 /// Bits [95:88] are written to bits [55:48] of the result. \n
4430 /// Bits [103:96] are written to bits [71:64] of the result. \n
4431 /// Bits [111:104] are written to bits [87:80] of the result. \n
4432 /// Bits [119:112] are written to bits [103:96] of the result. \n
4433 /// Bits [127:120] are written to bits [119:112] of the result.
4435 /// A 128-bit vector of [16 x i8]. \n
4436 /// Bits [71:64] are written to bits [15:8] of the result. \n
4437 /// Bits [79:72] are written to bits [31:24] of the result. \n
4438 /// Bits [87:80] are written to bits [47:40] of the result. \n
4439 /// Bits [95:88] are written to bits [63:56] of the result. \n
4440 /// Bits [103:96] are written to bits [79:72] of the result. \n
4441 /// Bits [111:104] are written to bits [95:88] of the result. \n
4442 /// Bits [119:112] are written to bits [111:104] of the result. \n
4443 /// Bits [127:120] are written to bits [127:120] of the result.
4444 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4445 static __inline__ __m128i __DEFAULT_FN_ATTRS
4446 _mm_unpackhi_epi8(__m128i __a, __m128i __b)
4448 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 8, 16+8, 9, 16+9, 10, 16+10, 11, 16+11, 12, 16+12, 13, 16+13, 14, 16+14, 15, 16+15);
4451 /// \brief Unpacks the high-order (index 4-7) values from two 128-bit vectors of
4452 /// [8 x i16] and interleaves them into a 128-bit vector of [8 x i16].
4454 /// \headerfile <x86intrin.h>
4456 /// This intrinsic corresponds to the <c> VPUNPCKHWD / PUNPCKHWD </c>
4460 /// A 128-bit vector of [8 x i16].
4461 /// Bits [79:64] are written to bits [15:0] of the result. \n
4462 /// Bits [95:80] are written to bits [47:32] of the result. \n
4463 /// Bits [111:96] are written to bits [79:64] of the result. \n
4464 /// Bits [127:112] are written to bits [111:96] of the result.
4466 /// A 128-bit vector of [8 x i16].
4467 /// Bits [79:64] are written to bits [31:16] of the result. \n
4468 /// Bits [95:80] are written to bits [63:48] of the result. \n
4469 /// Bits [111:96] are written to bits [95:80] of the result. \n
4470 /// Bits [127:112] are written to bits [127:112] of the result.
4471 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4472 static __inline__ __m128i __DEFAULT_FN_ATTRS
4473 _mm_unpackhi_epi16(__m128i __a, __m128i __b)
4475 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 4, 8+4, 5, 8+5, 6, 8+6, 7, 8+7);
4478 /// \brief Unpacks the high-order (index 2,3) values from two 128-bit vectors of
4479 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4481 /// \headerfile <x86intrin.h>
4483 /// This intrinsic corresponds to the <c> VPUNPCKHDQ / PUNPCKHDQ </c>
4487 /// A 128-bit vector of [4 x i32]. \n
4488 /// Bits [95:64] are written to bits [31:0] of the destination. \n
4489 /// Bits [127:96] are written to bits [95:64] of the destination.
4491 /// A 128-bit vector of [4 x i32]. \n
4492 /// Bits [95:64] are written to bits [64:32] of the destination. \n
4493 /// Bits [127:96] are written to bits [127:96] of the destination.
4494 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4495 static __inline__ __m128i __DEFAULT_FN_ATTRS
4496 _mm_unpackhi_epi32(__m128i __a, __m128i __b)
4498 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 2, 4+2, 3, 4+3);
4501 /// \brief Unpacks the high-order (odd-indexed) values from two 128-bit vectors
4502 /// of [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4504 /// \headerfile <x86intrin.h>
4506 /// This intrinsic corresponds to the <c> VPUNPCKHQDQ / PUNPCKHQDQ </c>
4510 /// A 128-bit vector of [2 x i64]. \n
4511 /// Bits [127:64] are written to bits [63:0] of the destination.
4513 /// A 128-bit vector of [2 x i64]. \n
4514 /// Bits [127:64] are written to bits [127:64] of the destination.
4515 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4516 static __inline__ __m128i __DEFAULT_FN_ATTRS
4517 _mm_unpackhi_epi64(__m128i __a, __m128i __b)
4519 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 1, 2+1);
4522 /// \brief Unpacks the low-order (index 0-7) values from two 128-bit vectors of
4523 /// [16 x i8] and interleaves them into a 128-bit vector of [16 x i8].
4525 /// \headerfile <x86intrin.h>
4527 /// This intrinsic corresponds to the <c> VPUNPCKLBW / PUNPCKLBW </c>
4531 /// A 128-bit vector of [16 x i8]. \n
4532 /// Bits [7:0] are written to bits [7:0] of the result. \n
4533 /// Bits [15:8] are written to bits [23:16] of the result. \n
4534 /// Bits [23:16] are written to bits [39:32] of the result. \n
4535 /// Bits [31:24] are written to bits [55:48] of the result. \n
4536 /// Bits [39:32] are written to bits [71:64] of the result. \n
4537 /// Bits [47:40] are written to bits [87:80] of the result. \n
4538 /// Bits [55:48] are written to bits [103:96] of the result. \n
4539 /// Bits [63:56] are written to bits [119:112] of the result.
4541 /// A 128-bit vector of [16 x i8].
4542 /// Bits [7:0] are written to bits [15:8] of the result. \n
4543 /// Bits [15:8] are written to bits [31:24] of the result. \n
4544 /// Bits [23:16] are written to bits [47:40] of the result. \n
4545 /// Bits [31:24] are written to bits [63:56] of the result. \n
4546 /// Bits [39:32] are written to bits [79:72] of the result. \n
4547 /// Bits [47:40] are written to bits [95:88] of the result. \n
4548 /// Bits [55:48] are written to bits [111:104] of the result. \n
4549 /// Bits [63:56] are written to bits [127:120] of the result.
4550 /// \returns A 128-bit vector of [16 x i8] containing the interleaved values.
4551 static __inline__ __m128i __DEFAULT_FN_ATTRS
4552 _mm_unpacklo_epi8(__m128i __a, __m128i __b)
4554 return (__m128i)__builtin_shufflevector((__v16qi)__a, (__v16qi)__b, 0, 16+0, 1, 16+1, 2, 16+2, 3, 16+3, 4, 16+4, 5, 16+5, 6, 16+6, 7, 16+7);
4557 /// \brief Unpacks the low-order (index 0-3) values from each of the two 128-bit
4558 /// vectors of [8 x i16] and interleaves them into a 128-bit vector of
4561 /// \headerfile <x86intrin.h>
4563 /// This intrinsic corresponds to the <c> VPUNPCKLWD / PUNPCKLWD </c>
4567 /// A 128-bit vector of [8 x i16].
4568 /// Bits [15:0] are written to bits [15:0] of the result. \n
4569 /// Bits [31:16] are written to bits [47:32] of the result. \n
4570 /// Bits [47:32] are written to bits [79:64] of the result. \n
4571 /// Bits [63:48] are written to bits [111:96] of the result.
4573 /// A 128-bit vector of [8 x i16].
4574 /// Bits [15:0] are written to bits [31:16] of the result. \n
4575 /// Bits [31:16] are written to bits [63:48] of the result. \n
4576 /// Bits [47:32] are written to bits [95:80] of the result. \n
4577 /// Bits [63:48] are written to bits [127:112] of the result.
4578 /// \returns A 128-bit vector of [8 x i16] containing the interleaved values.
4579 static __inline__ __m128i __DEFAULT_FN_ATTRS
4580 _mm_unpacklo_epi16(__m128i __a, __m128i __b)
4582 return (__m128i)__builtin_shufflevector((__v8hi)__a, (__v8hi)__b, 0, 8+0, 1, 8+1, 2, 8+2, 3, 8+3);
4585 /// \brief Unpacks the low-order (index 0,1) values from two 128-bit vectors of
4586 /// [4 x i32] and interleaves them into a 128-bit vector of [4 x i32].
4588 /// \headerfile <x86intrin.h>
4590 /// This intrinsic corresponds to the <c> VPUNPCKLDQ / PUNPCKLDQ </c>
4594 /// A 128-bit vector of [4 x i32]. \n
4595 /// Bits [31:0] are written to bits [31:0] of the destination. \n
4596 /// Bits [63:32] are written to bits [95:64] of the destination.
4598 /// A 128-bit vector of [4 x i32]. \n
4599 /// Bits [31:0] are written to bits [64:32] of the destination. \n
4600 /// Bits [63:32] are written to bits [127:96] of the destination.
4601 /// \returns A 128-bit vector of [4 x i32] containing the interleaved values.
4602 static __inline__ __m128i __DEFAULT_FN_ATTRS
4603 _mm_unpacklo_epi32(__m128i __a, __m128i __b)
4605 return (__m128i)__builtin_shufflevector((__v4si)__a, (__v4si)__b, 0, 4+0, 1, 4+1);
4608 /// \brief Unpacks the low-order 64-bit elements from two 128-bit vectors of
4609 /// [2 x i64] and interleaves them into a 128-bit vector of [2 x i64].
4611 /// \headerfile <x86intrin.h>
4613 /// This intrinsic corresponds to the <c> VPUNPCKLQDQ / PUNPCKLQDQ </c>
4617 /// A 128-bit vector of [2 x i64]. \n
4618 /// Bits [63:0] are written to bits [63:0] of the destination. \n
4620 /// A 128-bit vector of [2 x i64]. \n
4621 /// Bits [63:0] are written to bits [127:64] of the destination. \n
4622 /// \returns A 128-bit vector of [2 x i64] containing the interleaved values.
4623 static __inline__ __m128i __DEFAULT_FN_ATTRS
4624 _mm_unpacklo_epi64(__m128i __a, __m128i __b)
4626 return (__m128i)__builtin_shufflevector((__v2di)__a, (__v2di)__b, 0, 2+0);
4629 /// \brief Returns the lower 64 bits of a 128-bit integer vector as a 64-bit
4632 /// \headerfile <x86intrin.h>
4634 /// This intrinsic has no corresponding instruction.
4637 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4639 /// \returns A 64-bit integer containing the lower 64 bits of the parameter.
4640 static __inline__ __m64 __DEFAULT_FN_ATTRS
4641 _mm_movepi64_pi64(__m128i __a)
4643 return (__m64)__a[0];
4646 /// \brief Moves the 64-bit operand to a 128-bit integer vector, zeroing the
4649 /// \headerfile <x86intrin.h>
4651 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ / MOVD </c> instruction.
4655 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4656 /// the operand. The upper 64 bits are assigned zeros.
4657 static __inline__ __m128i __DEFAULT_FN_ATTRS
4658 _mm_movpi64_epi64(__m64 __a)
4660 return (__m128i){ (long long)__a, 0 };
4663 /// \brief Moves the lower 64 bits of a 128-bit integer vector to a 128-bit
4664 /// integer vector, zeroing the upper bits.
4666 /// \headerfile <x86intrin.h>
4668 /// This intrinsic corresponds to the <c> VMOVQ / MOVQ </c> instruction.
4671 /// A 128-bit integer vector operand. The lower 64 bits are moved to the
4673 /// \returns A 128-bit integer vector. The lower 64 bits contain the value from
4674 /// the operand. The upper 64 bits are assigned zeros.
4675 static __inline__ __m128i __DEFAULT_FN_ATTRS
4676 _mm_move_epi64(__m128i __a)
4678 return __builtin_shufflevector((__v2di)__a, (__m128i){ 0 }, 0, 2);
4681 /// \brief Unpacks the high-order (odd-indexed) values from two 128-bit vectors
4682 /// of [2 x double] and interleaves them into a 128-bit vector of [2 x
4685 /// \headerfile <x86intrin.h>
4687 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
4690 /// A 128-bit vector of [2 x double]. \n
4691 /// Bits [127:64] are written to bits [63:0] of the destination.
4693 /// A 128-bit vector of [2 x double]. \n
4694 /// Bits [127:64] are written to bits [127:64] of the destination.
4695 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4696 static __inline__ __m128d __DEFAULT_FN_ATTRS
4697 _mm_unpackhi_pd(__m128d __a, __m128d __b)
4699 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 1, 2+1);
4702 /// \brief Unpacks the low-order (even-indexed) values from two 128-bit vectors
4703 /// of [2 x double] and interleaves them into a 128-bit vector of [2 x
4706 /// \headerfile <x86intrin.h>
4708 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
4711 /// A 128-bit vector of [2 x double]. \n
4712 /// Bits [63:0] are written to bits [63:0] of the destination.
4714 /// A 128-bit vector of [2 x double]. \n
4715 /// Bits [63:0] are written to bits [127:64] of the destination.
4716 /// \returns A 128-bit vector of [2 x double] containing the interleaved values.
4717 static __inline__ __m128d __DEFAULT_FN_ATTRS
4718 _mm_unpacklo_pd(__m128d __a, __m128d __b)
4720 return __builtin_shufflevector((__v2df)__a, (__v2df)__b, 0, 2+0);
4723 /// \brief Extracts the sign bits of the double-precision values in the 128-bit
4724 /// vector of [2 x double], zero-extends the value, and writes it to the
4725 /// low-order bits of the destination.
4727 /// \headerfile <x86intrin.h>
4729 /// This intrinsic corresponds to the <c> VMOVMSKPD / MOVMSKPD </c> instruction.
4732 /// A 128-bit vector of [2 x double] containing the values with sign bits to
4734 /// \returns The sign bits from each of the double-precision elements in \a __a,
4735 /// written to bits [1:0]. The remaining bits are assigned values of zero.
4736 static __inline__ int __DEFAULT_FN_ATTRS
4737 _mm_movemask_pd(__m128d __a)
4739 return __builtin_ia32_movmskpd((__v2df)__a);
4743 /// \brief Constructs a 128-bit floating-point vector of [2 x double] from two
4744 /// 128-bit vector parameters of [2 x double], using the immediate-value
4745 /// parameter as a specifier.
4747 /// \headerfile <x86intrin.h>
4750 /// __m128d _mm_shuffle_pd(__m128d a, __m128d b, const int i);
4753 /// This intrinsic corresponds to the <c> VSHUFPD / SHUFPD </c> instruction.
4756 /// A 128-bit vector of [2 x double].
4758 /// A 128-bit vector of [2 x double].
4760 /// An 8-bit immediate value. The least significant two bits specify which
4761 /// elements to copy from a and b: \n
4762 /// Bit[0] = 0: lower element of a copied to lower element of result. \n
4763 /// Bit[0] = 1: upper element of a copied to lower element of result. \n
4764 /// Bit[1] = 0: lower element of \a b copied to upper element of result. \n
4765 /// Bit[1] = 1: upper element of \a b copied to upper element of result. \n
4766 /// \returns A 128-bit vector of [2 x double] containing the shuffled values.
4767 #define _mm_shuffle_pd(a, b, i) __extension__ ({ \
4768 (__m128d)__builtin_shufflevector((__v2df)(__m128d)(a), (__v2df)(__m128d)(b), \
4769 0 + (((i) >> 0) & 0x1), \
4770 2 + (((i) >> 1) & 0x1)); })
4772 /// \brief Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4773 /// floating-point vector of [4 x float].
4775 /// \headerfile <x86intrin.h>
4777 /// This intrinsic has no corresponding instruction.
4780 /// A 128-bit floating-point vector of [2 x double].
4781 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4782 /// bitwise pattern as the parameter.
4783 static __inline__ __m128 __DEFAULT_FN_ATTRS
4784 _mm_castpd_ps(__m128d __a)
4789 /// \brief Casts a 128-bit floating-point vector of [2 x double] into a 128-bit
4792 /// \headerfile <x86intrin.h>
4794 /// This intrinsic has no corresponding instruction.
4797 /// A 128-bit floating-point vector of [2 x double].
4798 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4800 static __inline__ __m128i __DEFAULT_FN_ATTRS
4801 _mm_castpd_si128(__m128d __a)
4803 return (__m128i)__a;
4806 /// \brief Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4807 /// floating-point vector of [2 x double].
4809 /// \headerfile <x86intrin.h>
4811 /// This intrinsic has no corresponding instruction.
4814 /// A 128-bit floating-point vector of [4 x float].
4815 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4816 /// bitwise pattern as the parameter.
4817 static __inline__ __m128d __DEFAULT_FN_ATTRS
4818 _mm_castps_pd(__m128 __a)
4820 return (__m128d)__a;
4823 /// \brief Casts a 128-bit floating-point vector of [4 x float] into a 128-bit
4826 /// \headerfile <x86intrin.h>
4828 /// This intrinsic has no corresponding instruction.
4831 /// A 128-bit floating-point vector of [4 x float].
4832 /// \returns A 128-bit integer vector containing the same bitwise pattern as the
4834 static __inline__ __m128i __DEFAULT_FN_ATTRS
4835 _mm_castps_si128(__m128 __a)
4837 return (__m128i)__a;
4840 /// \brief Casts a 128-bit integer vector into a 128-bit floating-point vector
4843 /// \headerfile <x86intrin.h>
4845 /// This intrinsic has no corresponding instruction.
4848 /// A 128-bit integer vector.
4849 /// \returns A 128-bit floating-point vector of [4 x float] containing the same
4850 /// bitwise pattern as the parameter.
4851 static __inline__ __m128 __DEFAULT_FN_ATTRS
4852 _mm_castsi128_ps(__m128i __a)
4857 /// \brief Casts a 128-bit integer vector into a 128-bit floating-point vector
4858 /// of [2 x double].
4860 /// \headerfile <x86intrin.h>
4862 /// This intrinsic has no corresponding instruction.
4865 /// A 128-bit integer vector.
4866 /// \returns A 128-bit floating-point vector of [2 x double] containing the same
4867 /// bitwise pattern as the parameter.
4868 static __inline__ __m128d __DEFAULT_FN_ATTRS
4869 _mm_castsi128_pd(__m128i __a)
4871 return (__m128d)__a;
4874 #if defined(__cplusplus)
4878 /// \brief Indicates that a spin loop is being executed for the purposes of
4879 /// optimizing power consumption during the loop.
4881 /// \headerfile <x86intrin.h>
4883 /// This intrinsic corresponds to the <c> PAUSE </c> instruction.
4885 void _mm_pause(void);
4887 #if defined(__cplusplus)
4890 #undef __DEFAULT_FN_ATTRS
4892 #define _MM_SHUFFLE2(x, y) (((x) << 1) | (y))
4894 #define _MM_DENORMALS_ZERO_ON (0x0040)
4895 #define _MM_DENORMALS_ZERO_OFF (0x0000)
4897 #define _MM_DENORMALS_ZERO_MASK (0x0040)
4899 #define _MM_GET_DENORMALS_ZERO_MODE() (_mm_getcsr() & _MM_DENORMALS_ZERO_MASK)
4900 #define _MM_SET_DENORMALS_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_DENORMALS_ZERO_MASK) | (x)))
4902 #endif /* __EMMINTRIN_H */