1 /*===---- mmintrin.h - MMX intrinsics --------------------------------------===
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27 typedef long long __m64 __attribute__((__vector_size__(8)));
29 typedef long long __v1di __attribute__((__vector_size__(8)));
30 typedef int __v2si __attribute__((__vector_size__(8)));
31 typedef short __v4hi __attribute__((__vector_size__(8)));
32 typedef char __v8qi __attribute__((__vector_size__(8)));
34 /* Define the default attributes for the functions in this file. */
35 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx")))
37 /// \brief Clears the MMX state by setting the state of the x87 stack registers
40 /// \headerfile <x86intrin.h>
42 /// This intrinsic corresponds to the <c> EMMS </c> instruction.
44 static __inline__ void __DEFAULT_FN_ATTRS
47 __builtin_ia32_emms();
50 /// \brief Constructs a 64-bit integer vector, setting the lower 32 bits to the
51 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
53 /// \headerfile <x86intrin.h>
55 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
58 /// A 32-bit integer value.
59 /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
60 /// parameter. The upper 32 bits are set to 0.
61 static __inline__ __m64 __DEFAULT_FN_ATTRS
62 _mm_cvtsi32_si64(int __i)
64 return (__m64)__builtin_ia32_vec_init_v2si(__i, 0);
67 /// \brief Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
70 /// \headerfile <x86intrin.h>
72 /// This intrinsic corresponds to the <c> VMOVD / MOVD </c> instruction.
75 /// A 64-bit integer vector.
76 /// \returns A 32-bit signed integer value containing the lower 32 bits of the
78 static __inline__ int __DEFAULT_FN_ATTRS
79 _mm_cvtsi64_si32(__m64 __m)
81 return __builtin_ia32_vec_ext_v2si((__v2si)__m, 0);
84 /// \brief Casts a 64-bit signed integer value into a 64-bit integer vector.
86 /// \headerfile <x86intrin.h>
88 /// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
91 /// A 64-bit signed integer.
92 /// \returns A 64-bit integer vector containing the same bitwise pattern as the
94 static __inline__ __m64 __DEFAULT_FN_ATTRS
95 _mm_cvtsi64_m64(long long __i)
100 /// \brief Casts a 64-bit integer vector into a 64-bit signed integer value.
102 /// \headerfile <x86intrin.h>
104 /// This intrinsic corresponds to the <c> VMOVQ / MOVD </c> instruction.
107 /// A 64-bit integer vector.
108 /// \returns A 64-bit signed integer containing the same bitwise pattern as the
110 static __inline__ long long __DEFAULT_FN_ATTRS
111 _mm_cvtm64_si64(__m64 __m)
113 return (long long)__m;
116 /// \brief Converts 16-bit signed integers from both 64-bit integer vector
117 /// parameters of [4 x i16] into 8-bit signed integer values, and constructs
118 /// a 64-bit integer vector of [8 x i8] as the result. Positive values
119 /// greater than 0x7F are saturated to 0x7F. Negative values less than 0x80
120 /// are saturated to 0x80.
122 /// \headerfile <x86intrin.h>
124 /// This intrinsic corresponds to the <c> PACKSSWB </c> instruction.
127 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
128 /// 16-bit signed integer and is converted to an 8-bit signed integer with
129 /// saturation. Positive values greater than 0x7F are saturated to 0x7F.
130 /// Negative values less than 0x80 are saturated to 0x80. The converted
131 /// [4 x i8] values are written to the lower 32 bits of the result.
133 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
134 /// 16-bit signed integer and is converted to an 8-bit signed integer with
135 /// saturation. Positive values greater than 0x7F are saturated to 0x7F.
136 /// Negative values less than 0x80 are saturated to 0x80. The converted
137 /// [4 x i8] values are written to the upper 32 bits of the result.
138 /// \returns A 64-bit integer vector of [8 x i8] containing the converted
140 static __inline__ __m64 __DEFAULT_FN_ATTRS
141 _mm_packs_pi16(__m64 __m1, __m64 __m2)
143 return (__m64)__builtin_ia32_packsswb((__v4hi)__m1, (__v4hi)__m2);
146 /// \brief Converts 32-bit signed integers from both 64-bit integer vector
147 /// parameters of [2 x i32] into 16-bit signed integer values, and constructs
148 /// a 64-bit integer vector of [4 x i16] as the result. Positive values
149 /// greater than 0x7FFF are saturated to 0x7FFF. Negative values less than
150 /// 0x8000 are saturated to 0x8000.
152 /// \headerfile <x86intrin.h>
154 /// This intrinsic corresponds to the <c> PACKSSDW </c> instruction.
157 /// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
158 /// 32-bit signed integer and is converted to a 16-bit signed integer with
159 /// saturation. Positive values greater than 0x7FFF are saturated to 0x7FFF.
160 /// Negative values less than 0x8000 are saturated to 0x8000. The converted
161 /// [2 x i16] values are written to the lower 32 bits of the result.
163 /// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
164 /// 32-bit signed integer and is converted to a 16-bit signed integer with
165 /// saturation. Positive values greater than 0x7FFF are saturated to 0x7FFF.
166 /// Negative values less than 0x8000 are saturated to 0x8000. The converted
167 /// [2 x i16] values are written to the upper 32 bits of the result.
168 /// \returns A 64-bit integer vector of [4 x i16] containing the converted
170 static __inline__ __m64 __DEFAULT_FN_ATTRS
171 _mm_packs_pi32(__m64 __m1, __m64 __m2)
173 return (__m64)__builtin_ia32_packssdw((__v2si)__m1, (__v2si)__m2);
176 /// \brief Converts 16-bit signed integers from both 64-bit integer vector
177 /// parameters of [4 x i16] into 8-bit unsigned integer values, and
178 /// constructs a 64-bit integer vector of [8 x i8] as the result. Values
179 /// greater than 0xFF are saturated to 0xFF. Values less than 0 are saturated
182 /// \headerfile <x86intrin.h>
184 /// This intrinsic corresponds to the <c> PACKUSWB </c> instruction.
187 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
188 /// 16-bit signed integer and is converted to an 8-bit unsigned integer with
189 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
190 /// than 0 are saturated to 0. The converted [4 x i8] values are written to
191 /// the lower 32 bits of the result.
193 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
194 /// 16-bit signed integer and is converted to an 8-bit unsigned integer with
195 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
196 /// than 0 are saturated to 0. The converted [4 x i8] values are written to
197 /// the upper 32 bits of the result.
198 /// \returns A 64-bit integer vector of [8 x i8] containing the converted
200 static __inline__ __m64 __DEFAULT_FN_ATTRS
201 _mm_packs_pu16(__m64 __m1, __m64 __m2)
203 return (__m64)__builtin_ia32_packuswb((__v4hi)__m1, (__v4hi)__m2);
206 /// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8]
207 /// and interleaves them into a 64-bit integer vector of [8 x i8].
209 /// \headerfile <x86intrin.h>
211 /// This intrinsic corresponds to the <c> PUNPCKHBW </c> instruction.
214 /// A 64-bit integer vector of [8 x i8]. \n
215 /// Bits [39:32] are written to bits [7:0] of the result. \n
216 /// Bits [47:40] are written to bits [23:16] of the result. \n
217 /// Bits [55:48] are written to bits [39:32] of the result. \n
218 /// Bits [63:56] are written to bits [55:48] of the result.
220 /// A 64-bit integer vector of [8 x i8].
221 /// Bits [39:32] are written to bits [15:8] of the result. \n
222 /// Bits [47:40] are written to bits [31:24] of the result. \n
223 /// Bits [55:48] are written to bits [47:40] of the result. \n
224 /// Bits [63:56] are written to bits [63:56] of the result.
225 /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
227 static __inline__ __m64 __DEFAULT_FN_ATTRS
228 _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)
230 return (__m64)__builtin_ia32_punpckhbw((__v8qi)__m1, (__v8qi)__m2);
233 /// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of
234 /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16].
236 /// \headerfile <x86intrin.h>
238 /// This intrinsic corresponds to the <c> PUNPCKHWD </c> instruction.
241 /// A 64-bit integer vector of [4 x i16].
242 /// Bits [47:32] are written to bits [15:0] of the result. \n
243 /// Bits [63:48] are written to bits [47:32] of the result.
245 /// A 64-bit integer vector of [4 x i16].
246 /// Bits [47:32] are written to bits [31:16] of the result. \n
247 /// Bits [63:48] are written to bits [63:48] of the result.
248 /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
250 static __inline__ __m64 __DEFAULT_FN_ATTRS
251 _mm_unpackhi_pi16(__m64 __m1, __m64 __m2)
253 return (__m64)__builtin_ia32_punpckhwd((__v4hi)__m1, (__v4hi)__m2);
256 /// \brief Unpacks the upper 32 bits from two 64-bit integer vectors of
257 /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32].
259 /// \headerfile <x86intrin.h>
261 /// This intrinsic corresponds to the <c> PUNPCKHDQ </c> instruction.
264 /// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
265 /// the lower 32 bits of the result.
267 /// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
268 /// the upper 32 bits of the result.
269 /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
271 static __inline__ __m64 __DEFAULT_FN_ATTRS
272 _mm_unpackhi_pi32(__m64 __m1, __m64 __m2)
274 return (__m64)__builtin_ia32_punpckhdq((__v2si)__m1, (__v2si)__m2);
277 /// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8]
278 /// and interleaves them into a 64-bit integer vector of [8 x i8].
280 /// \headerfile <x86intrin.h>
282 /// This intrinsic corresponds to the <c> PUNPCKLBW </c> instruction.
285 /// A 64-bit integer vector of [8 x i8].
286 /// Bits [7:0] are written to bits [7:0] of the result. \n
287 /// Bits [15:8] are written to bits [23:16] of the result. \n
288 /// Bits [23:16] are written to bits [39:32] of the result. \n
289 /// Bits [31:24] are written to bits [55:48] of the result.
291 /// A 64-bit integer vector of [8 x i8].
292 /// Bits [7:0] are written to bits [15:8] of the result. \n
293 /// Bits [15:8] are written to bits [31:24] of the result. \n
294 /// Bits [23:16] are written to bits [47:40] of the result. \n
295 /// Bits [31:24] are written to bits [63:56] of the result.
296 /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
298 static __inline__ __m64 __DEFAULT_FN_ATTRS
299 _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)
301 return (__m64)__builtin_ia32_punpcklbw((__v8qi)__m1, (__v8qi)__m2);
304 /// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of
305 /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16].
307 /// \headerfile <x86intrin.h>
309 /// This intrinsic corresponds to the <c> PUNPCKLWD </c> instruction.
312 /// A 64-bit integer vector of [4 x i16].
313 /// Bits [15:0] are written to bits [15:0] of the result. \n
314 /// Bits [31:16] are written to bits [47:32] of the result.
316 /// A 64-bit integer vector of [4 x i16].
317 /// Bits [15:0] are written to bits [31:16] of the result. \n
318 /// Bits [31:16] are written to bits [63:48] of the result.
319 /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
321 static __inline__ __m64 __DEFAULT_FN_ATTRS
322 _mm_unpacklo_pi16(__m64 __m1, __m64 __m2)
324 return (__m64)__builtin_ia32_punpcklwd((__v4hi)__m1, (__v4hi)__m2);
327 /// \brief Unpacks the lower 32 bits from two 64-bit integer vectors of
328 /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32].
330 /// \headerfile <x86intrin.h>
332 /// This intrinsic corresponds to the <c> PUNPCKLDQ </c> instruction.
335 /// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
336 /// the lower 32 bits of the result.
338 /// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
339 /// the upper 32 bits of the result.
340 /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
342 static __inline__ __m64 __DEFAULT_FN_ATTRS
343 _mm_unpacklo_pi32(__m64 __m1, __m64 __m2)
345 return (__m64)__builtin_ia32_punpckldq((__v2si)__m1, (__v2si)__m2);
348 /// \brief Adds each 8-bit integer element of the first 64-bit integer vector
349 /// of [8 x i8] to the corresponding 8-bit integer element of the second
350 /// 64-bit integer vector of [8 x i8]. The lower 8 bits of the results are
351 /// packed into a 64-bit integer vector of [8 x i8].
353 /// \headerfile <x86intrin.h>
355 /// This intrinsic corresponds to the <c> PADDB </c> instruction.
358 /// A 64-bit integer vector of [8 x i8].
360 /// A 64-bit integer vector of [8 x i8].
361 /// \returns A 64-bit integer vector of [8 x i8] containing the sums of both
363 static __inline__ __m64 __DEFAULT_FN_ATTRS
364 _mm_add_pi8(__m64 __m1, __m64 __m2)
366 return (__m64)__builtin_ia32_paddb((__v8qi)__m1, (__v8qi)__m2);
369 /// \brief Adds each 16-bit integer element of the first 64-bit integer vector
370 /// of [4 x i16] to the corresponding 16-bit integer element of the second
371 /// 64-bit integer vector of [4 x i16]. The lower 16 bits of the results are
372 /// packed into a 64-bit integer vector of [4 x i16].
374 /// \headerfile <x86intrin.h>
376 /// This intrinsic corresponds to the <c> PADDW </c> instruction.
379 /// A 64-bit integer vector of [4 x i16].
381 /// A 64-bit integer vector of [4 x i16].
382 /// \returns A 64-bit integer vector of [4 x i16] containing the sums of both
384 static __inline__ __m64 __DEFAULT_FN_ATTRS
385 _mm_add_pi16(__m64 __m1, __m64 __m2)
387 return (__m64)__builtin_ia32_paddw((__v4hi)__m1, (__v4hi)__m2);
390 /// \brief Adds each 32-bit integer element of the first 64-bit integer vector
391 /// of [2 x i32] to the corresponding 32-bit integer element of the second
392 /// 64-bit integer vector of [2 x i32]. The lower 32 bits of the results are
393 /// packed into a 64-bit integer vector of [2 x i32].
395 /// \headerfile <x86intrin.h>
397 /// This intrinsic corresponds to the <c> PADDD </c> instruction.
400 /// A 64-bit integer vector of [2 x i32].
402 /// A 64-bit integer vector of [2 x i32].
403 /// \returns A 64-bit integer vector of [2 x i32] containing the sums of both
405 static __inline__ __m64 __DEFAULT_FN_ATTRS
406 _mm_add_pi32(__m64 __m1, __m64 __m2)
408 return (__m64)__builtin_ia32_paddd((__v2si)__m1, (__v2si)__m2);
411 /// \brief Adds each 8-bit signed integer element of the first 64-bit integer
412 /// vector of [8 x i8] to the corresponding 8-bit signed integer element of
413 /// the second 64-bit integer vector of [8 x i8]. Positive sums greater than
414 /// 0x7F are saturated to 0x7F. Negative sums less than 0x80 are saturated to
415 /// 0x80. The results are packed into a 64-bit integer vector of [8 x i8].
417 /// \headerfile <x86intrin.h>
419 /// This intrinsic corresponds to the <c> PADDSB </c> instruction.
422 /// A 64-bit integer vector of [8 x i8].
424 /// A 64-bit integer vector of [8 x i8].
425 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums
426 /// of both parameters.
427 static __inline__ __m64 __DEFAULT_FN_ATTRS
428 _mm_adds_pi8(__m64 __m1, __m64 __m2)
430 return (__m64)__builtin_ia32_paddsb((__v8qi)__m1, (__v8qi)__m2);
433 /// \brief Adds each 16-bit signed integer element of the first 64-bit integer
434 /// vector of [4 x i16] to the corresponding 16-bit signed integer element of
435 /// the second 64-bit integer vector of [4 x i16]. Positive sums greater than
436 /// 0x7FFF are saturated to 0x7FFF. Negative sums less than 0x8000 are
437 /// saturated to 0x8000. The results are packed into a 64-bit integer vector
440 /// \headerfile <x86intrin.h>
442 /// This intrinsic corresponds to the <c> PADDSW </c> instruction.
445 /// A 64-bit integer vector of [4 x i16].
447 /// A 64-bit integer vector of [4 x i16].
448 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums
449 /// of both parameters.
450 static __inline__ __m64 __DEFAULT_FN_ATTRS
451 _mm_adds_pi16(__m64 __m1, __m64 __m2)
453 return (__m64)__builtin_ia32_paddsw((__v4hi)__m1, (__v4hi)__m2);
456 /// \brief Adds each 8-bit unsigned integer element of the first 64-bit integer
457 /// vector of [8 x i8] to the corresponding 8-bit unsigned integer element of
458 /// the second 64-bit integer vector of [8 x i8]. Sums greater than 0xFF are
459 /// saturated to 0xFF. The results are packed into a 64-bit integer vector of
462 /// \headerfile <x86intrin.h>
464 /// This intrinsic corresponds to the <c> PADDUSB </c> instruction.
467 /// A 64-bit integer vector of [8 x i8].
469 /// A 64-bit integer vector of [8 x i8].
470 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
471 /// unsigned sums of both parameters.
472 static __inline__ __m64 __DEFAULT_FN_ATTRS
473 _mm_adds_pu8(__m64 __m1, __m64 __m2)
475 return (__m64)__builtin_ia32_paddusb((__v8qi)__m1, (__v8qi)__m2);
478 /// \brief Adds each 16-bit unsigned integer element of the first 64-bit integer
479 /// vector of [4 x i16] to the corresponding 16-bit unsigned integer element
480 /// of the second 64-bit integer vector of [4 x i16]. Sums greater than
481 /// 0xFFFF are saturated to 0xFFFF. The results are packed into a 64-bit
482 /// integer vector of [4 x i16].
484 /// \headerfile <x86intrin.h>
486 /// This intrinsic corresponds to the <c> PADDUSW </c> instruction.
489 /// A 64-bit integer vector of [4 x i16].
491 /// A 64-bit integer vector of [4 x i16].
492 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
493 /// unsigned sums of both parameters.
494 static __inline__ __m64 __DEFAULT_FN_ATTRS
495 _mm_adds_pu16(__m64 __m1, __m64 __m2)
497 return (__m64)__builtin_ia32_paddusw((__v4hi)__m1, (__v4hi)__m2);
500 /// \brief Subtracts each 8-bit integer element of the second 64-bit integer
501 /// vector of [8 x i8] from the corresponding 8-bit integer element of the
502 /// first 64-bit integer vector of [8 x i8]. The lower 8 bits of the results
503 /// are packed into a 64-bit integer vector of [8 x i8].
505 /// \headerfile <x86intrin.h>
507 /// This intrinsic corresponds to the <c> PSUBB </c> instruction.
510 /// A 64-bit integer vector of [8 x i8] containing the minuends.
512 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
513 /// \returns A 64-bit integer vector of [8 x i8] containing the differences of
515 static __inline__ __m64 __DEFAULT_FN_ATTRS
516 _mm_sub_pi8(__m64 __m1, __m64 __m2)
518 return (__m64)__builtin_ia32_psubb((__v8qi)__m1, (__v8qi)__m2);
521 /// \brief Subtracts each 16-bit integer element of the second 64-bit integer
522 /// vector of [4 x i16] from the corresponding 16-bit integer element of the
523 /// first 64-bit integer vector of [4 x i16]. The lower 16 bits of the
524 /// results are packed into a 64-bit integer vector of [4 x i16].
526 /// \headerfile <x86intrin.h>
528 /// This intrinsic corresponds to the <c> PSUBW </c> instruction.
531 /// A 64-bit integer vector of [4 x i16] containing the minuends.
533 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
534 /// \returns A 64-bit integer vector of [4 x i16] containing the differences of
536 static __inline__ __m64 __DEFAULT_FN_ATTRS
537 _mm_sub_pi16(__m64 __m1, __m64 __m2)
539 return (__m64)__builtin_ia32_psubw((__v4hi)__m1, (__v4hi)__m2);
542 /// \brief Subtracts each 32-bit integer element of the second 64-bit integer
543 /// vector of [2 x i32] from the corresponding 32-bit integer element of the
544 /// first 64-bit integer vector of [2 x i32]. The lower 32 bits of the
545 /// results are packed into a 64-bit integer vector of [2 x i32].
547 /// \headerfile <x86intrin.h>
549 /// This intrinsic corresponds to the <c> PSUBD </c> instruction.
552 /// A 64-bit integer vector of [2 x i32] containing the minuends.
554 /// A 64-bit integer vector of [2 x i32] containing the subtrahends.
555 /// \returns A 64-bit integer vector of [2 x i32] containing the differences of
557 static __inline__ __m64 __DEFAULT_FN_ATTRS
558 _mm_sub_pi32(__m64 __m1, __m64 __m2)
560 return (__m64)__builtin_ia32_psubd((__v2si)__m1, (__v2si)__m2);
563 /// \brief Subtracts each 8-bit signed integer element of the second 64-bit
564 /// integer vector of [8 x i8] from the corresponding 8-bit signed integer
565 /// element of the first 64-bit integer vector of [8 x i8]. Positive results
566 /// greater than 0x7F are saturated to 0x7F. Negative results less than 0x80
567 /// are saturated to 0x80. The results are packed into a 64-bit integer
568 /// vector of [8 x i8].
570 /// \headerfile <x86intrin.h>
572 /// This intrinsic corresponds to the <c> PSUBSB </c> instruction.
575 /// A 64-bit integer vector of [8 x i8] containing the minuends.
577 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
578 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
579 /// differences of both parameters.
580 static __inline__ __m64 __DEFAULT_FN_ATTRS
581 _mm_subs_pi8(__m64 __m1, __m64 __m2)
583 return (__m64)__builtin_ia32_psubsb((__v8qi)__m1, (__v8qi)__m2);
586 /// \brief Subtracts each 16-bit signed integer element of the second 64-bit
587 /// integer vector of [4 x i16] from the corresponding 16-bit signed integer
588 /// element of the first 64-bit integer vector of [4 x i16]. Positive results
589 /// greater than 0x7FFF are saturated to 0x7FFF. Negative results less than
590 /// 0x8000 are saturated to 0x8000. The results are packed into a 64-bit
591 /// integer vector of [4 x i16].
593 /// \headerfile <x86intrin.h>
595 /// This intrinsic corresponds to the <c> PSUBSW </c> instruction.
598 /// A 64-bit integer vector of [4 x i16] containing the minuends.
600 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
601 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
602 /// differences of both parameters.
603 static __inline__ __m64 __DEFAULT_FN_ATTRS
604 _mm_subs_pi16(__m64 __m1, __m64 __m2)
606 return (__m64)__builtin_ia32_psubsw((__v4hi)__m1, (__v4hi)__m2);
609 /// \brief Subtracts each 8-bit unsigned integer element of the second 64-bit
610 /// integer vector of [8 x i8] from the corresponding 8-bit unsigned integer
611 /// element of the first 64-bit integer vector of [8 x i8]. If an element of
612 /// the first vector is less than the corresponding element of the second
613 /// vector, the result is saturated to 0. The results are packed into a
614 /// 64-bit integer vector of [8 x i8].
616 /// \headerfile <x86intrin.h>
618 /// This intrinsic corresponds to the <c> PSUBUSB </c> instruction.
621 /// A 64-bit integer vector of [8 x i8] containing the minuends.
623 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
624 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
625 /// differences of both parameters.
626 static __inline__ __m64 __DEFAULT_FN_ATTRS
627 _mm_subs_pu8(__m64 __m1, __m64 __m2)
629 return (__m64)__builtin_ia32_psubusb((__v8qi)__m1, (__v8qi)__m2);
632 /// \brief Subtracts each 16-bit unsigned integer element of the second 64-bit
633 /// integer vector of [4 x i16] from the corresponding 16-bit unsigned
634 /// integer element of the first 64-bit integer vector of [4 x i16]. If an
635 /// element of the first vector is less than the corresponding element of the
636 /// second vector, the result is saturated to 0. The results are packed into
637 /// a 64-bit integer vector of [4 x i16].
639 /// \headerfile <x86intrin.h>
641 /// This intrinsic corresponds to the <c> PSUBUSW </c> instruction.
644 /// A 64-bit integer vector of [4 x i16] containing the minuends.
646 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
647 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
648 /// differences of both parameters.
649 static __inline__ __m64 __DEFAULT_FN_ATTRS
650 _mm_subs_pu16(__m64 __m1, __m64 __m2)
652 return (__m64)__builtin_ia32_psubusw((__v4hi)__m1, (__v4hi)__m2);
655 /// \brief Multiplies each 16-bit signed integer element of the first 64-bit
656 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
657 /// element of the second 64-bit integer vector of [4 x i16] and get four
658 /// 32-bit products. Adds adjacent pairs of products to get two 32-bit sums.
659 /// The lower 32 bits of these two sums are packed into a 64-bit integer
660 /// vector of [2 x i32]. For example, bits [15:0] of both parameters are
661 /// multiplied, bits [31:16] of both parameters are multiplied, and the sum
662 /// of both results is written to bits [31:0] of the result.
664 /// \headerfile <x86intrin.h>
666 /// This intrinsic corresponds to the <c> PMADDWD </c> instruction.
669 /// A 64-bit integer vector of [4 x i16].
671 /// A 64-bit integer vector of [4 x i16].
672 /// \returns A 64-bit integer vector of [2 x i32] containing the sums of
673 /// products of both parameters.
674 static __inline__ __m64 __DEFAULT_FN_ATTRS
675 _mm_madd_pi16(__m64 __m1, __m64 __m2)
677 return (__m64)__builtin_ia32_pmaddwd((__v4hi)__m1, (__v4hi)__m2);
680 /// \brief Multiplies each 16-bit signed integer element of the first 64-bit
681 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
682 /// element of the second 64-bit integer vector of [4 x i16]. Packs the upper
683 /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16].
685 /// \headerfile <x86intrin.h>
687 /// This intrinsic corresponds to the <c> PMULHW </c> instruction.
690 /// A 64-bit integer vector of [4 x i16].
692 /// A 64-bit integer vector of [4 x i16].
693 /// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits
694 /// of the products of both parameters.
695 static __inline__ __m64 __DEFAULT_FN_ATTRS
696 _mm_mulhi_pi16(__m64 __m1, __m64 __m2)
698 return (__m64)__builtin_ia32_pmulhw((__v4hi)__m1, (__v4hi)__m2);
701 /// \brief Multiplies each 16-bit signed integer element of the first 64-bit
702 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
703 /// element of the second 64-bit integer vector of [4 x i16]. Packs the lower
704 /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16].
706 /// \headerfile <x86intrin.h>
708 /// This intrinsic corresponds to the <c> PMULLW </c> instruction.
711 /// A 64-bit integer vector of [4 x i16].
713 /// A 64-bit integer vector of [4 x i16].
714 /// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits
715 /// of the products of both parameters.
716 static __inline__ __m64 __DEFAULT_FN_ATTRS
717 _mm_mullo_pi16(__m64 __m1, __m64 __m2)
719 return (__m64)__builtin_ia32_pmullw((__v4hi)__m1, (__v4hi)__m2);
722 /// \brief Left-shifts each 16-bit signed integer element of the first
723 /// parameter, which is a 64-bit integer vector of [4 x i16], by the number
724 /// of bits specified by the second parameter, which is a 64-bit integer. The
725 /// lower 16 bits of the results are packed into a 64-bit integer vector of
728 /// \headerfile <x86intrin.h>
730 /// This intrinsic corresponds to the <c> PSLLW </c> instruction.
733 /// A 64-bit integer vector of [4 x i16].
735 /// A 64-bit integer vector interpreted as a single 64-bit integer.
736 /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted
737 /// values. If \a __count is greater or equal to 16, the result is set to all
739 static __inline__ __m64 __DEFAULT_FN_ATTRS
740 _mm_sll_pi16(__m64 __m, __m64 __count)
742 return (__m64)__builtin_ia32_psllw((__v4hi)__m, __count);
745 /// \brief Left-shifts each 16-bit signed integer element of a 64-bit integer
746 /// vector of [4 x i16] by the number of bits specified by a 32-bit integer.
747 /// The lower 16 bits of the results are packed into a 64-bit integer vector
750 /// \headerfile <x86intrin.h>
752 /// This intrinsic corresponds to the <c> PSLLW </c> instruction.
755 /// A 64-bit integer vector of [4 x i16].
757 /// A 32-bit integer value.
758 /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted
759 /// values. If \a __count is greater or equal to 16, the result is set to all
761 static __inline__ __m64 __DEFAULT_FN_ATTRS
762 _mm_slli_pi16(__m64 __m, int __count)
764 return (__m64)__builtin_ia32_psllwi((__v4hi)__m, __count);
767 /// \brief Left-shifts each 32-bit signed integer element of the first
768 /// parameter, which is a 64-bit integer vector of [2 x i32], by the number
769 /// of bits specified by the second parameter, which is a 64-bit integer. The
770 /// lower 32 bits of the results are packed into a 64-bit integer vector of
773 /// \headerfile <x86intrin.h>
775 /// This intrinsic corresponds to the <c> PSLLD </c> instruction.
778 /// A 64-bit integer vector of [2 x i32].
780 /// A 64-bit integer vector interpreted as a single 64-bit integer.
781 /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted
782 /// values. If \a __count is greater or equal to 32, the result is set to all
784 static __inline__ __m64 __DEFAULT_FN_ATTRS
785 _mm_sll_pi32(__m64 __m, __m64 __count)
787 return (__m64)__builtin_ia32_pslld((__v2si)__m, __count);
790 /// \brief Left-shifts each 32-bit signed integer element of a 64-bit integer
791 /// vector of [2 x i32] by the number of bits specified by a 32-bit integer.
792 /// The lower 32 bits of the results are packed into a 64-bit integer vector
795 /// \headerfile <x86intrin.h>
797 /// This intrinsic corresponds to the <c> PSLLD </c> instruction.
800 /// A 64-bit integer vector of [2 x i32].
802 /// A 32-bit integer value.
803 /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted
804 /// values. If \a __count is greater or equal to 32, the result is set to all
806 static __inline__ __m64 __DEFAULT_FN_ATTRS
807 _mm_slli_pi32(__m64 __m, int __count)
809 return (__m64)__builtin_ia32_pslldi((__v2si)__m, __count);
812 /// \brief Left-shifts the first 64-bit integer parameter by the number of bits
813 /// specified by the second 64-bit integer parameter. The lower 64 bits of
814 /// result are returned.
816 /// \headerfile <x86intrin.h>
818 /// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
821 /// A 64-bit integer vector interpreted as a single 64-bit integer.
823 /// A 64-bit integer vector interpreted as a single 64-bit integer.
824 /// \returns A 64-bit integer vector containing the left-shifted value. If
825 /// \a __count is greater or equal to 64, the result is set to 0.
826 static __inline__ __m64 __DEFAULT_FN_ATTRS
827 _mm_sll_si64(__m64 __m, __m64 __count)
829 return (__m64)__builtin_ia32_psllq((__v1di)__m, __count);
832 /// \brief Left-shifts the first parameter, which is a 64-bit integer, by the
833 /// number of bits specified by the second parameter, which is a 32-bit
834 /// integer. The lower 64 bits of result are returned.
836 /// \headerfile <x86intrin.h>
838 /// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
841 /// A 64-bit integer vector interpreted as a single 64-bit integer.
843 /// A 32-bit integer value.
844 /// \returns A 64-bit integer vector containing the left-shifted value. If
845 /// \a __count is greater or equal to 64, the result is set to 0.
846 static __inline__ __m64 __DEFAULT_FN_ATTRS
847 _mm_slli_si64(__m64 __m, int __count)
849 return (__m64)__builtin_ia32_psllqi((__v1di)__m, __count);
852 /// \brief Right-shifts each 16-bit integer element of the first parameter,
853 /// which is a 64-bit integer vector of [4 x i16], by the number of bits
854 /// specified by the second parameter, which is a 64-bit integer. High-order
855 /// bits are filled with the sign bit of the initial value of each 16-bit
856 /// element. The 16-bit results are packed into a 64-bit integer vector of
859 /// \headerfile <x86intrin.h>
861 /// This intrinsic corresponds to the <c> PSRAW </c> instruction.
864 /// A 64-bit integer vector of [4 x i16].
866 /// A 64-bit integer vector interpreted as a single 64-bit integer.
867 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
869 static __inline__ __m64 __DEFAULT_FN_ATTRS
870 _mm_sra_pi16(__m64 __m, __m64 __count)
872 return (__m64)__builtin_ia32_psraw((__v4hi)__m, __count);
875 /// \brief Right-shifts each 16-bit integer element of a 64-bit integer vector
876 /// of [4 x i16] by the number of bits specified by a 32-bit integer.
877 /// High-order bits are filled with the sign bit of the initial value of each
878 /// 16-bit element. The 16-bit results are packed into a 64-bit integer
879 /// vector of [4 x i16].
881 /// \headerfile <x86intrin.h>
883 /// This intrinsic corresponds to the <c> PSRAW </c> instruction.
886 /// A 64-bit integer vector of [4 x i16].
888 /// A 32-bit integer value.
889 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
891 static __inline__ __m64 __DEFAULT_FN_ATTRS
892 _mm_srai_pi16(__m64 __m, int __count)
894 return (__m64)__builtin_ia32_psrawi((__v4hi)__m, __count);
897 /// \brief Right-shifts each 32-bit integer element of the first parameter,
898 /// which is a 64-bit integer vector of [2 x i32], by the number of bits
899 /// specified by the second parameter, which is a 64-bit integer. High-order
900 /// bits are filled with the sign bit of the initial value of each 32-bit
901 /// element. The 32-bit results are packed into a 64-bit integer vector of
904 /// \headerfile <x86intrin.h>
906 /// This intrinsic corresponds to the <c> PSRAD </c> instruction.
909 /// A 64-bit integer vector of [2 x i32].
911 /// A 64-bit integer vector interpreted as a single 64-bit integer.
912 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
914 static __inline__ __m64 __DEFAULT_FN_ATTRS
915 _mm_sra_pi32(__m64 __m, __m64 __count)
917 return (__m64)__builtin_ia32_psrad((__v2si)__m, __count);
920 /// \brief Right-shifts each 32-bit integer element of a 64-bit integer vector
921 /// of [2 x i32] by the number of bits specified by a 32-bit integer.
922 /// High-order bits are filled with the sign bit of the initial value of each
923 /// 32-bit element. The 32-bit results are packed into a 64-bit integer
924 /// vector of [2 x i32].
926 /// \headerfile <x86intrin.h>
928 /// This intrinsic corresponds to the <c> PSRAD </c> instruction.
931 /// A 64-bit integer vector of [2 x i32].
933 /// A 32-bit integer value.
934 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
936 static __inline__ __m64 __DEFAULT_FN_ATTRS
937 _mm_srai_pi32(__m64 __m, int __count)
939 return (__m64)__builtin_ia32_psradi((__v2si)__m, __count);
942 /// \brief Right-shifts each 16-bit integer element of the first parameter,
943 /// which is a 64-bit integer vector of [4 x i16], by the number of bits
944 /// specified by the second parameter, which is a 64-bit integer. High-order
945 /// bits are cleared. The 16-bit results are packed into a 64-bit integer
946 /// vector of [4 x i16].
948 /// \headerfile <x86intrin.h>
950 /// This intrinsic corresponds to the <c> PSRLW </c> instruction.
953 /// A 64-bit integer vector of [4 x i16].
955 /// A 64-bit integer vector interpreted as a single 64-bit integer.
956 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
958 static __inline__ __m64 __DEFAULT_FN_ATTRS
959 _mm_srl_pi16(__m64 __m, __m64 __count)
961 return (__m64)__builtin_ia32_psrlw((__v4hi)__m, __count);
964 /// \brief Right-shifts each 16-bit integer element of a 64-bit integer vector
965 /// of [4 x i16] by the number of bits specified by a 32-bit integer.
966 /// High-order bits are cleared. The 16-bit results are packed into a 64-bit
967 /// integer vector of [4 x i16].
969 /// \headerfile <x86intrin.h>
971 /// This intrinsic corresponds to the <c> PSRLW </c> instruction.
974 /// A 64-bit integer vector of [4 x i16].
976 /// A 32-bit integer value.
977 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
979 static __inline__ __m64 __DEFAULT_FN_ATTRS
980 _mm_srli_pi16(__m64 __m, int __count)
982 return (__m64)__builtin_ia32_psrlwi((__v4hi)__m, __count);
985 /// \brief Right-shifts each 32-bit integer element of the first parameter,
986 /// which is a 64-bit integer vector of [2 x i32], by the number of bits
987 /// specified by the second parameter, which is a 64-bit integer. High-order
988 /// bits are cleared. The 32-bit results are packed into a 64-bit integer
989 /// vector of [2 x i32].
991 /// \headerfile <x86intrin.h>
993 /// This intrinsic corresponds to the <c> PSRLD </c> instruction.
996 /// A 64-bit integer vector of [2 x i32].
998 /// A 64-bit integer vector interpreted as a single 64-bit integer.
999 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
1001 static __inline__ __m64 __DEFAULT_FN_ATTRS
1002 _mm_srl_pi32(__m64 __m, __m64 __count)
1004 return (__m64)__builtin_ia32_psrld((__v2si)__m, __count);
1007 /// \brief Right-shifts each 32-bit integer element of a 64-bit integer vector
1008 /// of [2 x i32] by the number of bits specified by a 32-bit integer.
1009 /// High-order bits are cleared. The 32-bit results are packed into a 64-bit
1010 /// integer vector of [2 x i32].
1012 /// \headerfile <x86intrin.h>
1014 /// This intrinsic corresponds to the <c> PSRLD </c> instruction.
1017 /// A 64-bit integer vector of [2 x i32].
1019 /// A 32-bit integer value.
1020 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
1022 static __inline__ __m64 __DEFAULT_FN_ATTRS
1023 _mm_srli_pi32(__m64 __m, int __count)
1025 return (__m64)__builtin_ia32_psrldi((__v2si)__m, __count);
1028 /// \brief Right-shifts the first 64-bit integer parameter by the number of bits
1029 /// specified by the second 64-bit integer parameter. High-order bits are
1032 /// \headerfile <x86intrin.h>
1034 /// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
1037 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1039 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1040 /// \returns A 64-bit integer vector containing the right-shifted value.
1041 static __inline__ __m64 __DEFAULT_FN_ATTRS
1042 _mm_srl_si64(__m64 __m, __m64 __count)
1044 return (__m64)__builtin_ia32_psrlq((__v1di)__m, __count);
1047 /// \brief Right-shifts the first parameter, which is a 64-bit integer, by the
1048 /// number of bits specified by the second parameter, which is a 32-bit
1049 /// integer. High-order bits are cleared.
1051 /// \headerfile <x86intrin.h>
1053 /// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
1056 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1058 /// A 32-bit integer value.
1059 /// \returns A 64-bit integer vector containing the right-shifted value.
1060 static __inline__ __m64 __DEFAULT_FN_ATTRS
1061 _mm_srli_si64(__m64 __m, int __count)
1063 return (__m64)__builtin_ia32_psrlqi((__v1di)__m, __count);
1066 /// \brief Performs a bitwise AND of two 64-bit integer vectors.
1068 /// \headerfile <x86intrin.h>
1070 /// This intrinsic corresponds to the <c> PAND </c> instruction.
1073 /// A 64-bit integer vector.
1075 /// A 64-bit integer vector.
1076 /// \returns A 64-bit integer vector containing the bitwise AND of both
1078 static __inline__ __m64 __DEFAULT_FN_ATTRS
1079 _mm_and_si64(__m64 __m1, __m64 __m2)
1081 return __builtin_ia32_pand((__v1di)__m1, (__v1di)__m2);
1084 /// \brief Performs a bitwise NOT of the first 64-bit integer vector, and then
1085 /// performs a bitwise AND of the intermediate result and the second 64-bit
1088 /// \headerfile <x86intrin.h>
1090 /// This intrinsic corresponds to the <c> PANDN </c> instruction.
1093 /// A 64-bit integer vector. The one's complement of this parameter is used
1094 /// in the bitwise AND.
1096 /// A 64-bit integer vector.
1097 /// \returns A 64-bit integer vector containing the bitwise AND of the second
1098 /// parameter and the one's complement of the first parameter.
1099 static __inline__ __m64 __DEFAULT_FN_ATTRS
1100 _mm_andnot_si64(__m64 __m1, __m64 __m2)
1102 return __builtin_ia32_pandn((__v1di)__m1, (__v1di)__m2);
1105 /// \brief Performs a bitwise OR of two 64-bit integer vectors.
1107 /// \headerfile <x86intrin.h>
1109 /// This intrinsic corresponds to the <c> POR </c> instruction.
1112 /// A 64-bit integer vector.
1114 /// A 64-bit integer vector.
1115 /// \returns A 64-bit integer vector containing the bitwise OR of both
1117 static __inline__ __m64 __DEFAULT_FN_ATTRS
1118 _mm_or_si64(__m64 __m1, __m64 __m2)
1120 return __builtin_ia32_por((__v1di)__m1, (__v1di)__m2);
1123 /// \brief Performs a bitwise exclusive OR of two 64-bit integer vectors.
1125 /// \headerfile <x86intrin.h>
1127 /// This intrinsic corresponds to the <c> PXOR </c> instruction.
1130 /// A 64-bit integer vector.
1132 /// A 64-bit integer vector.
1133 /// \returns A 64-bit integer vector containing the bitwise exclusive OR of both
1135 static __inline__ __m64 __DEFAULT_FN_ATTRS
1136 _mm_xor_si64(__m64 __m1, __m64 __m2)
1138 return __builtin_ia32_pxor((__v1di)__m1, (__v1di)__m2);
1141 /// \brief Compares the 8-bit integer elements of two 64-bit integer vectors of
1142 /// [8 x i8] to determine if the element of the first vector is equal to the
1143 /// corresponding element of the second vector. The comparison yields 0 for
1144 /// false, 0xFF for true.
1146 /// \headerfile <x86intrin.h>
1148 /// This intrinsic corresponds to the <c> PCMPEQB </c> instruction.
1151 /// A 64-bit integer vector of [8 x i8].
1153 /// A 64-bit integer vector of [8 x i8].
1154 /// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1156 static __inline__ __m64 __DEFAULT_FN_ATTRS
1157 _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)
1159 return (__m64)__builtin_ia32_pcmpeqb((__v8qi)__m1, (__v8qi)__m2);
1162 /// \brief Compares the 16-bit integer elements of two 64-bit integer vectors of
1163 /// [4 x i16] to determine if the element of the first vector is equal to the
1164 /// corresponding element of the second vector. The comparison yields 0 for
1165 /// false, 0xFFFF for true.
1167 /// \headerfile <x86intrin.h>
1169 /// This intrinsic corresponds to the <c> PCMPEQW </c> instruction.
1172 /// A 64-bit integer vector of [4 x i16].
1174 /// A 64-bit integer vector of [4 x i16].
1175 /// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1177 static __inline__ __m64 __DEFAULT_FN_ATTRS
1178 _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)
1180 return (__m64)__builtin_ia32_pcmpeqw((__v4hi)__m1, (__v4hi)__m2);
1183 /// \brief Compares the 32-bit integer elements of two 64-bit integer vectors of
1184 /// [2 x i32] to determine if the element of the first vector is equal to the
1185 /// corresponding element of the second vector. The comparison yields 0 for
1186 /// false, 0xFFFFFFFF for true.
1188 /// \headerfile <x86intrin.h>
1190 /// This intrinsic corresponds to the <c> PCMPEQD </c> instruction.
1193 /// A 64-bit integer vector of [2 x i32].
1195 /// A 64-bit integer vector of [2 x i32].
1196 /// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1198 static __inline__ __m64 __DEFAULT_FN_ATTRS
1199 _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)
1201 return (__m64)__builtin_ia32_pcmpeqd((__v2si)__m1, (__v2si)__m2);
1204 /// \brief Compares the 8-bit integer elements of two 64-bit integer vectors of
1205 /// [8 x i8] to determine if the element of the first vector is greater than
1206 /// the corresponding element of the second vector. The comparison yields 0
1207 /// for false, 0xFF for true.
1209 /// \headerfile <x86intrin.h>
1211 /// This intrinsic corresponds to the <c> PCMPGTB </c> instruction.
1214 /// A 64-bit integer vector of [8 x i8].
1216 /// A 64-bit integer vector of [8 x i8].
1217 /// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1219 static __inline__ __m64 __DEFAULT_FN_ATTRS
1220 _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)
1222 return (__m64)__builtin_ia32_pcmpgtb((__v8qi)__m1, (__v8qi)__m2);
1225 /// \brief Compares the 16-bit integer elements of two 64-bit integer vectors of
1226 /// [4 x i16] to determine if the element of the first vector is greater than
1227 /// the corresponding element of the second vector. The comparison yields 0
1228 /// for false, 0xFFFF for true.
1230 /// \headerfile <x86intrin.h>
1232 /// This intrinsic corresponds to the <c> PCMPGTW </c> instruction.
1235 /// A 64-bit integer vector of [4 x i16].
1237 /// A 64-bit integer vector of [4 x i16].
1238 /// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1240 static __inline__ __m64 __DEFAULT_FN_ATTRS
1241 _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)
1243 return (__m64)__builtin_ia32_pcmpgtw((__v4hi)__m1, (__v4hi)__m2);
1246 /// \brief Compares the 32-bit integer elements of two 64-bit integer vectors of
1247 /// [2 x i32] to determine if the element of the first vector is greater than
1248 /// the corresponding element of the second vector. The comparison yields 0
1249 /// for false, 0xFFFFFFFF for true.
1251 /// \headerfile <x86intrin.h>
1253 /// This intrinsic corresponds to the <c> PCMPGTD </c> instruction.
1256 /// A 64-bit integer vector of [2 x i32].
1258 /// A 64-bit integer vector of [2 x i32].
1259 /// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1261 static __inline__ __m64 __DEFAULT_FN_ATTRS
1262 _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)
1264 return (__m64)__builtin_ia32_pcmpgtd((__v2si)__m1, (__v2si)__m2);
1267 /// \brief Constructs a 64-bit integer vector initialized to zero.
1269 /// \headerfile <x86intrin.h>
1271 /// This intrinsic corresponds to the the <c> VXORPS / XORPS </c> instruction.
1273 /// \returns An initialized 64-bit integer vector with all elements set to zero.
1274 static __inline__ __m64 __DEFAULT_FN_ATTRS
1275 _mm_setzero_si64(void)
1277 return (__m64){ 0LL };
1280 /// \brief Constructs a 64-bit integer vector initialized with the specified
1281 /// 32-bit integer values.
1283 /// \headerfile <x86intrin.h>
1285 /// This intrinsic is a utility function and does not correspond to a specific
1289 /// A 32-bit integer value used to initialize the upper 32 bits of the
1292 /// A 32-bit integer value used to initialize the lower 32 bits of the
1294 /// \returns An initialized 64-bit integer vector.
1295 static __inline__ __m64 __DEFAULT_FN_ATTRS
1296 _mm_set_pi32(int __i1, int __i0)
1298 return (__m64)__builtin_ia32_vec_init_v2si(__i0, __i1);
1301 /// \brief Constructs a 64-bit integer vector initialized with the specified
1302 /// 16-bit integer values.
1304 /// \headerfile <x86intrin.h>
1306 /// This intrinsic is a utility function and does not correspond to a specific
1310 /// A 16-bit integer value used to initialize bits [63:48] of the result.
1312 /// A 16-bit integer value used to initialize bits [47:32] of the result.
1314 /// A 16-bit integer value used to initialize bits [31:16] of the result.
1316 /// A 16-bit integer value used to initialize bits [15:0] of the result.
1317 /// \returns An initialized 64-bit integer vector.
1318 static __inline__ __m64 __DEFAULT_FN_ATTRS
1319 _mm_set_pi16(short __s3, short __s2, short __s1, short __s0)
1321 return (__m64)__builtin_ia32_vec_init_v4hi(__s0, __s1, __s2, __s3);
1324 /// \brief Constructs a 64-bit integer vector initialized with the specified
1325 /// 8-bit integer values.
1327 /// \headerfile <x86intrin.h>
1329 /// This intrinsic is a utility function and does not correspond to a specific
1333 /// An 8-bit integer value used to initialize bits [63:56] of the result.
1335 /// An 8-bit integer value used to initialize bits [55:48] of the result.
1337 /// An 8-bit integer value used to initialize bits [47:40] of the result.
1339 /// An 8-bit integer value used to initialize bits [39:32] of the result.
1341 /// An 8-bit integer value used to initialize bits [31:24] of the result.
1343 /// An 8-bit integer value used to initialize bits [23:16] of the result.
1345 /// An 8-bit integer value used to initialize bits [15:8] of the result.
1347 /// An 8-bit integer value used to initialize bits [7:0] of the result.
1348 /// \returns An initialized 64-bit integer vector.
1349 static __inline__ __m64 __DEFAULT_FN_ATTRS
1350 _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,
1351 char __b1, char __b0)
1353 return (__m64)__builtin_ia32_vec_init_v8qi(__b0, __b1, __b2, __b3,
1354 __b4, __b5, __b6, __b7);
1357 /// \brief Constructs a 64-bit integer vector of [2 x i32], with each of the
1358 /// 32-bit integer vector elements set to the specified 32-bit integer
1361 /// \headerfile <x86intrin.h>
1363 /// This intrinsic corresponds to the <c> VPSHUFD / PSHUFD </c> instruction.
1366 /// A 32-bit integer value used to initialize each vector element of the
1368 /// \returns An initialized 64-bit integer vector of [2 x i32].
1369 static __inline__ __m64 __DEFAULT_FN_ATTRS
1370 _mm_set1_pi32(int __i)
1372 return _mm_set_pi32(__i, __i);
1375 /// \brief Constructs a 64-bit integer vector of [4 x i16], with each of the
1376 /// 16-bit integer vector elements set to the specified 16-bit integer
1379 /// \headerfile <x86intrin.h>
1381 /// This intrinsic corresponds to the <c> VPSHUFLW / PSHUFLW </c> instruction.
1384 /// A 16-bit integer value used to initialize each vector element of the
1386 /// \returns An initialized 64-bit integer vector of [4 x i16].
1387 static __inline__ __m64 __DEFAULT_FN_ATTRS
1388 _mm_set1_pi16(short __w)
1390 return _mm_set_pi16(__w, __w, __w, __w);
1393 /// \brief Constructs a 64-bit integer vector of [8 x i8], with each of the
1394 /// 8-bit integer vector elements set to the specified 8-bit integer value.
1396 /// \headerfile <x86intrin.h>
1398 /// This intrinsic corresponds to the <c> VPUNPCKLBW + VPSHUFLW / PUNPCKLBW +
1399 /// PSHUFLW </c> instruction.
1402 /// An 8-bit integer value used to initialize each vector element of the
1404 /// \returns An initialized 64-bit integer vector of [8 x i8].
1405 static __inline__ __m64 __DEFAULT_FN_ATTRS
1406 _mm_set1_pi8(char __b)
1408 return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b);
1411 /// \brief Constructs a 64-bit integer vector, initialized in reverse order with
1412 /// the specified 32-bit integer values.
1414 /// \headerfile <x86intrin.h>
1416 /// This intrinsic is a utility function and does not correspond to a specific
1420 /// A 32-bit integer value used to initialize the lower 32 bits of the
1423 /// A 32-bit integer value used to initialize the upper 32 bits of the
1425 /// \returns An initialized 64-bit integer vector.
1426 static __inline__ __m64 __DEFAULT_FN_ATTRS
1427 _mm_setr_pi32(int __i0, int __i1)
1429 return _mm_set_pi32(__i1, __i0);
1432 /// \brief Constructs a 64-bit integer vector, initialized in reverse order with
1433 /// the specified 16-bit integer values.
1435 /// \headerfile <x86intrin.h>
1437 /// This intrinsic is a utility function and does not correspond to a specific
1441 /// A 16-bit integer value used to initialize bits [15:0] of the result.
1443 /// A 16-bit integer value used to initialize bits [31:16] of the result.
1445 /// A 16-bit integer value used to initialize bits [47:32] of the result.
1447 /// A 16-bit integer value used to initialize bits [63:48] of the result.
1448 /// \returns An initialized 64-bit integer vector.
1449 static __inline__ __m64 __DEFAULT_FN_ATTRS
1450 _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3)
1452 return _mm_set_pi16(__w3, __w2, __w1, __w0);
1455 /// \brief Constructs a 64-bit integer vector, initialized in reverse order with
1456 /// the specified 8-bit integer values.
1458 /// \headerfile <x86intrin.h>
1460 /// This intrinsic is a utility function and does not correspond to a specific
1464 /// An 8-bit integer value used to initialize bits [7:0] of the result.
1466 /// An 8-bit integer value used to initialize bits [15:8] of the result.
1468 /// An 8-bit integer value used to initialize bits [23:16] of the result.
1470 /// An 8-bit integer value used to initialize bits [31:24] of the result.
1472 /// An 8-bit integer value used to initialize bits [39:32] of the result.
1474 /// An 8-bit integer value used to initialize bits [47:40] of the result.
1476 /// An 8-bit integer value used to initialize bits [55:48] of the result.
1478 /// An 8-bit integer value used to initialize bits [63:56] of the result.
1479 /// \returns An initialized 64-bit integer vector.
1480 static __inline__ __m64 __DEFAULT_FN_ATTRS
1481 _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
1482 char __b6, char __b7)
1484 return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
1487 #undef __DEFAULT_FN_ATTRS
1489 /* Aliases for compatibility. */
1490 #define _m_empty _mm_empty
1491 #define _m_from_int _mm_cvtsi32_si64
1492 #define _m_from_int64 _mm_cvtsi64_m64
1493 #define _m_to_int _mm_cvtsi64_si32
1494 #define _m_to_int64 _mm_cvtm64_si64
1495 #define _m_packsswb _mm_packs_pi16
1496 #define _m_packssdw _mm_packs_pi32
1497 #define _m_packuswb _mm_packs_pu16
1498 #define _m_punpckhbw _mm_unpackhi_pi8
1499 #define _m_punpckhwd _mm_unpackhi_pi16
1500 #define _m_punpckhdq _mm_unpackhi_pi32
1501 #define _m_punpcklbw _mm_unpacklo_pi8
1502 #define _m_punpcklwd _mm_unpacklo_pi16
1503 #define _m_punpckldq _mm_unpacklo_pi32
1504 #define _m_paddb _mm_add_pi8
1505 #define _m_paddw _mm_add_pi16
1506 #define _m_paddd _mm_add_pi32
1507 #define _m_paddsb _mm_adds_pi8
1508 #define _m_paddsw _mm_adds_pi16
1509 #define _m_paddusb _mm_adds_pu8
1510 #define _m_paddusw _mm_adds_pu16
1511 #define _m_psubb _mm_sub_pi8
1512 #define _m_psubw _mm_sub_pi16
1513 #define _m_psubd _mm_sub_pi32
1514 #define _m_psubsb _mm_subs_pi8
1515 #define _m_psubsw _mm_subs_pi16
1516 #define _m_psubusb _mm_subs_pu8
1517 #define _m_psubusw _mm_subs_pu16
1518 #define _m_pmaddwd _mm_madd_pi16
1519 #define _m_pmulhw _mm_mulhi_pi16
1520 #define _m_pmullw _mm_mullo_pi16
1521 #define _m_psllw _mm_sll_pi16
1522 #define _m_psllwi _mm_slli_pi16
1523 #define _m_pslld _mm_sll_pi32
1524 #define _m_pslldi _mm_slli_pi32
1525 #define _m_psllq _mm_sll_si64
1526 #define _m_psllqi _mm_slli_si64
1527 #define _m_psraw _mm_sra_pi16
1528 #define _m_psrawi _mm_srai_pi16
1529 #define _m_psrad _mm_sra_pi32
1530 #define _m_psradi _mm_srai_pi32
1531 #define _m_psrlw _mm_srl_pi16
1532 #define _m_psrlwi _mm_srli_pi16
1533 #define _m_psrld _mm_srl_pi32
1534 #define _m_psrldi _mm_srli_pi32
1535 #define _m_psrlq _mm_srl_si64
1536 #define _m_psrlqi _mm_srli_si64
1537 #define _m_pand _mm_and_si64
1538 #define _m_pandn _mm_andnot_si64
1539 #define _m_por _mm_or_si64
1540 #define _m_pxor _mm_xor_si64
1541 #define _m_pcmpeqb _mm_cmpeq_pi8
1542 #define _m_pcmpeqw _mm_cmpeq_pi16
1543 #define _m_pcmpeqd _mm_cmpeq_pi32
1544 #define _m_pcmpgtb _mm_cmpgt_pi8
1545 #define _m_pcmpgtw _mm_cmpgt_pi16
1546 #define _m_pcmpgtd _mm_cmpgt_pi32
1548 #endif /* __MMINTRIN_H */