1 /*===---- mmintrin.h - MMX intrinsics --------------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
13 typedef long long __m64 __attribute__((__vector_size__(8), __aligned__(8)));
15 typedef long long __v1di __attribute__((__vector_size__(8)));
16 typedef int __v2si __attribute__((__vector_size__(8)));
17 typedef short __v4hi __attribute__((__vector_size__(8)));
18 typedef char __v8qi __attribute__((__vector_size__(8)));
20 /* Define the default attributes for the functions in this file. */
21 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("mmx"), __min_vector_width__(64)))
23 /// Clears the MMX state by setting the state of the x87 stack registers
26 /// \headerfile <x86intrin.h>
28 /// This intrinsic corresponds to the <c> EMMS </c> instruction.
30 static __inline__ void __attribute__((__always_inline__, __nodebug__, __target__("mmx")))
33 __builtin_ia32_emms();
36 /// Constructs a 64-bit integer vector, setting the lower 32 bits to the
37 /// value of the 32-bit integer parameter and setting the upper 32 bits to 0.
39 /// \headerfile <x86intrin.h>
41 /// This intrinsic corresponds to the <c> MOVD </c> instruction.
44 /// A 32-bit integer value.
45 /// \returns A 64-bit integer vector. The lower 32 bits contain the value of the
46 /// parameter. The upper 32 bits are set to 0.
47 static __inline__ __m64 __DEFAULT_FN_ATTRS
48 _mm_cvtsi32_si64(int __i)
50 return (__m64)__builtin_ia32_vec_init_v2si(__i, 0);
53 /// Returns the lower 32 bits of a 64-bit integer vector as a 32-bit
56 /// \headerfile <x86intrin.h>
58 /// This intrinsic corresponds to the <c> MOVD </c> instruction.
61 /// A 64-bit integer vector.
62 /// \returns A 32-bit signed integer value containing the lower 32 bits of the
64 static __inline__ int __DEFAULT_FN_ATTRS
65 _mm_cvtsi64_si32(__m64 __m)
67 return __builtin_ia32_vec_ext_v2si((__v2si)__m, 0);
70 /// Casts a 64-bit signed integer value into a 64-bit integer vector.
72 /// \headerfile <x86intrin.h>
74 /// This intrinsic corresponds to the <c> MOVQ </c> instruction.
77 /// A 64-bit signed integer.
78 /// \returns A 64-bit integer vector containing the same bitwise pattern as the
80 static __inline__ __m64 __DEFAULT_FN_ATTRS
81 _mm_cvtsi64_m64(long long __i)
86 /// Casts a 64-bit integer vector into a 64-bit signed integer value.
88 /// \headerfile <x86intrin.h>
90 /// This intrinsic corresponds to the <c> MOVQ </c> instruction.
93 /// A 64-bit integer vector.
94 /// \returns A 64-bit signed integer containing the same bitwise pattern as the
96 static __inline__ long long __DEFAULT_FN_ATTRS
97 _mm_cvtm64_si64(__m64 __m)
99 return (long long)__m;
102 /// Converts 16-bit signed integers from both 64-bit integer vector
103 /// parameters of [4 x i16] into 8-bit signed integer values, and constructs
104 /// a 64-bit integer vector of [8 x i8] as the result. Positive values
105 /// greater than 0x7F are saturated to 0x7F. Negative values less than 0x80
106 /// are saturated to 0x80.
108 /// \headerfile <x86intrin.h>
110 /// This intrinsic corresponds to the <c> PACKSSWB </c> instruction.
113 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
114 /// 16-bit signed integer and is converted to an 8-bit signed integer with
115 /// saturation. Positive values greater than 0x7F are saturated to 0x7F.
116 /// Negative values less than 0x80 are saturated to 0x80. The converted
117 /// [4 x i8] values are written to the lower 32 bits of the result.
119 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
120 /// 16-bit signed integer and is converted to an 8-bit signed integer with
121 /// saturation. Positive values greater than 0x7F are saturated to 0x7F.
122 /// Negative values less than 0x80 are saturated to 0x80. The converted
123 /// [4 x i8] values are written to the upper 32 bits of the result.
124 /// \returns A 64-bit integer vector of [8 x i8] containing the converted
126 static __inline__ __m64 __DEFAULT_FN_ATTRS
127 _mm_packs_pi16(__m64 __m1, __m64 __m2)
129 return (__m64)__builtin_ia32_packsswb((__v4hi)__m1, (__v4hi)__m2);
132 /// Converts 32-bit signed integers from both 64-bit integer vector
133 /// parameters of [2 x i32] into 16-bit signed integer values, and constructs
134 /// a 64-bit integer vector of [4 x i16] as the result. Positive values
135 /// greater than 0x7FFF are saturated to 0x7FFF. Negative values less than
136 /// 0x8000 are saturated to 0x8000.
138 /// \headerfile <x86intrin.h>
140 /// This intrinsic corresponds to the <c> PACKSSDW </c> instruction.
143 /// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
144 /// 32-bit signed integer and is converted to a 16-bit signed integer with
145 /// saturation. Positive values greater than 0x7FFF are saturated to 0x7FFF.
146 /// Negative values less than 0x8000 are saturated to 0x8000. The converted
147 /// [2 x i16] values are written to the lower 32 bits of the result.
149 /// A 64-bit integer vector of [2 x i32]. Each 32-bit element is treated as a
150 /// 32-bit signed integer and is converted to a 16-bit signed integer with
151 /// saturation. Positive values greater than 0x7FFF are saturated to 0x7FFF.
152 /// Negative values less than 0x8000 are saturated to 0x8000. The converted
153 /// [2 x i16] values are written to the upper 32 bits of the result.
154 /// \returns A 64-bit integer vector of [4 x i16] containing the converted
156 static __inline__ __m64 __DEFAULT_FN_ATTRS
157 _mm_packs_pi32(__m64 __m1, __m64 __m2)
159 return (__m64)__builtin_ia32_packssdw((__v2si)__m1, (__v2si)__m2);
162 /// Converts 16-bit signed integers from both 64-bit integer vector
163 /// parameters of [4 x i16] into 8-bit unsigned integer values, and
164 /// constructs a 64-bit integer vector of [8 x i8] as the result. Values
165 /// greater than 0xFF are saturated to 0xFF. Values less than 0 are saturated
168 /// \headerfile <x86intrin.h>
170 /// This intrinsic corresponds to the <c> PACKUSWB </c> instruction.
173 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
174 /// 16-bit signed integer and is converted to an 8-bit unsigned integer with
175 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
176 /// than 0 are saturated to 0. The converted [4 x i8] values are written to
177 /// the lower 32 bits of the result.
179 /// A 64-bit integer vector of [4 x i16]. Each 16-bit element is treated as a
180 /// 16-bit signed integer and is converted to an 8-bit unsigned integer with
181 /// saturation. Values greater than 0xFF are saturated to 0xFF. Values less
182 /// than 0 are saturated to 0. The converted [4 x i8] values are written to
183 /// the upper 32 bits of the result.
184 /// \returns A 64-bit integer vector of [8 x i8] containing the converted
186 static __inline__ __m64 __DEFAULT_FN_ATTRS
187 _mm_packs_pu16(__m64 __m1, __m64 __m2)
189 return (__m64)__builtin_ia32_packuswb((__v4hi)__m1, (__v4hi)__m2);
192 /// Unpacks the upper 32 bits from two 64-bit integer vectors of [8 x i8]
193 /// and interleaves them into a 64-bit integer vector of [8 x i8].
195 /// \headerfile <x86intrin.h>
197 /// This intrinsic corresponds to the <c> PUNPCKHBW </c> instruction.
200 /// A 64-bit integer vector of [8 x i8]. \n
201 /// Bits [39:32] are written to bits [7:0] of the result. \n
202 /// Bits [47:40] are written to bits [23:16] of the result. \n
203 /// Bits [55:48] are written to bits [39:32] of the result. \n
204 /// Bits [63:56] are written to bits [55:48] of the result.
206 /// A 64-bit integer vector of [8 x i8].
207 /// Bits [39:32] are written to bits [15:8] of the result. \n
208 /// Bits [47:40] are written to bits [31:24] of the result. \n
209 /// Bits [55:48] are written to bits [47:40] of the result. \n
210 /// Bits [63:56] are written to bits [63:56] of the result.
211 /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
213 static __inline__ __m64 __DEFAULT_FN_ATTRS
214 _mm_unpackhi_pi8(__m64 __m1, __m64 __m2)
216 return (__m64)__builtin_ia32_punpckhbw((__v8qi)__m1, (__v8qi)__m2);
219 /// Unpacks the upper 32 bits from two 64-bit integer vectors of
220 /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16].
222 /// \headerfile <x86intrin.h>
224 /// This intrinsic corresponds to the <c> PUNPCKHWD </c> instruction.
227 /// A 64-bit integer vector of [4 x i16].
228 /// Bits [47:32] are written to bits [15:0] of the result. \n
229 /// Bits [63:48] are written to bits [47:32] of the result.
231 /// A 64-bit integer vector of [4 x i16].
232 /// Bits [47:32] are written to bits [31:16] of the result. \n
233 /// Bits [63:48] are written to bits [63:48] of the result.
234 /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
236 static __inline__ __m64 __DEFAULT_FN_ATTRS
237 _mm_unpackhi_pi16(__m64 __m1, __m64 __m2)
239 return (__m64)__builtin_ia32_punpckhwd((__v4hi)__m1, (__v4hi)__m2);
242 /// Unpacks the upper 32 bits from two 64-bit integer vectors of
243 /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32].
245 /// \headerfile <x86intrin.h>
247 /// This intrinsic corresponds to the <c> PUNPCKHDQ </c> instruction.
250 /// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
251 /// the lower 32 bits of the result.
253 /// A 64-bit integer vector of [2 x i32]. The upper 32 bits are written to
254 /// the upper 32 bits of the result.
255 /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
257 static __inline__ __m64 __DEFAULT_FN_ATTRS
258 _mm_unpackhi_pi32(__m64 __m1, __m64 __m2)
260 return (__m64)__builtin_ia32_punpckhdq((__v2si)__m1, (__v2si)__m2);
263 /// Unpacks the lower 32 bits from two 64-bit integer vectors of [8 x i8]
264 /// and interleaves them into a 64-bit integer vector of [8 x i8].
266 /// \headerfile <x86intrin.h>
268 /// This intrinsic corresponds to the <c> PUNPCKLBW </c> instruction.
271 /// A 64-bit integer vector of [8 x i8].
272 /// Bits [7:0] are written to bits [7:0] of the result. \n
273 /// Bits [15:8] are written to bits [23:16] of the result. \n
274 /// Bits [23:16] are written to bits [39:32] of the result. \n
275 /// Bits [31:24] are written to bits [55:48] of the result.
277 /// A 64-bit integer vector of [8 x i8].
278 /// Bits [7:0] are written to bits [15:8] of the result. \n
279 /// Bits [15:8] are written to bits [31:24] of the result. \n
280 /// Bits [23:16] are written to bits [47:40] of the result. \n
281 /// Bits [31:24] are written to bits [63:56] of the result.
282 /// \returns A 64-bit integer vector of [8 x i8] containing the interleaved
284 static __inline__ __m64 __DEFAULT_FN_ATTRS
285 _mm_unpacklo_pi8(__m64 __m1, __m64 __m2)
287 return (__m64)__builtin_ia32_punpcklbw((__v8qi)__m1, (__v8qi)__m2);
290 /// Unpacks the lower 32 bits from two 64-bit integer vectors of
291 /// [4 x i16] and interleaves them into a 64-bit integer vector of [4 x i16].
293 /// \headerfile <x86intrin.h>
295 /// This intrinsic corresponds to the <c> PUNPCKLWD </c> instruction.
298 /// A 64-bit integer vector of [4 x i16].
299 /// Bits [15:0] are written to bits [15:0] of the result. \n
300 /// Bits [31:16] are written to bits [47:32] of the result.
302 /// A 64-bit integer vector of [4 x i16].
303 /// Bits [15:0] are written to bits [31:16] of the result. \n
304 /// Bits [31:16] are written to bits [63:48] of the result.
305 /// \returns A 64-bit integer vector of [4 x i16] containing the interleaved
307 static __inline__ __m64 __DEFAULT_FN_ATTRS
308 _mm_unpacklo_pi16(__m64 __m1, __m64 __m2)
310 return (__m64)__builtin_ia32_punpcklwd((__v4hi)__m1, (__v4hi)__m2);
313 /// Unpacks the lower 32 bits from two 64-bit integer vectors of
314 /// [2 x i32] and interleaves them into a 64-bit integer vector of [2 x i32].
316 /// \headerfile <x86intrin.h>
318 /// This intrinsic corresponds to the <c> PUNPCKLDQ </c> instruction.
321 /// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
322 /// the lower 32 bits of the result.
324 /// A 64-bit integer vector of [2 x i32]. The lower 32 bits are written to
325 /// the upper 32 bits of the result.
326 /// \returns A 64-bit integer vector of [2 x i32] containing the interleaved
328 static __inline__ __m64 __DEFAULT_FN_ATTRS
329 _mm_unpacklo_pi32(__m64 __m1, __m64 __m2)
331 return (__m64)__builtin_ia32_punpckldq((__v2si)__m1, (__v2si)__m2);
334 /// Adds each 8-bit integer element of the first 64-bit integer vector
335 /// of [8 x i8] to the corresponding 8-bit integer element of the second
336 /// 64-bit integer vector of [8 x i8]. The lower 8 bits of the results are
337 /// packed into a 64-bit integer vector of [8 x i8].
339 /// \headerfile <x86intrin.h>
341 /// This intrinsic corresponds to the <c> PADDB </c> instruction.
344 /// A 64-bit integer vector of [8 x i8].
346 /// A 64-bit integer vector of [8 x i8].
347 /// \returns A 64-bit integer vector of [8 x i8] containing the sums of both
349 static __inline__ __m64 __DEFAULT_FN_ATTRS
350 _mm_add_pi8(__m64 __m1, __m64 __m2)
352 return (__m64)__builtin_ia32_paddb((__v8qi)__m1, (__v8qi)__m2);
355 /// Adds each 16-bit integer element of the first 64-bit integer vector
356 /// of [4 x i16] to the corresponding 16-bit integer element of the second
357 /// 64-bit integer vector of [4 x i16]. The lower 16 bits of the results are
358 /// packed into a 64-bit integer vector of [4 x i16].
360 /// \headerfile <x86intrin.h>
362 /// This intrinsic corresponds to the <c> PADDW </c> instruction.
365 /// A 64-bit integer vector of [4 x i16].
367 /// A 64-bit integer vector of [4 x i16].
368 /// \returns A 64-bit integer vector of [4 x i16] containing the sums of both
370 static __inline__ __m64 __DEFAULT_FN_ATTRS
371 _mm_add_pi16(__m64 __m1, __m64 __m2)
373 return (__m64)__builtin_ia32_paddw((__v4hi)__m1, (__v4hi)__m2);
376 /// Adds each 32-bit integer element of the first 64-bit integer vector
377 /// of [2 x i32] to the corresponding 32-bit integer element of the second
378 /// 64-bit integer vector of [2 x i32]. The lower 32 bits of the results are
379 /// packed into a 64-bit integer vector of [2 x i32].
381 /// \headerfile <x86intrin.h>
383 /// This intrinsic corresponds to the <c> PADDD </c> instruction.
386 /// A 64-bit integer vector of [2 x i32].
388 /// A 64-bit integer vector of [2 x i32].
389 /// \returns A 64-bit integer vector of [2 x i32] containing the sums of both
391 static __inline__ __m64 __DEFAULT_FN_ATTRS
392 _mm_add_pi32(__m64 __m1, __m64 __m2)
394 return (__m64)__builtin_ia32_paddd((__v2si)__m1, (__v2si)__m2);
397 /// Adds each 8-bit signed integer element of the first 64-bit integer
398 /// vector of [8 x i8] to the corresponding 8-bit signed integer element of
399 /// the second 64-bit integer vector of [8 x i8]. Positive sums greater than
400 /// 0x7F are saturated to 0x7F. Negative sums less than 0x80 are saturated to
401 /// 0x80. The results are packed into a 64-bit integer vector of [8 x i8].
403 /// \headerfile <x86intrin.h>
405 /// This intrinsic corresponds to the <c> PADDSB </c> instruction.
408 /// A 64-bit integer vector of [8 x i8].
410 /// A 64-bit integer vector of [8 x i8].
411 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated sums
412 /// of both parameters.
413 static __inline__ __m64 __DEFAULT_FN_ATTRS
414 _mm_adds_pi8(__m64 __m1, __m64 __m2)
416 return (__m64)__builtin_ia32_paddsb((__v8qi)__m1, (__v8qi)__m2);
419 /// Adds each 16-bit signed integer element of the first 64-bit integer
420 /// vector of [4 x i16] to the corresponding 16-bit signed integer element of
421 /// the second 64-bit integer vector of [4 x i16]. Positive sums greater than
422 /// 0x7FFF are saturated to 0x7FFF. Negative sums less than 0x8000 are
423 /// saturated to 0x8000. The results are packed into a 64-bit integer vector
426 /// \headerfile <x86intrin.h>
428 /// This intrinsic corresponds to the <c> PADDSW </c> instruction.
431 /// A 64-bit integer vector of [4 x i16].
433 /// A 64-bit integer vector of [4 x i16].
434 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated sums
435 /// of both parameters.
436 static __inline__ __m64 __DEFAULT_FN_ATTRS
437 _mm_adds_pi16(__m64 __m1, __m64 __m2)
439 return (__m64)__builtin_ia32_paddsw((__v4hi)__m1, (__v4hi)__m2);
442 /// Adds each 8-bit unsigned integer element of the first 64-bit integer
443 /// vector of [8 x i8] to the corresponding 8-bit unsigned integer element of
444 /// the second 64-bit integer vector of [8 x i8]. Sums greater than 0xFF are
445 /// saturated to 0xFF. The results are packed into a 64-bit integer vector of
448 /// \headerfile <x86intrin.h>
450 /// This intrinsic corresponds to the <c> PADDUSB </c> instruction.
453 /// A 64-bit integer vector of [8 x i8].
455 /// A 64-bit integer vector of [8 x i8].
456 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
457 /// unsigned sums of both parameters.
458 static __inline__ __m64 __DEFAULT_FN_ATTRS
459 _mm_adds_pu8(__m64 __m1, __m64 __m2)
461 return (__m64)__builtin_ia32_paddusb((__v8qi)__m1, (__v8qi)__m2);
464 /// Adds each 16-bit unsigned integer element of the first 64-bit integer
465 /// vector of [4 x i16] to the corresponding 16-bit unsigned integer element
466 /// of the second 64-bit integer vector of [4 x i16]. Sums greater than
467 /// 0xFFFF are saturated to 0xFFFF. The results are packed into a 64-bit
468 /// integer vector of [4 x i16].
470 /// \headerfile <x86intrin.h>
472 /// This intrinsic corresponds to the <c> PADDUSW </c> instruction.
475 /// A 64-bit integer vector of [4 x i16].
477 /// A 64-bit integer vector of [4 x i16].
478 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
479 /// unsigned sums of both parameters.
480 static __inline__ __m64 __DEFAULT_FN_ATTRS
481 _mm_adds_pu16(__m64 __m1, __m64 __m2)
483 return (__m64)__builtin_ia32_paddusw((__v4hi)__m1, (__v4hi)__m2);
486 /// Subtracts each 8-bit integer element of the second 64-bit integer
487 /// vector of [8 x i8] from the corresponding 8-bit integer element of the
488 /// first 64-bit integer vector of [8 x i8]. The lower 8 bits of the results
489 /// are packed into a 64-bit integer vector of [8 x i8].
491 /// \headerfile <x86intrin.h>
493 /// This intrinsic corresponds to the <c> PSUBB </c> instruction.
496 /// A 64-bit integer vector of [8 x i8] containing the minuends.
498 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
499 /// \returns A 64-bit integer vector of [8 x i8] containing the differences of
501 static __inline__ __m64 __DEFAULT_FN_ATTRS
502 _mm_sub_pi8(__m64 __m1, __m64 __m2)
504 return (__m64)__builtin_ia32_psubb((__v8qi)__m1, (__v8qi)__m2);
507 /// Subtracts each 16-bit integer element of the second 64-bit integer
508 /// vector of [4 x i16] from the corresponding 16-bit integer element of the
509 /// first 64-bit integer vector of [4 x i16]. The lower 16 bits of the
510 /// results are packed into a 64-bit integer vector of [4 x i16].
512 /// \headerfile <x86intrin.h>
514 /// This intrinsic corresponds to the <c> PSUBW </c> instruction.
517 /// A 64-bit integer vector of [4 x i16] containing the minuends.
519 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
520 /// \returns A 64-bit integer vector of [4 x i16] containing the differences of
522 static __inline__ __m64 __DEFAULT_FN_ATTRS
523 _mm_sub_pi16(__m64 __m1, __m64 __m2)
525 return (__m64)__builtin_ia32_psubw((__v4hi)__m1, (__v4hi)__m2);
528 /// Subtracts each 32-bit integer element of the second 64-bit integer
529 /// vector of [2 x i32] from the corresponding 32-bit integer element of the
530 /// first 64-bit integer vector of [2 x i32]. The lower 32 bits of the
531 /// results are packed into a 64-bit integer vector of [2 x i32].
533 /// \headerfile <x86intrin.h>
535 /// This intrinsic corresponds to the <c> PSUBD </c> instruction.
538 /// A 64-bit integer vector of [2 x i32] containing the minuends.
540 /// A 64-bit integer vector of [2 x i32] containing the subtrahends.
541 /// \returns A 64-bit integer vector of [2 x i32] containing the differences of
543 static __inline__ __m64 __DEFAULT_FN_ATTRS
544 _mm_sub_pi32(__m64 __m1, __m64 __m2)
546 return (__m64)__builtin_ia32_psubd((__v2si)__m1, (__v2si)__m2);
549 /// Subtracts each 8-bit signed integer element of the second 64-bit
550 /// integer vector of [8 x i8] from the corresponding 8-bit signed integer
551 /// element of the first 64-bit integer vector of [8 x i8]. Positive results
552 /// greater than 0x7F are saturated to 0x7F. Negative results less than 0x80
553 /// are saturated to 0x80. The results are packed into a 64-bit integer
554 /// vector of [8 x i8].
556 /// \headerfile <x86intrin.h>
558 /// This intrinsic corresponds to the <c> PSUBSB </c> instruction.
561 /// A 64-bit integer vector of [8 x i8] containing the minuends.
563 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
564 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
565 /// differences of both parameters.
566 static __inline__ __m64 __DEFAULT_FN_ATTRS
567 _mm_subs_pi8(__m64 __m1, __m64 __m2)
569 return (__m64)__builtin_ia32_psubsb((__v8qi)__m1, (__v8qi)__m2);
572 /// Subtracts each 16-bit signed integer element of the second 64-bit
573 /// integer vector of [4 x i16] from the corresponding 16-bit signed integer
574 /// element of the first 64-bit integer vector of [4 x i16]. Positive results
575 /// greater than 0x7FFF are saturated to 0x7FFF. Negative results less than
576 /// 0x8000 are saturated to 0x8000. The results are packed into a 64-bit
577 /// integer vector of [4 x i16].
579 /// \headerfile <x86intrin.h>
581 /// This intrinsic corresponds to the <c> PSUBSW </c> instruction.
584 /// A 64-bit integer vector of [4 x i16] containing the minuends.
586 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
587 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
588 /// differences of both parameters.
589 static __inline__ __m64 __DEFAULT_FN_ATTRS
590 _mm_subs_pi16(__m64 __m1, __m64 __m2)
592 return (__m64)__builtin_ia32_psubsw((__v4hi)__m1, (__v4hi)__m2);
595 /// Subtracts each 8-bit unsigned integer element of the second 64-bit
596 /// integer vector of [8 x i8] from the corresponding 8-bit unsigned integer
597 /// element of the first 64-bit integer vector of [8 x i8].
599 /// If an element of the first vector is less than the corresponding element
600 /// of the second vector, the result is saturated to 0. The results are
601 /// packed into a 64-bit integer vector of [8 x i8].
603 /// \headerfile <x86intrin.h>
605 /// This intrinsic corresponds to the <c> PSUBUSB </c> instruction.
608 /// A 64-bit integer vector of [8 x i8] containing the minuends.
610 /// A 64-bit integer vector of [8 x i8] containing the subtrahends.
611 /// \returns A 64-bit integer vector of [8 x i8] containing the saturated
612 /// differences of both parameters.
613 static __inline__ __m64 __DEFAULT_FN_ATTRS
614 _mm_subs_pu8(__m64 __m1, __m64 __m2)
616 return (__m64)__builtin_ia32_psubusb((__v8qi)__m1, (__v8qi)__m2);
619 /// Subtracts each 16-bit unsigned integer element of the second 64-bit
620 /// integer vector of [4 x i16] from the corresponding 16-bit unsigned
621 /// integer element of the first 64-bit integer vector of [4 x i16].
623 /// If an element of the first vector is less than the corresponding element
624 /// of the second vector, the result is saturated to 0. The results are
625 /// packed into a 64-bit integer vector of [4 x i16].
627 /// \headerfile <x86intrin.h>
629 /// This intrinsic corresponds to the <c> PSUBUSW </c> instruction.
632 /// A 64-bit integer vector of [4 x i16] containing the minuends.
634 /// A 64-bit integer vector of [4 x i16] containing the subtrahends.
635 /// \returns A 64-bit integer vector of [4 x i16] containing the saturated
636 /// differences of both parameters.
637 static __inline__ __m64 __DEFAULT_FN_ATTRS
638 _mm_subs_pu16(__m64 __m1, __m64 __m2)
640 return (__m64)__builtin_ia32_psubusw((__v4hi)__m1, (__v4hi)__m2);
643 /// Multiplies each 16-bit signed integer element of the first 64-bit
644 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
645 /// element of the second 64-bit integer vector of [4 x i16] and get four
646 /// 32-bit products. Adds adjacent pairs of products to get two 32-bit sums.
647 /// The lower 32 bits of these two sums are packed into a 64-bit integer
648 /// vector of [2 x i32].
650 /// For example, bits [15:0] of both parameters are multiplied, bits [31:16]
651 /// of both parameters are multiplied, and the sum of both results is written
652 /// to bits [31:0] of the result.
654 /// \headerfile <x86intrin.h>
656 /// This intrinsic corresponds to the <c> PMADDWD </c> instruction.
659 /// A 64-bit integer vector of [4 x i16].
661 /// A 64-bit integer vector of [4 x i16].
662 /// \returns A 64-bit integer vector of [2 x i32] containing the sums of
663 /// products of both parameters.
664 static __inline__ __m64 __DEFAULT_FN_ATTRS
665 _mm_madd_pi16(__m64 __m1, __m64 __m2)
667 return (__m64)__builtin_ia32_pmaddwd((__v4hi)__m1, (__v4hi)__m2);
670 /// Multiplies each 16-bit signed integer element of the first 64-bit
671 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
672 /// element of the second 64-bit integer vector of [4 x i16]. Packs the upper
673 /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16].
675 /// \headerfile <x86intrin.h>
677 /// This intrinsic corresponds to the <c> PMULHW </c> instruction.
680 /// A 64-bit integer vector of [4 x i16].
682 /// A 64-bit integer vector of [4 x i16].
683 /// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits
684 /// of the products of both parameters.
685 static __inline__ __m64 __DEFAULT_FN_ATTRS
686 _mm_mulhi_pi16(__m64 __m1, __m64 __m2)
688 return (__m64)__builtin_ia32_pmulhw((__v4hi)__m1, (__v4hi)__m2);
691 /// Multiplies each 16-bit signed integer element of the first 64-bit
692 /// integer vector of [4 x i16] by the corresponding 16-bit signed integer
693 /// element of the second 64-bit integer vector of [4 x i16]. Packs the lower
694 /// 16 bits of the 32-bit products into a 64-bit integer vector of [4 x i16].
696 /// \headerfile <x86intrin.h>
698 /// This intrinsic corresponds to the <c> PMULLW </c> instruction.
701 /// A 64-bit integer vector of [4 x i16].
703 /// A 64-bit integer vector of [4 x i16].
704 /// \returns A 64-bit integer vector of [4 x i16] containing the lower 16 bits
705 /// of the products of both parameters.
706 static __inline__ __m64 __DEFAULT_FN_ATTRS
707 _mm_mullo_pi16(__m64 __m1, __m64 __m2)
709 return (__m64)__builtin_ia32_pmullw((__v4hi)__m1, (__v4hi)__m2);
712 /// Left-shifts each 16-bit signed integer element of the first
713 /// parameter, which is a 64-bit integer vector of [4 x i16], by the number
714 /// of bits specified by the second parameter, which is a 64-bit integer. The
715 /// lower 16 bits of the results are packed into a 64-bit integer vector of
718 /// \headerfile <x86intrin.h>
720 /// This intrinsic corresponds to the <c> PSLLW </c> instruction.
723 /// A 64-bit integer vector of [4 x i16].
725 /// A 64-bit integer vector interpreted as a single 64-bit integer.
726 /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted
727 /// values. If \a __count is greater or equal to 16, the result is set to all
729 static __inline__ __m64 __DEFAULT_FN_ATTRS
730 _mm_sll_pi16(__m64 __m, __m64 __count)
732 return (__m64)__builtin_ia32_psllw((__v4hi)__m, __count);
735 /// Left-shifts each 16-bit signed integer element of a 64-bit integer
736 /// vector of [4 x i16] by the number of bits specified by a 32-bit integer.
737 /// The lower 16 bits of the results are packed into a 64-bit integer vector
740 /// \headerfile <x86intrin.h>
742 /// This intrinsic corresponds to the <c> PSLLW </c> instruction.
745 /// A 64-bit integer vector of [4 x i16].
747 /// A 32-bit integer value.
748 /// \returns A 64-bit integer vector of [4 x i16] containing the left-shifted
749 /// values. If \a __count is greater or equal to 16, the result is set to all
751 static __inline__ __m64 __DEFAULT_FN_ATTRS
752 _mm_slli_pi16(__m64 __m, int __count)
754 return (__m64)__builtin_ia32_psllwi((__v4hi)__m, __count);
757 /// Left-shifts each 32-bit signed integer element of the first
758 /// parameter, which is a 64-bit integer vector of [2 x i32], by the number
759 /// of bits specified by the second parameter, which is a 64-bit integer. The
760 /// lower 32 bits of the results are packed into a 64-bit integer vector of
763 /// \headerfile <x86intrin.h>
765 /// This intrinsic corresponds to the <c> PSLLD </c> instruction.
768 /// A 64-bit integer vector of [2 x i32].
770 /// A 64-bit integer vector interpreted as a single 64-bit integer.
771 /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted
772 /// values. If \a __count is greater or equal to 32, the result is set to all
774 static __inline__ __m64 __DEFAULT_FN_ATTRS
775 _mm_sll_pi32(__m64 __m, __m64 __count)
777 return (__m64)__builtin_ia32_pslld((__v2si)__m, __count);
780 /// Left-shifts each 32-bit signed integer element of a 64-bit integer
781 /// vector of [2 x i32] by the number of bits specified by a 32-bit integer.
782 /// The lower 32 bits of the results are packed into a 64-bit integer vector
785 /// \headerfile <x86intrin.h>
787 /// This intrinsic corresponds to the <c> PSLLD </c> instruction.
790 /// A 64-bit integer vector of [2 x i32].
792 /// A 32-bit integer value.
793 /// \returns A 64-bit integer vector of [2 x i32] containing the left-shifted
794 /// values. If \a __count is greater or equal to 32, the result is set to all
796 static __inline__ __m64 __DEFAULT_FN_ATTRS
797 _mm_slli_pi32(__m64 __m, int __count)
799 return (__m64)__builtin_ia32_pslldi((__v2si)__m, __count);
802 /// Left-shifts the first 64-bit integer parameter by the number of bits
803 /// specified by the second 64-bit integer parameter. The lower 64 bits of
804 /// result are returned.
806 /// \headerfile <x86intrin.h>
808 /// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
811 /// A 64-bit integer vector interpreted as a single 64-bit integer.
813 /// A 64-bit integer vector interpreted as a single 64-bit integer.
814 /// \returns A 64-bit integer vector containing the left-shifted value. If
815 /// \a __count is greater or equal to 64, the result is set to 0.
816 static __inline__ __m64 __DEFAULT_FN_ATTRS
817 _mm_sll_si64(__m64 __m, __m64 __count)
819 return (__m64)__builtin_ia32_psllq((__v1di)__m, __count);
822 /// Left-shifts the first parameter, which is a 64-bit integer, by the
823 /// number of bits specified by the second parameter, which is a 32-bit
824 /// integer. The lower 64 bits of result are returned.
826 /// \headerfile <x86intrin.h>
828 /// This intrinsic corresponds to the <c> PSLLQ </c> instruction.
831 /// A 64-bit integer vector interpreted as a single 64-bit integer.
833 /// A 32-bit integer value.
834 /// \returns A 64-bit integer vector containing the left-shifted value. If
835 /// \a __count is greater or equal to 64, the result is set to 0.
836 static __inline__ __m64 __DEFAULT_FN_ATTRS
837 _mm_slli_si64(__m64 __m, int __count)
839 return (__m64)__builtin_ia32_psllqi((__v1di)__m, __count);
842 /// Right-shifts each 16-bit integer element of the first parameter,
843 /// which is a 64-bit integer vector of [4 x i16], by the number of bits
844 /// specified by the second parameter, which is a 64-bit integer.
846 /// High-order bits are filled with the sign bit of the initial value of each
847 /// 16-bit element. The 16-bit results are packed into a 64-bit integer
848 /// vector of [4 x i16].
850 /// \headerfile <x86intrin.h>
852 /// This intrinsic corresponds to the <c> PSRAW </c> instruction.
855 /// A 64-bit integer vector of [4 x i16].
857 /// A 64-bit integer vector interpreted as a single 64-bit integer.
858 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
860 static __inline__ __m64 __DEFAULT_FN_ATTRS
861 _mm_sra_pi16(__m64 __m, __m64 __count)
863 return (__m64)__builtin_ia32_psraw((__v4hi)__m, __count);
866 /// Right-shifts each 16-bit integer element of a 64-bit integer vector
867 /// of [4 x i16] by the number of bits specified by a 32-bit integer.
869 /// High-order bits are filled with the sign bit of the initial value of each
870 /// 16-bit element. The 16-bit results are packed into a 64-bit integer
871 /// vector of [4 x i16].
873 /// \headerfile <x86intrin.h>
875 /// This intrinsic corresponds to the <c> PSRAW </c> instruction.
878 /// A 64-bit integer vector of [4 x i16].
880 /// A 32-bit integer value.
881 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
883 static __inline__ __m64 __DEFAULT_FN_ATTRS
884 _mm_srai_pi16(__m64 __m, int __count)
886 return (__m64)__builtin_ia32_psrawi((__v4hi)__m, __count);
889 /// Right-shifts each 32-bit integer element of the first parameter,
890 /// which is a 64-bit integer vector of [2 x i32], by the number of bits
891 /// specified by the second parameter, which is a 64-bit integer.
893 /// High-order bits are filled with the sign bit of the initial value of each
894 /// 32-bit element. The 32-bit results are packed into a 64-bit integer
895 /// vector of [2 x i32].
897 /// \headerfile <x86intrin.h>
899 /// This intrinsic corresponds to the <c> PSRAD </c> instruction.
902 /// A 64-bit integer vector of [2 x i32].
904 /// A 64-bit integer vector interpreted as a single 64-bit integer.
905 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
907 static __inline__ __m64 __DEFAULT_FN_ATTRS
908 _mm_sra_pi32(__m64 __m, __m64 __count)
910 return (__m64)__builtin_ia32_psrad((__v2si)__m, __count);
913 /// Right-shifts each 32-bit integer element of a 64-bit integer vector
914 /// of [2 x i32] by the number of bits specified by a 32-bit integer.
916 /// High-order bits are filled with the sign bit of the initial value of each
917 /// 32-bit element. The 32-bit results are packed into a 64-bit integer
918 /// vector of [2 x i32].
920 /// \headerfile <x86intrin.h>
922 /// This intrinsic corresponds to the <c> PSRAD </c> instruction.
925 /// A 64-bit integer vector of [2 x i32].
927 /// A 32-bit integer value.
928 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
930 static __inline__ __m64 __DEFAULT_FN_ATTRS
931 _mm_srai_pi32(__m64 __m, int __count)
933 return (__m64)__builtin_ia32_psradi((__v2si)__m, __count);
936 /// Right-shifts each 16-bit integer element of the first parameter,
937 /// which is a 64-bit integer vector of [4 x i16], by the number of bits
938 /// specified by the second parameter, which is a 64-bit integer.
940 /// High-order bits are cleared. The 16-bit results are packed into a 64-bit
941 /// integer vector of [4 x i16].
943 /// \headerfile <x86intrin.h>
945 /// This intrinsic corresponds to the <c> PSRLW </c> instruction.
948 /// A 64-bit integer vector of [4 x i16].
950 /// A 64-bit integer vector interpreted as a single 64-bit integer.
951 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
953 static __inline__ __m64 __DEFAULT_FN_ATTRS
954 _mm_srl_pi16(__m64 __m, __m64 __count)
956 return (__m64)__builtin_ia32_psrlw((__v4hi)__m, __count);
959 /// Right-shifts each 16-bit integer element of a 64-bit integer vector
960 /// of [4 x i16] by the number of bits specified by a 32-bit integer.
962 /// High-order bits are cleared. The 16-bit results are packed into a 64-bit
963 /// integer vector of [4 x i16].
965 /// \headerfile <x86intrin.h>
967 /// This intrinsic corresponds to the <c> PSRLW </c> instruction.
970 /// A 64-bit integer vector of [4 x i16].
972 /// A 32-bit integer value.
973 /// \returns A 64-bit integer vector of [4 x i16] containing the right-shifted
975 static __inline__ __m64 __DEFAULT_FN_ATTRS
976 _mm_srli_pi16(__m64 __m, int __count)
978 return (__m64)__builtin_ia32_psrlwi((__v4hi)__m, __count);
981 /// Right-shifts each 32-bit integer element of the first parameter,
982 /// which is a 64-bit integer vector of [2 x i32], by the number of bits
983 /// specified by the second parameter, which is a 64-bit integer.
985 /// High-order bits are cleared. The 32-bit results are packed into a 64-bit
986 /// integer vector of [2 x i32].
988 /// \headerfile <x86intrin.h>
990 /// This intrinsic corresponds to the <c> PSRLD </c> instruction.
993 /// A 64-bit integer vector of [2 x i32].
995 /// A 64-bit integer vector interpreted as a single 64-bit integer.
996 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
998 static __inline__ __m64 __DEFAULT_FN_ATTRS
999 _mm_srl_pi32(__m64 __m, __m64 __count)
1001 return (__m64)__builtin_ia32_psrld((__v2si)__m, __count);
1004 /// Right-shifts each 32-bit integer element of a 64-bit integer vector
1005 /// of [2 x i32] by the number of bits specified by a 32-bit integer.
1007 /// High-order bits are cleared. The 32-bit results are packed into a 64-bit
1008 /// integer vector of [2 x i32].
1010 /// \headerfile <x86intrin.h>
1012 /// This intrinsic corresponds to the <c> PSRLD </c> instruction.
1015 /// A 64-bit integer vector of [2 x i32].
1017 /// A 32-bit integer value.
1018 /// \returns A 64-bit integer vector of [2 x i32] containing the right-shifted
1020 static __inline__ __m64 __DEFAULT_FN_ATTRS
1021 _mm_srli_pi32(__m64 __m, int __count)
1023 return (__m64)__builtin_ia32_psrldi((__v2si)__m, __count);
1026 /// Right-shifts the first 64-bit integer parameter by the number of bits
1027 /// specified by the second 64-bit integer parameter.
1029 /// High-order bits are cleared.
1031 /// \headerfile <x86intrin.h>
1033 /// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
1036 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1038 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1039 /// \returns A 64-bit integer vector containing the right-shifted value.
1040 static __inline__ __m64 __DEFAULT_FN_ATTRS
1041 _mm_srl_si64(__m64 __m, __m64 __count)
1043 return (__m64)__builtin_ia32_psrlq((__v1di)__m, __count);
1046 /// Right-shifts the first parameter, which is a 64-bit integer, by the
1047 /// number of bits specified by the second parameter, which is a 32-bit
1050 /// High-order bits are cleared.
1052 /// \headerfile <x86intrin.h>
1054 /// This intrinsic corresponds to the <c> PSRLQ </c> instruction.
1057 /// A 64-bit integer vector interpreted as a single 64-bit integer.
1059 /// A 32-bit integer value.
1060 /// \returns A 64-bit integer vector containing the right-shifted value.
1061 static __inline__ __m64 __DEFAULT_FN_ATTRS
1062 _mm_srli_si64(__m64 __m, int __count)
1064 return (__m64)__builtin_ia32_psrlqi((__v1di)__m, __count);
1067 /// Performs a bitwise AND of two 64-bit integer vectors.
1069 /// \headerfile <x86intrin.h>
1071 /// This intrinsic corresponds to the <c> PAND </c> instruction.
1074 /// A 64-bit integer vector.
1076 /// A 64-bit integer vector.
1077 /// \returns A 64-bit integer vector containing the bitwise AND of both
1079 static __inline__ __m64 __DEFAULT_FN_ATTRS
1080 _mm_and_si64(__m64 __m1, __m64 __m2)
1082 return __builtin_ia32_pand((__v1di)__m1, (__v1di)__m2);
1085 /// Performs a bitwise NOT of the first 64-bit integer vector, and then
1086 /// performs a bitwise AND of the intermediate result and the second 64-bit
1089 /// \headerfile <x86intrin.h>
1091 /// This intrinsic corresponds to the <c> PANDN </c> instruction.
1094 /// A 64-bit integer vector. The one's complement of this parameter is used
1095 /// in the bitwise AND.
1097 /// A 64-bit integer vector.
1098 /// \returns A 64-bit integer vector containing the bitwise AND of the second
1099 /// parameter and the one's complement of the first parameter.
1100 static __inline__ __m64 __DEFAULT_FN_ATTRS
1101 _mm_andnot_si64(__m64 __m1, __m64 __m2)
1103 return __builtin_ia32_pandn((__v1di)__m1, (__v1di)__m2);
1106 /// Performs a bitwise OR of two 64-bit integer vectors.
1108 /// \headerfile <x86intrin.h>
1110 /// This intrinsic corresponds to the <c> POR </c> instruction.
1113 /// A 64-bit integer vector.
1115 /// A 64-bit integer vector.
1116 /// \returns A 64-bit integer vector containing the bitwise OR of both
1118 static __inline__ __m64 __DEFAULT_FN_ATTRS
1119 _mm_or_si64(__m64 __m1, __m64 __m2)
1121 return __builtin_ia32_por((__v1di)__m1, (__v1di)__m2);
1124 /// Performs a bitwise exclusive OR of two 64-bit integer vectors.
1126 /// \headerfile <x86intrin.h>
1128 /// This intrinsic corresponds to the <c> PXOR </c> instruction.
1131 /// A 64-bit integer vector.
1133 /// A 64-bit integer vector.
1134 /// \returns A 64-bit integer vector containing the bitwise exclusive OR of both
1136 static __inline__ __m64 __DEFAULT_FN_ATTRS
1137 _mm_xor_si64(__m64 __m1, __m64 __m2)
1139 return __builtin_ia32_pxor((__v1di)__m1, (__v1di)__m2);
1142 /// Compares the 8-bit integer elements of two 64-bit integer vectors of
1143 /// [8 x i8] to determine if the element of the first vector is equal to the
1144 /// corresponding element of the second vector.
1146 /// The comparison yields 0 for false, 0xFF for true.
1148 /// \headerfile <x86intrin.h>
1150 /// This intrinsic corresponds to the <c> PCMPEQB </c> instruction.
1153 /// A 64-bit integer vector of [8 x i8].
1155 /// A 64-bit integer vector of [8 x i8].
1156 /// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1158 static __inline__ __m64 __DEFAULT_FN_ATTRS
1159 _mm_cmpeq_pi8(__m64 __m1, __m64 __m2)
1161 return (__m64)__builtin_ia32_pcmpeqb((__v8qi)__m1, (__v8qi)__m2);
1164 /// Compares the 16-bit integer elements of two 64-bit integer vectors of
1165 /// [4 x i16] to determine if the element of the first vector is equal to the
1166 /// corresponding element of the second vector.
1168 /// The comparison yields 0 for false, 0xFFFF for true.
1170 /// \headerfile <x86intrin.h>
1172 /// This intrinsic corresponds to the <c> PCMPEQW </c> instruction.
1175 /// A 64-bit integer vector of [4 x i16].
1177 /// A 64-bit integer vector of [4 x i16].
1178 /// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1180 static __inline__ __m64 __DEFAULT_FN_ATTRS
1181 _mm_cmpeq_pi16(__m64 __m1, __m64 __m2)
1183 return (__m64)__builtin_ia32_pcmpeqw((__v4hi)__m1, (__v4hi)__m2);
1186 /// Compares the 32-bit integer elements of two 64-bit integer vectors of
1187 /// [2 x i32] to determine if the element of the first vector is equal to the
1188 /// corresponding element of the second vector.
1190 /// The comparison yields 0 for false, 0xFFFFFFFF for true.
1192 /// \headerfile <x86intrin.h>
1194 /// This intrinsic corresponds to the <c> PCMPEQD </c> instruction.
1197 /// A 64-bit integer vector of [2 x i32].
1199 /// A 64-bit integer vector of [2 x i32].
1200 /// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1202 static __inline__ __m64 __DEFAULT_FN_ATTRS
1203 _mm_cmpeq_pi32(__m64 __m1, __m64 __m2)
1205 return (__m64)__builtin_ia32_pcmpeqd((__v2si)__m1, (__v2si)__m2);
1208 /// Compares the 8-bit integer elements of two 64-bit integer vectors of
1209 /// [8 x i8] to determine if the element of the first vector is greater than
1210 /// the corresponding element of the second vector.
1212 /// The comparison yields 0 for false, 0xFF for true.
1214 /// \headerfile <x86intrin.h>
1216 /// This intrinsic corresponds to the <c> PCMPGTB </c> instruction.
1219 /// A 64-bit integer vector of [8 x i8].
1221 /// A 64-bit integer vector of [8 x i8].
1222 /// \returns A 64-bit integer vector of [8 x i8] containing the comparison
1224 static __inline__ __m64 __DEFAULT_FN_ATTRS
1225 _mm_cmpgt_pi8(__m64 __m1, __m64 __m2)
1227 return (__m64)__builtin_ia32_pcmpgtb((__v8qi)__m1, (__v8qi)__m2);
1230 /// Compares the 16-bit integer elements of two 64-bit integer vectors of
1231 /// [4 x i16] to determine if the element of the first vector is greater than
1232 /// the corresponding element of the second vector.
1234 /// The comparison yields 0 for false, 0xFFFF for true.
1236 /// \headerfile <x86intrin.h>
1238 /// This intrinsic corresponds to the <c> PCMPGTW </c> instruction.
1241 /// A 64-bit integer vector of [4 x i16].
1243 /// A 64-bit integer vector of [4 x i16].
1244 /// \returns A 64-bit integer vector of [4 x i16] containing the comparison
1246 static __inline__ __m64 __DEFAULT_FN_ATTRS
1247 _mm_cmpgt_pi16(__m64 __m1, __m64 __m2)
1249 return (__m64)__builtin_ia32_pcmpgtw((__v4hi)__m1, (__v4hi)__m2);
1252 /// Compares the 32-bit integer elements of two 64-bit integer vectors of
1253 /// [2 x i32] to determine if the element of the first vector is greater than
1254 /// the corresponding element of the second vector.
1256 /// The comparison yields 0 for false, 0xFFFFFFFF for true.
1258 /// \headerfile <x86intrin.h>
1260 /// This intrinsic corresponds to the <c> PCMPGTD </c> instruction.
1263 /// A 64-bit integer vector of [2 x i32].
1265 /// A 64-bit integer vector of [2 x i32].
1266 /// \returns A 64-bit integer vector of [2 x i32] containing the comparison
1268 static __inline__ __m64 __DEFAULT_FN_ATTRS
1269 _mm_cmpgt_pi32(__m64 __m1, __m64 __m2)
1271 return (__m64)__builtin_ia32_pcmpgtd((__v2si)__m1, (__v2si)__m2);
1274 /// Constructs a 64-bit integer vector initialized to zero.
1276 /// \headerfile <x86intrin.h>
1278 /// This intrinsic corresponds to the <c> PXOR </c> instruction.
1280 /// \returns An initialized 64-bit integer vector with all elements set to zero.
1281 static __inline__ __m64 __DEFAULT_FN_ATTRS
1282 _mm_setzero_si64(void)
1284 return __extension__ (__m64){ 0LL };
1287 /// Constructs a 64-bit integer vector initialized with the specified
1288 /// 32-bit integer values.
1290 /// \headerfile <x86intrin.h>
1292 /// This intrinsic is a utility function and does not correspond to a specific
1296 /// A 32-bit integer value used to initialize the upper 32 bits of the
1299 /// A 32-bit integer value used to initialize the lower 32 bits of the
1301 /// \returns An initialized 64-bit integer vector.
1302 static __inline__ __m64 __DEFAULT_FN_ATTRS
1303 _mm_set_pi32(int __i1, int __i0)
1305 return (__m64)__builtin_ia32_vec_init_v2si(__i0, __i1);
1308 /// Constructs a 64-bit integer vector initialized with the specified
1309 /// 16-bit integer values.
1311 /// \headerfile <x86intrin.h>
1313 /// This intrinsic is a utility function and does not correspond to a specific
1317 /// A 16-bit integer value used to initialize bits [63:48] of the result.
1319 /// A 16-bit integer value used to initialize bits [47:32] of the result.
1321 /// A 16-bit integer value used to initialize bits [31:16] of the result.
1323 /// A 16-bit integer value used to initialize bits [15:0] of the result.
1324 /// \returns An initialized 64-bit integer vector.
1325 static __inline__ __m64 __DEFAULT_FN_ATTRS
1326 _mm_set_pi16(short __s3, short __s2, short __s1, short __s0)
1328 return (__m64)__builtin_ia32_vec_init_v4hi(__s0, __s1, __s2, __s3);
1331 /// Constructs a 64-bit integer vector initialized with the specified
1332 /// 8-bit integer values.
1334 /// \headerfile <x86intrin.h>
1336 /// This intrinsic is a utility function and does not correspond to a specific
1340 /// An 8-bit integer value used to initialize bits [63:56] of the result.
1342 /// An 8-bit integer value used to initialize bits [55:48] of the result.
1344 /// An 8-bit integer value used to initialize bits [47:40] of the result.
1346 /// An 8-bit integer value used to initialize bits [39:32] of the result.
1348 /// An 8-bit integer value used to initialize bits [31:24] of the result.
1350 /// An 8-bit integer value used to initialize bits [23:16] of the result.
1352 /// An 8-bit integer value used to initialize bits [15:8] of the result.
1354 /// An 8-bit integer value used to initialize bits [7:0] of the result.
1355 /// \returns An initialized 64-bit integer vector.
1356 static __inline__ __m64 __DEFAULT_FN_ATTRS
1357 _mm_set_pi8(char __b7, char __b6, char __b5, char __b4, char __b3, char __b2,
1358 char __b1, char __b0)
1360 return (__m64)__builtin_ia32_vec_init_v8qi(__b0, __b1, __b2, __b3,
1361 __b4, __b5, __b6, __b7);
1364 /// Constructs a 64-bit integer vector of [2 x i32], with each of the
1365 /// 32-bit integer vector elements set to the specified 32-bit integer
1368 /// \headerfile <x86intrin.h>
1370 /// This intrinsic is a utility function and does not correspond to a specific
1374 /// A 32-bit integer value used to initialize each vector element of the
1376 /// \returns An initialized 64-bit integer vector of [2 x i32].
1377 static __inline__ __m64 __DEFAULT_FN_ATTRS
1378 _mm_set1_pi32(int __i)
1380 return _mm_set_pi32(__i, __i);
1383 /// Constructs a 64-bit integer vector of [4 x i16], with each of the
1384 /// 16-bit integer vector elements set to the specified 16-bit integer
1387 /// \headerfile <x86intrin.h>
1389 /// This intrinsic is a utility function and does not correspond to a specific
1393 /// A 16-bit integer value used to initialize each vector element of the
1395 /// \returns An initialized 64-bit integer vector of [4 x i16].
1396 static __inline__ __m64 __DEFAULT_FN_ATTRS
1397 _mm_set1_pi16(short __w)
1399 return _mm_set_pi16(__w, __w, __w, __w);
1402 /// Constructs a 64-bit integer vector of [8 x i8], with each of the
1403 /// 8-bit integer vector elements set to the specified 8-bit integer value.
1405 /// \headerfile <x86intrin.h>
1407 /// This intrinsic is a utility function and does not correspond to a specific
1411 /// An 8-bit integer value used to initialize each vector element of the
1413 /// \returns An initialized 64-bit integer vector of [8 x i8].
1414 static __inline__ __m64 __DEFAULT_FN_ATTRS
1415 _mm_set1_pi8(char __b)
1417 return _mm_set_pi8(__b, __b, __b, __b, __b, __b, __b, __b);
1420 /// Constructs a 64-bit integer vector, initialized in reverse order with
1421 /// the specified 32-bit integer values.
1423 /// \headerfile <x86intrin.h>
1425 /// This intrinsic is a utility function and does not correspond to a specific
1429 /// A 32-bit integer value used to initialize the lower 32 bits of the
1432 /// A 32-bit integer value used to initialize the upper 32 bits of the
1434 /// \returns An initialized 64-bit integer vector.
1435 static __inline__ __m64 __DEFAULT_FN_ATTRS
1436 _mm_setr_pi32(int __i0, int __i1)
1438 return _mm_set_pi32(__i1, __i0);
1441 /// Constructs a 64-bit integer vector, initialized in reverse order with
1442 /// the specified 16-bit integer values.
1444 /// \headerfile <x86intrin.h>
1446 /// This intrinsic is a utility function and does not correspond to a specific
1450 /// A 16-bit integer value used to initialize bits [15:0] of the result.
1452 /// A 16-bit integer value used to initialize bits [31:16] of the result.
1454 /// A 16-bit integer value used to initialize bits [47:32] of the result.
1456 /// A 16-bit integer value used to initialize bits [63:48] of the result.
1457 /// \returns An initialized 64-bit integer vector.
1458 static __inline__ __m64 __DEFAULT_FN_ATTRS
1459 _mm_setr_pi16(short __w0, short __w1, short __w2, short __w3)
1461 return _mm_set_pi16(__w3, __w2, __w1, __w0);
1464 /// Constructs a 64-bit integer vector, initialized in reverse order with
1465 /// the specified 8-bit integer values.
1467 /// \headerfile <x86intrin.h>
1469 /// This intrinsic is a utility function and does not correspond to a specific
1473 /// An 8-bit integer value used to initialize bits [7:0] of the result.
1475 /// An 8-bit integer value used to initialize bits [15:8] of the result.
1477 /// An 8-bit integer value used to initialize bits [23:16] of the result.
1479 /// An 8-bit integer value used to initialize bits [31:24] of the result.
1481 /// An 8-bit integer value used to initialize bits [39:32] of the result.
1483 /// An 8-bit integer value used to initialize bits [47:40] of the result.
1485 /// An 8-bit integer value used to initialize bits [55:48] of the result.
1487 /// An 8-bit integer value used to initialize bits [63:56] of the result.
1488 /// \returns An initialized 64-bit integer vector.
1489 static __inline__ __m64 __DEFAULT_FN_ATTRS
1490 _mm_setr_pi8(char __b0, char __b1, char __b2, char __b3, char __b4, char __b5,
1491 char __b6, char __b7)
1493 return _mm_set_pi8(__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
1496 #undef __DEFAULT_FN_ATTRS
1498 /* Aliases for compatibility. */
1499 #define _m_empty _mm_empty
1500 #define _m_from_int _mm_cvtsi32_si64
1501 #define _m_from_int64 _mm_cvtsi64_m64
1502 #define _m_to_int _mm_cvtsi64_si32
1503 #define _m_to_int64 _mm_cvtm64_si64
1504 #define _m_packsswb _mm_packs_pi16
1505 #define _m_packssdw _mm_packs_pi32
1506 #define _m_packuswb _mm_packs_pu16
1507 #define _m_punpckhbw _mm_unpackhi_pi8
1508 #define _m_punpckhwd _mm_unpackhi_pi16
1509 #define _m_punpckhdq _mm_unpackhi_pi32
1510 #define _m_punpcklbw _mm_unpacklo_pi8
1511 #define _m_punpcklwd _mm_unpacklo_pi16
1512 #define _m_punpckldq _mm_unpacklo_pi32
1513 #define _m_paddb _mm_add_pi8
1514 #define _m_paddw _mm_add_pi16
1515 #define _m_paddd _mm_add_pi32
1516 #define _m_paddsb _mm_adds_pi8
1517 #define _m_paddsw _mm_adds_pi16
1518 #define _m_paddusb _mm_adds_pu8
1519 #define _m_paddusw _mm_adds_pu16
1520 #define _m_psubb _mm_sub_pi8
1521 #define _m_psubw _mm_sub_pi16
1522 #define _m_psubd _mm_sub_pi32
1523 #define _m_psubsb _mm_subs_pi8
1524 #define _m_psubsw _mm_subs_pi16
1525 #define _m_psubusb _mm_subs_pu8
1526 #define _m_psubusw _mm_subs_pu16
1527 #define _m_pmaddwd _mm_madd_pi16
1528 #define _m_pmulhw _mm_mulhi_pi16
1529 #define _m_pmullw _mm_mullo_pi16
1530 #define _m_psllw _mm_sll_pi16
1531 #define _m_psllwi _mm_slli_pi16
1532 #define _m_pslld _mm_sll_pi32
1533 #define _m_pslldi _mm_slli_pi32
1534 #define _m_psllq _mm_sll_si64
1535 #define _m_psllqi _mm_slli_si64
1536 #define _m_psraw _mm_sra_pi16
1537 #define _m_psrawi _mm_srai_pi16
1538 #define _m_psrad _mm_sra_pi32
1539 #define _m_psradi _mm_srai_pi32
1540 #define _m_psrlw _mm_srl_pi16
1541 #define _m_psrlwi _mm_srli_pi16
1542 #define _m_psrld _mm_srl_pi32
1543 #define _m_psrldi _mm_srli_pi32
1544 #define _m_psrlq _mm_srl_si64
1545 #define _m_psrlqi _mm_srli_si64
1546 #define _m_pand _mm_and_si64
1547 #define _m_pandn _mm_andnot_si64
1548 #define _m_por _mm_or_si64
1549 #define _m_pxor _mm_xor_si64
1550 #define _m_pcmpeqb _mm_cmpeq_pi8
1551 #define _m_pcmpeqw _mm_cmpeq_pi16
1552 #define _m_pcmpeqd _mm_cmpeq_pi32
1553 #define _m_pcmpgtb _mm_cmpgt_pi8
1554 #define _m_pcmpgtw _mm_cmpgt_pi16
1555 #define _m_pcmpgtd _mm_cmpgt_pi32
1557 #endif /* __MMINTRIN_H */