1 /*===---- xmmintrin.h - SSE intrinsics -------------------------------------===
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29 typedef int __v4si __attribute__((__vector_size__(16)));
30 typedef float __v4sf __attribute__((__vector_size__(16)));
31 typedef float __m128 __attribute__((__vector_size__(16)));
34 typedef unsigned int __v4su __attribute__((__vector_size__(16)));
36 /* This header should only be included in a hosted environment as it depends on
37 * a standard library to provide allocation routines. */
39 #include <mm_malloc.h>
42 /* Define the default attributes for the functions in this file. */
43 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse"), __min_vector_width__(128)))
44 #define __DEFAULT_FN_ATTRS_MMX __attribute__((__always_inline__, __nodebug__, __target__("mmx,sse"), __min_vector_width__(64)))
46 /// Adds the 32-bit float values in the low-order bits of the operands.
48 /// \headerfile <x86intrin.h>
50 /// This intrinsic corresponds to the <c> VADDSS / ADDSS </c> instructions.
53 /// A 128-bit vector of [4 x float] containing one of the source operands.
54 /// The lower 32 bits of this operand are used in the calculation.
56 /// A 128-bit vector of [4 x float] containing one of the source operands.
57 /// The lower 32 bits of this operand are used in the calculation.
58 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the sum
59 /// of the lower 32 bits of both operands. The upper 96 bits are copied from
60 /// the upper 96 bits of the first source operand.
61 static __inline__ __m128 __DEFAULT_FN_ATTRS
62 _mm_add_ss(__m128 __a, __m128 __b)
68 /// Adds two 128-bit vectors of [4 x float], and returns the results of
71 /// \headerfile <x86intrin.h>
73 /// This intrinsic corresponds to the <c> VADDPS / ADDPS </c> instructions.
76 /// A 128-bit vector of [4 x float] containing one of the source operands.
78 /// A 128-bit vector of [4 x float] containing one of the source operands.
79 /// \returns A 128-bit vector of [4 x float] containing the sums of both
81 static __inline__ __m128 __DEFAULT_FN_ATTRS
82 _mm_add_ps(__m128 __a, __m128 __b)
84 return (__m128)((__v4sf)__a + (__v4sf)__b);
87 /// Subtracts the 32-bit float value in the low-order bits of the second
88 /// operand from the corresponding value in the first operand.
90 /// \headerfile <x86intrin.h>
92 /// This intrinsic corresponds to the <c> VSUBSS / SUBSS </c> instructions.
95 /// A 128-bit vector of [4 x float] containing the minuend. The lower 32 bits
96 /// of this operand are used in the calculation.
98 /// A 128-bit vector of [4 x float] containing the subtrahend. The lower 32
99 /// bits of this operand are used in the calculation.
100 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
101 /// difference of the lower 32 bits of both operands. The upper 96 bits are
102 /// copied from the upper 96 bits of the first source operand.
103 static __inline__ __m128 __DEFAULT_FN_ATTRS
104 _mm_sub_ss(__m128 __a, __m128 __b)
110 /// Subtracts each of the values of the second operand from the first
111 /// operand, both of which are 128-bit vectors of [4 x float] and returns
112 /// the results of the subtraction.
114 /// \headerfile <x86intrin.h>
116 /// This intrinsic corresponds to the <c> VSUBPS / SUBPS </c> instructions.
119 /// A 128-bit vector of [4 x float] containing the minuend.
121 /// A 128-bit vector of [4 x float] containing the subtrahend.
122 /// \returns A 128-bit vector of [4 x float] containing the differences between
124 static __inline__ __m128 __DEFAULT_FN_ATTRS
125 _mm_sub_ps(__m128 __a, __m128 __b)
127 return (__m128)((__v4sf)__a - (__v4sf)__b);
130 /// Multiplies two 32-bit float values in the low-order bits of the
133 /// \headerfile <x86intrin.h>
135 /// This intrinsic corresponds to the <c> VMULSS / MULSS </c> instructions.
138 /// A 128-bit vector of [4 x float] containing one of the source operands.
139 /// The lower 32 bits of this operand are used in the calculation.
141 /// A 128-bit vector of [4 x float] containing one of the source operands.
142 /// The lower 32 bits of this operand are used in the calculation.
143 /// \returns A 128-bit vector of [4 x float] containing the product of the lower
144 /// 32 bits of both operands. The upper 96 bits are copied from the upper 96
145 /// bits of the first source operand.
146 static __inline__ __m128 __DEFAULT_FN_ATTRS
147 _mm_mul_ss(__m128 __a, __m128 __b)
153 /// Multiplies two 128-bit vectors of [4 x float] and returns the
154 /// results of the multiplication.
156 /// \headerfile <x86intrin.h>
158 /// This intrinsic corresponds to the <c> VMULPS / MULPS </c> instructions.
161 /// A 128-bit vector of [4 x float] containing one of the source operands.
163 /// A 128-bit vector of [4 x float] containing one of the source operands.
164 /// \returns A 128-bit vector of [4 x float] containing the products of both
166 static __inline__ __m128 __DEFAULT_FN_ATTRS
167 _mm_mul_ps(__m128 __a, __m128 __b)
169 return (__m128)((__v4sf)__a * (__v4sf)__b);
172 /// Divides the value in the low-order 32 bits of the first operand by
173 /// the corresponding value in the second operand.
175 /// \headerfile <x86intrin.h>
177 /// This intrinsic corresponds to the <c> VDIVSS / DIVSS </c> instructions.
180 /// A 128-bit vector of [4 x float] containing the dividend. The lower 32
181 /// bits of this operand are used in the calculation.
183 /// A 128-bit vector of [4 x float] containing the divisor. The lower 32 bits
184 /// of this operand are used in the calculation.
185 /// \returns A 128-bit vector of [4 x float] containing the quotients of the
186 /// lower 32 bits of both operands. The upper 96 bits are copied from the
187 /// upper 96 bits of the first source operand.
188 static __inline__ __m128 __DEFAULT_FN_ATTRS
189 _mm_div_ss(__m128 __a, __m128 __b)
195 /// Divides two 128-bit vectors of [4 x float].
197 /// \headerfile <x86intrin.h>
199 /// This intrinsic corresponds to the <c> VDIVPS / DIVPS </c> instructions.
202 /// A 128-bit vector of [4 x float] containing the dividend.
204 /// A 128-bit vector of [4 x float] containing the divisor.
205 /// \returns A 128-bit vector of [4 x float] containing the quotients of both
207 static __inline__ __m128 __DEFAULT_FN_ATTRS
208 _mm_div_ps(__m128 __a, __m128 __b)
210 return (__m128)((__v4sf)__a / (__v4sf)__b);
213 /// Calculates the square root of the value stored in the low-order bits
214 /// of a 128-bit vector of [4 x float].
216 /// \headerfile <x86intrin.h>
218 /// This intrinsic corresponds to the <c> VSQRTSS / SQRTSS </c> instructions.
221 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
222 /// used in the calculation.
223 /// \returns A 128-bit vector of [4 x float] containing the square root of the
224 /// value in the low-order bits of the operand.
225 static __inline__ __m128 __DEFAULT_FN_ATTRS
226 _mm_sqrt_ss(__m128 __a)
228 return (__m128)__builtin_ia32_sqrtss((__v4sf)__a);
231 /// Calculates the square roots of the values stored in a 128-bit vector
234 /// \headerfile <x86intrin.h>
236 /// This intrinsic corresponds to the <c> VSQRTPS / SQRTPS </c> instructions.
239 /// A 128-bit vector of [4 x float].
240 /// \returns A 128-bit vector of [4 x float] containing the square roots of the
241 /// values in the operand.
242 static __inline__ __m128 __DEFAULT_FN_ATTRS
243 _mm_sqrt_ps(__m128 __a)
245 return __builtin_ia32_sqrtps((__v4sf)__a);
248 /// Calculates the approximate reciprocal of the value stored in the
249 /// low-order bits of a 128-bit vector of [4 x float].
251 /// \headerfile <x86intrin.h>
253 /// This intrinsic corresponds to the <c> VRCPSS / RCPSS </c> instructions.
256 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
257 /// used in the calculation.
258 /// \returns A 128-bit vector of [4 x float] containing the approximate
259 /// reciprocal of the value in the low-order bits of the operand.
260 static __inline__ __m128 __DEFAULT_FN_ATTRS
261 _mm_rcp_ss(__m128 __a)
263 return (__m128)__builtin_ia32_rcpss((__v4sf)__a);
266 /// Calculates the approximate reciprocals of the values stored in a
267 /// 128-bit vector of [4 x float].
269 /// \headerfile <x86intrin.h>
271 /// This intrinsic corresponds to the <c> VRCPPS / RCPPS </c> instructions.
274 /// A 128-bit vector of [4 x float].
275 /// \returns A 128-bit vector of [4 x float] containing the approximate
276 /// reciprocals of the values in the operand.
277 static __inline__ __m128 __DEFAULT_FN_ATTRS
278 _mm_rcp_ps(__m128 __a)
280 return (__m128)__builtin_ia32_rcpps((__v4sf)__a);
283 /// Calculates the approximate reciprocal of the square root of the value
284 /// stored in the low-order bits of a 128-bit vector of [4 x float].
286 /// \headerfile <x86intrin.h>
288 /// This intrinsic corresponds to the <c> VRSQRTSS / RSQRTSS </c> instructions.
291 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
292 /// used in the calculation.
293 /// \returns A 128-bit vector of [4 x float] containing the approximate
294 /// reciprocal of the square root of the value in the low-order bits of the
296 static __inline__ __m128 __DEFAULT_FN_ATTRS
297 _mm_rsqrt_ss(__m128 __a)
299 return __builtin_ia32_rsqrtss((__v4sf)__a);
302 /// Calculates the approximate reciprocals of the square roots of the
303 /// values stored in a 128-bit vector of [4 x float].
305 /// \headerfile <x86intrin.h>
307 /// This intrinsic corresponds to the <c> VRSQRTPS / RSQRTPS </c> instructions.
310 /// A 128-bit vector of [4 x float].
311 /// \returns A 128-bit vector of [4 x float] containing the approximate
312 /// reciprocals of the square roots of the values in the operand.
313 static __inline__ __m128 __DEFAULT_FN_ATTRS
314 _mm_rsqrt_ps(__m128 __a)
316 return __builtin_ia32_rsqrtps((__v4sf)__a);
319 /// Compares two 32-bit float values in the low-order bits of both
320 /// operands and returns the lesser value in the low-order bits of the
321 /// vector of [4 x float].
323 /// \headerfile <x86intrin.h>
325 /// This intrinsic corresponds to the <c> VMINSS / MINSS </c> instructions.
328 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
329 /// 32 bits of this operand are used in the comparison.
331 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
332 /// 32 bits of this operand are used in the comparison.
333 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
334 /// minimum value between both operands. The upper 96 bits are copied from
335 /// the upper 96 bits of the first source operand.
336 static __inline__ __m128 __DEFAULT_FN_ATTRS
337 _mm_min_ss(__m128 __a, __m128 __b)
339 return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b);
342 /// Compares two 128-bit vectors of [4 x float] and returns the lesser
343 /// of each pair of values.
345 /// \headerfile <x86intrin.h>
347 /// This intrinsic corresponds to the <c> VMINPS / MINPS </c> instructions.
350 /// A 128-bit vector of [4 x float] containing one of the operands.
352 /// A 128-bit vector of [4 x float] containing one of the operands.
353 /// \returns A 128-bit vector of [4 x float] containing the minimum values
354 /// between both operands.
355 static __inline__ __m128 __DEFAULT_FN_ATTRS
356 _mm_min_ps(__m128 __a, __m128 __b)
358 return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b);
361 /// Compares two 32-bit float values in the low-order bits of both
362 /// operands and returns the greater value in the low-order bits of a 128-bit
363 /// vector of [4 x float].
365 /// \headerfile <x86intrin.h>
367 /// This intrinsic corresponds to the <c> VMAXSS / MAXSS </c> instructions.
370 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
371 /// 32 bits of this operand are used in the comparison.
373 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
374 /// 32 bits of this operand are used in the comparison.
375 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
376 /// maximum value between both operands. The upper 96 bits are copied from
377 /// the upper 96 bits of the first source operand.
378 static __inline__ __m128 __DEFAULT_FN_ATTRS
379 _mm_max_ss(__m128 __a, __m128 __b)
381 return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b);
384 /// Compares two 128-bit vectors of [4 x float] and returns the greater
385 /// of each pair of values.
387 /// \headerfile <x86intrin.h>
389 /// This intrinsic corresponds to the <c> VMAXPS / MAXPS </c> instructions.
392 /// A 128-bit vector of [4 x float] containing one of the operands.
394 /// A 128-bit vector of [4 x float] containing one of the operands.
395 /// \returns A 128-bit vector of [4 x float] containing the maximum values
396 /// between both operands.
397 static __inline__ __m128 __DEFAULT_FN_ATTRS
398 _mm_max_ps(__m128 __a, __m128 __b)
400 return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b);
403 /// Performs a bitwise AND of two 128-bit vectors of [4 x float].
405 /// \headerfile <x86intrin.h>
407 /// This intrinsic corresponds to the <c> VANDPS / ANDPS </c> instructions.
410 /// A 128-bit vector containing one of the source operands.
412 /// A 128-bit vector containing one of the source operands.
413 /// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the
414 /// values between both operands.
415 static __inline__ __m128 __DEFAULT_FN_ATTRS
416 _mm_and_ps(__m128 __a, __m128 __b)
418 return (__m128)((__v4su)__a & (__v4su)__b);
421 /// Performs a bitwise AND of two 128-bit vectors of [4 x float], using
422 /// the one's complement of the values contained in the first source
425 /// \headerfile <x86intrin.h>
427 /// This intrinsic corresponds to the <c> VANDNPS / ANDNPS </c> instructions.
430 /// A 128-bit vector of [4 x float] containing the first source operand. The
431 /// one's complement of this value is used in the bitwise AND.
433 /// A 128-bit vector of [4 x float] containing the second source operand.
434 /// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the
435 /// one's complement of the first operand and the values in the second
437 static __inline__ __m128 __DEFAULT_FN_ATTRS
438 _mm_andnot_ps(__m128 __a, __m128 __b)
440 return (__m128)(~(__v4su)__a & (__v4su)__b);
443 /// Performs a bitwise OR of two 128-bit vectors of [4 x float].
445 /// \headerfile <x86intrin.h>
447 /// This intrinsic corresponds to the <c> VORPS / ORPS </c> instructions.
450 /// A 128-bit vector of [4 x float] containing one of the source operands.
452 /// A 128-bit vector of [4 x float] containing one of the source operands.
453 /// \returns A 128-bit vector of [4 x float] containing the bitwise OR of the
454 /// values between both operands.
455 static __inline__ __m128 __DEFAULT_FN_ATTRS
456 _mm_or_ps(__m128 __a, __m128 __b)
458 return (__m128)((__v4su)__a | (__v4su)__b);
461 /// Performs a bitwise exclusive OR of two 128-bit vectors of
464 /// \headerfile <x86intrin.h>
466 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instructions.
469 /// A 128-bit vector of [4 x float] containing one of the source operands.
471 /// A 128-bit vector of [4 x float] containing one of the source operands.
472 /// \returns A 128-bit vector of [4 x float] containing the bitwise exclusive OR
473 /// of the values between both operands.
474 static __inline__ __m128 __DEFAULT_FN_ATTRS
475 _mm_xor_ps(__m128 __a, __m128 __b)
477 return (__m128)((__v4su)__a ^ (__v4su)__b);
480 /// Compares two 32-bit float values in the low-order bits of both
481 /// operands for equality and returns the result of the comparison in the
482 /// low-order bits of a vector [4 x float].
484 /// \headerfile <x86intrin.h>
486 /// This intrinsic corresponds to the <c> VCMPEQSS / CMPEQSS </c> instructions.
489 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
490 /// 32 bits of this operand are used in the comparison.
492 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
493 /// 32 bits of this operand are used in the comparison.
494 /// \returns A 128-bit vector of [4 x float] containing the comparison results
495 /// in the low-order bits.
496 static __inline__ __m128 __DEFAULT_FN_ATTRS
497 _mm_cmpeq_ss(__m128 __a, __m128 __b)
499 return (__m128)__builtin_ia32_cmpeqss((__v4sf)__a, (__v4sf)__b);
502 /// Compares each of the corresponding 32-bit float values of the
503 /// 128-bit vectors of [4 x float] for equality.
505 /// \headerfile <x86intrin.h>
507 /// This intrinsic corresponds to the <c> VCMPEQPS / CMPEQPS </c> instructions.
510 /// A 128-bit vector of [4 x float].
512 /// A 128-bit vector of [4 x float].
513 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
514 static __inline__ __m128 __DEFAULT_FN_ATTRS
515 _mm_cmpeq_ps(__m128 __a, __m128 __b)
517 return (__m128)__builtin_ia32_cmpeqps((__v4sf)__a, (__v4sf)__b);
520 /// Compares two 32-bit float values in the low-order bits of both
521 /// operands to determine if the value in the first operand is less than the
522 /// corresponding value in the second operand and returns the result of the
523 /// comparison in the low-order bits of a vector of [4 x float].
525 /// \headerfile <x86intrin.h>
527 /// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
530 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
531 /// 32 bits of this operand are used in the comparison.
533 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
534 /// 32 bits of this operand are used in the comparison.
535 /// \returns A 128-bit vector of [4 x float] containing the comparison results
536 /// in the low-order bits.
537 static __inline__ __m128 __DEFAULT_FN_ATTRS
538 _mm_cmplt_ss(__m128 __a, __m128 __b)
540 return (__m128)__builtin_ia32_cmpltss((__v4sf)__a, (__v4sf)__b);
543 /// Compares each of the corresponding 32-bit float values of the
544 /// 128-bit vectors of [4 x float] to determine if the values in the first
545 /// operand are less than those in the second operand.
547 /// \headerfile <x86intrin.h>
549 /// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
552 /// A 128-bit vector of [4 x float].
554 /// A 128-bit vector of [4 x float].
555 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
556 static __inline__ __m128 __DEFAULT_FN_ATTRS
557 _mm_cmplt_ps(__m128 __a, __m128 __b)
559 return (__m128)__builtin_ia32_cmpltps((__v4sf)__a, (__v4sf)__b);
562 /// Compares two 32-bit float values in the low-order bits of both
563 /// operands to determine if the value in the first operand is less than or
564 /// equal to the corresponding value in the second operand and returns the
565 /// result of the comparison in the low-order bits of a vector of
568 /// \headerfile <x86intrin.h>
570 /// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
573 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
574 /// 32 bits of this operand are used in the comparison.
576 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
577 /// 32 bits of this operand are used in the comparison.
578 /// \returns A 128-bit vector of [4 x float] containing the comparison results
579 /// in the low-order bits.
580 static __inline__ __m128 __DEFAULT_FN_ATTRS
581 _mm_cmple_ss(__m128 __a, __m128 __b)
583 return (__m128)__builtin_ia32_cmpless((__v4sf)__a, (__v4sf)__b);
586 /// Compares each of the corresponding 32-bit float values of the
587 /// 128-bit vectors of [4 x float] to determine if the values in the first
588 /// operand are less than or equal to those in the second operand.
590 /// \headerfile <x86intrin.h>
592 /// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
595 /// A 128-bit vector of [4 x float].
597 /// A 128-bit vector of [4 x float].
598 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
599 static __inline__ __m128 __DEFAULT_FN_ATTRS
600 _mm_cmple_ps(__m128 __a, __m128 __b)
602 return (__m128)__builtin_ia32_cmpleps((__v4sf)__a, (__v4sf)__b);
605 /// Compares two 32-bit float values in the low-order bits of both
606 /// operands to determine if the value in the first operand is greater than
607 /// the corresponding value in the second operand and returns the result of
608 /// the comparison in the low-order bits of a vector of [4 x float].
610 /// \headerfile <x86intrin.h>
612 /// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
615 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
616 /// 32 bits of this operand are used in the comparison.
618 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
619 /// 32 bits of this operand are used in the comparison.
620 /// \returns A 128-bit vector of [4 x float] containing the comparison results
621 /// in the low-order bits.
622 static __inline__ __m128 __DEFAULT_FN_ATTRS
623 _mm_cmpgt_ss(__m128 __a, __m128 __b)
625 return (__m128)__builtin_shufflevector((__v4sf)__a,
626 (__v4sf)__builtin_ia32_cmpltss((__v4sf)__b, (__v4sf)__a),
630 /// Compares each of the corresponding 32-bit float values of the
631 /// 128-bit vectors of [4 x float] to determine if the values in the first
632 /// operand are greater than those in the second operand.
634 /// \headerfile <x86intrin.h>
636 /// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
639 /// A 128-bit vector of [4 x float].
641 /// A 128-bit vector of [4 x float].
642 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
643 static __inline__ __m128 __DEFAULT_FN_ATTRS
644 _mm_cmpgt_ps(__m128 __a, __m128 __b)
646 return (__m128)__builtin_ia32_cmpltps((__v4sf)__b, (__v4sf)__a);
649 /// Compares two 32-bit float values in the low-order bits of both
650 /// operands to determine if the value in the first operand is greater than
651 /// or equal to the corresponding value in the second operand and returns
652 /// the result of the comparison in the low-order bits of a vector of
655 /// \headerfile <x86intrin.h>
657 /// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
660 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
661 /// 32 bits of this operand are used in the comparison.
663 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
664 /// 32 bits of this operand are used in the comparison.
665 /// \returns A 128-bit vector of [4 x float] containing the comparison results
666 /// in the low-order bits.
667 static __inline__ __m128 __DEFAULT_FN_ATTRS
668 _mm_cmpge_ss(__m128 __a, __m128 __b)
670 return (__m128)__builtin_shufflevector((__v4sf)__a,
671 (__v4sf)__builtin_ia32_cmpless((__v4sf)__b, (__v4sf)__a),
675 /// Compares each of the corresponding 32-bit float values of the
676 /// 128-bit vectors of [4 x float] to determine if the values in the first
677 /// operand are greater than or equal to those in the second operand.
679 /// \headerfile <x86intrin.h>
681 /// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
684 /// A 128-bit vector of [4 x float].
686 /// A 128-bit vector of [4 x float].
687 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
688 static __inline__ __m128 __DEFAULT_FN_ATTRS
689 _mm_cmpge_ps(__m128 __a, __m128 __b)
691 return (__m128)__builtin_ia32_cmpleps((__v4sf)__b, (__v4sf)__a);
694 /// Compares two 32-bit float values in the low-order bits of both
695 /// operands for inequality and returns the result of the comparison in the
696 /// low-order bits of a vector of [4 x float].
698 /// \headerfile <x86intrin.h>
700 /// This intrinsic corresponds to the <c> VCMPNEQSS / CMPNEQSS </c>
704 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
705 /// 32 bits of this operand are used in the comparison.
707 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
708 /// 32 bits of this operand are used in the comparison.
709 /// \returns A 128-bit vector of [4 x float] containing the comparison results
710 /// in the low-order bits.
711 static __inline__ __m128 __DEFAULT_FN_ATTRS
712 _mm_cmpneq_ss(__m128 __a, __m128 __b)
714 return (__m128)__builtin_ia32_cmpneqss((__v4sf)__a, (__v4sf)__b);
717 /// Compares each of the corresponding 32-bit float values of the
718 /// 128-bit vectors of [4 x float] for inequality.
720 /// \headerfile <x86intrin.h>
722 /// This intrinsic corresponds to the <c> VCMPNEQPS / CMPNEQPS </c>
726 /// A 128-bit vector of [4 x float].
728 /// A 128-bit vector of [4 x float].
729 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
730 static __inline__ __m128 __DEFAULT_FN_ATTRS
731 _mm_cmpneq_ps(__m128 __a, __m128 __b)
733 return (__m128)__builtin_ia32_cmpneqps((__v4sf)__a, (__v4sf)__b);
736 /// Compares two 32-bit float values in the low-order bits of both
737 /// operands to determine if the value in the first operand is not less than
738 /// the corresponding value in the second operand and returns the result of
739 /// the comparison in the low-order bits of a vector of [4 x float].
741 /// \headerfile <x86intrin.h>
743 /// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c>
747 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
748 /// 32 bits of this operand are used in the comparison.
750 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
751 /// 32 bits of this operand are used in the comparison.
752 /// \returns A 128-bit vector of [4 x float] containing the comparison results
753 /// in the low-order bits.
754 static __inline__ __m128 __DEFAULT_FN_ATTRS
755 _mm_cmpnlt_ss(__m128 __a, __m128 __b)
757 return (__m128)__builtin_ia32_cmpnltss((__v4sf)__a, (__v4sf)__b);
760 /// Compares each of the corresponding 32-bit float values of the
761 /// 128-bit vectors of [4 x float] to determine if the values in the first
762 /// operand are not less than those in the second operand.
764 /// \headerfile <x86intrin.h>
766 /// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c>
770 /// A 128-bit vector of [4 x float].
772 /// A 128-bit vector of [4 x float].
773 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
774 static __inline__ __m128 __DEFAULT_FN_ATTRS
775 _mm_cmpnlt_ps(__m128 __a, __m128 __b)
777 return (__m128)__builtin_ia32_cmpnltps((__v4sf)__a, (__v4sf)__b);
780 /// Compares two 32-bit float values in the low-order bits of both
781 /// operands to determine if the value in the first operand is not less than
782 /// or equal to the corresponding value in the second operand and returns
783 /// the result of the comparison in the low-order bits of a vector of
786 /// \headerfile <x86intrin.h>
788 /// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c>
792 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
793 /// 32 bits of this operand are used in the comparison.
795 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
796 /// 32 bits of this operand are used in the comparison.
797 /// \returns A 128-bit vector of [4 x float] containing the comparison results
798 /// in the low-order bits.
799 static __inline__ __m128 __DEFAULT_FN_ATTRS
800 _mm_cmpnle_ss(__m128 __a, __m128 __b)
802 return (__m128)__builtin_ia32_cmpnless((__v4sf)__a, (__v4sf)__b);
805 /// Compares each of the corresponding 32-bit float values of the
806 /// 128-bit vectors of [4 x float] to determine if the values in the first
807 /// operand are not less than or equal to those in the second operand.
809 /// \headerfile <x86intrin.h>
811 /// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c>
815 /// A 128-bit vector of [4 x float].
817 /// A 128-bit vector of [4 x float].
818 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
819 static __inline__ __m128 __DEFAULT_FN_ATTRS
820 _mm_cmpnle_ps(__m128 __a, __m128 __b)
822 return (__m128)__builtin_ia32_cmpnleps((__v4sf)__a, (__v4sf)__b);
825 /// Compares two 32-bit float values in the low-order bits of both
826 /// operands to determine if the value in the first operand is not greater
827 /// than the corresponding value in the second operand and returns the
828 /// result of the comparison in the low-order bits of a vector of
831 /// \headerfile <x86intrin.h>
833 /// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c>
837 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
838 /// 32 bits of this operand are used in the comparison.
840 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
841 /// 32 bits of this operand are used in the comparison.
842 /// \returns A 128-bit vector of [4 x float] containing the comparison results
843 /// in the low-order bits.
844 static __inline__ __m128 __DEFAULT_FN_ATTRS
845 _mm_cmpngt_ss(__m128 __a, __m128 __b)
847 return (__m128)__builtin_shufflevector((__v4sf)__a,
848 (__v4sf)__builtin_ia32_cmpnltss((__v4sf)__b, (__v4sf)__a),
852 /// Compares each of the corresponding 32-bit float values of the
853 /// 128-bit vectors of [4 x float] to determine if the values in the first
854 /// operand are not greater than those in the second operand.
856 /// \headerfile <x86intrin.h>
858 /// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c>
862 /// A 128-bit vector of [4 x float].
864 /// A 128-bit vector of [4 x float].
865 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
866 static __inline__ __m128 __DEFAULT_FN_ATTRS
867 _mm_cmpngt_ps(__m128 __a, __m128 __b)
869 return (__m128)__builtin_ia32_cmpnltps((__v4sf)__b, (__v4sf)__a);
872 /// Compares two 32-bit float values in the low-order bits of both
873 /// operands to determine if the value in the first operand is not greater
874 /// than or equal to the corresponding value in the second operand and
875 /// returns the result of the comparison in the low-order bits of a vector
878 /// \headerfile <x86intrin.h>
880 /// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c>
884 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
885 /// 32 bits of this operand are used in the comparison.
887 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
888 /// 32 bits of this operand are used in the comparison.
889 /// \returns A 128-bit vector of [4 x float] containing the comparison results
890 /// in the low-order bits.
891 static __inline__ __m128 __DEFAULT_FN_ATTRS
892 _mm_cmpnge_ss(__m128 __a, __m128 __b)
894 return (__m128)__builtin_shufflevector((__v4sf)__a,
895 (__v4sf)__builtin_ia32_cmpnless((__v4sf)__b, (__v4sf)__a),
899 /// Compares each of the corresponding 32-bit float values of the
900 /// 128-bit vectors of [4 x float] to determine if the values in the first
901 /// operand are not greater than or equal to those in the second operand.
903 /// \headerfile <x86intrin.h>
905 /// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c>
909 /// A 128-bit vector of [4 x float].
911 /// A 128-bit vector of [4 x float].
912 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
913 static __inline__ __m128 __DEFAULT_FN_ATTRS
914 _mm_cmpnge_ps(__m128 __a, __m128 __b)
916 return (__m128)__builtin_ia32_cmpnleps((__v4sf)__b, (__v4sf)__a);
919 /// Compares two 32-bit float values in the low-order bits of both
920 /// operands to determine if the value in the first operand is ordered with
921 /// respect to the corresponding value in the second operand and returns the
922 /// result of the comparison in the low-order bits of a vector of
925 /// \headerfile <x86intrin.h>
927 /// This intrinsic corresponds to the <c> VCMPORDSS / CMPORDSS </c>
931 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
932 /// 32 bits of this operand are used in the comparison.
934 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
935 /// 32 bits of this operand are used in the comparison.
936 /// \returns A 128-bit vector of [4 x float] containing the comparison results
937 /// in the low-order bits.
938 static __inline__ __m128 __DEFAULT_FN_ATTRS
939 _mm_cmpord_ss(__m128 __a, __m128 __b)
941 return (__m128)__builtin_ia32_cmpordss((__v4sf)__a, (__v4sf)__b);
944 /// Compares each of the corresponding 32-bit float values of the
945 /// 128-bit vectors of [4 x float] to determine if the values in the first
946 /// operand are ordered with respect to those in the second operand.
948 /// \headerfile <x86intrin.h>
950 /// This intrinsic corresponds to the <c> VCMPORDPS / CMPORDPS </c>
954 /// A 128-bit vector of [4 x float].
956 /// A 128-bit vector of [4 x float].
957 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
958 static __inline__ __m128 __DEFAULT_FN_ATTRS
959 _mm_cmpord_ps(__m128 __a, __m128 __b)
961 return (__m128)__builtin_ia32_cmpordps((__v4sf)__a, (__v4sf)__b);
964 /// Compares two 32-bit float values in the low-order bits of both
965 /// operands to determine if the value in the first operand is unordered
966 /// with respect to the corresponding value in the second operand and
967 /// returns the result of the comparison in the low-order bits of a vector
970 /// \headerfile <x86intrin.h>
972 /// This intrinsic corresponds to the <c> VCMPUNORDSS / CMPUNORDSS </c>
976 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
977 /// 32 bits of this operand are used in the comparison.
979 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
980 /// 32 bits of this operand are used in the comparison.
981 /// \returns A 128-bit vector of [4 x float] containing the comparison results
982 /// in the low-order bits.
983 static __inline__ __m128 __DEFAULT_FN_ATTRS
984 _mm_cmpunord_ss(__m128 __a, __m128 __b)
986 return (__m128)__builtin_ia32_cmpunordss((__v4sf)__a, (__v4sf)__b);
989 /// Compares each of the corresponding 32-bit float values of the
990 /// 128-bit vectors of [4 x float] to determine if the values in the first
991 /// operand are unordered with respect to those in the second operand.
993 /// \headerfile <x86intrin.h>
995 /// This intrinsic corresponds to the <c> VCMPUNORDPS / CMPUNORDPS </c>
999 /// A 128-bit vector of [4 x float].
1001 /// A 128-bit vector of [4 x float].
1002 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
1003 static __inline__ __m128 __DEFAULT_FN_ATTRS
1004 _mm_cmpunord_ps(__m128 __a, __m128 __b)
1006 return (__m128)__builtin_ia32_cmpunordps((__v4sf)__a, (__v4sf)__b);
1009 /// Compares two 32-bit float values in the low-order bits of both
1010 /// operands for equality and returns the result of the comparison.
1012 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1014 /// \headerfile <x86intrin.h>
1016 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c>
1020 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1021 /// used in the comparison.
1023 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1024 /// used in the comparison.
1025 /// \returns An integer containing the comparison results. If either of the
1026 /// two lower 32-bit values is NaN, 0 is returned.
1027 static __inline__ int __DEFAULT_FN_ATTRS
1028 _mm_comieq_ss(__m128 __a, __m128 __b)
1030 return __builtin_ia32_comieq((__v4sf)__a, (__v4sf)__b);
1033 /// Compares two 32-bit float values in the low-order bits of both
1034 /// operands to determine if the first operand is less than the second
1035 /// operand and returns the result of the comparison.
1037 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1039 /// \headerfile <x86intrin.h>
1041 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c>
1045 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1046 /// used in the comparison.
1048 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1049 /// used in the comparison.
1050 /// \returns An integer containing the comparison results. If either of the two
1051 /// lower 32-bit values is NaN, 0 is returned.
1052 static __inline__ int __DEFAULT_FN_ATTRS
1053 _mm_comilt_ss(__m128 __a, __m128 __b)
1055 return __builtin_ia32_comilt((__v4sf)__a, (__v4sf)__b);
1058 /// Compares two 32-bit float values in the low-order bits of both
1059 /// operands to determine if the first operand is less than or equal to the
1060 /// second operand and returns the result of the comparison.
1062 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1064 /// \headerfile <x86intrin.h>
1066 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1069 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1070 /// used in the comparison.
1072 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1073 /// used in the comparison.
1074 /// \returns An integer containing the comparison results. If either of the two
1075 /// lower 32-bit values is NaN, 0 is returned.
1076 static __inline__ int __DEFAULT_FN_ATTRS
1077 _mm_comile_ss(__m128 __a, __m128 __b)
1079 return __builtin_ia32_comile((__v4sf)__a, (__v4sf)__b);
1082 /// Compares two 32-bit float values in the low-order bits of both
1083 /// operands to determine if the first operand is greater than the second
1084 /// operand and returns the result of the comparison.
1086 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1088 /// \headerfile <x86intrin.h>
1090 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1093 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1094 /// used in the comparison.
1096 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1097 /// used in the comparison.
1098 /// \returns An integer containing the comparison results. If either of the
1099 /// two lower 32-bit values is NaN, 0 is returned.
1100 static __inline__ int __DEFAULT_FN_ATTRS
1101 _mm_comigt_ss(__m128 __a, __m128 __b)
1103 return __builtin_ia32_comigt((__v4sf)__a, (__v4sf)__b);
1106 /// Compares two 32-bit float values in the low-order bits of both
1107 /// operands to determine if the first operand is greater than or equal to
1108 /// the second operand and returns the result of the comparison.
1110 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1112 /// \headerfile <x86intrin.h>
1114 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1117 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1118 /// used in the comparison.
1120 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1121 /// used in the comparison.
1122 /// \returns An integer containing the comparison results. If either of the two
1123 /// lower 32-bit values is NaN, 0 is returned.
1124 static __inline__ int __DEFAULT_FN_ATTRS
1125 _mm_comige_ss(__m128 __a, __m128 __b)
1127 return __builtin_ia32_comige((__v4sf)__a, (__v4sf)__b);
1130 /// Compares two 32-bit float values in the low-order bits of both
1131 /// operands to determine if the first operand is not equal to the second
1132 /// operand and returns the result of the comparison.
1134 /// If either of the two lower 32-bit values is NaN, 1 is returned.
1136 /// \headerfile <x86intrin.h>
1138 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1141 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1142 /// used in the comparison.
1144 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1145 /// used in the comparison.
1146 /// \returns An integer containing the comparison results. If either of the
1147 /// two lower 32-bit values is NaN, 1 is returned.
1148 static __inline__ int __DEFAULT_FN_ATTRS
1149 _mm_comineq_ss(__m128 __a, __m128 __b)
1151 return __builtin_ia32_comineq((__v4sf)__a, (__v4sf)__b);
1154 /// Performs an unordered comparison of two 32-bit float values using
1155 /// the low-order bits of both operands to determine equality and returns
1156 /// the result of the comparison.
1158 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1160 /// \headerfile <x86intrin.h>
1162 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1165 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1166 /// used in the comparison.
1168 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1169 /// used in the comparison.
1170 /// \returns An integer containing the comparison results. If either of the two
1171 /// lower 32-bit values is NaN, 0 is returned.
1172 static __inline__ int __DEFAULT_FN_ATTRS
1173 _mm_ucomieq_ss(__m128 __a, __m128 __b)
1175 return __builtin_ia32_ucomieq((__v4sf)__a, (__v4sf)__b);
1178 /// Performs an unordered comparison of two 32-bit float values using
1179 /// the low-order bits of both operands to determine if the first operand is
1180 /// less than the second operand and returns the result of the comparison.
1182 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1184 /// \headerfile <x86intrin.h>
1186 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1189 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1190 /// used in the comparison.
1192 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1193 /// used in the comparison.
1194 /// \returns An integer containing the comparison results. If either of the two
1195 /// lower 32-bit values is NaN, 0 is returned.
1196 static __inline__ int __DEFAULT_FN_ATTRS
1197 _mm_ucomilt_ss(__m128 __a, __m128 __b)
1199 return __builtin_ia32_ucomilt((__v4sf)__a, (__v4sf)__b);
1202 /// Performs an unordered comparison of two 32-bit float values using
1203 /// the low-order bits of both operands to determine if the first operand is
1204 /// less than or equal to the second operand and returns the result of the
1207 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1209 /// \headerfile <x86intrin.h>
1211 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1214 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1215 /// used in the comparison.
1217 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1218 /// used in the comparison.
1219 /// \returns An integer containing the comparison results. If either of the two
1220 /// lower 32-bit values is NaN, 0 is returned.
1221 static __inline__ int __DEFAULT_FN_ATTRS
1222 _mm_ucomile_ss(__m128 __a, __m128 __b)
1224 return __builtin_ia32_ucomile((__v4sf)__a, (__v4sf)__b);
1227 /// Performs an unordered comparison of two 32-bit float values using
1228 /// the low-order bits of both operands to determine if the first operand is
1229 /// greater than the second operand and returns the result of the
1232 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1234 /// \headerfile <x86intrin.h>
1236 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1239 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1240 /// used in the comparison.
1242 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1243 /// used in the comparison.
1244 /// \returns An integer containing the comparison results. If either of the two
1245 /// lower 32-bit values is NaN, 0 is returned.
1246 static __inline__ int __DEFAULT_FN_ATTRS
1247 _mm_ucomigt_ss(__m128 __a, __m128 __b)
1249 return __builtin_ia32_ucomigt((__v4sf)__a, (__v4sf)__b);
1252 /// Performs an unordered comparison of two 32-bit float values using
1253 /// the low-order bits of both operands to determine if the first operand is
1254 /// greater than or equal to the second operand and returns the result of
1257 /// If either of the two lower 32-bit values is NaN, 0 is returned.
1259 /// \headerfile <x86intrin.h>
1261 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1264 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1265 /// used in the comparison.
1267 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1268 /// used in the comparison.
1269 /// \returns An integer containing the comparison results. If either of the two
1270 /// lower 32-bit values is NaN, 0 is returned.
1271 static __inline__ int __DEFAULT_FN_ATTRS
1272 _mm_ucomige_ss(__m128 __a, __m128 __b)
1274 return __builtin_ia32_ucomige((__v4sf)__a, (__v4sf)__b);
1277 /// Performs an unordered comparison of two 32-bit float values using
1278 /// the low-order bits of both operands to determine inequality and returns
1279 /// the result of the comparison.
1281 /// If either of the two lower 32-bit values is NaN, 1 is returned.
1283 /// \headerfile <x86intrin.h>
1285 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1288 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1289 /// used in the comparison.
1291 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1292 /// used in the comparison.
1293 /// \returns An integer containing the comparison results. If either of the two
1294 /// lower 32-bit values is NaN, 1 is returned.
1295 static __inline__ int __DEFAULT_FN_ATTRS
1296 _mm_ucomineq_ss(__m128 __a, __m128 __b)
1298 return __builtin_ia32_ucomineq((__v4sf)__a, (__v4sf)__b);
1301 /// Converts a float value contained in the lower 32 bits of a vector of
1302 /// [4 x float] into a 32-bit integer.
1304 /// \headerfile <x86intrin.h>
1306 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1310 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1311 /// used in the conversion.
1312 /// \returns A 32-bit integer containing the converted value.
1313 static __inline__ int __DEFAULT_FN_ATTRS
1314 _mm_cvtss_si32(__m128 __a)
1316 return __builtin_ia32_cvtss2si((__v4sf)__a);
1319 /// Converts a float value contained in the lower 32 bits of a vector of
1320 /// [4 x float] into a 32-bit integer.
1322 /// \headerfile <x86intrin.h>
1324 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1328 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1329 /// used in the conversion.
1330 /// \returns A 32-bit integer containing the converted value.
1331 static __inline__ int __DEFAULT_FN_ATTRS
1332 _mm_cvt_ss2si(__m128 __a)
1334 return _mm_cvtss_si32(__a);
1339 /// Converts a float value contained in the lower 32 bits of a vector of
1340 /// [4 x float] into a 64-bit integer.
1342 /// \headerfile <x86intrin.h>
1344 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1348 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1349 /// used in the conversion.
1350 /// \returns A 64-bit integer containing the converted value.
1351 static __inline__ long long __DEFAULT_FN_ATTRS
1352 _mm_cvtss_si64(__m128 __a)
1354 return __builtin_ia32_cvtss2si64((__v4sf)__a);
1359 /// Converts two low-order float values in a 128-bit vector of
1360 /// [4 x float] into a 64-bit vector of [2 x i32].
1362 /// \headerfile <x86intrin.h>
1364 /// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
1367 /// A 128-bit vector of [4 x float].
1368 /// \returns A 64-bit integer vector containing the converted values.
1369 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1370 _mm_cvtps_pi32(__m128 __a)
1372 return (__m64)__builtin_ia32_cvtps2pi((__v4sf)__a);
1375 /// Converts two low-order float values in a 128-bit vector of
1376 /// [4 x float] into a 64-bit vector of [2 x i32].
1378 /// \headerfile <x86intrin.h>
1380 /// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
1383 /// A 128-bit vector of [4 x float].
1384 /// \returns A 64-bit integer vector containing the converted values.
1385 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1386 _mm_cvt_ps2pi(__m128 __a)
1388 return _mm_cvtps_pi32(__a);
1391 /// Converts a float value contained in the lower 32 bits of a vector of
1392 /// [4 x float] into a 32-bit integer, truncating the result when it is
1395 /// \headerfile <x86intrin.h>
1397 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1401 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1402 /// used in the conversion.
1403 /// \returns A 32-bit integer containing the converted value.
1404 static __inline__ int __DEFAULT_FN_ATTRS
1405 _mm_cvttss_si32(__m128 __a)
1407 return __builtin_ia32_cvttss2si((__v4sf)__a);
1410 /// Converts a float value contained in the lower 32 bits of a vector of
1411 /// [4 x float] into a 32-bit integer, truncating the result when it is
1414 /// \headerfile <x86intrin.h>
1416 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1420 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1421 /// used in the conversion.
1422 /// \returns A 32-bit integer containing the converted value.
1423 static __inline__ int __DEFAULT_FN_ATTRS
1424 _mm_cvtt_ss2si(__m128 __a)
1426 return _mm_cvttss_si32(__a);
1430 /// Converts a float value contained in the lower 32 bits of a vector of
1431 /// [4 x float] into a 64-bit integer, truncating the result when it is
1434 /// \headerfile <x86intrin.h>
1436 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1440 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1441 /// used in the conversion.
1442 /// \returns A 64-bit integer containing the converted value.
1443 static __inline__ long long __DEFAULT_FN_ATTRS
1444 _mm_cvttss_si64(__m128 __a)
1446 return __builtin_ia32_cvttss2si64((__v4sf)__a);
1450 /// Converts two low-order float values in a 128-bit vector of
1451 /// [4 x float] into a 64-bit vector of [2 x i32], truncating the result
1452 /// when it is inexact.
1454 /// \headerfile <x86intrin.h>
1456 /// This intrinsic corresponds to the <c> CVTTPS2PI / VTTPS2PI </c>
1460 /// A 128-bit vector of [4 x float].
1461 /// \returns A 64-bit integer vector containing the converted values.
1462 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1463 _mm_cvttps_pi32(__m128 __a)
1465 return (__m64)__builtin_ia32_cvttps2pi((__v4sf)__a);
1468 /// Converts two low-order float values in a 128-bit vector of [4 x
1469 /// float] into a 64-bit vector of [2 x i32], truncating the result when it
1472 /// \headerfile <x86intrin.h>
1474 /// This intrinsic corresponds to the <c> CVTTPS2PI </c> instruction.
1477 /// A 128-bit vector of [4 x float].
1478 /// \returns A 64-bit integer vector containing the converted values.
1479 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
1480 _mm_cvtt_ps2pi(__m128 __a)
1482 return _mm_cvttps_pi32(__a);
1485 /// Converts a 32-bit signed integer value into a floating point value
1486 /// and writes it to the lower 32 bits of the destination. The remaining
1487 /// higher order elements of the destination vector are copied from the
1488 /// corresponding elements in the first operand.
1490 /// \headerfile <x86intrin.h>
1492 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1495 /// A 128-bit vector of [4 x float].
1497 /// A 32-bit signed integer operand containing the value to be converted.
1498 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1499 /// converted value of the second operand. The upper 96 bits are copied from
1500 /// the upper 96 bits of the first operand.
1501 static __inline__ __m128 __DEFAULT_FN_ATTRS
1502 _mm_cvtsi32_ss(__m128 __a, int __b)
1508 /// Converts a 32-bit signed integer value into a floating point value
1509 /// and writes it to the lower 32 bits of the destination. The remaining
1510 /// higher order elements of the destination are copied from the
1511 /// corresponding elements in the first operand.
1513 /// \headerfile <x86intrin.h>
1515 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1518 /// A 128-bit vector of [4 x float].
1520 /// A 32-bit signed integer operand containing the value to be converted.
1521 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1522 /// converted value of the second operand. The upper 96 bits are copied from
1523 /// the upper 96 bits of the first operand.
1524 static __inline__ __m128 __DEFAULT_FN_ATTRS
1525 _mm_cvt_si2ss(__m128 __a, int __b)
1527 return _mm_cvtsi32_ss(__a, __b);
1532 /// Converts a 64-bit signed integer value into a floating point value
1533 /// and writes it to the lower 32 bits of the destination. The remaining
1534 /// higher order elements of the destination are copied from the
1535 /// corresponding elements in the first operand.
1537 /// \headerfile <x86intrin.h>
1539 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1542 /// A 128-bit vector of [4 x float].
1544 /// A 64-bit signed integer operand containing the value to be converted.
1545 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1546 /// converted value of the second operand. The upper 96 bits are copied from
1547 /// the upper 96 bits of the first operand.
1548 static __inline__ __m128 __DEFAULT_FN_ATTRS
1549 _mm_cvtsi64_ss(__m128 __a, long long __b)
1557 /// Converts two elements of a 64-bit vector of [2 x i32] into two
1558 /// floating point values and writes them to the lower 64-bits of the
1559 /// destination. The remaining higher order elements of the destination are
1560 /// copied from the corresponding elements in the first operand.
1562 /// \headerfile <x86intrin.h>
1564 /// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
1567 /// A 128-bit vector of [4 x float].
1569 /// A 64-bit vector of [2 x i32]. The elements in this vector are converted
1570 /// and written to the corresponding low-order elements in the destination.
1571 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1572 /// converted value of the second operand. The upper 64 bits are copied from
1573 /// the upper 64 bits of the first operand.
1574 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
1575 _mm_cvtpi32_ps(__m128 __a, __m64 __b)
1577 return __builtin_ia32_cvtpi2ps((__v4sf)__a, (__v2si)__b);
1580 /// Converts two elements of a 64-bit vector of [2 x i32] into two
1581 /// floating point values and writes them to the lower 64-bits of the
1582 /// destination. The remaining higher order elements of the destination are
1583 /// copied from the corresponding elements in the first operand.
1585 /// \headerfile <x86intrin.h>
1587 /// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
1590 /// A 128-bit vector of [4 x float].
1592 /// A 64-bit vector of [2 x i32]. The elements in this vector are converted
1593 /// and written to the corresponding low-order elements in the destination.
1594 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1595 /// converted value from the second operand. The upper 64 bits are copied
1596 /// from the upper 64 bits of the first operand.
1597 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
1598 _mm_cvt_pi2ps(__m128 __a, __m64 __b)
1600 return _mm_cvtpi32_ps(__a, __b);
1603 /// Extracts a float value contained in the lower 32 bits of a vector of
1606 /// \headerfile <x86intrin.h>
1608 /// This intrinsic has no corresponding instruction.
1611 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1612 /// used in the extraction.
1613 /// \returns A 32-bit float containing the extracted value.
1614 static __inline__ float __DEFAULT_FN_ATTRS
1615 _mm_cvtss_f32(__m128 __a)
1620 /// Loads two packed float values from the address \a __p into the
1621 /// high-order bits of a 128-bit vector of [4 x float]. The low-order bits
1622 /// are copied from the low-order bits of the first operand.
1624 /// \headerfile <x86intrin.h>
1626 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1629 /// A 128-bit vector of [4 x float]. Bits [63:0] are written to bits [63:0]
1630 /// of the destination.
1632 /// A pointer to two packed float values. Bits [63:0] are written to bits
1633 /// [127:64] of the destination.
1634 /// \returns A 128-bit vector of [4 x float] containing the moved values.
1635 static __inline__ __m128 __DEFAULT_FN_ATTRS
1636 _mm_loadh_pi(__m128 __a, const __m64 *__p)
1638 typedef float __mm_loadh_pi_v2f32 __attribute__((__vector_size__(8)));
1639 struct __mm_loadh_pi_struct {
1640 __mm_loadh_pi_v2f32 __u;
1641 } __attribute__((__packed__, __may_alias__));
1642 __mm_loadh_pi_v2f32 __b = ((struct __mm_loadh_pi_struct*)__p)->__u;
1643 __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
1644 return __builtin_shufflevector(__a, __bb, 0, 1, 4, 5);
1647 /// Loads two packed float values from the address \a __p into the
1648 /// low-order bits of a 128-bit vector of [4 x float]. The high-order bits
1649 /// are copied from the high-order bits of the first operand.
1651 /// \headerfile <x86intrin.h>
1653 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1656 /// A 128-bit vector of [4 x float]. Bits [127:64] are written to bits
1657 /// [127:64] of the destination.
1659 /// A pointer to two packed float values. Bits [63:0] are written to bits
1660 /// [63:0] of the destination.
1661 /// \returns A 128-bit vector of [4 x float] containing the moved values.
1662 static __inline__ __m128 __DEFAULT_FN_ATTRS
1663 _mm_loadl_pi(__m128 __a, const __m64 *__p)
1665 typedef float __mm_loadl_pi_v2f32 __attribute__((__vector_size__(8)));
1666 struct __mm_loadl_pi_struct {
1667 __mm_loadl_pi_v2f32 __u;
1668 } __attribute__((__packed__, __may_alias__));
1669 __mm_loadl_pi_v2f32 __b = ((struct __mm_loadl_pi_struct*)__p)->__u;
1670 __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
1671 return __builtin_shufflevector(__a, __bb, 4, 5, 2, 3);
1674 /// Constructs a 128-bit floating-point vector of [4 x float]. The lower
1675 /// 32 bits of the vector are initialized with the single-precision
1676 /// floating-point value loaded from a specified memory location. The upper
1677 /// 96 bits are set to zero.
1679 /// \headerfile <x86intrin.h>
1681 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1684 /// A pointer to a 32-bit memory location containing a single-precision
1685 /// floating-point value.
1686 /// \returns An initialized 128-bit floating-point vector of [4 x float]. The
1687 /// lower 32 bits contain the value loaded from the memory location. The
1688 /// upper 96 bits are set to zero.
1689 static __inline__ __m128 __DEFAULT_FN_ATTRS
1690 _mm_load_ss(const float *__p)
1692 struct __mm_load_ss_struct {
1694 } __attribute__((__packed__, __may_alias__));
1695 float __u = ((struct __mm_load_ss_struct*)__p)->__u;
1696 return __extension__ (__m128){ __u, 0, 0, 0 };
1699 /// Loads a 32-bit float value and duplicates it to all four vector
1700 /// elements of a 128-bit vector of [4 x float].
1702 /// \headerfile <x86intrin.h>
1704 /// This intrinsic corresponds to the <c> VBROADCASTSS / MOVSS + shuffling </c>
1708 /// A pointer to a float value to be loaded and duplicated.
1709 /// \returns A 128-bit vector of [4 x float] containing the loaded and
1710 /// duplicated values.
1711 static __inline__ __m128 __DEFAULT_FN_ATTRS
1712 _mm_load1_ps(const float *__p)
1714 struct __mm_load1_ps_struct {
1716 } __attribute__((__packed__, __may_alias__));
1717 float __u = ((struct __mm_load1_ps_struct*)__p)->__u;
1718 return __extension__ (__m128){ __u, __u, __u, __u };
1721 #define _mm_load_ps1(p) _mm_load1_ps(p)
1723 /// Loads a 128-bit floating-point vector of [4 x float] from an aligned
1724 /// memory location.
1726 /// \headerfile <x86intrin.h>
1728 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
1731 /// A pointer to a 128-bit memory location. The address of the memory
1732 /// location has to be 128-bit aligned.
1733 /// \returns A 128-bit vector of [4 x float] containing the loaded values.
1734 static __inline__ __m128 __DEFAULT_FN_ATTRS
1735 _mm_load_ps(const float *__p)
1737 return *(__m128*)__p;
1740 /// Loads a 128-bit floating-point vector of [4 x float] from an
1741 /// unaligned memory location.
1743 /// \headerfile <x86intrin.h>
1745 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
1748 /// A pointer to a 128-bit memory location. The address of the memory
1749 /// location does not have to be aligned.
1750 /// \returns A 128-bit vector of [4 x float] containing the loaded values.
1751 static __inline__ __m128 __DEFAULT_FN_ATTRS
1752 _mm_loadu_ps(const float *__p)
1756 } __attribute__((__packed__, __may_alias__));
1757 return ((struct __loadu_ps*)__p)->__v;
1760 /// Loads four packed float values, in reverse order, from an aligned
1761 /// memory location to 32-bit elements in a 128-bit vector of [4 x float].
1763 /// \headerfile <x86intrin.h>
1765 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
1769 /// A pointer to a 128-bit memory location. The address of the memory
1770 /// location has to be 128-bit aligned.
1771 /// \returns A 128-bit vector of [4 x float] containing the moved values, loaded
1772 /// in reverse order.
1773 static __inline__ __m128 __DEFAULT_FN_ATTRS
1774 _mm_loadr_ps(const float *__p)
1776 __m128 __a = _mm_load_ps(__p);
1777 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0);
1780 /// Create a 128-bit vector of [4 x float] with undefined values.
1782 /// \headerfile <x86intrin.h>
1784 /// This intrinsic has no corresponding instruction.
1786 /// \returns A 128-bit vector of [4 x float] containing undefined values.
1787 static __inline__ __m128 __DEFAULT_FN_ATTRS
1788 _mm_undefined_ps(void)
1790 return (__m128)__builtin_ia32_undef128();
1793 /// Constructs a 128-bit floating-point vector of [4 x float]. The lower
1794 /// 32 bits of the vector are initialized with the specified single-precision
1795 /// floating-point value. The upper 96 bits are set to zero.
1797 /// \headerfile <x86intrin.h>
1799 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1802 /// A single-precision floating-point value used to initialize the lower 32
1803 /// bits of the result.
1804 /// \returns An initialized 128-bit floating-point vector of [4 x float]. The
1805 /// lower 32 bits contain the value provided in the source operand. The
1806 /// upper 96 bits are set to zero.
1807 static __inline__ __m128 __DEFAULT_FN_ATTRS
1808 _mm_set_ss(float __w)
1810 return __extension__ (__m128){ __w, 0, 0, 0 };
1813 /// Constructs a 128-bit floating-point vector of [4 x float], with each
1814 /// of the four single-precision floating-point vector elements set to the
1815 /// specified single-precision floating-point value.
1817 /// \headerfile <x86intrin.h>
1819 /// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
1822 /// A single-precision floating-point value used to initialize each vector
1823 /// element of the result.
1824 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1825 static __inline__ __m128 __DEFAULT_FN_ATTRS
1826 _mm_set1_ps(float __w)
1828 return __extension__ (__m128){ __w, __w, __w, __w };
1831 /* Microsoft specific. */
1832 /// Constructs a 128-bit floating-point vector of [4 x float], with each
1833 /// of the four single-precision floating-point vector elements set to the
1834 /// specified single-precision floating-point value.
1836 /// \headerfile <x86intrin.h>
1838 /// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
1841 /// A single-precision floating-point value used to initialize each vector
1842 /// element of the result.
1843 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1844 static __inline__ __m128 __DEFAULT_FN_ATTRS
1845 _mm_set_ps1(float __w)
1847 return _mm_set1_ps(__w);
1850 /// Constructs a 128-bit floating-point vector of [4 x float]
1851 /// initialized with the specified single-precision floating-point values.
1853 /// \headerfile <x86intrin.h>
1855 /// This intrinsic is a utility function and does not correspond to a specific
1859 /// A single-precision floating-point value used to initialize bits [127:96]
1862 /// A single-precision floating-point value used to initialize bits [95:64]
1865 /// A single-precision floating-point value used to initialize bits [63:32]
1868 /// A single-precision floating-point value used to initialize bits [31:0]
1870 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1871 static __inline__ __m128 __DEFAULT_FN_ATTRS
1872 _mm_set_ps(float __z, float __y, float __x, float __w)
1874 return __extension__ (__m128){ __w, __x, __y, __z };
1877 /// Constructs a 128-bit floating-point vector of [4 x float],
1878 /// initialized in reverse order with the specified 32-bit single-precision
1879 /// float-point values.
1881 /// \headerfile <x86intrin.h>
1883 /// This intrinsic is a utility function and does not correspond to a specific
1887 /// A single-precision floating-point value used to initialize bits [31:0]
1890 /// A single-precision floating-point value used to initialize bits [63:32]
1893 /// A single-precision floating-point value used to initialize bits [95:64]
1896 /// A single-precision floating-point value used to initialize bits [127:96]
1898 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1899 static __inline__ __m128 __DEFAULT_FN_ATTRS
1900 _mm_setr_ps(float __z, float __y, float __x, float __w)
1902 return __extension__ (__m128){ __z, __y, __x, __w };
1905 /// Constructs a 128-bit floating-point vector of [4 x float] initialized
1908 /// \headerfile <x86intrin.h>
1910 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1912 /// \returns An initialized 128-bit floating-point vector of [4 x float] with
1913 /// all elements set to zero.
1914 static __inline__ __m128 __DEFAULT_FN_ATTRS
1915 _mm_setzero_ps(void)
1917 return __extension__ (__m128){ 0, 0, 0, 0 };
1920 /// Stores the upper 64 bits of a 128-bit vector of [4 x float] to a
1921 /// memory location.
1923 /// \headerfile <x86intrin.h>
1925 /// This intrinsic corresponds to the <c> VPEXTRQ / PEXTRQ </c> instruction.
1928 /// A pointer to a 64-bit memory location.
1930 /// A 128-bit vector of [4 x float] containing the values to be stored.
1931 static __inline__ void __DEFAULT_FN_ATTRS
1932 _mm_storeh_pi(__m64 *__p, __m128 __a)
1934 __builtin_ia32_storehps((__v2si *)__p, (__v4sf)__a);
1937 /// Stores the lower 64 bits of a 128-bit vector of [4 x float] to a
1938 /// memory location.
1940 /// \headerfile <x86intrin.h>
1942 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
1945 /// A pointer to a memory location that will receive the float values.
1947 /// A 128-bit vector of [4 x float] containing the values to be stored.
1948 static __inline__ void __DEFAULT_FN_ATTRS
1949 _mm_storel_pi(__m64 *__p, __m128 __a)
1951 __builtin_ia32_storelps((__v2si *)__p, (__v4sf)__a);
1954 /// Stores the lower 32 bits of a 128-bit vector of [4 x float] to a
1955 /// memory location.
1957 /// \headerfile <x86intrin.h>
1959 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1962 /// A pointer to a 32-bit memory location.
1964 /// A 128-bit vector of [4 x float] containing the value to be stored.
1965 static __inline__ void __DEFAULT_FN_ATTRS
1966 _mm_store_ss(float *__p, __m128 __a)
1968 struct __mm_store_ss_struct {
1970 } __attribute__((__packed__, __may_alias__));
1971 ((struct __mm_store_ss_struct*)__p)->__u = __a[0];
1974 /// Stores a 128-bit vector of [4 x float] to an unaligned memory
1977 /// \headerfile <x86intrin.h>
1979 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
1982 /// A pointer to a 128-bit memory location. The address of the memory
1983 /// location does not have to be aligned.
1985 /// A 128-bit vector of [4 x float] containing the values to be stored.
1986 static __inline__ void __DEFAULT_FN_ATTRS
1987 _mm_storeu_ps(float *__p, __m128 __a)
1989 struct __storeu_ps {
1991 } __attribute__((__packed__, __may_alias__));
1992 ((struct __storeu_ps*)__p)->__v = __a;
1995 /// Stores a 128-bit vector of [4 x float] into an aligned memory
1998 /// \headerfile <x86intrin.h>
2000 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
2003 /// A pointer to a 128-bit memory location. The address of the memory
2004 /// location has to be 16-byte aligned.
2006 /// A 128-bit vector of [4 x float] containing the values to be stored.
2007 static __inline__ void __DEFAULT_FN_ATTRS
2008 _mm_store_ps(float *__p, __m128 __a)
2010 *(__m128*)__p = __a;
2013 /// Stores the lower 32 bits of a 128-bit vector of [4 x float] into
2014 /// four contiguous elements in an aligned memory location.
2016 /// \headerfile <x86intrin.h>
2018 /// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
2022 /// A pointer to a 128-bit memory location.
2024 /// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each
2025 /// of the four contiguous elements pointed by \a __p.
2026 static __inline__ void __DEFAULT_FN_ATTRS
2027 _mm_store1_ps(float *__p, __m128 __a)
2029 __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 0, 0, 0);
2030 _mm_store_ps(__p, __a);
2033 /// Stores the lower 32 bits of a 128-bit vector of [4 x float] into
2034 /// four contiguous elements in an aligned memory location.
2036 /// \headerfile <x86intrin.h>
2038 /// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
2042 /// A pointer to a 128-bit memory location.
2044 /// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each
2045 /// of the four contiguous elements pointed by \a __p.
2046 static __inline__ void __DEFAULT_FN_ATTRS
2047 _mm_store_ps1(float *__p, __m128 __a)
2049 _mm_store1_ps(__p, __a);
2052 /// Stores float values from a 128-bit vector of [4 x float] to an
2053 /// aligned memory location in reverse order.
2055 /// \headerfile <x86intrin.h>
2057 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
2061 /// A pointer to a 128-bit memory location. The address of the memory
2062 /// location has to be 128-bit aligned.
2064 /// A 128-bit vector of [4 x float] containing the values to be stored.
2065 static __inline__ void __DEFAULT_FN_ATTRS
2066 _mm_storer_ps(float *__p, __m128 __a)
2068 __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0);
2069 _mm_store_ps(__p, __a);
2072 #define _MM_HINT_ET0 7
2073 #define _MM_HINT_ET1 6
2074 #define _MM_HINT_T0 3
2075 #define _MM_HINT_T1 2
2076 #define _MM_HINT_T2 1
2077 #define _MM_HINT_NTA 0
2080 /* FIXME: We have to #define this because "sel" must be a constant integer, and
2081 Sema doesn't do any form of constant propagation yet. */
2083 /// Loads one cache line of data from the specified address to a location
2084 /// closer to the processor.
2086 /// \headerfile <x86intrin.h>
2089 /// void _mm_prefetch(const void * a, const int sel);
2092 /// This intrinsic corresponds to the <c> PREFETCHNTA </c> instruction.
2095 /// A pointer to a memory location containing a cache line of data.
2097 /// A predefined integer constant specifying the type of prefetch
2099 /// _MM_HINT_NTA: Move data using the non-temporal access (NTA) hint. The
2100 /// PREFETCHNTA instruction will be generated. \n
2101 /// _MM_HINT_T0: Move data using the T0 hint. The PREFETCHT0 instruction will
2102 /// be generated. \n
2103 /// _MM_HINT_T1: Move data using the T1 hint. The PREFETCHT1 instruction will
2104 /// be generated. \n
2105 /// _MM_HINT_T2: Move data using the T2 hint. The PREFETCHT2 instruction will
2107 #define _mm_prefetch(a, sel) (__builtin_prefetch((void *)(a), \
2108 ((sel) >> 2) & 1, (sel) & 0x3))
2111 /// Stores a 64-bit integer in the specified aligned memory location. To
2112 /// minimize caching, the data is flagged as non-temporal (unlikely to be
2113 /// used again soon).
2115 /// \headerfile <x86intrin.h>
2117 /// This intrinsic corresponds to the <c> MOVNTQ </c> instruction.
2120 /// A pointer to an aligned memory location used to store the register value.
2122 /// A 64-bit integer containing the value to be stored.
2123 static __inline__ void __DEFAULT_FN_ATTRS_MMX
2124 _mm_stream_pi(__m64 *__p, __m64 __a)
2126 __builtin_ia32_movntq(__p, __a);
2129 /// Moves packed float values from a 128-bit vector of [4 x float] to a
2130 /// 128-bit aligned memory location. To minimize caching, the data is flagged
2131 /// as non-temporal (unlikely to be used again soon).
2133 /// \headerfile <x86intrin.h>
2135 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
2138 /// A pointer to a 128-bit aligned memory location that will receive the
2139 /// single-precision floating-point values.
2141 /// A 128-bit vector of [4 x float] containing the values to be moved.
2142 static __inline__ void __DEFAULT_FN_ATTRS
2143 _mm_stream_ps(float *__p, __m128 __a)
2145 __builtin_nontemporal_store((__v4sf)__a, (__v4sf*)__p);
2148 #if defined(__cplusplus)
2152 /// Forces strong memory ordering (serialization) between store
2153 /// instructions preceding this instruction and store instructions following
2154 /// this instruction, ensuring the system completes all previous stores
2155 /// before executing subsequent stores.
2157 /// \headerfile <x86intrin.h>
2159 /// This intrinsic corresponds to the <c> SFENCE </c> instruction.
2161 void _mm_sfence(void);
2163 #if defined(__cplusplus)
2167 /// Extracts 16-bit element from a 64-bit vector of [4 x i16] and
2168 /// returns it, as specified by the immediate integer operand.
2170 /// \headerfile <x86intrin.h>
2173 /// int _mm_extract_pi16(__m64 a, int n);
2176 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
2179 /// A 64-bit vector of [4 x i16].
2181 /// An immediate integer operand that determines which bits are extracted: \n
2182 /// 0: Bits [15:0] are copied to the destination. \n
2183 /// 1: Bits [31:16] are copied to the destination. \n
2184 /// 2: Bits [47:32] are copied to the destination. \n
2185 /// 3: Bits [63:48] are copied to the destination.
2186 /// \returns A 16-bit integer containing the extracted 16 bits of packed data.
2187 #define _mm_extract_pi16(a, n) \
2188 (int)__builtin_ia32_vec_ext_v4hi((__m64)a, (int)n)
2190 /// Copies data from the 64-bit vector of [4 x i16] to the destination,
2191 /// and inserts the lower 16-bits of an integer operand at the 16-bit offset
2192 /// specified by the immediate operand \a n.
2194 /// \headerfile <x86intrin.h>
2197 /// __m64 _mm_insert_pi16(__m64 a, int d, int n);
2200 /// This intrinsic corresponds to the <c> PINSRW </c> instruction.
2203 /// A 64-bit vector of [4 x i16].
2205 /// An integer. The lower 16-bit value from this operand is written to the
2206 /// destination at the offset specified by operand \a n.
2208 /// An immediate integer operant that determines which the bits to be used
2209 /// in the destination. \n
2210 /// 0: Bits [15:0] are copied to the destination. \n
2211 /// 1: Bits [31:16] are copied to the destination. \n
2212 /// 2: Bits [47:32] are copied to the destination. \n
2213 /// 3: Bits [63:48] are copied to the destination. \n
2214 /// The remaining bits in the destination are copied from the corresponding
2215 /// bits in operand \a a.
2216 /// \returns A 64-bit integer vector containing the copied packed data from the
2218 #define _mm_insert_pi16(a, d, n) \
2219 (__m64)__builtin_ia32_vec_set_v4hi((__m64)a, (int)d, (int)n)
2221 /// Compares each of the corresponding packed 16-bit integer values of
2222 /// the 64-bit integer vectors, and writes the greater value to the
2223 /// corresponding bits in the destination.
2225 /// \headerfile <x86intrin.h>
2227 /// This intrinsic corresponds to the <c> PMAXSW </c> instruction.
2230 /// A 64-bit integer vector containing one of the source operands.
2232 /// A 64-bit integer vector containing one of the source operands.
2233 /// \returns A 64-bit integer vector containing the comparison results.
2234 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2235 _mm_max_pi16(__m64 __a, __m64 __b)
2237 return (__m64)__builtin_ia32_pmaxsw((__v4hi)__a, (__v4hi)__b);
2240 /// Compares each of the corresponding packed 8-bit unsigned integer
2241 /// values of the 64-bit integer vectors, and writes the greater value to the
2242 /// corresponding bits in the destination.
2244 /// \headerfile <x86intrin.h>
2246 /// This intrinsic corresponds to the <c> PMAXUB </c> instruction.
2249 /// A 64-bit integer vector containing one of the source operands.
2251 /// A 64-bit integer vector containing one of the source operands.
2252 /// \returns A 64-bit integer vector containing the comparison results.
2253 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2254 _mm_max_pu8(__m64 __a, __m64 __b)
2256 return (__m64)__builtin_ia32_pmaxub((__v8qi)__a, (__v8qi)__b);
2259 /// Compares each of the corresponding packed 16-bit integer values of
2260 /// the 64-bit integer vectors, and writes the lesser value to the
2261 /// corresponding bits in the destination.
2263 /// \headerfile <x86intrin.h>
2265 /// This intrinsic corresponds to the <c> PMINSW </c> instruction.
2268 /// A 64-bit integer vector containing one of the source operands.
2270 /// A 64-bit integer vector containing one of the source operands.
2271 /// \returns A 64-bit integer vector containing the comparison results.
2272 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2273 _mm_min_pi16(__m64 __a, __m64 __b)
2275 return (__m64)__builtin_ia32_pminsw((__v4hi)__a, (__v4hi)__b);
2278 /// Compares each of the corresponding packed 8-bit unsigned integer
2279 /// values of the 64-bit integer vectors, and writes the lesser value to the
2280 /// corresponding bits in the destination.
2282 /// \headerfile <x86intrin.h>
2284 /// This intrinsic corresponds to the <c> PMINUB </c> instruction.
2287 /// A 64-bit integer vector containing one of the source operands.
2289 /// A 64-bit integer vector containing one of the source operands.
2290 /// \returns A 64-bit integer vector containing the comparison results.
2291 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2292 _mm_min_pu8(__m64 __a, __m64 __b)
2294 return (__m64)__builtin_ia32_pminub((__v8qi)__a, (__v8qi)__b);
2297 /// Takes the most significant bit from each 8-bit element in a 64-bit
2298 /// integer vector to create an 8-bit mask value. Zero-extends the value to
2299 /// 32-bit integer and writes it to the destination.
2301 /// \headerfile <x86intrin.h>
2303 /// This intrinsic corresponds to the <c> PMOVMSKB </c> instruction.
2306 /// A 64-bit integer vector containing the values with bits to be extracted.
2307 /// \returns The most significant bit from each 8-bit element in \a __a,
2308 /// written to bits [7:0].
2309 static __inline__ int __DEFAULT_FN_ATTRS_MMX
2310 _mm_movemask_pi8(__m64 __a)
2312 return __builtin_ia32_pmovmskb((__v8qi)__a);
2315 /// Multiplies packed 16-bit unsigned integer values and writes the
2316 /// high-order 16 bits of each 32-bit product to the corresponding bits in
2317 /// the destination.
2319 /// \headerfile <x86intrin.h>
2321 /// This intrinsic corresponds to the <c> PMULHUW </c> instruction.
2324 /// A 64-bit integer vector containing one of the source operands.
2326 /// A 64-bit integer vector containing one of the source operands.
2327 /// \returns A 64-bit integer vector containing the products of both operands.
2328 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2329 _mm_mulhi_pu16(__m64 __a, __m64 __b)
2331 return (__m64)__builtin_ia32_pmulhuw((__v4hi)__a, (__v4hi)__b);
2334 /// Shuffles the 4 16-bit integers from a 64-bit integer vector to the
2335 /// destination, as specified by the immediate value operand.
2337 /// \headerfile <x86intrin.h>
2340 /// __m64 _mm_shuffle_pi16(__m64 a, const int n);
2343 /// This intrinsic corresponds to the <c> PSHUFW </c> instruction.
2346 /// A 64-bit integer vector containing the values to be shuffled.
2348 /// An immediate value containing an 8-bit value specifying which elements to
2349 /// copy from \a a. The destinations within the 64-bit destination are
2350 /// assigned values as follows: \n
2351 /// Bits [1:0] are used to assign values to bits [15:0] in the
2353 /// Bits [3:2] are used to assign values to bits [31:16] in the
2355 /// Bits [5:4] are used to assign values to bits [47:32] in the
2357 /// Bits [7:6] are used to assign values to bits [63:48] in the
2359 /// Bit value assignments: \n
2360 /// 00: assigned from bits [15:0] of \a a. \n
2361 /// 01: assigned from bits [31:16] of \a a. \n
2362 /// 10: assigned from bits [47:32] of \a a. \n
2363 /// 11: assigned from bits [63:48] of \a a.
2364 /// \returns A 64-bit integer vector containing the shuffled values.
2365 #define _mm_shuffle_pi16(a, n) \
2366 (__m64)__builtin_ia32_pshufw((__v4hi)(__m64)(a), (n))
2368 /// Conditionally copies the values from each 8-bit element in the first
2369 /// 64-bit integer vector operand to the specified memory location, as
2370 /// specified by the most significant bit in the corresponding element in the
2371 /// second 64-bit integer vector operand.
2373 /// To minimize caching, the data is flagged as non-temporal
2374 /// (unlikely to be used again soon).
2376 /// \headerfile <x86intrin.h>
2378 /// This intrinsic corresponds to the <c> MASKMOVQ </c> instruction.
2381 /// A 64-bit integer vector containing the values with elements to be copied.
2383 /// A 64-bit integer vector operand. The most significant bit from each 8-bit
2384 /// element determines whether the corresponding element in operand \a __d
2385 /// is copied. If the most significant bit of a given element is 1, the
2386 /// corresponding element in operand \a __d is copied.
2388 /// A pointer to a 64-bit memory location that will receive the conditionally
2389 /// copied integer values. The address of the memory location does not have
2391 static __inline__ void __DEFAULT_FN_ATTRS_MMX
2392 _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)
2394 __builtin_ia32_maskmovq((__v8qi)__d, (__v8qi)__n, __p);
2397 /// Computes the rounded averages of the packed unsigned 8-bit integer
2398 /// values and writes the averages to the corresponding bits in the
2401 /// \headerfile <x86intrin.h>
2403 /// This intrinsic corresponds to the <c> PAVGB </c> instruction.
2406 /// A 64-bit integer vector containing one of the source operands.
2408 /// A 64-bit integer vector containing one of the source operands.
2409 /// \returns A 64-bit integer vector containing the averages of both operands.
2410 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2411 _mm_avg_pu8(__m64 __a, __m64 __b)
2413 return (__m64)__builtin_ia32_pavgb((__v8qi)__a, (__v8qi)__b);
2416 /// Computes the rounded averages of the packed unsigned 16-bit integer
2417 /// values and writes the averages to the corresponding bits in the
2420 /// \headerfile <x86intrin.h>
2422 /// This intrinsic corresponds to the <c> PAVGW </c> instruction.
2425 /// A 64-bit integer vector containing one of the source operands.
2427 /// A 64-bit integer vector containing one of the source operands.
2428 /// \returns A 64-bit integer vector containing the averages of both operands.
2429 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2430 _mm_avg_pu16(__m64 __a, __m64 __b)
2432 return (__m64)__builtin_ia32_pavgw((__v4hi)__a, (__v4hi)__b);
2435 /// Subtracts the corresponding 8-bit unsigned integer values of the two
2436 /// 64-bit vector operands and computes the absolute value for each of the
2437 /// difference. Then sum of the 8 absolute differences is written to the
2438 /// bits [15:0] of the destination; the remaining bits [63:16] are cleared.
2440 /// \headerfile <x86intrin.h>
2442 /// This intrinsic corresponds to the <c> PSADBW </c> instruction.
2445 /// A 64-bit integer vector containing one of the source operands.
2447 /// A 64-bit integer vector containing one of the source operands.
2448 /// \returns A 64-bit integer vector whose lower 16 bits contain the sums of the
2449 /// sets of absolute differences between both operands. The upper bits are
2451 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2452 _mm_sad_pu8(__m64 __a, __m64 __b)
2454 return (__m64)__builtin_ia32_psadbw((__v8qi)__a, (__v8qi)__b);
2457 #if defined(__cplusplus)
2461 /// Returns the contents of the MXCSR register as a 32-bit unsigned
2464 /// There are several groups of macros associated with this
2465 /// intrinsic, including:
2468 /// For checking exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
2469 /// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
2470 /// _MM_EXCEPT_INEXACT. There is a convenience wrapper
2471 /// _MM_GET_EXCEPTION_STATE().
2474 /// For checking exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
2475 /// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
2476 /// There is a convenience wrapper _MM_GET_EXCEPTION_MASK().
2479 /// For checking rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
2480 /// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
2481 /// _MM_GET_ROUNDING_MODE().
2484 /// For checking flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
2485 /// There is a convenience wrapper _MM_GET_FLUSH_ZERO_MODE().
2488 /// For checking denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
2489 /// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
2490 /// _MM_GET_DENORMALS_ZERO_MODE().
2494 /// For example, the following expression checks if an overflow exception has
2497 /// ( _mm_getcsr() & _MM_EXCEPT_OVERFLOW )
2500 /// The following expression gets the current rounding mode:
2502 /// _MM_GET_ROUNDING_MODE()
2505 /// \headerfile <x86intrin.h>
2507 /// This intrinsic corresponds to the <c> VSTMXCSR / STMXCSR </c> instruction.
2509 /// \returns A 32-bit unsigned integer containing the contents of the MXCSR
2511 unsigned int _mm_getcsr(void);
2513 /// Sets the MXCSR register with the 32-bit unsigned integer value.
2515 /// There are several groups of macros associated with this intrinsic,
2519 /// For setting exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
2520 /// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
2521 /// _MM_EXCEPT_INEXACT. There is a convenience wrapper
2522 /// _MM_SET_EXCEPTION_STATE(x) where x is one of these macros.
2525 /// For setting exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
2526 /// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
2527 /// There is a convenience wrapper _MM_SET_EXCEPTION_MASK(x) where x is one
2528 /// of these macros.
2531 /// For setting rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
2532 /// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
2533 /// _MM_SET_ROUNDING_MODE(x) where x is one of these macros.
2536 /// For setting flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
2537 /// There is a convenience wrapper _MM_SET_FLUSH_ZERO_MODE(x) where x is
2538 /// one of these macros.
2541 /// For setting denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
2542 /// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
2543 /// _MM_SET_DENORMALS_ZERO_MODE(x) where x is one of these macros.
2547 /// For example, the following expression causes subsequent floating-point
2548 /// operations to round up:
2549 /// _mm_setcsr(_mm_getcsr() | _MM_ROUND_UP)
2551 /// The following example sets the DAZ and FTZ flags:
2553 /// void setFlags() {
2554 /// _MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON);
2555 /// _MM_SET_DENORMALS_ZERO_MODE(_MM_DENORMALS_ZERO_ON);
2559 /// \headerfile <x86intrin.h>
2561 /// This intrinsic corresponds to the <c> VLDMXCSR / LDMXCSR </c> instruction.
2564 /// A 32-bit unsigned integer value to be written to the MXCSR register.
2565 void _mm_setcsr(unsigned int __i);
2567 #if defined(__cplusplus)
2571 /// Selects 4 float values from the 128-bit operands of [4 x float], as
2572 /// specified by the immediate value operand.
2574 /// \headerfile <x86intrin.h>
2577 /// __m128 _mm_shuffle_ps(__m128 a, __m128 b, const int mask);
2580 /// This intrinsic corresponds to the <c> VSHUFPS / SHUFPS </c> instruction.
2583 /// A 128-bit vector of [4 x float].
2585 /// A 128-bit vector of [4 x float].
2587 /// An immediate value containing an 8-bit value specifying which elements to
2588 /// copy from \a a and \a b. \n
2589 /// Bits [3:0] specify the values copied from operand \a a. \n
2590 /// Bits [7:4] specify the values copied from operand \a b. \n
2591 /// The destinations within the 128-bit destination are assigned values as
2593 /// Bits [1:0] are used to assign values to bits [31:0] in the
2595 /// Bits [3:2] are used to assign values to bits [63:32] in the
2597 /// Bits [5:4] are used to assign values to bits [95:64] in the
2599 /// Bits [7:6] are used to assign values to bits [127:96] in the
2601 /// Bit value assignments: \n
2602 /// 00: Bits [31:0] copied from the specified operand. \n
2603 /// 01: Bits [63:32] copied from the specified operand. \n
2604 /// 10: Bits [95:64] copied from the specified operand. \n
2605 /// 11: Bits [127:96] copied from the specified operand.
2606 /// \returns A 128-bit vector of [4 x float] containing the shuffled values.
2607 #define _mm_shuffle_ps(a, b, mask) \
2608 (__m128)__builtin_ia32_shufps((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), \
2611 /// Unpacks the high-order (index 2,3) values from two 128-bit vectors of
2612 /// [4 x float] and interleaves them into a 128-bit vector of [4 x float].
2614 /// \headerfile <x86intrin.h>
2616 /// This intrinsic corresponds to the <c> VUNPCKHPS / UNPCKHPS </c> instruction.
2619 /// A 128-bit vector of [4 x float]. \n
2620 /// Bits [95:64] are written to bits [31:0] of the destination. \n
2621 /// Bits [127:96] are written to bits [95:64] of the destination.
2623 /// A 128-bit vector of [4 x float].
2624 /// Bits [95:64] are written to bits [63:32] of the destination. \n
2625 /// Bits [127:96] are written to bits [127:96] of the destination.
2626 /// \returns A 128-bit vector of [4 x float] containing the interleaved values.
2627 static __inline__ __m128 __DEFAULT_FN_ATTRS
2628 _mm_unpackhi_ps(__m128 __a, __m128 __b)
2630 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 2, 6, 3, 7);
2633 /// Unpacks the low-order (index 0,1) values from two 128-bit vectors of
2634 /// [4 x float] and interleaves them into a 128-bit vector of [4 x float].
2636 /// \headerfile <x86intrin.h>
2638 /// This intrinsic corresponds to the <c> VUNPCKLPS / UNPCKLPS </c> instruction.
2641 /// A 128-bit vector of [4 x float]. \n
2642 /// Bits [31:0] are written to bits [31:0] of the destination. \n
2643 /// Bits [63:32] are written to bits [95:64] of the destination.
2645 /// A 128-bit vector of [4 x float]. \n
2646 /// Bits [31:0] are written to bits [63:32] of the destination. \n
2647 /// Bits [63:32] are written to bits [127:96] of the destination.
2648 /// \returns A 128-bit vector of [4 x float] containing the interleaved values.
2649 static __inline__ __m128 __DEFAULT_FN_ATTRS
2650 _mm_unpacklo_ps(__m128 __a, __m128 __b)
2652 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 4, 1, 5);
2655 /// Constructs a 128-bit floating-point vector of [4 x float]. The lower
2656 /// 32 bits are set to the lower 32 bits of the second parameter. The upper
2657 /// 96 bits are set to the upper 96 bits of the first parameter.
2659 /// \headerfile <x86intrin.h>
2661 /// This intrinsic corresponds to the <c> VBLENDPS / BLENDPS / MOVSS </c>
2665 /// A 128-bit floating-point vector of [4 x float]. The upper 96 bits are
2666 /// written to the upper 96 bits of the result.
2668 /// A 128-bit floating-point vector of [4 x float]. The lower 32 bits are
2669 /// written to the lower 32 bits of the result.
2670 /// \returns A 128-bit floating-point vector of [4 x float].
2671 static __inline__ __m128 __DEFAULT_FN_ATTRS
2672 _mm_move_ss(__m128 __a, __m128 __b)
2678 /// Constructs a 128-bit floating-point vector of [4 x float]. The lower
2679 /// 64 bits are set to the upper 64 bits of the second parameter. The upper
2680 /// 64 bits are set to the upper 64 bits of the first parameter.
2682 /// \headerfile <x86intrin.h>
2684 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
2687 /// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are
2688 /// written to the upper 64 bits of the result.
2690 /// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are
2691 /// written to the lower 64 bits of the result.
2692 /// \returns A 128-bit floating-point vector of [4 x float].
2693 static __inline__ __m128 __DEFAULT_FN_ATTRS
2694 _mm_movehl_ps(__m128 __a, __m128 __b)
2696 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 6, 7, 2, 3);
2699 /// Constructs a 128-bit floating-point vector of [4 x float]. The lower
2700 /// 64 bits are set to the lower 64 bits of the first parameter. The upper
2701 /// 64 bits are set to the lower 64 bits of the second parameter.
2703 /// \headerfile <x86intrin.h>
2705 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
2708 /// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are
2709 /// written to the lower 64 bits of the result.
2711 /// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are
2712 /// written to the upper 64 bits of the result.
2713 /// \returns A 128-bit floating-point vector of [4 x float].
2714 static __inline__ __m128 __DEFAULT_FN_ATTRS
2715 _mm_movelh_ps(__m128 __a, __m128 __b)
2717 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 1, 4, 5);
2720 /// Converts a 64-bit vector of [4 x i16] into a 128-bit vector of [4 x
2723 /// \headerfile <x86intrin.h>
2725 /// This intrinsic corresponds to the <c> CVTPI2PS + COMPOSITE </c> instruction.
2728 /// A 64-bit vector of [4 x i16]. The elements of the destination are copied
2729 /// from the corresponding elements in this operand.
2730 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2731 /// values from the operand.
2732 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
2733 _mm_cvtpi16_ps(__m64 __a)
2738 __b = _mm_setzero_si64();
2739 __b = _mm_cmpgt_pi16(__b, __a);
2740 __c = _mm_unpackhi_pi16(__a, __b);
2741 __r = _mm_setzero_ps();
2742 __r = _mm_cvtpi32_ps(__r, __c);
2743 __r = _mm_movelh_ps(__r, __r);
2744 __c = _mm_unpacklo_pi16(__a, __b);
2745 __r = _mm_cvtpi32_ps(__r, __c);
2750 /// Converts a 64-bit vector of 16-bit unsigned integer values into a
2751 /// 128-bit vector of [4 x float].
2753 /// \headerfile <x86intrin.h>
2755 /// This intrinsic corresponds to the <c> CVTPI2PS + COMPOSITE </c> instruction.
2758 /// A 64-bit vector of 16-bit unsigned integer values. The elements of the
2759 /// destination are copied from the corresponding elements in this operand.
2760 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2761 /// values from the operand.
2762 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
2763 _mm_cvtpu16_ps(__m64 __a)
2768 __b = _mm_setzero_si64();
2769 __c = _mm_unpackhi_pi16(__a, __b);
2770 __r = _mm_setzero_ps();
2771 __r = _mm_cvtpi32_ps(__r, __c);
2772 __r = _mm_movelh_ps(__r, __r);
2773 __c = _mm_unpacklo_pi16(__a, __b);
2774 __r = _mm_cvtpi32_ps(__r, __c);
2779 /// Converts the lower four 8-bit values from a 64-bit vector of [8 x i8]
2780 /// into a 128-bit vector of [4 x float].
2782 /// \headerfile <x86intrin.h>
2784 /// This intrinsic corresponds to the <c> CVTPI2PS + COMPOSITE </c> instruction.
2787 /// A 64-bit vector of [8 x i8]. The elements of the destination are copied
2788 /// from the corresponding lower 4 elements in this operand.
2789 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2790 /// values from the operand.
2791 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
2792 _mm_cvtpi8_ps(__m64 __a)
2796 __b = _mm_setzero_si64();
2797 __b = _mm_cmpgt_pi8(__b, __a);
2798 __b = _mm_unpacklo_pi8(__a, __b);
2800 return _mm_cvtpi16_ps(__b);
2803 /// Converts the lower four unsigned 8-bit integer values from a 64-bit
2804 /// vector of [8 x u8] into a 128-bit vector of [4 x float].
2806 /// \headerfile <x86intrin.h>
2808 /// This intrinsic corresponds to the <c> CVTPI2PS + COMPOSITE </c> instruction.
2811 /// A 64-bit vector of unsigned 8-bit integer values. The elements of the
2812 /// destination are copied from the corresponding lower 4 elements in this
2814 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2815 /// values from the source operand.
2816 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
2817 _mm_cvtpu8_ps(__m64 __a)
2821 __b = _mm_setzero_si64();
2822 __b = _mm_unpacklo_pi8(__a, __b);
2824 return _mm_cvtpi16_ps(__b);
2827 /// Converts the two 32-bit signed integer values from each 64-bit vector
2828 /// operand of [2 x i32] into a 128-bit vector of [4 x float].
2830 /// \headerfile <x86intrin.h>
2832 /// This intrinsic corresponds to the <c> CVTPI2PS + COMPOSITE </c> instruction.
2835 /// A 64-bit vector of [2 x i32]. The lower elements of the destination are
2836 /// copied from the elements in this operand.
2838 /// A 64-bit vector of [2 x i32]. The upper elements of the destination are
2839 /// copied from the elements in this operand.
2840 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
2841 /// copied and converted values from the first operand. The upper 64 bits
2842 /// contain the copied and converted values from the second operand.
2843 static __inline__ __m128 __DEFAULT_FN_ATTRS_MMX
2844 _mm_cvtpi32x2_ps(__m64 __a, __m64 __b)
2848 __c = _mm_setzero_ps();
2849 __c = _mm_cvtpi32_ps(__c, __b);
2850 __c = _mm_movelh_ps(__c, __c);
2852 return _mm_cvtpi32_ps(__c, __a);
2855 /// Converts each single-precision floating-point element of a 128-bit
2856 /// floating-point vector of [4 x float] into a 16-bit signed integer, and
2857 /// packs the results into a 64-bit integer vector of [4 x i16].
2859 /// If the floating-point element is NaN or infinity, or if the
2860 /// floating-point element is greater than 0x7FFFFFFF or less than -0x8000,
2861 /// it is converted to 0x8000. Otherwise if the floating-point element is
2862 /// greater than 0x7FFF, it is converted to 0x7FFF.
2864 /// \headerfile <x86intrin.h>
2866 /// This intrinsic corresponds to the <c> CVTPS2PI + COMPOSITE </c> instruction.
2869 /// A 128-bit floating-point vector of [4 x float].
2870 /// \returns A 64-bit integer vector of [4 x i16] containing the converted
2872 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2873 _mm_cvtps_pi16(__m128 __a)
2877 __b = _mm_cvtps_pi32(__a);
2878 __a = _mm_movehl_ps(__a, __a);
2879 __c = _mm_cvtps_pi32(__a);
2881 return _mm_packs_pi32(__b, __c);
2884 /// Converts each single-precision floating-point element of a 128-bit
2885 /// floating-point vector of [4 x float] into an 8-bit signed integer, and
2886 /// packs the results into the lower 32 bits of a 64-bit integer vector of
2887 /// [8 x i8]. The upper 32 bits of the vector are set to 0.
2889 /// If the floating-point element is NaN or infinity, or if the
2890 /// floating-point element is greater than 0x7FFFFFFF or less than -0x80, it
2891 /// is converted to 0x80. Otherwise if the floating-point element is greater
2892 /// than 0x7F, it is converted to 0x7F.
2894 /// \headerfile <x86intrin.h>
2896 /// This intrinsic corresponds to the <c> CVTPS2PI + COMPOSITE </c> instruction.
2899 /// 128-bit floating-point vector of [4 x float].
2900 /// \returns A 64-bit integer vector of [8 x i8]. The lower 32 bits contain the
2901 /// converted values and the uppper 32 bits are set to zero.
2902 static __inline__ __m64 __DEFAULT_FN_ATTRS_MMX
2903 _mm_cvtps_pi8(__m128 __a)
2907 __b = _mm_cvtps_pi16(__a);
2908 __c = _mm_setzero_si64();
2910 return _mm_packs_pi16(__b, __c);
2913 /// Extracts the sign bits from each single-precision floating-point
2914 /// element of a 128-bit floating-point vector of [4 x float] and returns the
2915 /// sign bits in bits [0:3] of the result. Bits [31:4] of the result are set
2918 /// \headerfile <x86intrin.h>
2920 /// This intrinsic corresponds to the <c> VMOVMSKPS / MOVMSKPS </c> instruction.
2923 /// A 128-bit floating-point vector of [4 x float].
2924 /// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each
2925 /// single-precision floating-point element of the parameter. Bits [31:4] are
2927 static __inline__ int __DEFAULT_FN_ATTRS
2928 _mm_movemask_ps(__m128 __a)
2930 return __builtin_ia32_movmskps((__v4sf)__a);
2934 #define _MM_ALIGN16 __attribute__((aligned(16)))
2936 #define _MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w))
2938 #define _MM_EXCEPT_INVALID (0x0001)
2939 #define _MM_EXCEPT_DENORM (0x0002)
2940 #define _MM_EXCEPT_DIV_ZERO (0x0004)
2941 #define _MM_EXCEPT_OVERFLOW (0x0008)
2942 #define _MM_EXCEPT_UNDERFLOW (0x0010)
2943 #define _MM_EXCEPT_INEXACT (0x0020)
2944 #define _MM_EXCEPT_MASK (0x003f)
2946 #define _MM_MASK_INVALID (0x0080)
2947 #define _MM_MASK_DENORM (0x0100)
2948 #define _MM_MASK_DIV_ZERO (0x0200)
2949 #define _MM_MASK_OVERFLOW (0x0400)
2950 #define _MM_MASK_UNDERFLOW (0x0800)
2951 #define _MM_MASK_INEXACT (0x1000)
2952 #define _MM_MASK_MASK (0x1f80)
2954 #define _MM_ROUND_NEAREST (0x0000)
2955 #define _MM_ROUND_DOWN (0x2000)
2956 #define _MM_ROUND_UP (0x4000)
2957 #define _MM_ROUND_TOWARD_ZERO (0x6000)
2958 #define _MM_ROUND_MASK (0x6000)
2960 #define _MM_FLUSH_ZERO_MASK (0x8000)
2961 #define _MM_FLUSH_ZERO_ON (0x8000)
2962 #define _MM_FLUSH_ZERO_OFF (0x0000)
2964 #define _MM_GET_EXCEPTION_MASK() (_mm_getcsr() & _MM_MASK_MASK)
2965 #define _MM_GET_EXCEPTION_STATE() (_mm_getcsr() & _MM_EXCEPT_MASK)
2966 #define _MM_GET_FLUSH_ZERO_MODE() (_mm_getcsr() & _MM_FLUSH_ZERO_MASK)
2967 #define _MM_GET_ROUNDING_MODE() (_mm_getcsr() & _MM_ROUND_MASK)
2969 #define _MM_SET_EXCEPTION_MASK(x) (_mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x)))
2970 #define _MM_SET_EXCEPTION_STATE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | (x)))
2971 #define _MM_SET_FLUSH_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x)))
2972 #define _MM_SET_ROUNDING_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | (x)))
2974 #define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
2976 __m128 tmp3, tmp2, tmp1, tmp0; \
2977 tmp0 = _mm_unpacklo_ps((row0), (row1)); \
2978 tmp2 = _mm_unpacklo_ps((row2), (row3)); \
2979 tmp1 = _mm_unpackhi_ps((row0), (row1)); \
2980 tmp3 = _mm_unpackhi_ps((row2), (row3)); \
2981 (row0) = _mm_movelh_ps(tmp0, tmp2); \
2982 (row1) = _mm_movehl_ps(tmp2, tmp0); \
2983 (row2) = _mm_movelh_ps(tmp1, tmp3); \
2984 (row3) = _mm_movehl_ps(tmp3, tmp1); \
2987 /* Aliases for compatibility. */
2988 #define _m_pextrw _mm_extract_pi16
2989 #define _m_pinsrw _mm_insert_pi16
2990 #define _m_pmaxsw _mm_max_pi16
2991 #define _m_pmaxub _mm_max_pu8
2992 #define _m_pminsw _mm_min_pi16
2993 #define _m_pminub _mm_min_pu8
2994 #define _m_pmovmskb _mm_movemask_pi8
2995 #define _m_pmulhuw _mm_mulhi_pu16
2996 #define _m_pshufw _mm_shuffle_pi16
2997 #define _m_maskmovq _mm_maskmove_si64
2998 #define _m_pavgb _mm_avg_pu8
2999 #define _m_pavgw _mm_avg_pu16
3000 #define _m_psadbw _mm_sad_pu8
3004 #undef __DEFAULT_FN_ATTRS
3005 #undef __DEFAULT_FN_ATTRS_MMX
3007 /* Ugly hack for backwards-compatibility (compatible with gcc) */
3008 #if defined(__SSE2__) && !__building_module(_Builtin_intrinsics)
3009 #include <emmintrin.h>
3012 #endif /* __XMMINTRIN_H */