1 /*===---- xmmintrin.h - SSE intrinsics -------------------------------------===
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29 typedef int __v4si __attribute__((__vector_size__(16)));
30 typedef float __v4sf __attribute__((__vector_size__(16)));
31 typedef float __m128 __attribute__((__vector_size__(16)));
34 typedef unsigned int __v4su __attribute__((__vector_size__(16)));
36 /* This header should only be included in a hosted environment as it depends on
37 * a standard library to provide allocation routines. */
39 #include <mm_malloc.h>
42 /* Define the default attributes for the functions in this file. */
43 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse")))
45 /// \brief Adds the 32-bit float values in the low-order bits of the operands.
47 /// \headerfile <x86intrin.h>
49 /// This intrinsic corresponds to the <c> VADDSS / ADDSS </c> instructions.
52 /// A 128-bit vector of [4 x float] containing one of the source operands.
53 /// The lower 32 bits of this operand are used in the calculation.
55 /// A 128-bit vector of [4 x float] containing one of the source operands.
56 /// The lower 32 bits of this operand are used in the calculation.
57 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the sum
58 /// of the lower 32 bits of both operands. The upper 96 bits are copied from
59 /// the upper 96 bits of the first source operand.
60 static __inline__ __m128 __DEFAULT_FN_ATTRS
61 _mm_add_ss(__m128 __a, __m128 __b)
67 /// \brief Adds two 128-bit vectors of [4 x float], and returns the results of
70 /// \headerfile <x86intrin.h>
72 /// This intrinsic corresponds to the <c> VADDPS / ADDPS </c> instructions.
75 /// A 128-bit vector of [4 x float] containing one of the source operands.
77 /// A 128-bit vector of [4 x float] containing one of the source operands.
78 /// \returns A 128-bit vector of [4 x float] containing the sums of both
80 static __inline__ __m128 __DEFAULT_FN_ATTRS
81 _mm_add_ps(__m128 __a, __m128 __b)
83 return (__m128)((__v4sf)__a + (__v4sf)__b);
86 /// \brief Subtracts the 32-bit float value in the low-order bits of the second
87 /// operand from the corresponding value in the first operand.
89 /// \headerfile <x86intrin.h>
91 /// This intrinsic corresponds to the <c> VSUBSS / SUBSS </c> instructions.
94 /// A 128-bit vector of [4 x float] containing the minuend. The lower 32 bits
95 /// of this operand are used in the calculation.
97 /// A 128-bit vector of [4 x float] containing the subtrahend. The lower 32
98 /// bits of this operand are used in the calculation.
99 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
100 /// difference of the lower 32 bits of both operands. The upper 96 bits are
101 /// copied from the upper 96 bits of the first source operand.
102 static __inline__ __m128 __DEFAULT_FN_ATTRS
103 _mm_sub_ss(__m128 __a, __m128 __b)
109 /// \brief Subtracts each of the values of the second operand from the first
110 /// operand, both of which are 128-bit vectors of [4 x float] and returns
111 /// the results of the subtraction.
113 /// \headerfile <x86intrin.h>
115 /// This intrinsic corresponds to the <c> VSUBPS / SUBPS </c> instructions.
118 /// A 128-bit vector of [4 x float] containing the minuend.
120 /// A 128-bit vector of [4 x float] containing the subtrahend.
121 /// \returns A 128-bit vector of [4 x float] containing the differences between
123 static __inline__ __m128 __DEFAULT_FN_ATTRS
124 _mm_sub_ps(__m128 __a, __m128 __b)
126 return (__m128)((__v4sf)__a - (__v4sf)__b);
129 /// \brief Multiplies two 32-bit float values in the low-order bits of the
132 /// \headerfile <x86intrin.h>
134 /// This intrinsic corresponds to the <c> VMULSS / MULSS </c> instructions.
137 /// A 128-bit vector of [4 x float] containing one of the source operands.
138 /// The lower 32 bits of this operand are used in the calculation.
140 /// A 128-bit vector of [4 x float] containing one of the source operands.
141 /// The lower 32 bits of this operand are used in the calculation.
142 /// \returns A 128-bit vector of [4 x float] containing the product of the lower
143 /// 32 bits of both operands. The upper 96 bits are copied from the upper 96
144 /// bits of the first source operand.
145 static __inline__ __m128 __DEFAULT_FN_ATTRS
146 _mm_mul_ss(__m128 __a, __m128 __b)
152 /// \brief Multiplies two 128-bit vectors of [4 x float] and returns the
153 /// results of the multiplication.
155 /// \headerfile <x86intrin.h>
157 /// This intrinsic corresponds to the <c> VMULPS / MULPS </c> instructions.
160 /// A 128-bit vector of [4 x float] containing one of the source operands.
162 /// A 128-bit vector of [4 x float] containing one of the source operands.
163 /// \returns A 128-bit vector of [4 x float] containing the products of both
165 static __inline__ __m128 __DEFAULT_FN_ATTRS
166 _mm_mul_ps(__m128 __a, __m128 __b)
168 return (__m128)((__v4sf)__a * (__v4sf)__b);
171 /// \brief Divides the value in the low-order 32 bits of the first operand by
172 /// the corresponding value in the second operand.
174 /// \headerfile <x86intrin.h>
176 /// This intrinsic corresponds to the <c> VDIVSS / DIVSS </c> instructions.
179 /// A 128-bit vector of [4 x float] containing the dividend. The lower 32
180 /// bits of this operand are used in the calculation.
182 /// A 128-bit vector of [4 x float] containing the divisor. The lower 32 bits
183 /// of this operand are used in the calculation.
184 /// \returns A 128-bit vector of [4 x float] containing the quotients of the
185 /// lower 32 bits of both operands. The upper 96 bits are copied from the
186 /// upper 96 bits of the first source operand.
187 static __inline__ __m128 __DEFAULT_FN_ATTRS
188 _mm_div_ss(__m128 __a, __m128 __b)
194 /// \brief Divides two 128-bit vectors of [4 x float].
196 /// \headerfile <x86intrin.h>
198 /// This intrinsic corresponds to the <c> VDIVPS / DIVPS </c> instructions.
201 /// A 128-bit vector of [4 x float] containing the dividend.
203 /// A 128-bit vector of [4 x float] containing the divisor.
204 /// \returns A 128-bit vector of [4 x float] containing the quotients of both
206 static __inline__ __m128 __DEFAULT_FN_ATTRS
207 _mm_div_ps(__m128 __a, __m128 __b)
209 return (__m128)((__v4sf)__a / (__v4sf)__b);
212 /// \brief Calculates the square root of the value stored in the low-order bits
213 /// of a 128-bit vector of [4 x float].
215 /// \headerfile <x86intrin.h>
217 /// This intrinsic corresponds to the <c> VSQRTSS / SQRTSS </c> instructions.
220 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
221 /// used in the calculation.
222 /// \returns A 128-bit vector of [4 x float] containing the square root of the
223 /// value in the low-order bits of the operand.
224 static __inline__ __m128 __DEFAULT_FN_ATTRS
225 _mm_sqrt_ss(__m128 __a)
227 __m128 __c = __builtin_ia32_sqrtss((__v4sf)__a);
228 return (__m128) { __c[0], __a[1], __a[2], __a[3] };
231 /// \brief Calculates the square roots of the values stored in a 128-bit vector
234 /// \headerfile <x86intrin.h>
236 /// This intrinsic corresponds to the <c> VSQRTPS / SQRTPS </c> instructions.
239 /// A 128-bit vector of [4 x float].
240 /// \returns A 128-bit vector of [4 x float] containing the square roots of the
241 /// values in the operand.
242 static __inline__ __m128 __DEFAULT_FN_ATTRS
243 _mm_sqrt_ps(__m128 __a)
245 return __builtin_ia32_sqrtps((__v4sf)__a);
248 /// \brief Calculates the approximate reciprocal of the value stored in the
249 /// low-order bits of a 128-bit vector of [4 x float].
251 /// \headerfile <x86intrin.h>
253 /// This intrinsic corresponds to the <c> VRCPSS / RCPSS </c> instructions.
256 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
257 /// used in the calculation.
258 /// \returns A 128-bit vector of [4 x float] containing the approximate
259 /// reciprocal of the value in the low-order bits of the operand.
260 static __inline__ __m128 __DEFAULT_FN_ATTRS
261 _mm_rcp_ss(__m128 __a)
263 __m128 __c = __builtin_ia32_rcpss((__v4sf)__a);
264 return (__m128) { __c[0], __a[1], __a[2], __a[3] };
267 /// \brief Calculates the approximate reciprocals of the values stored in a
268 /// 128-bit vector of [4 x float].
270 /// \headerfile <x86intrin.h>
272 /// This intrinsic corresponds to the <c> VRCPPS / RCPPS </c> instructions.
275 /// A 128-bit vector of [4 x float].
276 /// \returns A 128-bit vector of [4 x float] containing the approximate
277 /// reciprocals of the values in the operand.
278 static __inline__ __m128 __DEFAULT_FN_ATTRS
279 _mm_rcp_ps(__m128 __a)
281 return __builtin_ia32_rcpps((__v4sf)__a);
284 /// \brief Calculates the approximate reciprocal of the square root of the value
285 /// stored in the low-order bits of a 128-bit vector of [4 x float].
287 /// \headerfile <x86intrin.h>
289 /// This intrinsic corresponds to the <c> VRSQRTSS / RSQRTSS </c> instructions.
292 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
293 /// used in the calculation.
294 /// \returns A 128-bit vector of [4 x float] containing the approximate
295 /// reciprocal of the square root of the value in the low-order bits of the
297 static __inline__ __m128 __DEFAULT_FN_ATTRS
298 _mm_rsqrt_ss(__m128 __a)
300 __m128 __c = __builtin_ia32_rsqrtss((__v4sf)__a);
301 return (__m128) { __c[0], __a[1], __a[2], __a[3] };
304 /// \brief Calculates the approximate reciprocals of the square roots of the
305 /// values stored in a 128-bit vector of [4 x float].
307 /// \headerfile <x86intrin.h>
309 /// This intrinsic corresponds to the <c> VRSQRTPS / RSQRTPS </c> instructions.
312 /// A 128-bit vector of [4 x float].
313 /// \returns A 128-bit vector of [4 x float] containing the approximate
314 /// reciprocals of the square roots of the values in the operand.
315 static __inline__ __m128 __DEFAULT_FN_ATTRS
316 _mm_rsqrt_ps(__m128 __a)
318 return __builtin_ia32_rsqrtps((__v4sf)__a);
321 /// \brief Compares two 32-bit float values in the low-order bits of both
322 /// operands and returns the lesser value in the low-order bits of the
323 /// vector of [4 x float].
325 /// \headerfile <x86intrin.h>
327 /// This intrinsic corresponds to the <c> VMINSS / MINSS </c> instructions.
330 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
331 /// 32 bits of this operand are used in the comparison.
333 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
334 /// 32 bits of this operand are used in the comparison.
335 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
336 /// minimum value between both operands. The upper 96 bits are copied from
337 /// the upper 96 bits of the first source operand.
338 static __inline__ __m128 __DEFAULT_FN_ATTRS
339 _mm_min_ss(__m128 __a, __m128 __b)
341 return __builtin_ia32_minss((__v4sf)__a, (__v4sf)__b);
344 /// \brief Compares two 128-bit vectors of [4 x float] and returns the lesser
345 /// of each pair of values.
347 /// \headerfile <x86intrin.h>
349 /// This intrinsic corresponds to the <c> VMINPS / MINPS </c> instructions.
352 /// A 128-bit vector of [4 x float] containing one of the operands.
354 /// A 128-bit vector of [4 x float] containing one of the operands.
355 /// \returns A 128-bit vector of [4 x float] containing the minimum values
356 /// between both operands.
357 static __inline__ __m128 __DEFAULT_FN_ATTRS
358 _mm_min_ps(__m128 __a, __m128 __b)
360 return __builtin_ia32_minps((__v4sf)__a, (__v4sf)__b);
363 /// \brief Compares two 32-bit float values in the low-order bits of both
364 /// operands and returns the greater value in the low-order bits of a 128-bit
365 /// vector of [4 x float].
367 /// \headerfile <x86intrin.h>
369 /// This intrinsic corresponds to the <c> VMAXSS / MAXSS </c> instructions.
372 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
373 /// 32 bits of this operand are used in the comparison.
375 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
376 /// 32 bits of this operand are used in the comparison.
377 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
378 /// maximum value between both operands. The upper 96 bits are copied from
379 /// the upper 96 bits of the first source operand.
380 static __inline__ __m128 __DEFAULT_FN_ATTRS
381 _mm_max_ss(__m128 __a, __m128 __b)
383 return __builtin_ia32_maxss((__v4sf)__a, (__v4sf)__b);
386 /// \brief Compares two 128-bit vectors of [4 x float] and returns the greater
387 /// of each pair of values.
389 /// \headerfile <x86intrin.h>
391 /// This intrinsic corresponds to the <c> VMAXPS / MAXPS </c> instructions.
394 /// A 128-bit vector of [4 x float] containing one of the operands.
396 /// A 128-bit vector of [4 x float] containing one of the operands.
397 /// \returns A 128-bit vector of [4 x float] containing the maximum values
398 /// between both operands.
399 static __inline__ __m128 __DEFAULT_FN_ATTRS
400 _mm_max_ps(__m128 __a, __m128 __b)
402 return __builtin_ia32_maxps((__v4sf)__a, (__v4sf)__b);
405 /// \brief Performs a bitwise AND of two 128-bit vectors of [4 x float].
407 /// \headerfile <x86intrin.h>
409 /// This intrinsic corresponds to the <c> VANDPS / ANDPS </c> instructions.
412 /// A 128-bit vector containing one of the source operands.
414 /// A 128-bit vector containing one of the source operands.
415 /// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the
416 /// values between both operands.
417 static __inline__ __m128 __DEFAULT_FN_ATTRS
418 _mm_and_ps(__m128 __a, __m128 __b)
420 return (__m128)((__v4su)__a & (__v4su)__b);
423 /// \brief Performs a bitwise AND of two 128-bit vectors of [4 x float], using
424 /// the one's complement of the values contained in the first source
427 /// \headerfile <x86intrin.h>
429 /// This intrinsic corresponds to the <c> VANDNPS / ANDNPS </c> instructions.
432 /// A 128-bit vector of [4 x float] containing the first source operand. The
433 /// one's complement of this value is used in the bitwise AND.
435 /// A 128-bit vector of [4 x float] containing the second source operand.
436 /// \returns A 128-bit vector of [4 x float] containing the bitwise AND of the
437 /// one's complement of the first operand and the values in the second
439 static __inline__ __m128 __DEFAULT_FN_ATTRS
440 _mm_andnot_ps(__m128 __a, __m128 __b)
442 return (__m128)(~(__v4su)__a & (__v4su)__b);
445 /// \brief Performs a bitwise OR of two 128-bit vectors of [4 x float].
447 /// \headerfile <x86intrin.h>
449 /// This intrinsic corresponds to the <c> VORPS / ORPS </c> instructions.
452 /// A 128-bit vector of [4 x float] containing one of the source operands.
454 /// A 128-bit vector of [4 x float] containing one of the source operands.
455 /// \returns A 128-bit vector of [4 x float] containing the bitwise OR of the
456 /// values between both operands.
457 static __inline__ __m128 __DEFAULT_FN_ATTRS
458 _mm_or_ps(__m128 __a, __m128 __b)
460 return (__m128)((__v4su)__a | (__v4su)__b);
463 /// \brief Performs a bitwise exclusive OR of two 128-bit vectors of
466 /// \headerfile <x86intrin.h>
468 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instructions.
471 /// A 128-bit vector of [4 x float] containing one of the source operands.
473 /// A 128-bit vector of [4 x float] containing one of the source operands.
474 /// \returns A 128-bit vector of [4 x float] containing the bitwise exclusive OR
475 /// of the values between both operands.
476 static __inline__ __m128 __DEFAULT_FN_ATTRS
477 _mm_xor_ps(__m128 __a, __m128 __b)
479 return (__m128)((__v4su)__a ^ (__v4su)__b);
482 /// \brief Compares two 32-bit float values in the low-order bits of both
483 /// operands for equality and returns the result of the comparison in the
484 /// low-order bits of a vector [4 x float].
486 /// \headerfile <x86intrin.h>
488 /// This intrinsic corresponds to the <c> VCMPEQSS / CMPEQSS </c> instructions.
491 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
492 /// 32 bits of this operand are used in the comparison.
494 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
495 /// 32 bits of this operand are used in the comparison.
496 /// \returns A 128-bit vector of [4 x float] containing the comparison results
497 /// in the low-order bits.
498 static __inline__ __m128 __DEFAULT_FN_ATTRS
499 _mm_cmpeq_ss(__m128 __a, __m128 __b)
501 return (__m128)__builtin_ia32_cmpeqss((__v4sf)__a, (__v4sf)__b);
504 /// \brief Compares each of the corresponding 32-bit float values of the
505 /// 128-bit vectors of [4 x float] for equality.
507 /// \headerfile <x86intrin.h>
509 /// This intrinsic corresponds to the <c> VCMPEQPS / CMPEQPS </c> instructions.
512 /// A 128-bit vector of [4 x float].
514 /// A 128-bit vector of [4 x float].
515 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
516 static __inline__ __m128 __DEFAULT_FN_ATTRS
517 _mm_cmpeq_ps(__m128 __a, __m128 __b)
519 return (__m128)__builtin_ia32_cmpeqps((__v4sf)__a, (__v4sf)__b);
522 /// \brief Compares two 32-bit float values in the low-order bits of both
523 /// operands to determine if the value in the first operand is less than the
524 /// corresponding value in the second operand and returns the result of the
525 /// comparison in the low-order bits of a vector of [4 x float].
527 /// \headerfile <x86intrin.h>
529 /// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
532 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
533 /// 32 bits of this operand are used in the comparison.
535 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
536 /// 32 bits of this operand are used in the comparison.
537 /// \returns A 128-bit vector of [4 x float] containing the comparison results
538 /// in the low-order bits.
539 static __inline__ __m128 __DEFAULT_FN_ATTRS
540 _mm_cmplt_ss(__m128 __a, __m128 __b)
542 return (__m128)__builtin_ia32_cmpltss((__v4sf)__a, (__v4sf)__b);
545 /// \brief Compares each of the corresponding 32-bit float values of the
546 /// 128-bit vectors of [4 x float] to determine if the values in the first
547 /// operand are less than those in the second operand.
549 /// \headerfile <x86intrin.h>
551 /// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
554 /// A 128-bit vector of [4 x float].
556 /// A 128-bit vector of [4 x float].
557 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
558 static __inline__ __m128 __DEFAULT_FN_ATTRS
559 _mm_cmplt_ps(__m128 __a, __m128 __b)
561 return (__m128)__builtin_ia32_cmpltps((__v4sf)__a, (__v4sf)__b);
564 /// \brief Compares two 32-bit float values in the low-order bits of both
565 /// operands to determine if the value in the first operand is less than or
566 /// equal to the corresponding value in the second operand and returns the
567 /// result of the comparison in the low-order bits of a vector of
570 /// \headerfile <x86intrin.h>
572 /// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
575 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
576 /// 32 bits of this operand are used in the comparison.
578 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
579 /// 32 bits of this operand are used in the comparison.
580 /// \returns A 128-bit vector of [4 x float] containing the comparison results
581 /// in the low-order bits.
582 static __inline__ __m128 __DEFAULT_FN_ATTRS
583 _mm_cmple_ss(__m128 __a, __m128 __b)
585 return (__m128)__builtin_ia32_cmpless((__v4sf)__a, (__v4sf)__b);
588 /// \brief Compares each of the corresponding 32-bit float values of the
589 /// 128-bit vectors of [4 x float] to determine if the values in the first
590 /// operand are less than or equal to those in the second operand.
592 /// \headerfile <x86intrin.h>
594 /// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
597 /// A 128-bit vector of [4 x float].
599 /// A 128-bit vector of [4 x float].
600 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
601 static __inline__ __m128 __DEFAULT_FN_ATTRS
602 _mm_cmple_ps(__m128 __a, __m128 __b)
604 return (__m128)__builtin_ia32_cmpleps((__v4sf)__a, (__v4sf)__b);
607 /// \brief Compares two 32-bit float values in the low-order bits of both
608 /// operands to determine if the value in the first operand is greater than
609 /// the corresponding value in the second operand and returns the result of
610 /// the comparison in the low-order bits of a vector of [4 x float].
612 /// \headerfile <x86intrin.h>
614 /// This intrinsic corresponds to the <c> VCMPLTSS / CMPLTSS </c> instructions.
617 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
618 /// 32 bits of this operand are used in the comparison.
620 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
621 /// 32 bits of this operand are used in the comparison.
622 /// \returns A 128-bit vector of [4 x float] containing the comparison results
623 /// in the low-order bits.
624 static __inline__ __m128 __DEFAULT_FN_ATTRS
625 _mm_cmpgt_ss(__m128 __a, __m128 __b)
627 return (__m128)__builtin_shufflevector((__v4sf)__a,
628 (__v4sf)__builtin_ia32_cmpltss((__v4sf)__b, (__v4sf)__a),
632 /// \brief Compares each of the corresponding 32-bit float values of the
633 /// 128-bit vectors of [4 x float] to determine if the values in the first
634 /// operand are greater than those in the second operand.
636 /// \headerfile <x86intrin.h>
638 /// This intrinsic corresponds to the <c> VCMPLTPS / CMPLTPS </c> instructions.
641 /// A 128-bit vector of [4 x float].
643 /// A 128-bit vector of [4 x float].
644 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
645 static __inline__ __m128 __DEFAULT_FN_ATTRS
646 _mm_cmpgt_ps(__m128 __a, __m128 __b)
648 return (__m128)__builtin_ia32_cmpltps((__v4sf)__b, (__v4sf)__a);
651 /// \brief Compares two 32-bit float values in the low-order bits of both
652 /// operands to determine if the value in the first operand is greater than
653 /// or equal to the corresponding value in the second operand and returns
654 /// the result of the comparison in the low-order bits of a vector of
657 /// \headerfile <x86intrin.h>
659 /// This intrinsic corresponds to the <c> VCMPLESS / CMPLESS </c> instructions.
662 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
663 /// 32 bits of this operand are used in the comparison.
665 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
666 /// 32 bits of this operand are used in the comparison.
667 /// \returns A 128-bit vector of [4 x float] containing the comparison results
668 /// in the low-order bits.
669 static __inline__ __m128 __DEFAULT_FN_ATTRS
670 _mm_cmpge_ss(__m128 __a, __m128 __b)
672 return (__m128)__builtin_shufflevector((__v4sf)__a,
673 (__v4sf)__builtin_ia32_cmpless((__v4sf)__b, (__v4sf)__a),
677 /// \brief Compares each of the corresponding 32-bit float values of the
678 /// 128-bit vectors of [4 x float] to determine if the values in the first
679 /// operand are greater than or equal to those in the second operand.
681 /// \headerfile <x86intrin.h>
683 /// This intrinsic corresponds to the <c> VCMPLEPS / CMPLEPS </c> instructions.
686 /// A 128-bit vector of [4 x float].
688 /// A 128-bit vector of [4 x float].
689 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
690 static __inline__ __m128 __DEFAULT_FN_ATTRS
691 _mm_cmpge_ps(__m128 __a, __m128 __b)
693 return (__m128)__builtin_ia32_cmpleps((__v4sf)__b, (__v4sf)__a);
696 /// \brief Compares two 32-bit float values in the low-order bits of both
697 /// operands for inequality and returns the result of the comparison in the
698 /// low-order bits of a vector of [4 x float].
700 /// \headerfile <x86intrin.h>
702 /// This intrinsic corresponds to the <c> VCMPNEQSS / CMPNEQSS </c>
706 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
707 /// 32 bits of this operand are used in the comparison.
709 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
710 /// 32 bits of this operand are used in the comparison.
711 /// \returns A 128-bit vector of [4 x float] containing the comparison results
712 /// in the low-order bits.
713 static __inline__ __m128 __DEFAULT_FN_ATTRS
714 _mm_cmpneq_ss(__m128 __a, __m128 __b)
716 return (__m128)__builtin_ia32_cmpneqss((__v4sf)__a, (__v4sf)__b);
719 /// \brief Compares each of the corresponding 32-bit float values of the
720 /// 128-bit vectors of [4 x float] for inequality.
722 /// \headerfile <x86intrin.h>
724 /// This intrinsic corresponds to the <c> VCMPNEQPS / CMPNEQPS </c>
728 /// A 128-bit vector of [4 x float].
730 /// A 128-bit vector of [4 x float].
731 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
732 static __inline__ __m128 __DEFAULT_FN_ATTRS
733 _mm_cmpneq_ps(__m128 __a, __m128 __b)
735 return (__m128)__builtin_ia32_cmpneqps((__v4sf)__a, (__v4sf)__b);
738 /// \brief Compares two 32-bit float values in the low-order bits of both
739 /// operands to determine if the value in the first operand is not less than
740 /// the corresponding value in the second operand and returns the result of
741 /// the comparison in the low-order bits of a vector of [4 x float].
743 /// \headerfile <x86intrin.h>
745 /// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c>
749 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
750 /// 32 bits of this operand are used in the comparison.
752 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
753 /// 32 bits of this operand are used in the comparison.
754 /// \returns A 128-bit vector of [4 x float] containing the comparison results
755 /// in the low-order bits.
756 static __inline__ __m128 __DEFAULT_FN_ATTRS
757 _mm_cmpnlt_ss(__m128 __a, __m128 __b)
759 return (__m128)__builtin_ia32_cmpnltss((__v4sf)__a, (__v4sf)__b);
762 /// \brief Compares each of the corresponding 32-bit float values of the
763 /// 128-bit vectors of [4 x float] to determine if the values in the first
764 /// operand are not less than those in the second operand.
766 /// \headerfile <x86intrin.h>
768 /// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c>
772 /// A 128-bit vector of [4 x float].
774 /// A 128-bit vector of [4 x float].
775 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
776 static __inline__ __m128 __DEFAULT_FN_ATTRS
777 _mm_cmpnlt_ps(__m128 __a, __m128 __b)
779 return (__m128)__builtin_ia32_cmpnltps((__v4sf)__a, (__v4sf)__b);
782 /// \brief Compares two 32-bit float values in the low-order bits of both
783 /// operands to determine if the value in the first operand is not less than
784 /// or equal to the corresponding value in the second operand and returns
785 /// the result of the comparison in the low-order bits of a vector of
788 /// \headerfile <x86intrin.h>
790 /// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c>
794 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
795 /// 32 bits of this operand are used in the comparison.
797 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
798 /// 32 bits of this operand are used in the comparison.
799 /// \returns A 128-bit vector of [4 x float] containing the comparison results
800 /// in the low-order bits.
801 static __inline__ __m128 __DEFAULT_FN_ATTRS
802 _mm_cmpnle_ss(__m128 __a, __m128 __b)
804 return (__m128)__builtin_ia32_cmpnless((__v4sf)__a, (__v4sf)__b);
807 /// \brief Compares each of the corresponding 32-bit float values of the
808 /// 128-bit vectors of [4 x float] to determine if the values in the first
809 /// operand are not less than or equal to those in the second operand.
811 /// \headerfile <x86intrin.h>
813 /// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c>
817 /// A 128-bit vector of [4 x float].
819 /// A 128-bit vector of [4 x float].
820 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
821 static __inline__ __m128 __DEFAULT_FN_ATTRS
822 _mm_cmpnle_ps(__m128 __a, __m128 __b)
824 return (__m128)__builtin_ia32_cmpnleps((__v4sf)__a, (__v4sf)__b);
827 /// \brief Compares two 32-bit float values in the low-order bits of both
828 /// operands to determine if the value in the first operand is not greater
829 /// than the corresponding value in the second operand and returns the
830 /// result of the comparison in the low-order bits of a vector of
833 /// \headerfile <x86intrin.h>
835 /// This intrinsic corresponds to the <c> VCMPNLTSS / CMPNLTSS </c>
839 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
840 /// 32 bits of this operand are used in the comparison.
842 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
843 /// 32 bits of this operand are used in the comparison.
844 /// \returns A 128-bit vector of [4 x float] containing the comparison results
845 /// in the low-order bits.
846 static __inline__ __m128 __DEFAULT_FN_ATTRS
847 _mm_cmpngt_ss(__m128 __a, __m128 __b)
849 return (__m128)__builtin_shufflevector((__v4sf)__a,
850 (__v4sf)__builtin_ia32_cmpnltss((__v4sf)__b, (__v4sf)__a),
854 /// \brief Compares each of the corresponding 32-bit float values of the
855 /// 128-bit vectors of [4 x float] to determine if the values in the first
856 /// operand are not greater than those in the second operand.
858 /// \headerfile <x86intrin.h>
860 /// This intrinsic corresponds to the <c> VCMPNLTPS / CMPNLTPS </c>
864 /// A 128-bit vector of [4 x float].
866 /// A 128-bit vector of [4 x float].
867 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
868 static __inline__ __m128 __DEFAULT_FN_ATTRS
869 _mm_cmpngt_ps(__m128 __a, __m128 __b)
871 return (__m128)__builtin_ia32_cmpnltps((__v4sf)__b, (__v4sf)__a);
874 /// \brief Compares two 32-bit float values in the low-order bits of both
875 /// operands to determine if the value in the first operand is not greater
876 /// than or equal to the corresponding value in the second operand and
877 /// returns the result of the comparison in the low-order bits of a vector
880 /// \headerfile <x86intrin.h>
882 /// This intrinsic corresponds to the <c> VCMPNLESS / CMPNLESS </c>
886 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
887 /// 32 bits of this operand are used in the comparison.
889 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
890 /// 32 bits of this operand are used in the comparison.
891 /// \returns A 128-bit vector of [4 x float] containing the comparison results
892 /// in the low-order bits.
893 static __inline__ __m128 __DEFAULT_FN_ATTRS
894 _mm_cmpnge_ss(__m128 __a, __m128 __b)
896 return (__m128)__builtin_shufflevector((__v4sf)__a,
897 (__v4sf)__builtin_ia32_cmpnless((__v4sf)__b, (__v4sf)__a),
901 /// \brief Compares each of the corresponding 32-bit float values of the
902 /// 128-bit vectors of [4 x float] to determine if the values in the first
903 /// operand are not greater than or equal to those in the second operand.
905 /// \headerfile <x86intrin.h>
907 /// This intrinsic corresponds to the <c> VCMPNLEPS / CMPNLEPS </c>
911 /// A 128-bit vector of [4 x float].
913 /// A 128-bit vector of [4 x float].
914 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
915 static __inline__ __m128 __DEFAULT_FN_ATTRS
916 _mm_cmpnge_ps(__m128 __a, __m128 __b)
918 return (__m128)__builtin_ia32_cmpnleps((__v4sf)__b, (__v4sf)__a);
921 /// \brief Compares two 32-bit float values in the low-order bits of both
922 /// operands to determine if the value in the first operand is ordered with
923 /// respect to the corresponding value in the second operand and returns the
924 /// result of the comparison in the low-order bits of a vector of
927 /// \headerfile <x86intrin.h>
929 /// This intrinsic corresponds to the <c> VCMPORDSS / CMPORDSS </c>
933 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
934 /// 32 bits of this operand are used in the comparison.
936 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
937 /// 32 bits of this operand are used in the comparison.
938 /// \returns A 128-bit vector of [4 x float] containing the comparison results
939 /// in the low-order bits.
940 static __inline__ __m128 __DEFAULT_FN_ATTRS
941 _mm_cmpord_ss(__m128 __a, __m128 __b)
943 return (__m128)__builtin_ia32_cmpordss((__v4sf)__a, (__v4sf)__b);
946 /// \brief Compares each of the corresponding 32-bit float values of the
947 /// 128-bit vectors of [4 x float] to determine if the values in the first
948 /// operand are ordered with respect to those in the second operand.
950 /// \headerfile <x86intrin.h>
952 /// This intrinsic corresponds to the <c> VCMPORDPS / CMPORDPS </c>
956 /// A 128-bit vector of [4 x float].
958 /// A 128-bit vector of [4 x float].
959 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
960 static __inline__ __m128 __DEFAULT_FN_ATTRS
961 _mm_cmpord_ps(__m128 __a, __m128 __b)
963 return (__m128)__builtin_ia32_cmpordps((__v4sf)__a, (__v4sf)__b);
966 /// \brief Compares two 32-bit float values in the low-order bits of both
967 /// operands to determine if the value in the first operand is unordered
968 /// with respect to the corresponding value in the second operand and
969 /// returns the result of the comparison in the low-order bits of a vector
972 /// \headerfile <x86intrin.h>
974 /// This intrinsic corresponds to the <c> VCMPUNORDSS / CMPUNORDSS </c>
978 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
979 /// 32 bits of this operand are used in the comparison.
981 /// A 128-bit vector of [4 x float] containing one of the operands. The lower
982 /// 32 bits of this operand are used in the comparison.
983 /// \returns A 128-bit vector of [4 x float] containing the comparison results
984 /// in the low-order bits.
985 static __inline__ __m128 __DEFAULT_FN_ATTRS
986 _mm_cmpunord_ss(__m128 __a, __m128 __b)
988 return (__m128)__builtin_ia32_cmpunordss((__v4sf)__a, (__v4sf)__b);
991 /// \brief Compares each of the corresponding 32-bit float values of the
992 /// 128-bit vectors of [4 x float] to determine if the values in the first
993 /// operand are unordered with respect to those in the second operand.
995 /// \headerfile <x86intrin.h>
997 /// This intrinsic corresponds to the <c> VCMPUNORDPS / CMPUNORDPS </c>
1001 /// A 128-bit vector of [4 x float].
1003 /// A 128-bit vector of [4 x float].
1004 /// \returns A 128-bit vector of [4 x float] containing the comparison results.
1005 static __inline__ __m128 __DEFAULT_FN_ATTRS
1006 _mm_cmpunord_ps(__m128 __a, __m128 __b)
1008 return (__m128)__builtin_ia32_cmpunordps((__v4sf)__a, (__v4sf)__b);
1011 /// \brief Compares two 32-bit float values in the low-order bits of both
1012 /// operands for equality and returns the result of the comparison.
1014 /// \headerfile <x86intrin.h>
1016 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c>
1020 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1021 /// used in the comparison.
1023 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1024 /// used in the comparison.
1025 /// \returns An integer containing the comparison results.
1026 static __inline__ int __DEFAULT_FN_ATTRS
1027 _mm_comieq_ss(__m128 __a, __m128 __b)
1029 return __builtin_ia32_comieq((__v4sf)__a, (__v4sf)__b);
1032 /// \brief Compares two 32-bit float values in the low-order bits of both
1033 /// operands to determine if the first operand is less than the second
1034 /// operand and returns the result of the comparison.
1036 /// \headerfile <x86intrin.h>
1038 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c>
1042 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1043 /// used in the comparison.
1045 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1046 /// used in the comparison.
1047 /// \returns An integer containing the comparison results.
1048 static __inline__ int __DEFAULT_FN_ATTRS
1049 _mm_comilt_ss(__m128 __a, __m128 __b)
1051 return __builtin_ia32_comilt((__v4sf)__a, (__v4sf)__b);
1054 /// \brief Compares two 32-bit float values in the low-order bits of both
1055 /// operands to determine if the first operand is less than or equal to the
1056 /// second operand and returns the result of the comparison.
1058 /// \headerfile <x86intrin.h>
1060 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1063 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1064 /// used in the comparison.
1066 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1067 /// used in the comparison.
1068 /// \returns An integer containing the comparison results.
1069 static __inline__ int __DEFAULT_FN_ATTRS
1070 _mm_comile_ss(__m128 __a, __m128 __b)
1072 return __builtin_ia32_comile((__v4sf)__a, (__v4sf)__b);
1075 /// \brief Compares two 32-bit float values in the low-order bits of both
1076 /// operands to determine if the first operand is greater than the second
1077 /// operand and returns the result of the comparison.
1079 /// \headerfile <x86intrin.h>
1081 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1084 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1085 /// used in the comparison.
1087 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1088 /// used in the comparison.
1089 /// \returns An integer containing the comparison results.
1090 static __inline__ int __DEFAULT_FN_ATTRS
1091 _mm_comigt_ss(__m128 __a, __m128 __b)
1093 return __builtin_ia32_comigt((__v4sf)__a, (__v4sf)__b);
1096 /// \brief Compares two 32-bit float values in the low-order bits of both
1097 /// operands to determine if the first operand is greater than or equal to
1098 /// the second operand and returns the result of the comparison.
1100 /// \headerfile <x86intrin.h>
1102 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1105 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1106 /// used in the comparison.
1108 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1109 /// used in the comparison.
1110 /// \returns An integer containing the comparison results.
1111 static __inline__ int __DEFAULT_FN_ATTRS
1112 _mm_comige_ss(__m128 __a, __m128 __b)
1114 return __builtin_ia32_comige((__v4sf)__a, (__v4sf)__b);
1117 /// \brief Compares two 32-bit float values in the low-order bits of both
1118 /// operands to determine if the first operand is not equal to the second
1119 /// operand and returns the result of the comparison.
1121 /// \headerfile <x86intrin.h>
1123 /// This intrinsic corresponds to the <c> VCOMISS / COMISS </c> instructions.
1126 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1127 /// used in the comparison.
1129 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1130 /// used in the comparison.
1131 /// \returns An integer containing the comparison results.
1132 static __inline__ int __DEFAULT_FN_ATTRS
1133 _mm_comineq_ss(__m128 __a, __m128 __b)
1135 return __builtin_ia32_comineq((__v4sf)__a, (__v4sf)__b);
1138 /// \brief Performs an unordered comparison of two 32-bit float values using
1139 /// the low-order bits of both operands to determine equality and returns
1140 /// the result of the comparison.
1142 /// \headerfile <x86intrin.h>
1144 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1147 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1148 /// used in the comparison.
1150 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1151 /// used in the comparison.
1152 /// \returns An integer containing the comparison results.
1153 static __inline__ int __DEFAULT_FN_ATTRS
1154 _mm_ucomieq_ss(__m128 __a, __m128 __b)
1156 return __builtin_ia32_ucomieq((__v4sf)__a, (__v4sf)__b);
1159 /// \brief Performs an unordered comparison of two 32-bit float values using
1160 /// the low-order bits of both operands to determine if the first operand is
1161 /// less than the second operand and returns the result of the comparison.
1163 /// \headerfile <x86intrin.h>
1165 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1168 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1169 /// used in the comparison.
1171 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1172 /// used in the comparison.
1173 /// \returns An integer containing the comparison results.
1174 static __inline__ int __DEFAULT_FN_ATTRS
1175 _mm_ucomilt_ss(__m128 __a, __m128 __b)
1177 return __builtin_ia32_ucomilt((__v4sf)__a, (__v4sf)__b);
1180 /// \brief Performs an unordered comparison of two 32-bit float values using
1181 /// the low-order bits of both operands to determine if the first operand is
1182 /// less than or equal to the second operand and returns the result of the
1185 /// \headerfile <x86intrin.h>
1187 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1190 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1191 /// used in the comparison.
1193 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1194 /// used in the comparison.
1195 /// \returns An integer containing the comparison results.
1196 static __inline__ int __DEFAULT_FN_ATTRS
1197 _mm_ucomile_ss(__m128 __a, __m128 __b)
1199 return __builtin_ia32_ucomile((__v4sf)__a, (__v4sf)__b);
1202 /// \brief Performs an unordered comparison of two 32-bit float values using
1203 /// the low-order bits of both operands to determine if the first operand is
1204 /// greater than the second operand and returns the result of the
1207 /// \headerfile <x86intrin.h>
1209 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1212 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1213 /// used in the comparison.
1215 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1216 /// used in the comparison.
1217 /// \returns An integer containing the comparison results.
1218 static __inline__ int __DEFAULT_FN_ATTRS
1219 _mm_ucomigt_ss(__m128 __a, __m128 __b)
1221 return __builtin_ia32_ucomigt((__v4sf)__a, (__v4sf)__b);
1224 /// \brief Performs an unordered comparison of two 32-bit float values using
1225 /// the low-order bits of both operands to determine if the first operand is
1226 /// greater than or equal to the second operand and returns the result of
1229 /// \headerfile <x86intrin.h>
1231 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1234 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1235 /// used in the comparison.
1237 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1238 /// used in the comparison.
1239 /// \returns An integer containing the comparison results.
1240 static __inline__ int __DEFAULT_FN_ATTRS
1241 _mm_ucomige_ss(__m128 __a, __m128 __b)
1243 return __builtin_ia32_ucomige((__v4sf)__a, (__v4sf)__b);
1246 /// \brief Performs an unordered comparison of two 32-bit float values using
1247 /// the low-order bits of both operands to determine inequality and returns
1248 /// the result of the comparison.
1250 /// \headerfile <x86intrin.h>
1252 /// This intrinsic corresponds to the <c> VUCOMISS / UCOMISS </c> instructions.
1255 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1256 /// used in the comparison.
1258 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1259 /// used in the comparison.
1260 /// \returns An integer containing the comparison results.
1261 static __inline__ int __DEFAULT_FN_ATTRS
1262 _mm_ucomineq_ss(__m128 __a, __m128 __b)
1264 return __builtin_ia32_ucomineq((__v4sf)__a, (__v4sf)__b);
1267 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1268 /// [4 x float] into a 32-bit integer.
1270 /// \headerfile <x86intrin.h>
1272 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1276 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1277 /// used in the conversion.
1278 /// \returns A 32-bit integer containing the converted value.
1279 static __inline__ int __DEFAULT_FN_ATTRS
1280 _mm_cvtss_si32(__m128 __a)
1282 return __builtin_ia32_cvtss2si((__v4sf)__a);
1285 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1286 /// [4 x float] into a 32-bit integer.
1288 /// \headerfile <x86intrin.h>
1290 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1294 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1295 /// used in the conversion.
1296 /// \returns A 32-bit integer containing the converted value.
1297 static __inline__ int __DEFAULT_FN_ATTRS
1298 _mm_cvt_ss2si(__m128 __a)
1300 return _mm_cvtss_si32(__a);
1305 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1306 /// [4 x float] into a 64-bit integer.
1308 /// \headerfile <x86intrin.h>
1310 /// This intrinsic corresponds to the <c> VCVTSS2SI / CVTSS2SI </c>
1314 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1315 /// used in the conversion.
1316 /// \returns A 64-bit integer containing the converted value.
1317 static __inline__ long long __DEFAULT_FN_ATTRS
1318 _mm_cvtss_si64(__m128 __a)
1320 return __builtin_ia32_cvtss2si64((__v4sf)__a);
1325 /// \brief Converts two low-order float values in a 128-bit vector of
1326 /// [4 x float] into a 64-bit vector of [2 x i32].
1328 /// \headerfile <x86intrin.h>
1330 /// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
1333 /// A 128-bit vector of [4 x float].
1334 /// \returns A 64-bit integer vector containing the converted values.
1335 static __inline__ __m64 __DEFAULT_FN_ATTRS
1336 _mm_cvtps_pi32(__m128 __a)
1338 return (__m64)__builtin_ia32_cvtps2pi((__v4sf)__a);
1341 /// \brief Converts two low-order float values in a 128-bit vector of
1342 /// [4 x float] into a 64-bit vector of [2 x i32].
1344 /// \headerfile <x86intrin.h>
1346 /// This intrinsic corresponds to the <c> CVTPS2PI </c> instruction.
1349 /// A 128-bit vector of [4 x float].
1350 /// \returns A 64-bit integer vector containing the converted values.
1351 static __inline__ __m64 __DEFAULT_FN_ATTRS
1352 _mm_cvt_ps2pi(__m128 __a)
1354 return _mm_cvtps_pi32(__a);
1357 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1358 /// [4 x float] into a 32-bit integer, truncating the result when it is
1361 /// \headerfile <x86intrin.h>
1363 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1367 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1368 /// used in the conversion.
1369 /// \returns A 32-bit integer containing the converted value.
1370 static __inline__ int __DEFAULT_FN_ATTRS
1371 _mm_cvttss_si32(__m128 __a)
1373 return __builtin_ia32_cvttss2si((__v4sf)__a);
1376 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1377 /// [4 x float] into a 32-bit integer, truncating the result when it is
1380 /// \headerfile <x86intrin.h>
1382 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1386 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1387 /// used in the conversion.
1388 /// \returns A 32-bit integer containing the converted value.
1389 static __inline__ int __DEFAULT_FN_ATTRS
1390 _mm_cvtt_ss2si(__m128 __a)
1392 return _mm_cvttss_si32(__a);
1396 /// \brief Converts a float value contained in the lower 32 bits of a vector of
1397 /// [4 x float] into a 64-bit integer, truncating the result when it is
1400 /// \headerfile <x86intrin.h>
1402 /// This intrinsic corresponds to the <c> VCVTTSS2SI / CVTTSS2SI </c>
1406 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1407 /// used in the conversion.
1408 /// \returns A 64-bit integer containing the converted value.
1409 static __inline__ long long __DEFAULT_FN_ATTRS
1410 _mm_cvttss_si64(__m128 __a)
1412 return __builtin_ia32_cvttss2si64((__v4sf)__a);
1416 /// \brief Converts two low-order float values in a 128-bit vector of
1417 /// [4 x float] into a 64-bit vector of [2 x i32], truncating the result
1418 /// when it is inexact.
1420 /// \headerfile <x86intrin.h>
1422 /// This intrinsic corresponds to the <c> CVTTPS2PI / VTTPS2PI </c>
1426 /// A 128-bit vector of [4 x float].
1427 /// \returns A 64-bit integer vector containing the converted values.
1428 static __inline__ __m64 __DEFAULT_FN_ATTRS
1429 _mm_cvttps_pi32(__m128 __a)
1431 return (__m64)__builtin_ia32_cvttps2pi((__v4sf)__a);
1434 /// \brief Converts two low-order float values in a 128-bit vector of [4 x
1435 /// float] into a 64-bit vector of [2 x i32], truncating the result when it
1438 /// \headerfile <x86intrin.h>
1440 /// This intrinsic corresponds to the <c> CVTTPS2PI </c> instruction.
1443 /// A 128-bit vector of [4 x float].
1444 /// \returns A 64-bit integer vector containing the converted values.
1445 static __inline__ __m64 __DEFAULT_FN_ATTRS
1446 _mm_cvtt_ps2pi(__m128 __a)
1448 return _mm_cvttps_pi32(__a);
1451 /// \brief Converts a 32-bit signed integer value into a floating point value
1452 /// and writes it to the lower 32 bits of the destination. The remaining
1453 /// higher order elements of the destination vector are copied from the
1454 /// corresponding elements in the first operand.
1456 /// \headerfile <x86intrin.h>
1458 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1461 /// A 128-bit vector of [4 x float].
1463 /// A 32-bit signed integer operand containing the value to be converted.
1464 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1465 /// converted value of the second operand. The upper 96 bits are copied from
1466 /// the upper 96 bits of the first operand.
1467 static __inline__ __m128 __DEFAULT_FN_ATTRS
1468 _mm_cvtsi32_ss(__m128 __a, int __b)
1474 /// \brief Converts a 32-bit signed integer value into a floating point value
1475 /// and writes it to the lower 32 bits of the destination. The remaining
1476 /// higher order elements of the destination are copied from the
1477 /// corresponding elements in the first operand.
1479 /// \headerfile <x86intrin.h>
1481 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1484 /// A 128-bit vector of [4 x float].
1486 /// A 32-bit signed integer operand containing the value to be converted.
1487 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1488 /// converted value of the second operand. The upper 96 bits are copied from
1489 /// the upper 96 bits of the first operand.
1490 static __inline__ __m128 __DEFAULT_FN_ATTRS
1491 _mm_cvt_si2ss(__m128 __a, int __b)
1493 return _mm_cvtsi32_ss(__a, __b);
1498 /// \brief Converts a 64-bit signed integer value into a floating point value
1499 /// and writes it to the lower 32 bits of the destination. The remaining
1500 /// higher order elements of the destination are copied from the
1501 /// corresponding elements in the first operand.
1503 /// \headerfile <x86intrin.h>
1505 /// This intrinsic corresponds to the <c> VCVTSI2SS / CVTSI2SS </c> instruction.
1508 /// A 128-bit vector of [4 x float].
1510 /// A 64-bit signed integer operand containing the value to be converted.
1511 /// \returns A 128-bit vector of [4 x float] whose lower 32 bits contain the
1512 /// converted value of the second operand. The upper 96 bits are copied from
1513 /// the upper 96 bits of the first operand.
1514 static __inline__ __m128 __DEFAULT_FN_ATTRS
1515 _mm_cvtsi64_ss(__m128 __a, long long __b)
1523 /// \brief Converts two elements of a 64-bit vector of [2 x i32] into two
1524 /// floating point values and writes them to the lower 64-bits of the
1525 /// destination. The remaining higher order elements of the destination are
1526 /// copied from the corresponding elements in the first operand.
1528 /// \headerfile <x86intrin.h>
1530 /// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
1533 /// A 128-bit vector of [4 x float].
1535 /// A 64-bit vector of [2 x i32]. The elements in this vector are converted
1536 /// and written to the corresponding low-order elements in the destination.
1537 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1538 /// converted value of the second operand. The upper 64 bits are copied from
1539 /// the upper 64 bits of the first operand.
1540 static __inline__ __m128 __DEFAULT_FN_ATTRS
1541 _mm_cvtpi32_ps(__m128 __a, __m64 __b)
1543 return __builtin_ia32_cvtpi2ps((__v4sf)__a, (__v2si)__b);
1546 /// \brief Converts two elements of a 64-bit vector of [2 x i32] into two
1547 /// floating point values and writes them to the lower 64-bits of the
1548 /// destination. The remaining higher order elements of the destination are
1549 /// copied from the corresponding elements in the first operand.
1551 /// \headerfile <x86intrin.h>
1553 /// This intrinsic corresponds to the <c> CVTPI2PS </c> instruction.
1556 /// A 128-bit vector of [4 x float].
1558 /// A 64-bit vector of [2 x i32]. The elements in this vector are converted
1559 /// and written to the corresponding low-order elements in the destination.
1560 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
1561 /// converted value from the second operand. The upper 64 bits are copied
1562 /// from the upper 64 bits of the first operand.
1563 static __inline__ __m128 __DEFAULT_FN_ATTRS
1564 _mm_cvt_pi2ps(__m128 __a, __m64 __b)
1566 return _mm_cvtpi32_ps(__a, __b);
1569 /// \brief Extracts a float value contained in the lower 32 bits of a vector of
1572 /// \headerfile <x86intrin.h>
1574 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1577 /// A 128-bit vector of [4 x float]. The lower 32 bits of this operand are
1578 /// used in the extraction.
1579 /// \returns A 32-bit float containing the extracted value.
1580 static __inline__ float __DEFAULT_FN_ATTRS
1581 _mm_cvtss_f32(__m128 __a)
1586 /// \brief Loads two packed float values from the address \a __p into the
1587 /// high-order bits of a 128-bit vector of [4 x float]. The low-order bits
1588 /// are copied from the low-order bits of the first operand.
1590 /// \headerfile <x86intrin.h>
1592 /// This intrinsic corresponds to the <c> VMOVHPD / MOVHPD </c> instruction.
1595 /// A 128-bit vector of [4 x float]. Bits [63:0] are written to bits [63:0]
1596 /// of the destination.
1598 /// A pointer to two packed float values. Bits [63:0] are written to bits
1599 /// [127:64] of the destination.
1600 /// \returns A 128-bit vector of [4 x float] containing the moved values.
1601 static __inline__ __m128 __DEFAULT_FN_ATTRS
1602 _mm_loadh_pi(__m128 __a, const __m64 *__p)
1604 typedef float __mm_loadh_pi_v2f32 __attribute__((__vector_size__(8)));
1605 struct __mm_loadh_pi_struct {
1606 __mm_loadh_pi_v2f32 __u;
1607 } __attribute__((__packed__, __may_alias__));
1608 __mm_loadh_pi_v2f32 __b = ((struct __mm_loadh_pi_struct*)__p)->__u;
1609 __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
1610 return __builtin_shufflevector(__a, __bb, 0, 1, 4, 5);
1613 /// \brief Loads two packed float values from the address \a __p into the
1614 /// low-order bits of a 128-bit vector of [4 x float]. The high-order bits
1615 /// are copied from the high-order bits of the first operand.
1617 /// \headerfile <x86intrin.h>
1619 /// This intrinsic corresponds to the <c> VMOVLPD / MOVLPD </c> instruction.
1622 /// A 128-bit vector of [4 x float]. Bits [127:64] are written to bits
1623 /// [127:64] of the destination.
1625 /// A pointer to two packed float values. Bits [63:0] are written to bits
1626 /// [63:0] of the destination.
1627 /// \returns A 128-bit vector of [4 x float] containing the moved values.
1628 static __inline__ __m128 __DEFAULT_FN_ATTRS
1629 _mm_loadl_pi(__m128 __a, const __m64 *__p)
1631 typedef float __mm_loadl_pi_v2f32 __attribute__((__vector_size__(8)));
1632 struct __mm_loadl_pi_struct {
1633 __mm_loadl_pi_v2f32 __u;
1634 } __attribute__((__packed__, __may_alias__));
1635 __mm_loadl_pi_v2f32 __b = ((struct __mm_loadl_pi_struct*)__p)->__u;
1636 __m128 __bb = __builtin_shufflevector(__b, __b, 0, 1, 0, 1);
1637 return __builtin_shufflevector(__a, __bb, 4, 5, 2, 3);
1640 /// \brief Constructs a 128-bit floating-point vector of [4 x float]. The lower
1641 /// 32 bits of the vector are initialized with the single-precision
1642 /// floating-point value loaded from a specified memory location. The upper
1643 /// 96 bits are set to zero.
1645 /// \headerfile <x86intrin.h>
1647 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1650 /// A pointer to a 32-bit memory location containing a single-precision
1651 /// floating-point value.
1652 /// \returns An initialized 128-bit floating-point vector of [4 x float]. The
1653 /// lower 32 bits contain the value loaded from the memory location. The
1654 /// upper 96 bits are set to zero.
1655 static __inline__ __m128 __DEFAULT_FN_ATTRS
1656 _mm_load_ss(const float *__p)
1658 struct __mm_load_ss_struct {
1660 } __attribute__((__packed__, __may_alias__));
1661 float __u = ((struct __mm_load_ss_struct*)__p)->__u;
1662 return (__m128){ __u, 0, 0, 0 };
1665 /// \brief Loads a 32-bit float value and duplicates it to all four vector
1666 /// elements of a 128-bit vector of [4 x float].
1668 /// \headerfile <x86intrin.h>
1670 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS + shuffling </c>
1674 /// A pointer to a float value to be loaded and duplicated.
1675 /// \returns A 128-bit vector of [4 x float] containing the loaded and
1676 /// duplicated values.
1677 static __inline__ __m128 __DEFAULT_FN_ATTRS
1678 _mm_load1_ps(const float *__p)
1680 struct __mm_load1_ps_struct {
1682 } __attribute__((__packed__, __may_alias__));
1683 float __u = ((struct __mm_load1_ps_struct*)__p)->__u;
1684 return (__m128){ __u, __u, __u, __u };
1687 #define _mm_load_ps1(p) _mm_load1_ps(p)
1689 /// \brief Loads a 128-bit floating-point vector of [4 x float] from an aligned
1690 /// memory location.
1692 /// \headerfile <x86intrin.h>
1694 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
1697 /// A pointer to a 128-bit memory location. The address of the memory
1698 /// location has to be 128-bit aligned.
1699 /// \returns A 128-bit vector of [4 x float] containing the loaded valus.
1700 static __inline__ __m128 __DEFAULT_FN_ATTRS
1701 _mm_load_ps(const float *__p)
1703 return *(__m128*)__p;
1706 /// \brief Loads a 128-bit floating-point vector of [4 x float] from an
1707 /// unaligned memory location.
1709 /// \headerfile <x86intrin.h>
1711 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
1714 /// A pointer to a 128-bit memory location. The address of the memory
1715 /// location does not have to be aligned.
1716 /// \returns A 128-bit vector of [4 x float] containing the loaded values.
1717 static __inline__ __m128 __DEFAULT_FN_ATTRS
1718 _mm_loadu_ps(const float *__p)
1722 } __attribute__((__packed__, __may_alias__));
1723 return ((struct __loadu_ps*)__p)->__v;
1726 /// \brief Loads four packed float values, in reverse order, from an aligned
1727 /// memory location to 32-bit elements in a 128-bit vector of [4 x float].
1729 /// \headerfile <x86intrin.h>
1731 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
1735 /// A pointer to a 128-bit memory location. The address of the memory
1736 /// location has to be 128-bit aligned.
1737 /// \returns A 128-bit vector of [4 x float] containing the moved values, loaded
1738 /// in reverse order.
1739 static __inline__ __m128 __DEFAULT_FN_ATTRS
1740 _mm_loadr_ps(const float *__p)
1742 __m128 __a = _mm_load_ps(__p);
1743 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0);
1746 /// \brief Create a 128-bit vector of [4 x float] with undefined values.
1748 /// \headerfile <x86intrin.h>
1750 /// This intrinsic has no corresponding instruction.
1752 /// \returns A 128-bit vector of [4 x float] containing undefined values.
1753 static __inline__ __m128 __DEFAULT_FN_ATTRS
1754 _mm_undefined_ps(void)
1756 return (__m128)__builtin_ia32_undef128();
1759 /// \brief Constructs a 128-bit floating-point vector of [4 x float]. The lower
1760 /// 32 bits of the vector are initialized with the specified single-precision
1761 /// floating-point value. The upper 96 bits are set to zero.
1763 /// \headerfile <x86intrin.h>
1765 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1768 /// A single-precision floating-point value used to initialize the lower 32
1769 /// bits of the result.
1770 /// \returns An initialized 128-bit floating-point vector of [4 x float]. The
1771 /// lower 32 bits contain the value provided in the source operand. The
1772 /// upper 96 bits are set to zero.
1773 static __inline__ __m128 __DEFAULT_FN_ATTRS
1774 _mm_set_ss(float __w)
1776 return (__m128){ __w, 0, 0, 0 };
1779 /// \brief Constructs a 128-bit floating-point vector of [4 x float], with each
1780 /// of the four single-precision floating-point vector elements set to the
1781 /// specified single-precision floating-point value.
1783 /// \headerfile <x86intrin.h>
1785 /// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
1788 /// A single-precision floating-point value used to initialize each vector
1789 /// element of the result.
1790 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1791 static __inline__ __m128 __DEFAULT_FN_ATTRS
1792 _mm_set1_ps(float __w)
1794 return (__m128){ __w, __w, __w, __w };
1797 /* Microsoft specific. */
1798 /// \brief Constructs a 128-bit floating-point vector of [4 x float], with each
1799 /// of the four single-precision floating-point vector elements set to the
1800 /// specified single-precision floating-point value.
1802 /// \headerfile <x86intrin.h>
1804 /// This intrinsic corresponds to the <c> VPERMILPS / PERMILPS </c> instruction.
1807 /// A single-precision floating-point value used to initialize each vector
1808 /// element of the result.
1809 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1810 static __inline__ __m128 __DEFAULT_FN_ATTRS
1811 _mm_set_ps1(float __w)
1813 return _mm_set1_ps(__w);
1816 /// \brief Constructs a 128-bit floating-point vector of [4 x float]
1817 /// initialized with the specified single-precision floating-point values.
1819 /// \headerfile <x86intrin.h>
1821 /// This intrinsic is a utility function and does not correspond to a specific
1825 /// A single-precision floating-point value used to initialize bits [127:96]
1828 /// A single-precision floating-point value used to initialize bits [95:64]
1831 /// A single-precision floating-point value used to initialize bits [63:32]
1834 /// A single-precision floating-point value used to initialize bits [31:0]
1836 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1837 static __inline__ __m128 __DEFAULT_FN_ATTRS
1838 _mm_set_ps(float __z, float __y, float __x, float __w)
1840 return (__m128){ __w, __x, __y, __z };
1843 /// \brief Constructs a 128-bit floating-point vector of [4 x float],
1844 /// initialized in reverse order with the specified 32-bit single-precision
1845 /// float-point values.
1847 /// \headerfile <x86intrin.h>
1849 /// This intrinsic is a utility function and does not correspond to a specific
1853 /// A single-precision floating-point value used to initialize bits [31:0]
1856 /// A single-precision floating-point value used to initialize bits [63:32]
1859 /// A single-precision floating-point value used to initialize bits [95:64]
1862 /// A single-precision floating-point value used to initialize bits [127:96]
1864 /// \returns An initialized 128-bit floating-point vector of [4 x float].
1865 static __inline__ __m128 __DEFAULT_FN_ATTRS
1866 _mm_setr_ps(float __z, float __y, float __x, float __w)
1868 return (__m128){ __z, __y, __x, __w };
1871 /// \brief Constructs a 128-bit floating-point vector of [4 x float] initialized
1874 /// \headerfile <x86intrin.h>
1876 /// This intrinsic corresponds to the <c> VXORPS / XORPS </c> instruction.
1878 /// \returns An initialized 128-bit floating-point vector of [4 x float] with
1879 /// all elements set to zero.
1880 static __inline__ __m128 __DEFAULT_FN_ATTRS
1881 _mm_setzero_ps(void)
1883 return (__m128){ 0, 0, 0, 0 };
1886 /// \brief Stores the upper 64 bits of a 128-bit vector of [4 x float] to a
1887 /// memory location.
1889 /// \headerfile <x86intrin.h>
1891 /// This intrinsic corresponds to the <c> VPEXTRQ / MOVQ </c> instruction.
1894 /// A pointer to a 64-bit memory location.
1896 /// A 128-bit vector of [4 x float] containing the values to be stored.
1897 static __inline__ void __DEFAULT_FN_ATTRS
1898 _mm_storeh_pi(__m64 *__p, __m128 __a)
1900 __builtin_ia32_storehps((__v2si *)__p, (__v4sf)__a);
1903 /// \brief Stores the lower 64 bits of a 128-bit vector of [4 x float] to a
1904 /// memory location.
1906 /// \headerfile <x86intrin.h>
1908 /// This intrinsic corresponds to the <c> VMOVLPS / MOVLPS </c> instruction.
1911 /// A pointer to a memory location that will receive the float values.
1913 /// A 128-bit vector of [4 x float] containing the values to be stored.
1914 static __inline__ void __DEFAULT_FN_ATTRS
1915 _mm_storel_pi(__m64 *__p, __m128 __a)
1917 __builtin_ia32_storelps((__v2si *)__p, (__v4sf)__a);
1920 /// \brief Stores the lower 32 bits of a 128-bit vector of [4 x float] to a
1921 /// memory location.
1923 /// \headerfile <x86intrin.h>
1925 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
1928 /// A pointer to a 32-bit memory location.
1930 /// A 128-bit vector of [4 x float] containing the value to be stored.
1931 static __inline__ void __DEFAULT_FN_ATTRS
1932 _mm_store_ss(float *__p, __m128 __a)
1934 struct __mm_store_ss_struct {
1936 } __attribute__((__packed__, __may_alias__));
1937 ((struct __mm_store_ss_struct*)__p)->__u = __a[0];
1940 /// \brief Stores a 128-bit vector of [4 x float] to an unaligned memory
1943 /// \headerfile <x86intrin.h>
1945 /// This intrinsic corresponds to the <c> VMOVUPS / MOVUPS </c> instruction.
1948 /// A pointer to a 128-bit memory location. The address of the memory
1949 /// location does not have to be aligned.
1951 /// A 128-bit vector of [4 x float] containing the values to be stored.
1952 static __inline__ void __DEFAULT_FN_ATTRS
1953 _mm_storeu_ps(float *__p, __m128 __a)
1955 struct __storeu_ps {
1957 } __attribute__((__packed__, __may_alias__));
1958 ((struct __storeu_ps*)__p)->__v = __a;
1961 /// \brief Stores a 128-bit vector of [4 x float] into an aligned memory
1964 /// \headerfile <x86intrin.h>
1966 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS </c> instruction.
1969 /// A pointer to a 128-bit memory location. The address of the memory
1970 /// location has to be 16-byte aligned.
1972 /// A 128-bit vector of [4 x float] containing the values to be stored.
1973 static __inline__ void __DEFAULT_FN_ATTRS
1974 _mm_store_ps(float *__p, __m128 __a)
1976 *(__m128*)__p = __a;
1979 /// \brief Stores the lower 32 bits of a 128-bit vector of [4 x float] into
1980 /// four contiguous elements in an aligned memory location.
1982 /// \headerfile <x86intrin.h>
1984 /// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
1988 /// A pointer to a 128-bit memory location.
1990 /// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each
1991 /// of the four contiguous elements pointed by \a __p.
1992 static __inline__ void __DEFAULT_FN_ATTRS
1993 _mm_store1_ps(float *__p, __m128 __a)
1995 __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 0, 0, 0, 0);
1996 _mm_store_ps(__p, __a);
1999 /// \brief Stores the lower 32 bits of a 128-bit vector of [4 x float] into
2000 /// four contiguous elements in an aligned memory location.
2002 /// \headerfile <x86intrin.h>
2004 /// This intrinsic corresponds to <c> VMOVAPS / MOVAPS + shuffling </c>
2008 /// A pointer to a 128-bit memory location.
2010 /// A 128-bit vector of [4 x float] whose lower 32 bits are stored to each
2011 /// of the four contiguous elements pointed by \a __p.
2012 static __inline__ void __DEFAULT_FN_ATTRS
2013 _mm_store_ps1(float *__p, __m128 __a)
2015 return _mm_store1_ps(__p, __a);
2018 /// \brief Stores float values from a 128-bit vector of [4 x float] to an
2019 /// aligned memory location in reverse order.
2021 /// \headerfile <x86intrin.h>
2023 /// This intrinsic corresponds to the <c> VMOVAPS / MOVAPS + shuffling </c>
2027 /// A pointer to a 128-bit memory location. The address of the memory
2028 /// location has to be 128-bit aligned.
2030 /// A 128-bit vector of [4 x float] containing the values to be stored.
2031 static __inline__ void __DEFAULT_FN_ATTRS
2032 _mm_storer_ps(float *__p, __m128 __a)
2034 __a = __builtin_shufflevector((__v4sf)__a, (__v4sf)__a, 3, 2, 1, 0);
2035 _mm_store_ps(__p, __a);
2038 #define _MM_HINT_T0 3
2039 #define _MM_HINT_T1 2
2040 #define _MM_HINT_T2 1
2041 #define _MM_HINT_NTA 0
2044 /* FIXME: We have to #define this because "sel" must be a constant integer, and
2045 Sema doesn't do any form of constant propagation yet. */
2047 /// \brief Loads one cache line of data from the specified address to a location
2048 /// closer to the processor.
2050 /// \headerfile <x86intrin.h>
2053 /// void _mm_prefetch(const void * a, const int sel);
2056 /// This intrinsic corresponds to the <c> PREFETCHNTA </c> instruction.
2059 /// A pointer to a memory location containing a cache line of data.
2061 /// A predefined integer constant specifying the type of prefetch
2063 /// _MM_HINT_NTA: Move data using the non-temporal access (NTA) hint. The
2064 /// PREFETCHNTA instruction will be generated. \n
2065 /// _MM_HINT_T0: Move data using the T0 hint. The PREFETCHT0 instruction will
2066 /// be generated. \n
2067 /// _MM_HINT_T1: Move data using the T1 hint. The PREFETCHT1 instruction will
2068 /// be generated. \n
2069 /// _MM_HINT_T2: Move data using the T2 hint. The PREFETCHT2 instruction will
2071 #define _mm_prefetch(a, sel) (__builtin_prefetch((void *)(a), 0, (sel)))
2074 /// \brief Stores a 64-bit integer in the specified aligned memory location. To
2075 /// minimize caching, the data is flagged as non-temporal (unlikely to be
2076 /// used again soon).
2078 /// \headerfile <x86intrin.h>
2080 /// This intrinsic corresponds to the <c> MOVNTQ </c> instruction.
2083 /// A pointer to an aligned memory location used to store the register value.
2085 /// A 64-bit integer containing the value to be stored.
2086 static __inline__ void __DEFAULT_FN_ATTRS
2087 _mm_stream_pi(__m64 *__p, __m64 __a)
2089 __builtin_ia32_movntq(__p, __a);
2092 /// \brief Moves packed float values from a 128-bit vector of [4 x float] to a
2093 /// 128-bit aligned memory location. To minimize caching, the data is flagged
2094 /// as non-temporal (unlikely to be used again soon).
2096 /// \headerfile <x86intrin.h>
2098 /// This intrinsic corresponds to the <c> VMOVNTPS / MOVNTPS </c> instruction.
2101 /// A pointer to a 128-bit aligned memory location that will receive the
2104 /// A 128-bit vector of [4 x float] containing the values to be moved.
2105 static __inline__ void __DEFAULT_FN_ATTRS
2106 _mm_stream_ps(float *__p, __m128 __a)
2108 __builtin_nontemporal_store((__v4sf)__a, (__v4sf*)__p);
2111 #if defined(__cplusplus)
2115 /// \brief Forces strong memory ordering (serialization) between store
2116 /// instructions preceding this instruction and store instructions following
2117 /// this instruction, ensuring the system completes all previous stores
2118 /// before executing subsequent stores.
2120 /// \headerfile <x86intrin.h>
2122 /// This intrinsic corresponds to the <c> SFENCE </c> instruction.
2124 void _mm_sfence(void);
2126 #if defined(__cplusplus)
2130 /// \brief Extracts 16-bit element from a 64-bit vector of [4 x i16] and
2131 /// returns it, as specified by the immediate integer operand.
2133 /// \headerfile <x86intrin.h>
2136 /// void _mm_extract_pi(__m64 a, int n);
2139 /// This intrinsic corresponds to the <c> VPEXTRW / PEXTRW </c> instruction.
2142 /// A 64-bit vector of [4 x i16].
2144 /// An immediate integer operand that determines which bits are extracted: \n
2145 /// 0: Bits [15:0] are copied to the destination. \n
2146 /// 1: Bits [31:16] are copied to the destination. \n
2147 /// 2: Bits [47:32] are copied to the destination. \n
2148 /// 3: Bits [63:48] are copied to the destination.
2149 /// \returns A 16-bit integer containing the extracted 16 bits of packed data.
2150 #define _mm_extract_pi16(a, n) __extension__ ({ \
2151 (int)__builtin_ia32_vec_ext_v4hi((__m64)a, (int)n); })
2153 /// \brief Copies data from the 64-bit vector of [4 x i16] to the destination,
2154 /// and inserts the lower 16-bits of an integer operand at the 16-bit offset
2155 /// specified by the immediate operand \a n.
2157 /// \headerfile <x86intrin.h>
2160 /// void _mm_insert_pi(__m64 a, int d, int n);
2163 /// This intrinsic corresponds to the <c> VPINSRW / PINSRW </c> instruction.
2166 /// A 64-bit vector of [4 x i16].
2168 /// An integer. The lower 16-bit value from this operand is written to the
2169 /// destination at the offset specified by operand \a n.
2171 /// An immediate integer operant that determines which the bits to be used
2172 /// in the destination. \n
2173 /// 0: Bits [15:0] are copied to the destination. \n
2174 /// 1: Bits [31:16] are copied to the destination. \n
2175 /// 2: Bits [47:32] are copied to the destination. \n
2176 /// 3: Bits [63:48] are copied to the destination. \n
2177 /// The remaining bits in the destination are copied from the corresponding
2178 /// bits in operand \a a.
2179 /// \returns A 64-bit integer vector containing the copied packed data from the
2181 #define _mm_insert_pi16(a, d, n) __extension__ ({ \
2182 (__m64)__builtin_ia32_vec_set_v4hi((__m64)a, (int)d, (int)n); })
2184 /// \brief Compares each of the corresponding packed 16-bit integer values of
2185 /// the 64-bit integer vectors, and writes the greater value to the
2186 /// corresponding bits in the destination.
2188 /// \headerfile <x86intrin.h>
2190 /// This intrinsic corresponds to the <c> PMAXSW </c> instruction.
2193 /// A 64-bit integer vector containing one of the source operands.
2195 /// A 64-bit integer vector containing one of the source operands.
2196 /// \returns A 64-bit integer vector containing the comparison results.
2197 static __inline__ __m64 __DEFAULT_FN_ATTRS
2198 _mm_max_pi16(__m64 __a, __m64 __b)
2200 return (__m64)__builtin_ia32_pmaxsw((__v4hi)__a, (__v4hi)__b);
2203 /// \brief Compares each of the corresponding packed 8-bit unsigned integer
2204 /// values of the 64-bit integer vectors, and writes the greater value to the
2205 /// corresponding bits in the destination.
2207 /// \headerfile <x86intrin.h>
2209 /// This intrinsic corresponds to the <c> PMAXUB </c> instruction.
2212 /// A 64-bit integer vector containing one of the source operands.
2214 /// A 64-bit integer vector containing one of the source operands.
2215 /// \returns A 64-bit integer vector containing the comparison results.
2216 static __inline__ __m64 __DEFAULT_FN_ATTRS
2217 _mm_max_pu8(__m64 __a, __m64 __b)
2219 return (__m64)__builtin_ia32_pmaxub((__v8qi)__a, (__v8qi)__b);
2222 /// \brief Compares each of the corresponding packed 16-bit integer values of
2223 /// the 64-bit integer vectors, and writes the lesser value to the
2224 /// corresponding bits in the destination.
2226 /// \headerfile <x86intrin.h>
2228 /// This intrinsic corresponds to the <c> PMINSW </c> instruction.
2231 /// A 64-bit integer vector containing one of the source operands.
2233 /// A 64-bit integer vector containing one of the source operands.
2234 /// \returns A 64-bit integer vector containing the comparison results.
2235 static __inline__ __m64 __DEFAULT_FN_ATTRS
2236 _mm_min_pi16(__m64 __a, __m64 __b)
2238 return (__m64)__builtin_ia32_pminsw((__v4hi)__a, (__v4hi)__b);
2241 /// \brief Compares each of the corresponding packed 8-bit unsigned integer
2242 /// values of the 64-bit integer vectors, and writes the lesser value to the
2243 /// corresponding bits in the destination.
2245 /// \headerfile <x86intrin.h>
2247 /// This intrinsic corresponds to the <c> PMINUB </c> instruction.
2250 /// A 64-bit integer vector containing one of the source operands.
2252 /// A 64-bit integer vector containing one of the source operands.
2253 /// \returns A 64-bit integer vector containing the comparison results.
2254 static __inline__ __m64 __DEFAULT_FN_ATTRS
2255 _mm_min_pu8(__m64 __a, __m64 __b)
2257 return (__m64)__builtin_ia32_pminub((__v8qi)__a, (__v8qi)__b);
2260 /// \brief Takes the most significant bit from each 8-bit element in a 64-bit
2261 /// integer vector to create a 16-bit mask value. Zero-extends the value to
2262 /// 32-bit integer and writes it to the destination.
2264 /// \headerfile <x86intrin.h>
2266 /// This intrinsic corresponds to the <c> PMOVMSKB </c> instruction.
2269 /// A 64-bit integer vector containing the values with bits to be extracted.
2270 /// \returns The most significant bit from each 8-bit element in the operand,
2271 /// written to bits [15:0].
2272 static __inline__ int __DEFAULT_FN_ATTRS
2273 _mm_movemask_pi8(__m64 __a)
2275 return __builtin_ia32_pmovmskb((__v8qi)__a);
2278 /// \brief Multiplies packed 16-bit unsigned integer values and writes the
2279 /// high-order 16 bits of each 32-bit product to the corresponding bits in
2280 /// the destination.
2282 /// \headerfile <x86intrin.h>
2284 /// This intrinsic corresponds to the <c> PMULHUW </c> instruction.
2287 /// A 64-bit integer vector containing one of the source operands.
2289 /// A 64-bit integer vector containing one of the source operands.
2290 /// \returns A 64-bit integer vector containing the products of both operands.
2291 static __inline__ __m64 __DEFAULT_FN_ATTRS
2292 _mm_mulhi_pu16(__m64 __a, __m64 __b)
2294 return (__m64)__builtin_ia32_pmulhuw((__v4hi)__a, (__v4hi)__b);
2297 /// \brief Shuffles the 4 16-bit integers from a 64-bit integer vector to the
2298 /// destination, as specified by the immediate value operand.
2300 /// \headerfile <x86intrin.h>
2303 /// __m64 _mm_shuffle_pi16(__m64 a, const int n);
2306 /// This intrinsic corresponds to the <c> PSHUFW </c> instruction.
2309 /// A 64-bit integer vector containing the values to be shuffled.
2311 /// An immediate value containing an 8-bit value specifying which elements to
2312 /// copy from \a a. The destinations within the 64-bit destination are
2313 /// assigned values as follows: \n
2314 /// Bits [1:0] are used to assign values to bits [15:0] in the
2316 /// Bits [3:2] are used to assign values to bits [31:16] in the
2318 /// Bits [5:4] are used to assign values to bits [47:32] in the
2320 /// Bits [7:6] are used to assign values to bits [63:48] in the
2322 /// Bit value assignments: \n
2323 /// 00: assigned from bits [15:0] of \a a. \n
2324 /// 01: assigned from bits [31:16] of \a a. \n
2325 /// 10: assigned from bits [47:32] of \a a. \n
2326 /// 11: assigned from bits [63:48] of \a a.
2327 /// \returns A 64-bit integer vector containing the shuffled values.
2328 #define _mm_shuffle_pi16(a, n) __extension__ ({ \
2329 (__m64)__builtin_ia32_pshufw((__v4hi)(__m64)(a), (n)); })
2331 /// \brief Conditionally copies the values from each 8-bit element in the first
2332 /// 64-bit integer vector operand to the specified memory location, as
2333 /// specified by the most significant bit in the corresponding element in the
2334 /// second 64-bit integer vector operand. To minimize caching, the data is
2335 /// flagged as non-temporal (unlikely to be used again soon).
2337 /// \headerfile <x86intrin.h>
2339 /// This intrinsic corresponds to the <c> MASKMOVQ </c> instruction.
2342 /// A 64-bit integer vector containing the values with elements to be copied.
2344 /// A 64-bit integer vector operand. The most significant bit from each 8-bit
2345 /// element determines whether the corresponding element in operand \a __d
2346 /// is copied. If the most significant bit of a given element is 1, the
2347 /// corresponding element in operand \a __d is copied.
2349 /// A pointer to a 64-bit memory location that will receive the conditionally
2350 /// copied integer values. The address of the memory location does not have
2352 static __inline__ void __DEFAULT_FN_ATTRS
2353 _mm_maskmove_si64(__m64 __d, __m64 __n, char *__p)
2355 __builtin_ia32_maskmovq((__v8qi)__d, (__v8qi)__n, __p);
2358 /// \brief Computes the rounded averages of the packed unsigned 8-bit integer
2359 /// values and writes the averages to the corresponding bits in the
2362 /// \headerfile <x86intrin.h>
2364 /// This intrinsic corresponds to the <c> PAVGB </c> instruction.
2367 /// A 64-bit integer vector containing one of the source operands.
2369 /// A 64-bit integer vector containing one of the source operands.
2370 /// \returns A 64-bit integer vector containing the averages of both operands.
2371 static __inline__ __m64 __DEFAULT_FN_ATTRS
2372 _mm_avg_pu8(__m64 __a, __m64 __b)
2374 return (__m64)__builtin_ia32_pavgb((__v8qi)__a, (__v8qi)__b);
2377 /// \brief Computes the rounded averages of the packed unsigned 16-bit integer
2378 /// values and writes the averages to the corresponding bits in the
2381 /// \headerfile <x86intrin.h>
2383 /// This intrinsic corresponds to the <c> PAVGW </c> instruction.
2386 /// A 64-bit integer vector containing one of the source operands.
2388 /// A 64-bit integer vector containing one of the source operands.
2389 /// \returns A 64-bit integer vector containing the averages of both operands.
2390 static __inline__ __m64 __DEFAULT_FN_ATTRS
2391 _mm_avg_pu16(__m64 __a, __m64 __b)
2393 return (__m64)__builtin_ia32_pavgw((__v4hi)__a, (__v4hi)__b);
2396 /// \brief Subtracts the corresponding 8-bit unsigned integer values of the two
2397 /// 64-bit vector operands and computes the absolute value for each of the
2398 /// difference. Then sum of the 8 absolute differences is written to the
2399 /// bits [15:0] of the destination; the remaining bits [63:16] are cleared.
2401 /// \headerfile <x86intrin.h>
2403 /// This intrinsic corresponds to the <c> PSADBW </c> instruction.
2406 /// A 64-bit integer vector containing one of the source operands.
2408 /// A 64-bit integer vector containing one of the source operands.
2409 /// \returns A 64-bit integer vector whose lower 16 bits contain the sums of the
2410 /// sets of absolute differences between both operands. The upper bits are
2412 static __inline__ __m64 __DEFAULT_FN_ATTRS
2413 _mm_sad_pu8(__m64 __a, __m64 __b)
2415 return (__m64)__builtin_ia32_psadbw((__v8qi)__a, (__v8qi)__b);
2418 #if defined(__cplusplus)
2422 /// \brief Returns the contents of the MXCSR register as a 32-bit unsigned
2425 /// There are several groups of macros associated with this
2426 /// intrinsic, including:
2429 /// For checking exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
2430 /// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
2431 /// _MM_EXCEPT_INEXACT. There is a convenience wrapper
2432 /// _MM_GET_EXCEPTION_STATE().
2435 /// For checking exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
2436 /// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
2437 /// There is a convenience wrapper _MM_GET_EXCEPTION_MASK().
2440 /// For checking rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
2441 /// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
2442 /// _MM_GET_ROUNDING_MODE(x) where x is one of these macros.
2445 /// For checking flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
2446 /// There is a convenience wrapper _MM_GET_FLUSH_ZERO_MODE().
2449 /// For checking denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
2450 /// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
2451 /// _MM_GET_DENORMALS_ZERO_MODE().
2455 /// For example, the expression below checks if an overflow exception has
2457 /// ( _mm_getcsr() & _MM_EXCEPT_OVERFLOW )
2459 /// The following example gets the current rounding mode:
2460 /// _MM_GET_ROUNDING_MODE()
2462 /// \headerfile <x86intrin.h>
2464 /// This intrinsic corresponds to the <c> VSTMXCSR / STMXCSR </c> instruction.
2466 /// \returns A 32-bit unsigned integer containing the contents of the MXCSR
2468 unsigned int _mm_getcsr(void);
2470 /// \brief Sets the MXCSR register with the 32-bit unsigned integer value.
2472 /// There are several groups of macros associated with this intrinsic,
2476 /// For setting exception states: _MM_EXCEPT_INVALID, _MM_EXCEPT_DIV_ZERO,
2477 /// _MM_EXCEPT_DENORM, _MM_EXCEPT_OVERFLOW, _MM_EXCEPT_UNDERFLOW,
2478 /// _MM_EXCEPT_INEXACT. There is a convenience wrapper
2479 /// _MM_SET_EXCEPTION_STATE(x) where x is one of these macros.
2482 /// For setting exception masks: _MM_MASK_UNDERFLOW, _MM_MASK_OVERFLOW,
2483 /// _MM_MASK_INVALID, _MM_MASK_DENORM, _MM_MASK_DIV_ZERO, _MM_MASK_INEXACT.
2484 /// There is a convenience wrapper _MM_SET_EXCEPTION_MASK(x) where x is one
2485 /// of these macros.
2488 /// For setting rounding modes: _MM_ROUND_NEAREST, _MM_ROUND_DOWN,
2489 /// _MM_ROUND_UP, _MM_ROUND_TOWARD_ZERO. There is a convenience wrapper
2490 /// _MM_SET_ROUNDING_MODE(x) where x is one of these macros.
2493 /// For setting flush-to-zero mode: _MM_FLUSH_ZERO_ON, _MM_FLUSH_ZERO_OFF.
2494 /// There is a convenience wrapper _MM_SET_FLUSH_ZERO_MODE(x) where x is
2495 /// one of these macros.
2498 /// For setting denormals-are-zero mode: _MM_DENORMALS_ZERO_ON,
2499 /// _MM_DENORMALS_ZERO_OFF. There is a convenience wrapper
2500 /// _MM_SET_DENORMALS_ZERO_MODE(x) where x is one of these macros.
2504 /// For example, the following expression causes subsequent floating-point
2505 /// operations to round up:
2506 /// _mm_setcsr(_mm_getcsr() | _MM_ROUND_UP)
2508 /// The following example sets the DAZ and FTZ flags:
2509 /// void setFlags() {
2510 /// _MM_SET_FLUSH_ZERO_MODE(_MM_FLUSH_ZERO_ON)
2511 /// _MM_SET_DENORMALS_ZERO_MODE(_MM_DENORMALS_ZERO_ON)
2514 /// \headerfile <x86intrin.h>
2516 /// This intrinsic corresponds to the <c> VLDMXCSR / LDMXCSR </c> instruction.
2519 /// A 32-bit unsigned integer value to be written to the MXCSR register.
2520 void _mm_setcsr(unsigned int __i);
2522 #if defined(__cplusplus)
2526 /// \brief Selects 4 float values from the 128-bit operands of [4 x float], as
2527 /// specified by the immediate value operand.
2529 /// \headerfile <x86intrin.h>
2532 /// __m128 _mm_shuffle_ps(__m128 a, __m128 b, const int mask);
2535 /// This intrinsic corresponds to the <c> VSHUFPS / SHUFPS </c> instruction.
2538 /// A 128-bit vector of [4 x float].
2540 /// A 128-bit vector of [4 x float].
2542 /// An immediate value containing an 8-bit value specifying which elements to
2543 /// copy from \a a and \a b. \n
2544 /// Bits [3:0] specify the values copied from operand \a a. \n
2545 /// Bits [7:4] specify the values copied from operand \a b. \n
2546 /// The destinations within the 128-bit destination are assigned values as
2548 /// Bits [1:0] are used to assign values to bits [31:0] in the
2550 /// Bits [3:2] are used to assign values to bits [63:32] in the
2552 /// Bits [5:4] are used to assign values to bits [95:64] in the
2554 /// Bits [7:6] are used to assign values to bits [127:96] in the
2556 /// Bit value assignments: \n
2557 /// 00: Bits [31:0] copied from the specified operand. \n
2558 /// 01: Bits [63:32] copied from the specified operand. \n
2559 /// 10: Bits [95:64] copied from the specified operand. \n
2560 /// 11: Bits [127:96] copied from the specified operand.
2561 /// \returns A 128-bit vector of [4 x float] containing the shuffled values.
2562 #define _mm_shuffle_ps(a, b, mask) __extension__ ({ \
2563 (__m128)__builtin_shufflevector((__v4sf)(__m128)(a), (__v4sf)(__m128)(b), \
2564 0 + (((mask) >> 0) & 0x3), \
2565 0 + (((mask) >> 2) & 0x3), \
2566 4 + (((mask) >> 4) & 0x3), \
2567 4 + (((mask) >> 6) & 0x3)); })
2569 /// \brief Unpacks the high-order (index 2,3) values from two 128-bit vectors of
2570 /// [4 x float] and interleaves them into a 128-bit vector of [4 x float].
2572 /// \headerfile <x86intrin.h>
2574 /// This intrinsic corresponds to the <c> VUNPCKHPS / UNPCKHPS </c> instruction.
2577 /// A 128-bit vector of [4 x float]. \n
2578 /// Bits [95:64] are written to bits [31:0] of the destination. \n
2579 /// Bits [127:96] are written to bits [95:64] of the destination.
2581 /// A 128-bit vector of [4 x float].
2582 /// Bits [95:64] are written to bits [63:32] of the destination. \n
2583 /// Bits [127:96] are written to bits [127:96] of the destination.
2584 /// \returns A 128-bit vector of [4 x float] containing the interleaved values.
2585 static __inline__ __m128 __DEFAULT_FN_ATTRS
2586 _mm_unpackhi_ps(__m128 __a, __m128 __b)
2588 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 2, 6, 3, 7);
2591 /// \brief Unpacks the low-order (index 0,1) values from two 128-bit vectors of
2592 /// [4 x float] and interleaves them into a 128-bit vector of [4 x float].
2594 /// \headerfile <x86intrin.h>
2596 /// This intrinsic corresponds to the <c> VUNPCKLPS / UNPCKLPS </c> instruction.
2599 /// A 128-bit vector of [4 x float]. \n
2600 /// Bits [31:0] are written to bits [31:0] of the destination. \n
2601 /// Bits [63:32] are written to bits [95:64] of the destination.
2603 /// A 128-bit vector of [4 x float]. \n
2604 /// Bits [31:0] are written to bits [63:32] of the destination. \n
2605 /// Bits [63:32] are written to bits [127:96] of the destination.
2606 /// \returns A 128-bit vector of [4 x float] containing the interleaved values.
2607 static __inline__ __m128 __DEFAULT_FN_ATTRS
2608 _mm_unpacklo_ps(__m128 __a, __m128 __b)
2610 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 4, 1, 5);
2613 /// \brief Constructs a 128-bit floating-point vector of [4 x float]. The lower
2614 /// 32 bits are set to the lower 32 bits of the second parameter. The upper
2615 /// 96 bits are set to the upper 96 bits of the first parameter.
2617 /// \headerfile <x86intrin.h>
2619 /// This intrinsic corresponds to the <c> VMOVSS / MOVSS </c> instruction.
2622 /// A 128-bit floating-point vector of [4 x float]. The upper 96 bits are
2623 /// written to the upper 96 bits of the result.
2625 /// A 128-bit floating-point vector of [4 x float]. The lower 32 bits are
2626 /// written to the lower 32 bits of the result.
2627 /// \returns A 128-bit floating-point vector of [4 x float].
2628 static __inline__ __m128 __DEFAULT_FN_ATTRS
2629 _mm_move_ss(__m128 __a, __m128 __b)
2631 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 4, 1, 2, 3);
2634 /// \brief Constructs a 128-bit floating-point vector of [4 x float]. The lower
2635 /// 64 bits are set to the upper 64 bits of the second parameter. The upper
2636 /// 64 bits are set to the upper 64 bits of the first parameter.
2638 /// \headerfile <x86intrin.h>
2640 /// This intrinsic corresponds to the <c> VUNPCKHPD / UNPCKHPD </c> instruction.
2643 /// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are
2644 /// written to the upper 64 bits of the result.
2646 /// A 128-bit floating-point vector of [4 x float]. The upper 64 bits are
2647 /// written to the lower 64 bits of the result.
2648 /// \returns A 128-bit floating-point vector of [4 x float].
2649 static __inline__ __m128 __DEFAULT_FN_ATTRS
2650 _mm_movehl_ps(__m128 __a, __m128 __b)
2652 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 6, 7, 2, 3);
2655 /// \brief Constructs a 128-bit floating-point vector of [4 x float]. The lower
2656 /// 64 bits are set to the lower 64 bits of the first parameter. The upper
2657 /// 64 bits are set to the lower 64 bits of the second parameter.
2659 /// \headerfile <x86intrin.h>
2661 /// This intrinsic corresponds to the <c> VUNPCKLPD / UNPCKLPD </c> instruction.
2664 /// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are
2665 /// written to the lower 64 bits of the result.
2667 /// A 128-bit floating-point vector of [4 x float]. The lower 64 bits are
2668 /// written to the upper 64 bits of the result.
2669 /// \returns A 128-bit floating-point vector of [4 x float].
2670 static __inline__ __m128 __DEFAULT_FN_ATTRS
2671 _mm_movelh_ps(__m128 __a, __m128 __b)
2673 return __builtin_shufflevector((__v4sf)__a, (__v4sf)__b, 0, 1, 4, 5);
2676 /// \brief Converts a 64-bit vector of [4 x i16] into a 128-bit vector of [4 x
2679 /// \headerfile <x86intrin.h>
2681 /// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c>
2685 /// A 64-bit vector of [4 x i16]. The elements of the destination are copied
2686 /// from the corresponding elements in this operand.
2687 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2688 /// values from the operand.
2689 static __inline__ __m128 __DEFAULT_FN_ATTRS
2690 _mm_cvtpi16_ps(__m64 __a)
2695 __b = _mm_setzero_si64();
2696 __b = _mm_cmpgt_pi16(__b, __a);
2697 __c = _mm_unpackhi_pi16(__a, __b);
2698 __r = _mm_setzero_ps();
2699 __r = _mm_cvtpi32_ps(__r, __c);
2700 __r = _mm_movelh_ps(__r, __r);
2701 __c = _mm_unpacklo_pi16(__a, __b);
2702 __r = _mm_cvtpi32_ps(__r, __c);
2707 /// \brief Converts a 64-bit vector of 16-bit unsigned integer values into a
2708 /// 128-bit vector of [4 x float].
2710 /// \headerfile <x86intrin.h>
2712 /// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c>
2716 /// A 64-bit vector of 16-bit unsigned integer values. The elements of the
2717 /// destination are copied from the corresponding elements in this operand.
2718 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2719 /// values from the operand.
2720 static __inline__ __m128 __DEFAULT_FN_ATTRS
2721 _mm_cvtpu16_ps(__m64 __a)
2726 __b = _mm_setzero_si64();
2727 __c = _mm_unpackhi_pi16(__a, __b);
2728 __r = _mm_setzero_ps();
2729 __r = _mm_cvtpi32_ps(__r, __c);
2730 __r = _mm_movelh_ps(__r, __r);
2731 __c = _mm_unpacklo_pi16(__a, __b);
2732 __r = _mm_cvtpi32_ps(__r, __c);
2737 /// \brief Converts the lower four 8-bit values from a 64-bit vector of [8 x i8]
2738 /// into a 128-bit vector of [4 x float].
2740 /// \headerfile <x86intrin.h>
2742 /// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c>
2746 /// A 64-bit vector of [8 x i8]. The elements of the destination are copied
2747 /// from the corresponding lower 4 elements in this operand.
2748 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2749 /// values from the operand.
2750 static __inline__ __m128 __DEFAULT_FN_ATTRS
2751 _mm_cvtpi8_ps(__m64 __a)
2755 __b = _mm_setzero_si64();
2756 __b = _mm_cmpgt_pi8(__b, __a);
2757 __b = _mm_unpacklo_pi8(__a, __b);
2759 return _mm_cvtpi16_ps(__b);
2762 /// \brief Converts the lower four unsigned 8-bit integer values from a 64-bit
2763 /// vector of [8 x u8] into a 128-bit vector of [4 x float].
2765 /// \headerfile <x86intrin.h>
2767 /// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c>
2771 /// A 64-bit vector of unsigned 8-bit integer values. The elements of the
2772 /// destination are copied from the corresponding lower 4 elements in this
2774 /// \returns A 128-bit vector of [4 x float] containing the copied and converted
2775 /// values from the source operand.
2776 static __inline__ __m128 __DEFAULT_FN_ATTRS
2777 _mm_cvtpu8_ps(__m64 __a)
2781 __b = _mm_setzero_si64();
2782 __b = _mm_unpacklo_pi8(__a, __b);
2784 return _mm_cvtpi16_ps(__b);
2787 /// \brief Converts the two 32-bit signed integer values from each 64-bit vector
2788 /// operand of [2 x i32] into a 128-bit vector of [4 x float].
2790 /// \headerfile <x86intrin.h>
2792 /// This intrinsic corresponds to the <c> CVTPI2PS + \c COMPOSITE </c>
2796 /// A 64-bit vector of [2 x i32]. The lower elements of the destination are
2797 /// copied from the elements in this operand.
2799 /// A 64-bit vector of [2 x i32]. The upper elements of the destination are
2800 /// copied from the elements in this operand.
2801 /// \returns A 128-bit vector of [4 x float] whose lower 64 bits contain the
2802 /// copied and converted values from the first operand. The upper 64 bits
2803 /// contain the copied and converted values from the second operand.
2804 static __inline__ __m128 __DEFAULT_FN_ATTRS
2805 _mm_cvtpi32x2_ps(__m64 __a, __m64 __b)
2809 __c = _mm_setzero_ps();
2810 __c = _mm_cvtpi32_ps(__c, __b);
2811 __c = _mm_movelh_ps(__c, __c);
2813 return _mm_cvtpi32_ps(__c, __a);
2816 /// \brief Converts each single-precision floating-point element of a 128-bit
2817 /// floating-point vector of [4 x float] into a 16-bit signed integer, and
2818 /// packs the results into a 64-bit integer vector of [4 x i16]. If the
2819 /// floating-point element is NaN or infinity, or if the floating-point
2820 /// element is greater than 0x7FFFFFFF or less than -0x8000, it is converted
2821 /// to 0x8000. Otherwise if the floating-point element is greater than
2822 /// 0x7FFF, it is converted to 0x7FFF.
2824 /// \headerfile <x86intrin.h>
2826 /// This intrinsic corresponds to the <c> CVTPS2PI + \c COMPOSITE </c>
2830 /// A 128-bit floating-point vector of [4 x float].
2831 /// \returns A 64-bit integer vector of [4 x i16] containing the converted
2833 static __inline__ __m64 __DEFAULT_FN_ATTRS
2834 _mm_cvtps_pi16(__m128 __a)
2838 __b = _mm_cvtps_pi32(__a);
2839 __a = _mm_movehl_ps(__a, __a);
2840 __c = _mm_cvtps_pi32(__a);
2842 return _mm_packs_pi32(__b, __c);
2845 /// \brief Converts each single-precision floating-point element of a 128-bit
2846 /// floating-point vector of [4 x float] into an 8-bit signed integer, and
2847 /// packs the results into the lower 32 bits of a 64-bit integer vector of
2848 /// [8 x i8]. The upper 32 bits of the vector are set to 0. If the
2849 /// floating-point element is NaN or infinity, or if the floating-point
2850 /// element is greater than 0x7FFFFFFF or less than -0x80, it is converted
2851 /// to 0x80. Otherwise if the floating-point element is greater than 0x7F,
2852 /// it is converted to 0x7F.
2854 /// \headerfile <x86intrin.h>
2856 /// This intrinsic corresponds to the <c> CVTPS2PI + \c COMPOSITE </c>
2860 /// 128-bit floating-point vector of [4 x float].
2861 /// \returns A 64-bit integer vector of [8 x i8]. The lower 32 bits contain the
2862 /// converted values and the uppper 32 bits are set to zero.
2863 static __inline__ __m64 __DEFAULT_FN_ATTRS
2864 _mm_cvtps_pi8(__m128 __a)
2868 __b = _mm_cvtps_pi16(__a);
2869 __c = _mm_setzero_si64();
2871 return _mm_packs_pi16(__b, __c);
2874 /// \brief Extracts the sign bits from each single-precision floating-point
2875 /// element of a 128-bit floating-point vector of [4 x float] and returns the
2876 /// sign bits in bits [0:3] of the result. Bits [31:4] of the result are set
2879 /// \headerfile <x86intrin.h>
2881 /// This intrinsic corresponds to the <c> VMOVMSKPS / MOVMSKPS </c> instruction.
2884 /// A 128-bit floating-point vector of [4 x float].
2885 /// \returns A 32-bit integer value. Bits [3:0] contain the sign bits from each
2886 /// single-precision floating-point element of the parameter. Bits [31:4] are
2888 static __inline__ int __DEFAULT_FN_ATTRS
2889 _mm_movemask_ps(__m128 __a)
2891 return __builtin_ia32_movmskps((__v4sf)__a);
2895 #define _MM_ALIGN16 __attribute__((aligned(16)))
2897 #define _MM_SHUFFLE(z, y, x, w) (((z) << 6) | ((y) << 4) | ((x) << 2) | (w))
2899 #define _MM_EXCEPT_INVALID (0x0001)
2900 #define _MM_EXCEPT_DENORM (0x0002)
2901 #define _MM_EXCEPT_DIV_ZERO (0x0004)
2902 #define _MM_EXCEPT_OVERFLOW (0x0008)
2903 #define _MM_EXCEPT_UNDERFLOW (0x0010)
2904 #define _MM_EXCEPT_INEXACT (0x0020)
2905 #define _MM_EXCEPT_MASK (0x003f)
2907 #define _MM_MASK_INVALID (0x0080)
2908 #define _MM_MASK_DENORM (0x0100)
2909 #define _MM_MASK_DIV_ZERO (0x0200)
2910 #define _MM_MASK_OVERFLOW (0x0400)
2911 #define _MM_MASK_UNDERFLOW (0x0800)
2912 #define _MM_MASK_INEXACT (0x1000)
2913 #define _MM_MASK_MASK (0x1f80)
2915 #define _MM_ROUND_NEAREST (0x0000)
2916 #define _MM_ROUND_DOWN (0x2000)
2917 #define _MM_ROUND_UP (0x4000)
2918 #define _MM_ROUND_TOWARD_ZERO (0x6000)
2919 #define _MM_ROUND_MASK (0x6000)
2921 #define _MM_FLUSH_ZERO_MASK (0x8000)
2922 #define _MM_FLUSH_ZERO_ON (0x8000)
2923 #define _MM_FLUSH_ZERO_OFF (0x0000)
2925 #define _MM_GET_EXCEPTION_MASK() (_mm_getcsr() & _MM_MASK_MASK)
2926 #define _MM_GET_EXCEPTION_STATE() (_mm_getcsr() & _MM_EXCEPT_MASK)
2927 #define _MM_GET_FLUSH_ZERO_MODE() (_mm_getcsr() & _MM_FLUSH_ZERO_MASK)
2928 #define _MM_GET_ROUNDING_MODE() (_mm_getcsr() & _MM_ROUND_MASK)
2930 #define _MM_SET_EXCEPTION_MASK(x) (_mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x)))
2931 #define _MM_SET_EXCEPTION_STATE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_EXCEPT_MASK) | (x)))
2932 #define _MM_SET_FLUSH_ZERO_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x)))
2933 #define _MM_SET_ROUNDING_MODE(x) (_mm_setcsr((_mm_getcsr() & ~_MM_ROUND_MASK) | (x)))
2935 #define _MM_TRANSPOSE4_PS(row0, row1, row2, row3) \
2937 __m128 tmp3, tmp2, tmp1, tmp0; \
2938 tmp0 = _mm_unpacklo_ps((row0), (row1)); \
2939 tmp2 = _mm_unpacklo_ps((row2), (row3)); \
2940 tmp1 = _mm_unpackhi_ps((row0), (row1)); \
2941 tmp3 = _mm_unpackhi_ps((row2), (row3)); \
2942 (row0) = _mm_movelh_ps(tmp0, tmp2); \
2943 (row1) = _mm_movehl_ps(tmp2, tmp0); \
2944 (row2) = _mm_movelh_ps(tmp1, tmp3); \
2945 (row3) = _mm_movehl_ps(tmp3, tmp1); \
2948 /* Aliases for compatibility. */
2949 #define _m_pextrw _mm_extract_pi16
2950 #define _m_pinsrw _mm_insert_pi16
2951 #define _m_pmaxsw _mm_max_pi16
2952 #define _m_pmaxub _mm_max_pu8
2953 #define _m_pminsw _mm_min_pi16
2954 #define _m_pminub _mm_min_pu8
2955 #define _m_pmovmskb _mm_movemask_pi8
2956 #define _m_pmulhuw _mm_mulhi_pu16
2957 #define _m_pshufw _mm_shuffle_pi16
2958 #define _m_maskmovq _mm_maskmove_si64
2959 #define _m_pavgb _mm_avg_pu8
2960 #define _m_pavgw _mm_avg_pu16
2961 #define _m_psadbw _mm_sad_pu8
2965 #undef __DEFAULT_FN_ATTRS
2967 /* Ugly hack for backwards-compatibility (compatible with gcc) */
2968 #if defined(__SSE2__) && !__building_module(_Builtin_intrinsics)
2969 #include <emmintrin.h>
2972 #endif /* __XMMINTRIN_H */