1 //===- MIPS.cpp -----------------------------------------------------------===//
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "InputFiles.h"
11 #include "OutputSections.h"
13 #include "SyntheticSections.h"
16 #include "lld/Common/ErrorHandler.h"
17 #include "llvm/Object/ELF.h"
18 #include "llvm/Support/Endian.h"
21 using namespace llvm::object;
22 using namespace llvm::support::endian;
23 using namespace llvm::ELF;
25 using namespace lld::elf;
28 template <class ELFT> class MIPS final : public TargetInfo {
31 uint32_t calcEFlags() const override;
32 RelExpr getRelExpr(RelType Type, const Symbol &S,
33 const uint8_t *Loc) const override;
34 int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const override;
35 bool isPicRel(RelType Type) const override;
36 RelType getDynRel(RelType Type) const override;
37 void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
38 void writePltHeader(uint8_t *Buf) const override;
39 void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
40 int32_t Index, unsigned RelOff) const override;
41 bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
42 uint64_t BranchAddr, const Symbol &S) const override;
43 void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
44 bool usesOnlyLowPageBits(RelType Type) const override;
48 template <class ELFT> MIPS<ELFT>::MIPS() {
49 GotPltHeaderEntriesNum = 2;
50 DefaultMaxPageSize = 65536;
51 GotEntrySize = sizeof(typename ELFT::uint);
52 GotPltEntrySize = sizeof(typename ELFT::uint);
55 CopyRel = R_MIPS_COPY;
56 PltRel = R_MIPS_JUMP_SLOT;
58 TrapInstr = 0xefefefef;
61 RelativeRel = (R_MIPS_64 << 8) | R_MIPS_REL32;
62 TlsGotRel = R_MIPS_TLS_TPREL64;
63 TlsModuleIndexRel = R_MIPS_TLS_DTPMOD64;
64 TlsOffsetRel = R_MIPS_TLS_DTPREL64;
66 RelativeRel = R_MIPS_REL32;
67 TlsGotRel = R_MIPS_TLS_TPREL32;
68 TlsModuleIndexRel = R_MIPS_TLS_DTPMOD32;
69 TlsOffsetRel = R_MIPS_TLS_DTPREL32;
73 template <class ELFT> uint32_t MIPS<ELFT>::calcEFlags() const {
74 return calcMipsEFlags<ELFT>();
78 RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
79 const uint8_t *Loc) const {
80 // See comment in the calculateMipsRelChain.
81 if (ELFT::Is64Bits || Config->MipsN32Abi)
86 case R_MICROMIPS_JALR:
90 case R_MICROMIPS_GPREL16:
91 case R_MICROMIPS_GPREL7_S2:
94 case R_MICROMIPS_26_S1:
96 case R_MICROMIPS_PC26_S1:
102 case R_MICROMIPS_HI16:
103 case R_MICROMIPS_LO16:
104 case R_MICROMIPS_HIGHER:
105 case R_MICROMIPS_HIGHEST:
106 // R_MIPS_HI16/R_MIPS_LO16 relocations against _gp_disp calculate
107 // offset between start of function and 'gp' value which by default
108 // equal to the start of .got section. In that case we consider these
109 // relocations as relative.
110 if (&S == ElfSym::MipsGpDisp)
111 return R_MIPS_GOT_GP_PC;
112 if (&S == ElfSym::MipsLocalGp)
113 return R_MIPS_GOT_GP;
117 case R_MIPS_GOT_OFST:
119 case R_MIPS_TLS_DTPREL_HI16:
120 case R_MIPS_TLS_DTPREL_LO16:
121 case R_MIPS_TLS_DTPREL32:
122 case R_MIPS_TLS_DTPREL64:
123 case R_MIPS_TLS_TPREL_HI16:
124 case R_MIPS_TLS_TPREL_LO16:
125 case R_MIPS_TLS_TPREL32:
126 case R_MIPS_TLS_TPREL64:
127 case R_MICROMIPS_GOT_OFST:
128 case R_MICROMIPS_SUB:
129 case R_MICROMIPS_TLS_DTPREL_HI16:
130 case R_MICROMIPS_TLS_DTPREL_LO16:
131 case R_MICROMIPS_TLS_TPREL_HI16:
132 case R_MICROMIPS_TLS_TPREL_LO16:
141 case R_MICROMIPS_PC7_S1:
142 case R_MICROMIPS_PC10_S1:
143 case R_MICROMIPS_PC16_S1:
144 case R_MICROMIPS_PC18_S3:
145 case R_MICROMIPS_PC19_S2:
146 case R_MICROMIPS_PC23_S2:
147 case R_MICROMIPS_PC21_S1:
150 case R_MICROMIPS_GOT16:
152 return R_MIPS_GOT_LOCAL_PAGE;
155 case R_MIPS_GOT_DISP:
156 case R_MIPS_TLS_GOTTPREL:
157 case R_MICROMIPS_CALL16:
158 case R_MICROMIPS_GOT_DISP:
159 case R_MICROMIPS_TLS_GOTTPREL:
160 return R_MIPS_GOT_OFF;
161 case R_MIPS_CALL_HI16:
162 case R_MIPS_CALL_LO16:
163 case R_MIPS_GOT_HI16:
164 case R_MIPS_GOT_LO16:
165 case R_MICROMIPS_CALL_HI16:
166 case R_MICROMIPS_CALL_LO16:
167 case R_MICROMIPS_GOT_HI16:
168 case R_MICROMIPS_GOT_LO16:
169 return R_MIPS_GOT_OFF32;
170 case R_MIPS_GOT_PAGE:
171 case R_MICROMIPS_GOT_PAGE:
172 return R_MIPS_GOT_LOCAL_PAGE;
174 case R_MICROMIPS_TLS_GD:
177 case R_MICROMIPS_TLS_LDM:
186 template <class ELFT> bool MIPS<ELFT>::isPicRel(RelType Type) const {
187 return Type == R_MIPS_32 || Type == R_MIPS_64;
190 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType Type) const {
194 template <class ELFT>
195 void MIPS<ELFT>::writeGotPlt(uint8_t *Buf, const Symbol &) const {
196 uint64_t VA = InX::Plt->getVA();
199 write32<ELFT::TargetEndianness>(Buf, VA);
202 template <endianness E> static uint32_t readShuffle(const uint8_t *Loc) {
203 // The major opcode of a microMIPS instruction needs to appear
204 // in the first 16-bit word (lowest address) for efficient hardware
205 // decode so that it knows if the instruction is 16-bit or 32-bit
206 // as early as possible. To do so, little-endian binaries keep 16-bit
207 // words in a big-endian order. That is why we have to swap these
208 // words to get a correct value.
209 uint32_t V = read32<E>(Loc);
210 if (E == support::little)
211 return (V << 16) | (V >> 16);
215 template <endianness E>
216 static void writeRelocation(uint8_t *Loc, uint64_t V, uint8_t BitsSize,
218 uint32_t Instr = read32<E>(Loc);
219 uint32_t Mask = 0xffffffff >> (32 - BitsSize);
220 uint32_t Data = (Instr & ~Mask) | ((V >> Shift) & Mask);
221 write32<E>(Loc, Data);
224 template <endianness E>
225 static void writeMicroRelocation32(uint8_t *Loc, uint64_t V, uint8_t BitsSize,
227 // See comments in readShuffle for purpose of this code.
228 uint16_t *Words = (uint16_t *)Loc;
229 if (E == support::little)
230 std::swap(Words[0], Words[1]);
232 writeRelocation<E>(Loc, V, BitsSize, Shift);
234 if (E == support::little)
235 std::swap(Words[0], Words[1]);
238 template <endianness E>
239 static void writeMicroRelocation16(uint8_t *Loc, uint64_t V, uint8_t BitsSize,
241 uint16_t Instr = read16<E>(Loc);
242 uint16_t Mask = 0xffff >> (16 - BitsSize);
243 uint16_t Data = (Instr & ~Mask) | ((V >> Shift) & Mask);
244 write16<E>(Loc, Data);
247 template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *Buf) const {
248 const endianness E = ELFT::TargetEndianness;
250 uint64_t GotPlt = InX::GotPlt->getVA();
251 uint64_t Plt = InX::Plt->getVA();
252 // Overwrite trap instructions written by Writer::writeTrapInstr.
253 memset(Buf, 0, PltHeaderSize);
255 write16<E>(Buf, isMipsR6() ? 0x7860 : 0x7980); // addiupc v1, (GOTPLT) - .
256 write16<E>(Buf + 4, 0xff23); // lw $25, 0($3)
257 write16<E>(Buf + 8, 0x0535); // subu16 $2, $2, $3
258 write16<E>(Buf + 10, 0x2525); // srl16 $2, $2, 2
259 write16<E>(Buf + 12, 0x3302); // addiu $24, $2, -2
260 write16<E>(Buf + 14, 0xfffe);
261 write16<E>(Buf + 16, 0x0dff); // move $15, $31
263 write16<E>(Buf + 18, 0x0f83); // move $28, $3
264 write16<E>(Buf + 20, 0x472b); // jalrc $25
265 write16<E>(Buf + 22, 0x0c00); // nop
266 relocateOne(Buf, R_MICROMIPS_PC19_S2, GotPlt - Plt);
268 write16<E>(Buf + 18, 0x45f9); // jalrc $25
269 write16<E>(Buf + 20, 0x0f83); // move $28, $3
270 write16<E>(Buf + 22, 0x0c00); // nop
271 relocateOne(Buf, R_MICROMIPS_PC23_S2, GotPlt - Plt);
276 if (Config->MipsN32Abi) {
277 write32<E>(Buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
278 write32<E>(Buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
279 write32<E>(Buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
280 write32<E>(Buf + 12, 0x030ec023); // subu $24, $24, $14
281 write32<E>(Buf + 16, 0x03e07825); // move $15, $31
282 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
283 } else if (ELFT::Is64Bits) {
284 write32<E>(Buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
285 write32<E>(Buf + 4, 0xddd90000); // ld $25, %lo(&GOTPLT[0])($14)
286 write32<E>(Buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
287 write32<E>(Buf + 12, 0x030ec023); // subu $24, $24, $14
288 write32<E>(Buf + 16, 0x03e07825); // move $15, $31
289 write32<E>(Buf + 20, 0x0018c0c2); // srl $24, $24, 3
291 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
292 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
293 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
294 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28
295 write32<E>(Buf + 16, 0x03e07825); // move $15, $31
296 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
299 write32<E>(Buf + 24, 0x0320f809); // jalr $25
300 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2
302 uint64_t GotPlt = InX::GotPlt->getVA();
303 writeRelocation<E>(Buf, GotPlt + 0x8000, 16, 16);
304 writeRelocation<E>(Buf + 4, GotPlt, 16, 0);
305 writeRelocation<E>(Buf + 8, GotPlt, 16, 0);
308 template <class ELFT>
309 void MIPS<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
310 uint64_t PltEntryAddr, int32_t Index,
311 unsigned RelOff) const {
312 const endianness E = ELFT::TargetEndianness;
314 // Overwrite trap instructions written by Writer::writeTrapInstr.
315 memset(Buf, 0, PltEntrySize);
318 write16<E>(Buf, 0x7840); // addiupc $2, (GOTPLT) - .
319 write16<E>(Buf + 4, 0xff22); // lw $25, 0($2)
320 write16<E>(Buf + 8, 0x0f02); // move $24, $2
321 write16<E>(Buf + 10, 0x4723); // jrc $25 / jr16 $25
322 relocateOne(Buf, R_MICROMIPS_PC19_S2, GotPltEntryAddr - PltEntryAddr);
324 write16<E>(Buf, 0x7900); // addiupc $2, (GOTPLT) - .
325 write16<E>(Buf + 4, 0xff22); // lw $25, 0($2)
326 write16<E>(Buf + 8, 0x4599); // jrc $25 / jr16 $25
327 write16<E>(Buf + 10, 0x0f02); // move $24, $2
328 relocateOne(Buf, R_MICROMIPS_PC23_S2, GotPltEntryAddr - PltEntryAddr);
333 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
334 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
335 write32<E>(Buf + 8, isMipsR6() ? 0x03200009 : 0x03200008); // jr $25
336 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
337 writeRelocation<E>(Buf, GotPltEntryAddr + 0x8000, 16, 16);
338 writeRelocation<E>(Buf + 4, GotPltEntryAddr, 16, 0);
339 writeRelocation<E>(Buf + 12, GotPltEntryAddr, 16, 0);
342 template <class ELFT>
343 bool MIPS<ELFT>::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
344 uint64_t BranchAddr, const Symbol &S) const {
345 // Any MIPS PIC code function is invoked with its address in register $t9.
346 // So if we have a branch instruction from non-PIC code to the PIC one
347 // we cannot make the jump directly and need to create a small stubs
348 // to save the target function address.
349 // See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
350 if (Type != R_MIPS_26 && Type != R_MICROMIPS_26_S1 &&
351 Type != R_MICROMIPS_PC26_S1)
353 auto *F = dyn_cast_or_null<ELFFileBase<ELFT>>(File);
356 // If current file has PIC code, LA25 stub is not required.
357 if (F->getObj().getHeader()->e_flags & EF_MIPS_PIC)
359 auto *D = dyn_cast<Defined>(&S);
360 // LA25 is required if target file has PIC code
361 // or target symbol is a PIC symbol.
362 return D && isMipsPIC<ELFT>(D);
365 template <class ELFT>
366 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, RelType Type) const {
367 const endianness E = ELFT::TargetEndianness;
371 case R_MIPS_TLS_DTPREL32:
372 case R_MIPS_TLS_TPREL32:
373 return SignExtend64<32>(read32<E>(Buf));
375 // FIXME (simon): If the relocation target symbol is not a PLT entry
376 // we should use another expression for calculation:
377 // ((A << 2) | (P & 0xf0000000)) >> 2
378 return SignExtend64<28>(read32<E>(Buf) << 2);
382 return SignExtend64<16>(read32<E>(Buf)) << 16;
386 case R_MIPS_TLS_DTPREL_HI16:
387 case R_MIPS_TLS_DTPREL_LO16:
388 case R_MIPS_TLS_TPREL_HI16:
389 case R_MIPS_TLS_TPREL_LO16:
390 return SignExtend64<16>(read32<E>(Buf));
391 case R_MICROMIPS_GOT16:
392 case R_MICROMIPS_HI16:
393 return SignExtend64<16>(readShuffle<E>(Buf)) << 16;
394 case R_MICROMIPS_GPREL16:
395 case R_MICROMIPS_LO16:
396 case R_MICROMIPS_TLS_DTPREL_HI16:
397 case R_MICROMIPS_TLS_DTPREL_LO16:
398 case R_MICROMIPS_TLS_TPREL_HI16:
399 case R_MICROMIPS_TLS_TPREL_LO16:
400 return SignExtend64<16>(readShuffle<E>(Buf));
401 case R_MICROMIPS_GPREL7_S2:
402 return SignExtend64<9>(readShuffle<E>(Buf) << 2);
404 return SignExtend64<18>(read32<E>(Buf) << 2);
406 return SignExtend64<21>(read32<E>(Buf) << 2);
408 return SignExtend64<23>(read32<E>(Buf) << 2);
410 return SignExtend64<28>(read32<E>(Buf) << 2);
412 return SignExtend64<32>(read32<E>(Buf));
413 case R_MICROMIPS_26_S1:
414 return SignExtend64<27>(readShuffle<E>(Buf) << 1);
415 case R_MICROMIPS_PC7_S1:
416 return SignExtend64<8>(read16<E>(Buf) << 1);
417 case R_MICROMIPS_PC10_S1:
418 return SignExtend64<11>(read16<E>(Buf) << 1);
419 case R_MICROMIPS_PC16_S1:
420 return SignExtend64<17>(readShuffle<E>(Buf) << 1);
421 case R_MICROMIPS_PC18_S3:
422 return SignExtend64<21>(readShuffle<E>(Buf) << 3);
423 case R_MICROMIPS_PC19_S2:
424 return SignExtend64<21>(readShuffle<E>(Buf) << 2);
425 case R_MICROMIPS_PC21_S1:
426 return SignExtend64<22>(readShuffle<E>(Buf) << 1);
427 case R_MICROMIPS_PC23_S2:
428 return SignExtend64<25>(readShuffle<E>(Buf) << 2);
429 case R_MICROMIPS_PC26_S1:
430 return SignExtend64<27>(readShuffle<E>(Buf) << 1);
436 static std::pair<uint32_t, uint64_t>
437 calculateMipsRelChain(uint8_t *Loc, RelType Type, uint64_t Val) {
438 // MIPS N64 ABI packs multiple relocations into the single relocation
439 // record. In general, all up to three relocations can have arbitrary
440 // types. In fact, Clang and GCC uses only a few combinations. For now,
441 // we support two of them. That is allow to pass at least all LLVM
443 // <any relocation> / R_MIPS_SUB / R_MIPS_HI16 | R_MIPS_LO16
444 // <any relocation> / R_MIPS_64 / R_MIPS_NONE
445 // The first relocation is a 'real' relocation which is calculated
446 // using the corresponding symbol's value. The second and the third
447 // relocations used to modify result of the first one: extend it to
448 // 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
449 // at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
450 RelType Type2 = (Type >> 8) & 0xff;
451 RelType Type3 = (Type >> 16) & 0xff;
452 if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
453 return std::make_pair(Type, Val);
454 if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
455 return std::make_pair(Type2, Val);
456 if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
457 return std::make_pair(Type3, -Val);
458 if (Type2 == R_MICROMIPS_SUB &&
459 (Type3 == R_MICROMIPS_HI16 || Type3 == R_MICROMIPS_LO16))
460 return std::make_pair(Type3, -Val);
461 error(getErrorLocation(Loc) + "unsupported relocations combination " +
463 return std::make_pair(Type & 0xff, Val);
466 template <class ELFT>
467 void MIPS<ELFT>::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
468 const endianness E = ELFT::TargetEndianness;
470 // Thread pointer and DRP offsets from the start of TLS data area.
471 // https://www.linux-mips.org/wiki/NPTL
472 if (Type == R_MIPS_TLS_DTPREL_HI16 || Type == R_MIPS_TLS_DTPREL_LO16 ||
473 Type == R_MIPS_TLS_DTPREL32 || Type == R_MIPS_TLS_DTPREL64 ||
474 Type == R_MICROMIPS_TLS_DTPREL_HI16 ||
475 Type == R_MICROMIPS_TLS_DTPREL_LO16) {
477 } else if (Type == R_MIPS_TLS_TPREL_HI16 || Type == R_MIPS_TLS_TPREL_LO16 ||
478 Type == R_MIPS_TLS_TPREL32 || Type == R_MIPS_TLS_TPREL64 ||
479 Type == R_MICROMIPS_TLS_TPREL_HI16 ||
480 Type == R_MICROMIPS_TLS_TPREL_LO16) {
484 if (ELFT::Is64Bits || Config->MipsN32Abi)
485 std::tie(Type, Val) = calculateMipsRelChain(Loc, Type, Val);
490 case R_MIPS_TLS_DTPREL32:
491 case R_MIPS_TLS_TPREL32:
492 write32<E>(Loc, Val);
495 case R_MIPS_TLS_DTPREL64:
496 case R_MIPS_TLS_TPREL64:
497 write64<E>(Loc, Val);
500 writeRelocation<E>(Loc, Val, 26, 2);
503 // The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
504 // is updated addend (not a GOT index). In that case write high 16 bits
505 // to store a correct addend value.
506 if (Config->Relocatable) {
507 writeRelocation<E>(Loc, Val + 0x8000, 16, 16);
509 checkInt<16>(Loc, Val, Type);
510 writeRelocation<E>(Loc, Val, 16, 0);
513 case R_MICROMIPS_GOT16:
514 if (Config->Relocatable) {
515 writeMicroRelocation32<E>(Loc, Val + 0x8000, 16, 16);
517 checkInt<16>(Loc, Val, Type);
518 writeMicroRelocation32<E>(Loc, Val, 16, 0);
522 case R_MIPS_GOT_DISP:
523 case R_MIPS_GOT_PAGE:
526 case R_MIPS_TLS_GOTTPREL:
528 checkInt<16>(Loc, Val, Type);
530 case R_MIPS_CALL_LO16:
531 case R_MIPS_GOT_LO16:
532 case R_MIPS_GOT_OFST:
535 case R_MIPS_TLS_DTPREL_LO16:
536 case R_MIPS_TLS_TPREL_LO16:
537 writeRelocation<E>(Loc, Val, 16, 0);
539 case R_MICROMIPS_GOT_DISP:
540 case R_MICROMIPS_GOT_PAGE:
541 case R_MICROMIPS_GPREL16:
542 case R_MICROMIPS_TLS_GD:
543 case R_MICROMIPS_TLS_LDM:
544 checkInt<16>(Loc, Val, Type);
545 writeMicroRelocation32<E>(Loc, Val, 16, 0);
547 case R_MICROMIPS_CALL16:
548 case R_MICROMIPS_CALL_LO16:
549 case R_MICROMIPS_GOT_OFST:
550 case R_MICROMIPS_LO16:
551 case R_MICROMIPS_TLS_DTPREL_LO16:
552 case R_MICROMIPS_TLS_GOTTPREL:
553 case R_MICROMIPS_TLS_TPREL_LO16:
554 writeMicroRelocation32<E>(Loc, Val, 16, 0);
556 case R_MICROMIPS_GPREL7_S2:
557 checkInt<7>(Loc, Val, Type);
558 writeMicroRelocation32<E>(Loc, Val, 7, 2);
560 case R_MIPS_CALL_HI16:
561 case R_MIPS_GOT_HI16:
564 case R_MIPS_TLS_DTPREL_HI16:
565 case R_MIPS_TLS_TPREL_HI16:
566 writeRelocation<E>(Loc, Val + 0x8000, 16, 16);
568 case R_MICROMIPS_CALL_HI16:
569 case R_MICROMIPS_GOT_HI16:
570 case R_MICROMIPS_HI16:
571 case R_MICROMIPS_TLS_DTPREL_HI16:
572 case R_MICROMIPS_TLS_TPREL_HI16:
573 writeMicroRelocation32<E>(Loc, Val + 0x8000, 16, 16);
576 writeRelocation<E>(Loc, Val + 0x80008000, 16, 32);
579 writeRelocation<E>(Loc, Val + 0x800080008000, 16, 48);
581 case R_MICROMIPS_HIGHER:
582 writeMicroRelocation32<E>(Loc, Val + 0x80008000, 16, 32);
584 case R_MICROMIPS_HIGHEST:
585 writeMicroRelocation32<E>(Loc, Val + 0x800080008000, 16, 48);
588 case R_MICROMIPS_JALR:
589 // Ignore this optimization relocation for now
592 checkAlignment<4>(Loc, Val, Type);
593 checkInt<18>(Loc, Val, Type);
594 writeRelocation<E>(Loc, Val, 16, 2);
597 checkAlignment<4>(Loc, Val, Type);
598 checkInt<21>(Loc, Val, Type);
599 writeRelocation<E>(Loc, Val, 19, 2);
602 checkAlignment<4>(Loc, Val, Type);
603 checkInt<23>(Loc, Val, Type);
604 writeRelocation<E>(Loc, Val, 21, 2);
607 checkAlignment<4>(Loc, Val, Type);
608 checkInt<28>(Loc, Val, Type);
609 writeRelocation<E>(Loc, Val, 26, 2);
612 writeRelocation<E>(Loc, Val, 32, 0);
614 case R_MICROMIPS_26_S1:
615 case R_MICROMIPS_PC26_S1:
616 checkInt<27>(Loc, Val, Type);
617 writeMicroRelocation32<E>(Loc, Val, 26, 1);
619 case R_MICROMIPS_PC7_S1:
620 checkInt<8>(Loc, Val, Type);
621 writeMicroRelocation16<E>(Loc, Val, 7, 1);
623 case R_MICROMIPS_PC10_S1:
624 checkInt<11>(Loc, Val, Type);
625 writeMicroRelocation16<E>(Loc, Val, 10, 1);
627 case R_MICROMIPS_PC16_S1:
628 checkInt<17>(Loc, Val, Type);
629 writeMicroRelocation32<E>(Loc, Val, 16, 1);
631 case R_MICROMIPS_PC18_S3:
632 checkInt<21>(Loc, Val, Type);
633 writeMicroRelocation32<E>(Loc, Val, 18, 3);
635 case R_MICROMIPS_PC19_S2:
636 checkInt<21>(Loc, Val, Type);
637 writeMicroRelocation32<E>(Loc, Val, 19, 2);
639 case R_MICROMIPS_PC21_S1:
640 checkInt<22>(Loc, Val, Type);
641 writeMicroRelocation32<E>(Loc, Val, 21, 1);
643 case R_MICROMIPS_PC23_S2:
644 checkInt<25>(Loc, Val, Type);
645 writeMicroRelocation32<E>(Loc, Val, 23, 2);
648 error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
652 template <class ELFT> bool MIPS<ELFT>::usesOnlyLowPageBits(RelType Type) const {
653 return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST ||
654 Type == R_MICROMIPS_LO16 || Type == R_MICROMIPS_GOT_OFST;
657 // Return true if the symbol is a PIC function.
658 template <class ELFT> bool elf::isMipsPIC(const Defined *Sym) {
659 typedef typename ELFT::Ehdr Elf_Ehdr;
660 if (!Sym->Section || !Sym->isFunc())
663 auto *Sec = cast<InputSectionBase>(Sym->Section);
664 const Elf_Ehdr *Hdr = Sec->template getFile<ELFT>()->getObj().getHeader();
665 return (Sym->StOther & STO_MIPS_MIPS16) == STO_MIPS_PIC ||
666 (Hdr->e_flags & EF_MIPS_PIC);
669 template <class ELFT> TargetInfo *elf::getMipsTargetInfo() {
670 static MIPS<ELFT> Target;
674 template TargetInfo *elf::getMipsTargetInfo<ELF32LE>();
675 template TargetInfo *elf::getMipsTargetInfo<ELF32BE>();
676 template TargetInfo *elf::getMipsTargetInfo<ELF64LE>();
677 template TargetInfo *elf::getMipsTargetInfo<ELF64BE>();
679 template bool elf::isMipsPIC<ELF32LE>(const Defined *);
680 template bool elf::isMipsPIC<ELF32BE>(const Defined *);
681 template bool elf::isMipsPIC<ELF64LE>(const Defined *);
682 template bool elf::isMipsPIC<ELF64BE>(const Defined *);