1 //===- MIPS.cpp -----------------------------------------------------------===//
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "InputFiles.h"
12 #include "OutputSections.h"
14 #include "SyntheticSections.h"
17 #include "llvm/Object/ELF.h"
18 #include "llvm/Support/Endian.h"
21 using namespace llvm::object;
22 using namespace llvm::support::endian;
23 using namespace llvm::ELF;
25 using namespace lld::elf;
28 template <class ELFT> class MIPS final : public TargetInfo {
31 RelExpr getRelExpr(uint32_t Type, const SymbolBody &S,
32 const uint8_t *Loc) const override;
33 int64_t getImplicitAddend(const uint8_t *Buf, uint32_t Type) const override;
34 bool isPicRel(uint32_t Type) const override;
35 uint32_t getDynRel(uint32_t Type) const override;
36 void writeGotPlt(uint8_t *Buf, const SymbolBody &S) const override;
37 void writePltHeader(uint8_t *Buf) const override;
38 void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
39 int32_t Index, unsigned RelOff) const override;
40 bool needsThunk(RelExpr Expr, uint32_t RelocType, const InputFile *File,
41 const SymbolBody &S) const override;
42 void relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const override;
43 bool usesOnlyLowPageBits(uint32_t Type) const override;
47 template <class ELFT> MIPS<ELFT>::MIPS() {
48 GotPltHeaderEntriesNum = 2;
49 DefaultMaxPageSize = 65536;
50 GotEntrySize = sizeof(typename ELFT::uint);
51 GotPltEntrySize = sizeof(typename ELFT::uint);
54 CopyRel = R_MIPS_COPY;
55 PltRel = R_MIPS_JUMP_SLOT;
57 TrapInstr = 0xefefefef;
60 RelativeRel = (R_MIPS_64 << 8) | R_MIPS_REL32;
61 TlsGotRel = R_MIPS_TLS_TPREL64;
62 TlsModuleIndexRel = R_MIPS_TLS_DTPMOD64;
63 TlsOffsetRel = R_MIPS_TLS_DTPREL64;
65 RelativeRel = R_MIPS_REL32;
66 TlsGotRel = R_MIPS_TLS_TPREL32;
67 TlsModuleIndexRel = R_MIPS_TLS_DTPMOD32;
68 TlsOffsetRel = R_MIPS_TLS_DTPREL32;
73 RelExpr MIPS<ELFT>::getRelExpr(uint32_t Type, const SymbolBody &S,
74 const uint8_t *Loc) const {
75 // See comment in the calculateMipsRelChain.
76 if (ELFT::Is64Bits || Config->MipsN32Abi)
90 // R_MIPS_HI16/R_MIPS_LO16 relocations against _gp_disp calculate
91 // offset between start of function and 'gp' value which by default
92 // equal to the start of .got section. In that case we consider these
93 // relocations as relative.
94 if (&S == ElfSym::MipsGpDisp)
95 return R_MIPS_GOT_GP_PC;
96 if (&S == ElfSym::MipsLocalGp)
111 return R_MIPS_GOT_LOCAL_PAGE;
114 case R_MIPS_GOT_DISP:
115 case R_MIPS_TLS_GOTTPREL:
116 return R_MIPS_GOT_OFF;
117 case R_MIPS_CALL_HI16:
118 case R_MIPS_CALL_LO16:
119 case R_MIPS_GOT_HI16:
120 case R_MIPS_GOT_LO16:
121 return R_MIPS_GOT_OFF32;
122 case R_MIPS_GOT_PAGE:
123 return R_MIPS_GOT_LOCAL_PAGE;
131 template <class ELFT> bool MIPS<ELFT>::isPicRel(uint32_t Type) const {
132 return Type == R_MIPS_32 || Type == R_MIPS_64;
135 template <class ELFT> uint32_t MIPS<ELFT>::getDynRel(uint32_t Type) const {
139 template <class ELFT>
140 void MIPS<ELFT>::writeGotPlt(uint8_t *Buf, const SymbolBody &) const {
141 write32<ELFT::TargetEndianness>(Buf, InX::Plt->getVA());
144 template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
145 static int64_t getPcRelocAddend(const uint8_t *Loc) {
146 uint32_t Instr = read32<E>(Loc);
147 uint32_t Mask = 0xffffffff >> (32 - BSIZE);
148 return SignExtend64<BSIZE + SHIFT>((Instr & Mask) << SHIFT);
151 template <endianness E, uint8_t BSIZE, uint8_t SHIFT>
152 static void applyMipsPcReloc(uint8_t *Loc, uint32_t Type, uint64_t V) {
153 uint32_t Mask = 0xffffffff >> (32 - BSIZE);
154 uint32_t Instr = read32<E>(Loc);
156 checkAlignment<(1 << SHIFT)>(Loc, V, Type);
157 checkInt<BSIZE + SHIFT>(Loc, V, Type);
158 write32<E>(Loc, (Instr & ~Mask) | ((V >> SHIFT) & Mask));
161 template <endianness E> static void writeMipsHi16(uint8_t *Loc, uint64_t V) {
162 uint32_t Instr = read32<E>(Loc);
163 uint16_t Res = ((V + 0x8000) >> 16) & 0xffff;
164 write32<E>(Loc, (Instr & 0xffff0000) | Res);
167 template <endianness E> static void writeMipsHigher(uint8_t *Loc, uint64_t V) {
168 uint32_t Instr = read32<E>(Loc);
169 uint16_t Res = ((V + 0x80008000) >> 32) & 0xffff;
170 write32<E>(Loc, (Instr & 0xffff0000) | Res);
173 template <endianness E> static void writeMipsHighest(uint8_t *Loc, uint64_t V) {
174 uint32_t Instr = read32<E>(Loc);
175 uint16_t Res = ((V + 0x800080008000) >> 48) & 0xffff;
176 write32<E>(Loc, (Instr & 0xffff0000) | Res);
179 template <endianness E> static void writeMipsLo16(uint8_t *Loc, uint64_t V) {
180 uint32_t Instr = read32<E>(Loc);
181 write32<E>(Loc, (Instr & 0xffff0000) | (V & 0xffff));
184 template <class ELFT> static bool isMipsR6() {
185 const auto &FirstObj = cast<ELFFileBase<ELFT>>(*Config->FirstElf);
186 uint32_t Arch = FirstObj.getObj().getHeader()->e_flags & EF_MIPS_ARCH;
187 return Arch == EF_MIPS_ARCH_32R6 || Arch == EF_MIPS_ARCH_64R6;
190 template <class ELFT> void MIPS<ELFT>::writePltHeader(uint8_t *Buf) const {
191 const endianness E = ELFT::TargetEndianness;
192 if (Config->MipsN32Abi) {
193 write32<E>(Buf, 0x3c0e0000); // lui $14, %hi(&GOTPLT[0])
194 write32<E>(Buf + 4, 0x8dd90000); // lw $25, %lo(&GOTPLT[0])($14)
195 write32<E>(Buf + 8, 0x25ce0000); // addiu $14, $14, %lo(&GOTPLT[0])
196 write32<E>(Buf + 12, 0x030ec023); // subu $24, $24, $14
198 write32<E>(Buf, 0x3c1c0000); // lui $28, %hi(&GOTPLT[0])
199 write32<E>(Buf + 4, 0x8f990000); // lw $25, %lo(&GOTPLT[0])($28)
200 write32<E>(Buf + 8, 0x279c0000); // addiu $28, $28, %lo(&GOTPLT[0])
201 write32<E>(Buf + 12, 0x031cc023); // subu $24, $24, $28
204 write32<E>(Buf + 16, 0x03e07825); // move $15, $31
205 write32<E>(Buf + 20, 0x0018c082); // srl $24, $24, 2
206 write32<E>(Buf + 24, 0x0320f809); // jalr $25
207 write32<E>(Buf + 28, 0x2718fffe); // subu $24, $24, 2
209 uint64_t GotPlt = InX::GotPlt->getVA();
210 writeMipsHi16<E>(Buf, GotPlt);
211 writeMipsLo16<E>(Buf + 4, GotPlt);
212 writeMipsLo16<E>(Buf + 8, GotPlt);
215 template <class ELFT>
216 void MIPS<ELFT>::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
217 uint64_t PltEntryAddr, int32_t Index,
218 unsigned RelOff) const {
219 const endianness E = ELFT::TargetEndianness;
220 write32<E>(Buf, 0x3c0f0000); // lui $15, %hi(.got.plt entry)
221 write32<E>(Buf + 4, 0x8df90000); // l[wd] $25, %lo(.got.plt entry)($15)
223 write32<E>(Buf + 8, isMipsR6<ELFT>() ? 0x03200009 : 0x03200008);
224 write32<E>(Buf + 12, 0x25f80000); // addiu $24, $15, %lo(.got.plt entry)
225 writeMipsHi16<E>(Buf, GotPltEntryAddr);
226 writeMipsLo16<E>(Buf + 4, GotPltEntryAddr);
227 writeMipsLo16<E>(Buf + 12, GotPltEntryAddr);
230 template <class ELFT>
231 bool MIPS<ELFT>::needsThunk(RelExpr Expr, uint32_t Type, const InputFile *File,
232 const SymbolBody &S) const {
233 // Any MIPS PIC code function is invoked with its address in register $t9.
234 // So if we have a branch instruction from non-PIC code to the PIC one
235 // we cannot make the jump directly and need to create a small stubs
236 // to save the target function address.
237 // See page 3-38 ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
238 if (Type != R_MIPS_26)
240 auto *F = dyn_cast_or_null<ELFFileBase<ELFT>>(File);
243 // If current file has PIC code, LA25 stub is not required.
244 if (F->getObj().getHeader()->e_flags & EF_MIPS_PIC)
246 auto *D = dyn_cast<DefinedRegular>(&S);
247 // LA25 is required if target file has PIC code
248 // or target symbol is a PIC symbol.
249 return D && D->isMipsPIC<ELFT>();
252 template <class ELFT>
253 int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *Buf, uint32_t Type) const {
254 const endianness E = ELFT::TargetEndianness;
260 case R_MIPS_TLS_DTPREL32:
261 case R_MIPS_TLS_TPREL32:
262 return SignExtend64<32>(read32<E>(Buf));
264 // FIXME (simon): If the relocation target symbol is not a PLT entry
265 // we should use another expression for calculation:
266 // ((A << 2) | (P & 0xf0000000)) >> 2
267 return SignExtend64<28>((read32<E>(Buf) & 0x3ffffff) << 2);
271 case R_MIPS_TLS_DTPREL_HI16:
272 case R_MIPS_TLS_DTPREL_LO16:
273 case R_MIPS_TLS_TPREL_HI16:
274 case R_MIPS_TLS_TPREL_LO16:
275 return SignExtend64<16>(read32<E>(Buf));
277 return getPcRelocAddend<E, 16, 2>(Buf);
279 return getPcRelocAddend<E, 19, 2>(Buf);
281 return getPcRelocAddend<E, 21, 2>(Buf);
283 return getPcRelocAddend<E, 26, 2>(Buf);
285 return getPcRelocAddend<E, 32, 0>(Buf);
289 static std::pair<uint32_t, uint64_t>
290 calculateMipsRelChain(uint8_t *Loc, uint32_t Type, uint64_t Val) {
291 // MIPS N64 ABI packs multiple relocations into the single relocation
292 // record. In general, all up to three relocations can have arbitrary
293 // types. In fact, Clang and GCC uses only a few combinations. For now,
294 // we support two of them. That is allow to pass at least all LLVM
296 // <any relocation> / R_MIPS_SUB / R_MIPS_HI16 | R_MIPS_LO16
297 // <any relocation> / R_MIPS_64 / R_MIPS_NONE
298 // The first relocation is a 'real' relocation which is calculated
299 // using the corresponding symbol's value. The second and the third
300 // relocations used to modify result of the first one: extend it to
301 // 64-bit, extract high or low part etc. For details, see part 2.9 Relocation
302 // at the https://dmz-portal.mips.com/mw/images/8/82/007-4658-001.pdf
303 uint32_t Type2 = (Type >> 8) & 0xff;
304 uint32_t Type3 = (Type >> 16) & 0xff;
305 if (Type2 == R_MIPS_NONE && Type3 == R_MIPS_NONE)
306 return std::make_pair(Type, Val);
307 if (Type2 == R_MIPS_64 && Type3 == R_MIPS_NONE)
308 return std::make_pair(Type2, Val);
309 if (Type2 == R_MIPS_SUB && (Type3 == R_MIPS_HI16 || Type3 == R_MIPS_LO16))
310 return std::make_pair(Type3, -Val);
311 error(getErrorLocation(Loc) + "unsupported relocations combination " +
313 return std::make_pair(Type & 0xff, Val);
316 template <class ELFT>
317 void MIPS<ELFT>::relocateOne(uint8_t *Loc, uint32_t Type, uint64_t Val) const {
318 const endianness E = ELFT::TargetEndianness;
319 // Thread pointer and DRP offsets from the start of TLS data area.
320 // https://www.linux-mips.org/wiki/NPTL
321 if (Type == R_MIPS_TLS_DTPREL_HI16 || Type == R_MIPS_TLS_DTPREL_LO16 ||
322 Type == R_MIPS_TLS_DTPREL32 || Type == R_MIPS_TLS_DTPREL64)
324 else if (Type == R_MIPS_TLS_TPREL_HI16 || Type == R_MIPS_TLS_TPREL_LO16 ||
325 Type == R_MIPS_TLS_TPREL32 || Type == R_MIPS_TLS_TPREL64)
327 if (ELFT::Is64Bits || Config->MipsN32Abi)
328 std::tie(Type, Val) = calculateMipsRelChain(Loc, Type, Val);
332 case R_MIPS_TLS_DTPREL32:
333 case R_MIPS_TLS_TPREL32:
334 write32<E>(Loc, Val);
337 case R_MIPS_TLS_DTPREL64:
338 case R_MIPS_TLS_TPREL64:
339 write64<E>(Loc, Val);
342 write32<E>(Loc, (read32<E>(Loc) & ~0x3ffffff) | ((Val >> 2) & 0x3ffffff));
345 // The R_MIPS_GOT16 relocation's value in "relocatable" linking mode
346 // is updated addend (not a GOT index). In that case write high 16 bits
347 // to store a correct addend value.
348 if (Config->Relocatable)
349 writeMipsHi16<E>(Loc, Val);
351 checkInt<16>(Loc, Val, Type);
352 writeMipsLo16<E>(Loc, Val);
355 case R_MIPS_GOT_DISP:
356 case R_MIPS_GOT_PAGE:
360 checkInt<16>(Loc, Val, Type);
363 case R_MIPS_CALL_LO16:
364 case R_MIPS_GOT_LO16:
365 case R_MIPS_GOT_OFST:
368 case R_MIPS_TLS_DTPREL_LO16:
369 case R_MIPS_TLS_GOTTPREL:
370 case R_MIPS_TLS_TPREL_LO16:
371 writeMipsLo16<E>(Loc, Val);
373 case R_MIPS_CALL_HI16:
374 case R_MIPS_GOT_HI16:
377 case R_MIPS_TLS_DTPREL_HI16:
378 case R_MIPS_TLS_TPREL_HI16:
379 writeMipsHi16<E>(Loc, Val);
382 writeMipsHigher<E>(Loc, Val);
385 writeMipsHighest<E>(Loc, Val);
388 // Ignore this optimization relocation for now
391 applyMipsPcReloc<E, 16, 2>(Loc, Type, Val);
394 applyMipsPcReloc<E, 19, 2>(Loc, Type, Val);
397 applyMipsPcReloc<E, 21, 2>(Loc, Type, Val);
400 applyMipsPcReloc<E, 26, 2>(Loc, Type, Val);
403 applyMipsPcReloc<E, 32, 0>(Loc, Type, Val);
406 error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
410 template <class ELFT>
411 bool MIPS<ELFT>::usesOnlyLowPageBits(uint32_t Type) const {
412 return Type == R_MIPS_LO16 || Type == R_MIPS_GOT_OFST;
415 template <class ELFT> TargetInfo *elf::getMipsTargetInfo() {
416 static MIPS<ELFT> Target;
420 template TargetInfo *elf::getMipsTargetInfo<ELF32LE>();
421 template TargetInfo *elf::getMipsTargetInfo<ELF32BE>();
422 template TargetInfo *elf::getMipsTargetInfo<ELF64LE>();
423 template TargetInfo *elf::getMipsTargetInfo<ELF64BE>();