1 //===- PPC64.cpp ----------------------------------------------------------===//
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "SyntheticSections.h"
13 #include "lld/Common/ErrorHandler.h"
14 #include "llvm/Support/Endian.h"
17 using namespace llvm::object;
18 using namespace llvm::support::endian;
19 using namespace llvm::ELF;
21 using namespace lld::elf;
23 static uint64_t PPC64TocOffset = 0x8000;
24 static uint64_t DynamicThreadPointerOffset = 0x8000;
26 uint64_t elf::getPPC64TocBase() {
27 // The TOC consists of sections .got, .toc, .tocbss, .plt in that order. The
28 // TOC starts where the first of these sections starts. We always create a
29 // .got when we see a relocation that uses it, so for us the start is always
31 uint64_t TocVA = InX::Got->getVA();
33 // Per the ppc64-elf-linux ABI, The TOC base is TOC value plus 0x8000
34 // thus permitting a full 64 Kbytes segment. Note that the glibc startup
35 // code (crt1.o) assumes that you can get from the TOC base to the
36 // start of the .toc section with only a single (signed) 16-bit relocation.
37 return TocVA + PPC64TocOffset;
41 class PPC64 final : public TargetInfo {
44 uint32_t calcEFlags() const override;
45 RelExpr getRelExpr(RelType Type, const Symbol &S,
46 const uint8_t *Loc) const override;
47 void writePltHeader(uint8_t *Buf) const override;
48 void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
49 int32_t Index, unsigned RelOff) const override;
50 void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
51 void writeGotHeader(uint8_t *Buf) const override;
52 bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
53 uint64_t BranchAddr, const Symbol &S) const override;
54 RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
55 RelExpr Expr) const override;
56 void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
57 void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
58 void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
62 // Relocation masks following the #lo(value), #hi(value), #ha(value),
63 // #higher(value), #highera(value), #highest(value), and #highesta(value)
64 // macros defined in section 4.5.1. Relocation Types of the PPC-elf64abi
66 static uint16_t lo(uint64_t V) { return V; }
67 static uint16_t hi(uint64_t V) { return V >> 16; }
68 static uint16_t ha(uint64_t V) { return (V + 0x8000) >> 16; }
69 static uint16_t higher(uint64_t V) { return V >> 32; }
70 static uint16_t highera(uint64_t V) { return (V + 0x8000) >> 32; }
71 static uint16_t highest(uint64_t V) { return V >> 48; }
72 static uint16_t highesta(uint64_t V) { return (V + 0x8000) >> 48; }
75 GotRel = R_PPC64_GLOB_DAT;
76 PltRel = R_PPC64_JMP_SLOT;
77 RelativeRel = R_PPC64_RELATIVE;
78 IRelativeRel = R_PPC64_IRELATIVE;
82 GotBaseSymInGotPlt = false;
83 GotBaseSymOff = 0x8000;
84 GotHeaderEntriesNum = 1;
85 GotPltHeaderEntriesNum = 2;
91 TlsModuleIndexRel = R_PPC64_DTPMOD64;
92 TlsOffsetRel = R_PPC64_DTPREL64;
94 TlsGotRel = R_PPC64_TPREL64;
96 // We need 64K pages (at least under glibc/Linux, the loader won't
97 // set different permissions on a finer granularity than that).
98 DefaultMaxPageSize = 65536;
100 // The PPC64 ELF ABI v1 spec, says:
102 // It is normally desirable to put segments with different characteristics
103 // in separate 256 Mbyte portions of the address space, to give the
104 // operating system full paging flexibility in the 64-bit address space.
106 // And because the lowest non-zero 256M boundary is 0x10000000, PPC64 linkers
107 // use 0x10000000 as the starting address.
108 DefaultImageBase = 0x10000000;
111 (Config->IsLE == sys::IsLittleEndianHost) ? 0x7fe00008 : 0x0800e07f;
114 static uint32_t getEFlags(InputFile *File) {
115 if (Config->EKind == ELF64BEKind)
116 return cast<ObjFile<ELF64BE>>(File)->getObj().getHeader()->e_flags;
117 return cast<ObjFile<ELF64LE>>(File)->getObj().getHeader()->e_flags;
120 // This file implements v2 ABI. This function makes sure that all
121 // object files have v2 or an unspecified version as an ABI version.
122 uint32_t PPC64::calcEFlags() const {
123 for (InputFile *F : ObjectFiles) {
124 uint32_t Flag = getEFlags(F);
126 error(toString(F) + ": ABI version 1 is not supported");
128 error(toString(F) + ": unrecognized e_flags: " + Twine(Flag));
133 void PPC64::relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
134 // Reference: 3.7.4.2 of the 64-bit ELF V2 abi supplement.
135 // The general dynamic code sequence for a global `x` will look like:
136 // Instruction Relocation Symbol
137 // addis r3, r2, x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x
138 // addi r3, r3, x@got@tlsgd@l R_PPC64_GOT_TLSGD16_LO x
139 // bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
140 // R_PPC64_REL24 __tls_get_addr
143 // Relaxing to local exec entails converting:
144 // addis r3, r2, x@got@tlsgd@ha into nop
145 // addi r3, r3, x@got@tlsgd@l into addis r3, r13, x@tprel@ha
146 // bl __tls_get_addr(x@tlsgd) into nop
147 // nop into addi r3, r3, x@tprel@l
149 uint32_t EndianOffset = Config->EKind == ELF64BEKind ? 2U : 0U;
152 case R_PPC64_GOT_TLSGD16_HA:
153 write32(Loc - EndianOffset, 0x60000000); // nop
155 case R_PPC64_GOT_TLSGD16_LO:
156 write32(Loc - EndianOffset, 0x3c6d0000); // addis r3, r13
157 relocateOne(Loc, R_PPC64_TPREL16_HA, Val);
160 write32(Loc, 0x60000000); // nop
161 write32(Loc + 4, 0x38630000); // addi r3, r3
162 relocateOne(Loc + 4 + EndianOffset, R_PPC64_TPREL16_LO, Val);
165 llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
170 void PPC64::relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const {
171 // Reference: 3.7.4.3 of the 64-bit ELF V2 abi supplement.
172 // The local dynamic code sequence for a global `x` will look like:
173 // Instruction Relocation Symbol
174 // addis r3, r2, x@got@tlsld@ha R_PPC64_GOT_TLSLD16_HA x
175 // addi r3, r3, x@got@tlsld@l R_PPC64_GOT_TLSLD16_LO x
176 // bl __tls_get_addr(x@tlsgd) R_PPC64_TLSLD x
177 // R_PPC64_REL24 __tls_get_addr
180 // Relaxing to local exec entails converting:
181 // addis r3, r2, x@got@tlsld@ha into nop
182 // addi r3, r3, x@got@tlsld@l into addis r3, r13, 0
183 // bl __tls_get_addr(x@tlsgd) into nop
184 // nop into addi r3, r3, 4096
186 uint32_t EndianOffset = Config->EKind == ELF64BEKind ? 2U : 0U;
188 case R_PPC64_GOT_TLSLD16_HA:
189 write32(Loc - EndianOffset, 0x60000000); // nop
191 case R_PPC64_GOT_TLSLD16_LO:
192 write32(Loc - EndianOffset, 0x3c6d0000); // addis r3, r13, 0
195 write32(Loc, 0x60000000); // nop
196 write32(Loc + 4, 0x38631000); // addi r3, r3, 4096
198 case R_PPC64_DTPREL16:
199 case R_PPC64_DTPREL16_HA:
200 case R_PPC64_DTPREL16_HI:
201 case R_PPC64_DTPREL16_DS:
202 case R_PPC64_DTPREL16_LO:
203 case R_PPC64_DTPREL16_LO_DS:
204 case R_PPC64_GOT_DTPREL16_HA:
205 case R_PPC64_GOT_DTPREL16_LO_DS:
206 case R_PPC64_GOT_DTPREL16_DS:
207 case R_PPC64_GOT_DTPREL16_HI:
208 relocateOne(Loc, Type, Val);
211 llvm_unreachable("unsupported relocation for TLS LD to LE relaxation");
215 RelExpr PPC64::getRelExpr(RelType Type, const Symbol &S,
216 const uint8_t *Loc) const {
219 case R_PPC64_TOC16_DS:
220 case R_PPC64_TOC16_HA:
221 case R_PPC64_TOC16_HI:
222 case R_PPC64_TOC16_LO:
223 case R_PPC64_TOC16_LO_DS:
228 return R_PPC_CALL_PLT;
229 case R_PPC64_REL16_LO:
230 case R_PPC64_REL16_HA:
234 case R_PPC64_GOT_TLSGD16:
235 case R_PPC64_GOT_TLSGD16_HA:
236 case R_PPC64_GOT_TLSGD16_HI:
237 case R_PPC64_GOT_TLSGD16_LO:
239 case R_PPC64_GOT_TLSLD16:
240 case R_PPC64_GOT_TLSLD16_HA:
241 case R_PPC64_GOT_TLSLD16_HI:
242 case R_PPC64_GOT_TLSLD16_LO:
244 case R_PPC64_GOT_TPREL16_HA:
245 case R_PPC64_GOT_TPREL16_LO_DS:
246 case R_PPC64_GOT_TPREL16_DS:
247 case R_PPC64_GOT_TPREL16_HI:
249 case R_PPC64_GOT_DTPREL16_HA:
250 case R_PPC64_GOT_DTPREL16_LO_DS:
251 case R_PPC64_GOT_DTPREL16_DS:
252 case R_PPC64_GOT_DTPREL16_HI:
253 return R_TLSLD_GOT_OFF;
254 case R_PPC64_TPREL16:
255 case R_PPC64_TPREL16_HA:
256 case R_PPC64_TPREL16_LO:
257 case R_PPC64_TPREL16_HI:
258 case R_PPC64_TPREL16_DS:
259 case R_PPC64_TPREL16_LO_DS:
260 case R_PPC64_TPREL16_HIGHER:
261 case R_PPC64_TPREL16_HIGHERA:
262 case R_PPC64_TPREL16_HIGHEST:
263 case R_PPC64_TPREL16_HIGHESTA:
265 case R_PPC64_DTPREL16:
266 case R_PPC64_DTPREL16_DS:
267 case R_PPC64_DTPREL16_HA:
268 case R_PPC64_DTPREL16_HI:
269 case R_PPC64_DTPREL16_HIGHER:
270 case R_PPC64_DTPREL16_HIGHERA:
271 case R_PPC64_DTPREL16_HIGHEST:
272 case R_PPC64_DTPREL16_HIGHESTA:
273 case R_PPC64_DTPREL16_LO:
274 case R_PPC64_DTPREL16_LO_DS:
275 case R_PPC64_DTPREL64:
278 return R_TLSDESC_CALL;
288 void PPC64::writeGotHeader(uint8_t *Buf) const {
289 write64(Buf, getPPC64TocBase());
292 void PPC64::writePltHeader(uint8_t *Buf) const {
293 // The generic resolver stub goes first.
294 write32(Buf + 0, 0x7c0802a6); // mflr r0
295 write32(Buf + 4, 0x429f0005); // bcl 20,4*cr7+so,8 <_glink+0x8>
296 write32(Buf + 8, 0x7d6802a6); // mflr r11
297 write32(Buf + 12, 0x7c0803a6); // mtlr r0
298 write32(Buf + 16, 0x7d8b6050); // subf r12, r11, r12
299 write32(Buf + 20, 0x380cffcc); // subi r0,r12,52
300 write32(Buf + 24, 0x7800f082); // srdi r0,r0,62,2
301 write32(Buf + 28, 0xe98b002c); // ld r12,44(r11)
302 write32(Buf + 32, 0x7d6c5a14); // add r11,r12,r11
303 write32(Buf + 36, 0xe98b0000); // ld r12,0(r11)
304 write32(Buf + 40, 0xe96b0008); // ld r11,8(r11)
305 write32(Buf + 44, 0x7d8903a6); // mtctr r12
306 write32(Buf + 48, 0x4e800420); // bctr
308 // The 'bcl' instruction will set the link register to the address of the
309 // following instruction ('mflr r11'). Here we store the offset from that
310 // instruction to the first entry in the GotPlt section.
311 int64_t GotPltOffset = InX::GotPlt->getVA() - (InX::Plt->getVA() + 8);
312 write64(Buf + 52, GotPltOffset);
315 void PPC64::writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr,
316 uint64_t PltEntryAddr, int32_t Index,
317 unsigned RelOff) const {
318 int32_t Offset = PltHeaderSize + Index * PltEntrySize;
319 // bl __glink_PLTresolve
320 write32(Buf, 0x48000000 | ((-Offset) & 0x03FFFFFc));
323 static std::pair<RelType, uint64_t> toAddr16Rel(RelType Type, uint64_t Val) {
324 // Relocations relative to the toc-base need to be adjusted by the Toc offset.
325 uint64_t TocBiasedVal = Val - PPC64TocOffset;
326 // Relocations relative to dtv[dtpmod] need to be adjusted by the DTP offset.
327 uint64_t DTPBiasedVal = Val - DynamicThreadPointerOffset;
330 // TOC biased relocation.
331 case R_PPC64_GOT_TLSGD16:
332 case R_PPC64_GOT_TLSLD16:
334 return {R_PPC64_ADDR16, TocBiasedVal};
335 case R_PPC64_TOC16_DS:
336 case R_PPC64_GOT_TPREL16_DS:
337 case R_PPC64_GOT_DTPREL16_DS:
338 return {R_PPC64_ADDR16_DS, TocBiasedVal};
339 case R_PPC64_GOT_TLSGD16_HA:
340 case R_PPC64_GOT_TLSLD16_HA:
341 case R_PPC64_GOT_TPREL16_HA:
342 case R_PPC64_GOT_DTPREL16_HA:
343 case R_PPC64_TOC16_HA:
344 return {R_PPC64_ADDR16_HA, TocBiasedVal};
345 case R_PPC64_GOT_TLSGD16_HI:
346 case R_PPC64_GOT_TLSLD16_HI:
347 case R_PPC64_GOT_TPREL16_HI:
348 case R_PPC64_GOT_DTPREL16_HI:
349 case R_PPC64_TOC16_HI:
350 return {R_PPC64_ADDR16_HI, TocBiasedVal};
351 case R_PPC64_GOT_TLSGD16_LO:
352 case R_PPC64_GOT_TLSLD16_LO:
353 case R_PPC64_TOC16_LO:
354 return {R_PPC64_ADDR16_LO, TocBiasedVal};
355 case R_PPC64_TOC16_LO_DS:
356 case R_PPC64_GOT_TPREL16_LO_DS:
357 case R_PPC64_GOT_DTPREL16_LO_DS:
358 return {R_PPC64_ADDR16_LO_DS, TocBiasedVal};
360 // Dynamic Thread pointer biased relocation types.
361 case R_PPC64_DTPREL16:
362 return {R_PPC64_ADDR16, DTPBiasedVal};
363 case R_PPC64_DTPREL16_DS:
364 return {R_PPC64_ADDR16_DS, DTPBiasedVal};
365 case R_PPC64_DTPREL16_HA:
366 return {R_PPC64_ADDR16_HA, DTPBiasedVal};
367 case R_PPC64_DTPREL16_HI:
368 return {R_PPC64_ADDR16_HI, DTPBiasedVal};
369 case R_PPC64_DTPREL16_HIGHER:
370 return {R_PPC64_ADDR16_HIGHER, DTPBiasedVal};
371 case R_PPC64_DTPREL16_HIGHERA:
372 return {R_PPC64_ADDR16_HIGHERA, DTPBiasedVal};
373 case R_PPC64_DTPREL16_HIGHEST:
374 return {R_PPC64_ADDR16_HIGHEST, DTPBiasedVal};
375 case R_PPC64_DTPREL16_HIGHESTA:
376 return {R_PPC64_ADDR16_HIGHESTA, DTPBiasedVal};
377 case R_PPC64_DTPREL16_LO:
378 return {R_PPC64_ADDR16_LO, DTPBiasedVal};
379 case R_PPC64_DTPREL16_LO_DS:
380 return {R_PPC64_ADDR16_LO_DS, DTPBiasedVal};
381 case R_PPC64_DTPREL64:
382 return {R_PPC64_ADDR64, DTPBiasedVal};
389 void PPC64::relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const {
390 // For a TOC-relative relocation, proceed in terms of the corresponding
391 // ADDR16 relocation type.
392 std::tie(Type, Val) = toAddr16Rel(Type, Val);
395 case R_PPC64_ADDR14: {
396 checkAlignment(Loc, Val, 4, Type);
397 // Preserve the AA/LK bits in the branch instruction
398 uint8_t AALK = Loc[3];
399 write16(Loc + 2, (AALK & 3) | (Val & 0xfffc));
403 case R_PPC64_TPREL16:
404 checkInt(Loc, Val, 16, Type);
407 case R_PPC64_ADDR16_DS:
408 case R_PPC64_TPREL16_DS:
409 checkInt(Loc, Val, 16, Type);
410 write16(Loc, (read16(Loc) & 3) | (Val & ~3));
412 case R_PPC64_ADDR16_HA:
413 case R_PPC64_REL16_HA:
414 case R_PPC64_TPREL16_HA:
415 write16(Loc, ha(Val));
417 case R_PPC64_ADDR16_HI:
418 case R_PPC64_REL16_HI:
419 case R_PPC64_TPREL16_HI:
420 write16(Loc, hi(Val));
422 case R_PPC64_ADDR16_HIGHER:
423 case R_PPC64_TPREL16_HIGHER:
424 write16(Loc, higher(Val));
426 case R_PPC64_ADDR16_HIGHERA:
427 case R_PPC64_TPREL16_HIGHERA:
428 write16(Loc, highera(Val));
430 case R_PPC64_ADDR16_HIGHEST:
431 case R_PPC64_TPREL16_HIGHEST:
432 write16(Loc, highest(Val));
434 case R_PPC64_ADDR16_HIGHESTA:
435 case R_PPC64_TPREL16_HIGHESTA:
436 write16(Loc, highesta(Val));
438 case R_PPC64_ADDR16_LO:
439 case R_PPC64_REL16_LO:
440 case R_PPC64_TPREL16_LO:
441 write16(Loc, lo(Val));
443 case R_PPC64_ADDR16_LO_DS:
444 case R_PPC64_TPREL16_LO_DS:
445 write16(Loc, (read16(Loc) & 3) | (lo(Val) & ~3));
449 checkInt(Loc, Val, 32, Type);
457 case R_PPC64_REL24: {
458 uint32_t Mask = 0x03FFFFFC;
459 checkInt(Loc, Val, 24, Type);
460 write32(Loc, (read32(Loc) & ~Mask) | (Val & Mask));
463 case R_PPC64_DTPREL64:
464 write64(Loc, Val - DynamicThreadPointerOffset);
467 error(getErrorLocation(Loc) + "unrecognized reloc " + Twine(Type));
471 bool PPC64::needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
472 uint64_t BranchAddr, const Symbol &S) const {
473 // If a function is in the plt it needs to be called through
475 return Type == R_PPC64_REL24 && S.isInPlt();
478 RelExpr PPC64::adjustRelaxExpr(RelType Type, const uint8_t *Data,
479 RelExpr Expr) const {
480 if (Expr == R_RELAX_TLS_GD_TO_IE)
481 return R_RELAX_TLS_GD_TO_IE_GOT_OFF;
482 if (Expr == R_RELAX_TLS_LD_TO_LE)
483 return R_RELAX_TLS_LD_TO_LE_ABS;
487 // Reference: 3.7.4.1 of the 64-bit ELF V2 abi supplement.
488 // The general dynamic code sequence for a global `x` uses 4 instructions.
489 // Instruction Relocation Symbol
490 // addis r3, r2, x@got@tlsgd@ha R_PPC64_GOT_TLSGD16_HA x
491 // addi r3, r3, x@got@tlsgd@l R_PPC64_GOT_TLSGD16_LO x
492 // bl __tls_get_addr(x@tlsgd) R_PPC64_TLSGD x
493 // R_PPC64_REL24 __tls_get_addr
496 // Relaxing to initial-exec entails:
497 // 1) Convert the addis/addi pair that builds the address of the tls_index
498 // struct for 'x' to an addis/ld pair that loads an offset from a got-entry.
499 // 2) Convert the call to __tls_get_addr to a nop.
500 // 3) Convert the nop following the call to an add of the loaded offset to the
502 // Since the nop must directly follow the call, the R_PPC64_TLSGD relocation is
503 // used as the relaxation hint for both steps 2 and 3.
504 void PPC64::relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const {
506 case R_PPC64_GOT_TLSGD16_HA:
507 // This is relaxed from addis rT, r2, sym@got@tlsgd@ha to
508 // addis rT, r2, sym@got@tprel@ha.
509 relocateOne(Loc, R_PPC64_GOT_TPREL16_HA, Val);
511 case R_PPC64_GOT_TLSGD16_LO: {
512 // Relax from addi r3, rA, sym@got@tlsgd@l to
513 // ld r3, sym@got@tprel@l(rA)
514 uint32_t EndianOffset = Config->EKind == ELF64BEKind ? 2U : 0U;
515 uint32_t InputRegister = (read32(Loc - EndianOffset) & (0x1f << 16));
516 write32(Loc - EndianOffset, 0xE8600000 | InputRegister);
517 relocateOne(Loc, R_PPC64_GOT_TPREL16_LO_DS, Val);
521 write32(Loc, 0x60000000); // bl __tls_get_addr(sym@tlsgd) --> nop
522 write32(Loc + 4, 0x7c636A14); // nop --> add r3, r3, r13
525 llvm_unreachable("unsupported relocation for TLS GD to IE relaxation");
529 TargetInfo *elf::getPPC64TargetInfo() {