1 //===- Target.h -------------------------------------------------*- C++ -*-===//
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLD_ELF_TARGET_H
11 #define LLD_ELF_TARGET_H
13 #include "InputSection.h"
14 #include "lld/Common/ErrorHandler.h"
15 #include "llvm/Object/ELF.h"
16 #include "llvm/Support/MathExtras.h"
20 std::string toString(elf::RelType Type);
29 virtual uint32_t calcEFlags() const { return 0; }
30 virtual RelType getDynRel(RelType Type) const { return Type; }
31 virtual void writeGotPltHeader(uint8_t *Buf) const {}
32 virtual void writeGotHeader(uint8_t *Buf) const {}
33 virtual void writeGotPlt(uint8_t *Buf, const Symbol &S) const {};
34 virtual void writeIgotPlt(uint8_t *Buf, const Symbol &S) const;
35 virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
37 // If lazy binding is supported, the first entry of the PLT has code
38 // to call the dynamic linker to resolve PLT entries the first time
39 // they are called. This function writes that code.
40 virtual void writePltHeader(uint8_t *Buf) const {}
42 virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
43 uint64_t PltEntryAddr, int32_t Index,
44 unsigned RelOff) const {}
45 virtual void addPltHeaderSymbols(InputSection &IS) const {}
46 virtual void addPltSymbols(InputSection &IS, uint64_t Off) const {}
48 // Returns true if a relocation only uses the low bits of a value such that
49 // all those bits are in the same page. For example, if the relocation
50 // only uses the low 12 bits in a system with 4k pages. If this is true, the
51 // bits will always have the same value at runtime and we don't have to emit
52 // a dynamic relocation.
53 virtual bool usesOnlyLowPageBits(RelType Type) const;
55 // Decide whether a Thunk is needed for the relocation from File
57 virtual bool needsThunk(RelExpr Expr, RelType RelocType,
58 const InputFile *File, uint64_t BranchAddr,
59 const Symbol &S) const;
61 // On systems with range extensions we place collections of Thunks at
62 // regular spacings that enable the majority of branches reach the Thunks.
63 // a value of 0 means range extension thunks are not supported.
64 virtual uint32_t getThunkSectionSpacing() const { return 0; }
66 // The function with a prologue starting at Loc was compiled with
67 // -fsplit-stack and it calls a function compiled without. Adjust the prologue
68 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks.
69 // The symbols st_other flags are needed on PowerPC64 for determining the
70 // offset to the split-stack prologue.
71 virtual bool adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End,
72 uint8_t StOther) const;
74 // Return true if we can reach Dst from Src with Relocation RelocType
75 virtual bool inBranchRange(RelType Type, uint64_t Src,
77 virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
78 const uint8_t *Loc) const = 0;
80 virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
82 virtual ~TargetInfo();
84 unsigned TlsGdRelaxSkip = 1;
85 unsigned PageSize = 4096;
86 unsigned DefaultMaxPageSize = 4096;
88 uint64_t getImageBase();
90 // Offset of _GLOBAL_OFFSET_TABLE_ from base of .got or .got.plt section.
91 uint64_t GotBaseSymOff = 0;
92 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got.
93 bool GotBaseSymInGotPlt = true;
100 RelType IRelativeRel;
103 RelType TlsModuleIndexRel;
104 RelType TlsOffsetRel;
105 unsigned GotEntrySize = 0;
106 unsigned GotPltEntrySize = 0;
107 unsigned PltEntrySize;
108 unsigned PltHeaderSize;
110 // At least on x86_64 positions 1 and 2 are used by the first plt entry
111 // to support lazy loading.
112 unsigned GotPltHeaderEntriesNum = 3;
114 // On PPC ELF V2 abi, the first entry in the .got is the .TOC.
115 unsigned GotHeaderEntriesNum = 0;
117 bool NeedsThunks = false;
119 // A 4-byte field corresponding to one or more trap instructions, used to pad
120 // executable OutputSections.
121 std::array<uint8_t, 4> TrapInstr;
123 // If a target needs to rewrite calls to __morestack to instead call
124 // __morestack_non_split when a split-stack enabled caller calls a
125 // non-split-stack callee this will return true. Otherwise returns false.
126 bool NeedsMoreStackNonSplit = true;
128 virtual RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
130 virtual void relaxGot(uint8_t *Loc, uint64_t Val) const;
131 virtual void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const;
132 virtual void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
133 virtual void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
134 virtual void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
137 // On FreeBSD x86_64 the first page cannot be mmaped.
138 // On Linux that is controled by vm.mmap_min_addr. At least on some x86_64
139 // installs that is 65536, so the first 15 pages cannot be used.
140 // Given that, the smallest value that can be used in here is 0x10000.
141 uint64_t DefaultImageBase = 0x10000;
144 TargetInfo *getAArch64TargetInfo();
145 TargetInfo *getAMDGPUTargetInfo();
146 TargetInfo *getARMTargetInfo();
147 TargetInfo *getAVRTargetInfo();
148 TargetInfo *getHexagonTargetInfo();
149 TargetInfo *getMSP430TargetInfo();
150 TargetInfo *getPPC64TargetInfo();
151 TargetInfo *getPPCTargetInfo();
152 TargetInfo *getRISCVTargetInfo();
153 TargetInfo *getSPARCV9TargetInfo();
154 TargetInfo *getX32TargetInfo();
155 TargetInfo *getX86TargetInfo();
156 TargetInfo *getX86_64TargetInfo();
157 template <class ELFT> TargetInfo *getMipsTargetInfo();
160 InputSectionBase *IS;
164 // Returns input section and corresponding source string for the given location.
165 ErrorPlace getErrorPlace(const uint8_t *Loc);
167 static inline std::string getErrorLocation(const uint8_t *Loc) {
168 return getErrorPlace(Loc).Loc;
171 // In the PowerPC64 Elf V2 abi a function can have 2 entry points. The first is
172 // a global entry point (GEP) which typically is used to intiailzie the TOC
173 // pointer in general purpose register 2. The second is a local entry
174 // point (LEP) which bypasses the TOC pointer initialization code. The
175 // offset between GEP and LEP is encoded in a function's st_other flags.
176 // This function will return the offset (in bytes) from the global entry-point
177 // to the local entry-point.
178 unsigned getPPC64GlobalEntryToLocalEntryOffset(uint8_t StOther);
180 uint64_t getPPC64TocBase();
181 uint64_t getAArch64Page(uint64_t Expr);
183 extern TargetInfo *Target;
184 TargetInfo *getTarget();
186 template <class ELFT> bool isMipsPIC(const Defined *Sym);
188 static inline void reportRangeError(uint8_t *Loc, RelType Type, const Twine &V,
189 int64_t Min, uint64_t Max) {
190 ErrorPlace ErrPlace = getErrorPlace(Loc);
192 if (ErrPlace.IS && ErrPlace.IS->Name.startswith(".debug"))
193 Hint = "; consider recompiling with -fdebug-types-section to reduce size "
196 errorOrWarn(ErrPlace.Loc + "relocation " + lld::toString(Type) +
197 " out of range: " + V.str() + " is not in [" + Twine(Min).str() +
198 ", " + Twine(Max).str() + "]" + Hint);
201 inline unsigned getPltEntryOffset(unsigned Idx) {
202 return Target->PltHeaderSize + Target->PltEntrySize * Idx;
205 // Make sure that V can be represented as an N bit signed integer.
206 inline void checkInt(uint8_t *Loc, int64_t V, int N, RelType Type) {
207 if (V != llvm::SignExtend64(V, N))
208 reportRangeError(Loc, Type, Twine(V), llvm::minIntN(N), llvm::maxIntN(N));
211 // Make sure that V can be represented as an N bit unsigned integer.
212 inline void checkUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
214 reportRangeError(Loc, Type, Twine(V), 0, llvm::maxUIntN(N));
217 // Make sure that V can be represented as an N bit signed or unsigned integer.
218 inline void checkIntUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
219 // For the error message we should cast V to a signed integer so that error
220 // messages show a small negative value rather than an extremely large one
221 if (V != (uint64_t)llvm::SignExtend64(V, N) && (V >> N) != 0)
222 reportRangeError(Loc, Type, Twine((int64_t)V), llvm::minIntN(N),
226 inline void checkAlignment(uint8_t *Loc, uint64_t V, int N, RelType Type) {
227 if ((V & (N - 1)) != 0)
228 error(getErrorLocation(Loc) + "improper alignment for relocation " +
229 lld::toString(Type) + ": 0x" + llvm::utohexstr(V) +
230 " is not aligned to " + Twine(N) + " bytes");
233 // Endianness-aware read/write.
234 inline uint16_t read16(const void *P) {
235 return llvm::support::endian::read16(P, Config->Endianness);
238 inline uint32_t read32(const void *P) {
239 return llvm::support::endian::read32(P, Config->Endianness);
242 inline uint64_t read64(const void *P) {
243 return llvm::support::endian::read64(P, Config->Endianness);
246 inline void write16(void *P, uint16_t V) {
247 llvm::support::endian::write16(P, V, Config->Endianness);
250 inline void write32(void *P, uint32_t V) {
251 llvm::support::endian::write32(P, V, Config->Endianness);
254 inline void write64(void *P, uint64_t V) {
255 llvm::support::endian::write64(P, V, Config->Endianness);