1 //===- Target.h -------------------------------------------------*- C++ -*-===//
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLD_ELF_TARGET_H
11 #define LLD_ELF_TARGET_H
13 #include "InputSection.h"
14 #include "lld/Common/ErrorHandler.h"
15 #include "llvm/Object/ELF.h"
18 std::string toString(elf::RelType Type);
27 virtual uint32_t calcEFlags() const { return 0; }
28 virtual RelType getDynRel(RelType Type) const { return Type; }
29 virtual void writeGotPltHeader(uint8_t *Buf) const {}
30 virtual void writeGotHeader(uint8_t *Buf) const {}
31 virtual void writeGotPlt(uint8_t *Buf, const Symbol &S) const {};
32 virtual void writeIgotPlt(uint8_t *Buf, const Symbol &S) const;
33 virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
35 // If lazy binding is supported, the first entry of the PLT has code
36 // to call the dynamic linker to resolve PLT entries the first time
37 // they are called. This function writes that code.
38 virtual void writePltHeader(uint8_t *Buf) const {}
40 virtual void writePlt(uint8_t *Buf, uint64_t GotEntryAddr,
41 uint64_t PltEntryAddr, int32_t Index,
42 unsigned RelOff) const {}
43 virtual void addPltHeaderSymbols(InputSection &IS) const {}
44 virtual void addPltSymbols(InputSection &IS, uint64_t Off) const {}
46 unsigned getPltEntryOffset(unsigned Index) const {
47 return Index * PltEntrySize + PltHeaderSize;
50 // Returns true if a relocation only uses the low bits of a value such that
51 // all those bits are in the same page. For example, if the relocation
52 // only uses the low 12 bits in a system with 4k pages. If this is true, the
53 // bits will always have the same value at runtime and we don't have to emit
54 // a dynamic relocation.
55 virtual bool usesOnlyLowPageBits(RelType Type) const;
57 // Decide whether a Thunk is needed for the relocation from File
59 virtual bool needsThunk(RelExpr Expr, RelType RelocType,
60 const InputFile *File, uint64_t BranchAddr,
61 const Symbol &S) const;
63 // The function with a prologue starting at Loc was compiled with
64 // -fsplit-stack and it calls a function compiled without. Adjust the prologue
65 // to do the right thing. See https://gcc.gnu.org/wiki/SplitStacks.
66 virtual bool adjustPrologueForCrossSplitStack(uint8_t *Loc,
69 // Return true if we can reach Dst from Src with Relocation RelocType
70 virtual bool inBranchRange(RelType Type, uint64_t Src,
72 virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
73 const uint8_t *Loc) const = 0;
75 virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
77 virtual ~TargetInfo();
79 unsigned TlsGdRelaxSkip = 1;
80 unsigned PageSize = 4096;
81 unsigned DefaultMaxPageSize = 4096;
83 uint64_t getImageBase();
85 // Offset of _GLOBAL_OFFSET_TABLE_ from base of .got or .got.plt section.
86 uint64_t GotBaseSymOff = 0;
87 // True if _GLOBAL_OFFSET_TABLE_ is relative to .got.plt, false if .got.
88 bool GotBaseSymInGotPlt = true;
90 // On systems with range extensions we place collections of Thunks at
91 // regular spacings that enable the majority of branches reach the Thunks.
92 uint32_t ThunkSectionSpacing = 0;
101 RelType TlsModuleIndexRel;
102 RelType TlsOffsetRel;
103 unsigned GotEntrySize = 0;
104 unsigned GotPltEntrySize = 0;
105 unsigned PltEntrySize;
106 unsigned PltHeaderSize;
108 // At least on x86_64 positions 1 and 2 are used by the first plt entry
109 // to support lazy loading.
110 unsigned GotPltHeaderEntriesNum = 3;
112 // On PPC ELF V2 abi, the first entry in the .got is the .TOC.
113 unsigned GotHeaderEntriesNum = 0;
115 // For TLS variant 1, the TCB is a fixed size specified by the Target.
116 // For variant 2, the TCB is an unspecified size.
117 // Set to 0 for variant 2.
118 unsigned TcbSize = 0;
120 // Set to the offset (in bytes) that the thread pointer is initialized to
121 // point to, relative to the start of the thread local storage.
122 unsigned TlsTpOffset = 0;
124 bool NeedsThunks = false;
126 // A 4-byte field corresponding to one or more trap instructions, used to pad
127 // executable OutputSections.
128 uint32_t TrapInstr = 0;
130 virtual RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
132 virtual void relaxGot(uint8_t *Loc, uint64_t Val) const;
133 virtual void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const;
134 virtual void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
135 virtual void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
136 virtual void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const;
139 // On FreeBSD x86_64 the first page cannot be mmaped.
140 // On Linux that is controled by vm.mmap_min_addr. At least on some x86_64
141 // installs that is 65536, so the first 15 pages cannot be used.
142 // Given that, the smallest value that can be used in here is 0x10000.
143 uint64_t DefaultImageBase = 0x10000;
146 TargetInfo *getAArch64TargetInfo();
147 TargetInfo *getAMDGPUTargetInfo();
148 TargetInfo *getARMTargetInfo();
149 TargetInfo *getAVRTargetInfo();
150 TargetInfo *getHexagonTargetInfo();
151 TargetInfo *getPPC64TargetInfo();
152 TargetInfo *getPPCTargetInfo();
153 TargetInfo *getSPARCV9TargetInfo();
154 TargetInfo *getX32TargetInfo();
155 TargetInfo *getX86TargetInfo();
156 TargetInfo *getX86_64TargetInfo();
157 template <class ELFT> TargetInfo *getMipsTargetInfo();
160 InputSectionBase *IS;
164 // Returns input section and corresponding source string for the given location.
165 ErrorPlace getErrorPlace(const uint8_t *Loc);
167 static inline std::string getErrorLocation(const uint8_t *Loc) {
168 return getErrorPlace(Loc).Loc;
171 uint64_t getPPC64TocBase();
172 uint64_t getAArch64Page(uint64_t Expr);
174 extern TargetInfo *Target;
175 TargetInfo *getTarget();
177 template <class ELFT> bool isMipsPIC(const Defined *Sym);
179 static inline void reportRangeError(uint8_t *Loc, RelType Type, const Twine &V,
180 int64_t Min, uint64_t Max) {
181 ErrorPlace ErrPlace = getErrorPlace(Loc);
183 if (ErrPlace.IS && ErrPlace.IS->Name.startswith(".debug"))
184 Hint = "; consider recompiling with -fdebug-types-section to reduce size "
187 error(ErrPlace.Loc + "relocation " + lld::toString(Type) +
188 " out of range: " + V.str() + " is not in [" + Twine(Min).str() + ", " +
189 Twine(Max).str() + "]" + Hint);
192 // Sign-extend Nth bit all the way to MSB.
193 inline int64_t signExtend(uint64_t V, int N) {
194 return int64_t(V << (64 - N)) >> (64 - N);
197 // Make sure that V can be represented as an N bit signed integer.
198 inline void checkInt(uint8_t *Loc, int64_t V, int N, RelType Type) {
199 if (V != signExtend(V, N))
200 reportRangeError(Loc, Type, Twine(V), llvm::minIntN(N), llvm::maxIntN(N));
203 // Make sure that V can be represented as an N bit unsigned integer.
204 inline void checkUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
206 reportRangeError(Loc, Type, Twine(V), 0, llvm::maxUIntN(N));
209 // Make sure that V can be represented as an N bit signed or unsigned integer.
210 inline void checkIntUInt(uint8_t *Loc, uint64_t V, int N, RelType Type) {
211 // For the error message we should cast V to a signed integer so that error
212 // messages show a small negative value rather than an extremely large one
213 if (V != (uint64_t)signExtend(V, N) && (V >> N) != 0)
214 reportRangeError(Loc, Type, Twine((int64_t)V), llvm::minIntN(N),
218 inline void checkAlignment(uint8_t *Loc, uint64_t V, int N, RelType Type) {
219 if ((V & (N - 1)) != 0)
220 error(getErrorLocation(Loc) + "improper alignment for relocation " +
221 lld::toString(Type) + ": 0x" + llvm::utohexstr(V) +
222 " is not aligned to " + Twine(N) + " bytes");
225 // Endianness-aware read/write.
226 inline uint16_t read16(const void *P) {
227 return llvm::support::endian::read16(P, Config->Endianness);
230 inline uint32_t read32(const void *P) {
231 return llvm::support::endian::read32(P, Config->Endianness);
234 inline uint64_t read64(const void *P) {
235 return llvm::support::endian::read64(P, Config->Endianness);
238 inline void write16(void *P, uint16_t V) {
239 llvm::support::endian::write16(P, V, Config->Endianness);
242 inline void write32(void *P, uint32_t V) {
243 llvm::support::endian::write32(P, V, Config->Endianness);
246 inline void write64(void *P, uint64_t V) {
247 llvm::support::endian::write64(P, V, Config->Endianness);