1 //===-- ArchSpec.h ----------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef liblldb_ArchSpec_h_
11 #define liblldb_ArchSpec_h_
13 #if defined(__cplusplus)
15 #include "lldb/Utility/ConstString.h"
16 #include "lldb/lldb-enumerations.h"
17 #include "lldb/lldb-private-enumerations.h"
18 #include "llvm/ADT/StringRef.h" // for StringRef
19 #include "llvm/ADT/Triple.h"
21 #include <string> // for string
23 #include <stddef.h> // for size_t
24 #include <stdint.h> // for uint32_t
26 namespace lldb_private {
29 namespace lldb_private {
32 namespace lldb_private {
35 namespace lldb_private {
39 namespace lldb_private {
41 //----------------------------------------------------------------------
42 /// @class ArchSpec ArchSpec.h "lldb/Core/ArchSpec.h"
43 /// @brief An architecture specification class.
45 /// A class designed to be created from a cpu type and subtype, a
46 /// string representation, or an llvm::Triple. Keeping all of the
47 /// conversions of strings to architecture enumeration values confined
48 /// to this class allows new architecture support to be added easily.
49 //----------------------------------------------------------------------
55 eMIPSSubType_mips32r2,
56 eMIPSSubType_mips32r6,
57 eMIPSSubType_mips32el,
58 eMIPSSubType_mips32r2el,
59 eMIPSSubType_mips32r6el,
61 eMIPSSubType_mips64r2,
62 eMIPSSubType_mips64r6,
63 eMIPSSubType_mips64el,
64 eMIPSSubType_mips64r2el,
65 eMIPSSubType_mips64r6el,
68 // Masks for the ases word of an ABI flags structure.
70 eMIPSAse_dsp = 0x00000001, // DSP ASE
71 eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE
72 eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme
73 eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE
74 eMIPSAse_mdmx = 0x00000010, // MDMX ASE
75 eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE
76 eMIPSAse_mt = 0x00000040, // MT ASE
77 eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE
78 eMIPSAse_virt = 0x00000100, // VZ ASE
79 eMIPSAse_msa = 0x00000200, // MSA ASE
80 eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE
81 eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE
82 eMIPSAse_xpa = 0x00001000, // XPA ASE
83 eMIPSAse_mask = 0x00001fff,
84 eMIPSABI_O32 = 0x00002000,
85 eMIPSABI_N32 = 0x00004000,
86 eMIPSABI_N64 = 0x00008000,
87 eMIPSABI_O64 = 0x00020000,
88 eMIPSABI_EABI32 = 0x00040000,
89 eMIPSABI_EABI64 = 0x00080000,
90 eMIPSABI_mask = 0x000ff000
93 // MIPS Floating point ABI Values
95 eMIPS_ABI_FP_ANY = 0x00000000,
96 eMIPS_ABI_FP_DOUBLE = 0x00100000, // hard float / -mdouble-float
97 eMIPS_ABI_FP_SINGLE = 0x00200000, // hard float / -msingle-float
98 eMIPS_ABI_FP_SOFT = 0x00300000, // soft float
99 eMIPS_ABI_FP_OLD_64 = 0x00400000, // -mips32r2 -mfp64
100 eMIPS_ABI_FP_XX = 0x00500000, // -mfpxx
101 eMIPS_ABI_FP_64 = 0x00600000, // -mips32r2 -mfp64
102 eMIPS_ABI_FP_64A = 0x00700000, // -mips32r2 -mfp64 -mno-odd-spreg
103 eMIPS_ABI_FP_mask = 0x00700000
106 // ARM specific e_flags
108 eARM_abi_soft_float = 0x00000200,
109 eARM_abi_hard_float = 0x00000400
181 eCore_ppc64_ppc970_64,
187 eCore_sparc9_generic,
195 eCore_x86_64_x86_64h, // Haswell enabled x86_64
196 eCore_hexagon_generic,
197 eCore_hexagon_hexagonv4,
198 eCore_hexagon_hexagonv5,
210 // The following constants are used for wildcard matching only
219 kCore_arm_first = eCore_arm_generic,
220 kCore_arm_last = eCore_arm_xscale,
222 kCore_thumb_first = eCore_thumb,
223 kCore_thumb_last = eCore_thumbv7em,
225 kCore_ppc_first = eCore_ppc_generic,
226 kCore_ppc_last = eCore_ppc_ppc970,
228 kCore_ppc64_first = eCore_ppc64_generic,
229 kCore_ppc64_last = eCore_ppc64_ppc970_64,
231 kCore_x86_32_first = eCore_x86_32_i386,
232 kCore_x86_32_last = eCore_x86_32_i686,
234 kCore_x86_64_first = eCore_x86_64_x86_64,
235 kCore_x86_64_last = eCore_x86_64_x86_64h,
237 kCore_hexagon_first = eCore_hexagon_generic,
238 kCore_hexagon_last = eCore_hexagon_hexagonv5,
240 kCore_kalimba_first = eCore_kalimba3,
241 kCore_kalimba_last = eCore_kalimba5,
243 kCore_mips32_first = eCore_mips32,
244 kCore_mips32_last = eCore_mips32r6,
246 kCore_mips32el_first = eCore_mips32el,
247 kCore_mips32el_last = eCore_mips32r6el,
249 kCore_mips64_first = eCore_mips64,
250 kCore_mips64_last = eCore_mips64r6,
252 kCore_mips64el_first = eCore_mips64el,
253 kCore_mips64el_last = eCore_mips64r6el,
255 kCore_mips_first = eCore_mips32,
256 kCore_mips_last = eCore_mips64r6el
260 typedef void (*StopInfoOverrideCallbackType)(lldb_private::Thread &thread);
262 //------------------------------------------------------------------
263 /// Default constructor.
265 /// Default constructor that initializes the object with invalid
266 /// cpu type and subtype values.
267 //------------------------------------------------------------------
270 //------------------------------------------------------------------
271 /// Constructor over triple.
273 /// Constructs an ArchSpec with properties consistent with the given
275 //------------------------------------------------------------------
276 explicit ArchSpec(const llvm::Triple &triple);
277 explicit ArchSpec(const char *triple_cstr);
278 explicit ArchSpec(llvm::StringRef triple_str);
279 ArchSpec(const char *triple_cstr, Platform *platform);
280 ArchSpec(llvm::StringRef triple_str, Platform *platform);
281 //------------------------------------------------------------------
282 /// Constructor over architecture name.
284 /// Constructs an ArchSpec with properties consistent with the given
285 /// object type and architecture name.
286 //------------------------------------------------------------------
287 explicit ArchSpec(ArchitectureType arch_type, uint32_t cpu_type,
288 uint32_t cpu_subtype);
290 //------------------------------------------------------------------
292 //------------------------------------------------------------------
295 //------------------------------------------------------------------
296 /// Assignment operator.
298 /// @param[in] rhs another ArchSpec object to copy.
300 /// @return A const reference to this object.
301 //------------------------------------------------------------------
302 const ArchSpec &operator=(const ArchSpec &rhs);
304 static size_t AutoComplete(llvm::StringRef name, StringList &matches);
306 //------------------------------------------------------------------
307 /// Returns a static string representing the current architecture.
309 /// @return A static string correcponding to the current
311 //------------------------------------------------------------------
312 const char *GetArchitectureName() const;
314 //-----------------------------------------------------------------
315 /// if MIPS architecture return true.
317 /// @return a boolean value.
318 //-----------------------------------------------------------------
321 //------------------------------------------------------------------
322 /// Returns a string representing current architecture as a target CPU
323 /// for tools like compiler, disassembler etc.
325 /// @return A string representing target CPU for the current
327 //------------------------------------------------------------------
328 std::string GetClangTargetCPU() const;
330 //------------------------------------------------------------------
331 /// Return a string representing target application ABI.
333 /// @return A string representing target application ABI.
334 //------------------------------------------------------------------
335 std::string GetTargetABI() const;
337 //------------------------------------------------------------------
338 /// Clears the object state.
340 /// Clears the object state back to a default invalid state.
341 //------------------------------------------------------------------
344 //------------------------------------------------------------------
345 /// Returns the size in bytes of an address of the current
348 /// @return The byte size of an address of the current architecture.
349 //------------------------------------------------------------------
350 uint32_t GetAddressByteSize() const;
352 //------------------------------------------------------------------
353 /// Returns a machine family for the current architecture.
355 /// @return An LLVM arch type.
356 //------------------------------------------------------------------
357 llvm::Triple::ArchType GetMachine() const;
359 //------------------------------------------------------------------
360 /// Returns the distribution id of the architecture.
362 /// This will be something like "ubuntu", "fedora", etc. on Linux.
364 /// @return A ConstString ref containing the distribution id,
365 /// potentially empty.
366 //------------------------------------------------------------------
367 const ConstString &GetDistributionId() const;
369 //------------------------------------------------------------------
370 /// Set the distribution id of the architecture.
372 /// This will be something like "ubuntu", "fedora", etc. on Linux.
373 /// This should be the same value returned by
374 /// HostInfo::GetDistributionId ().
375 ///------------------------------------------------------------------
376 void SetDistributionId(const char *distribution_id);
378 //------------------------------------------------------------------
379 /// Tests if this ArchSpec is valid.
381 /// @return True if the current architecture is valid, false
383 //------------------------------------------------------------------
384 bool IsValid() const {
385 return m_core >= eCore_arm_generic && m_core < kNumCores;
388 bool TripleVendorWasSpecified() const {
389 return !m_triple.getVendorName().empty();
392 bool TripleVendorIsUnspecifiedUnknown() const {
393 return m_triple.getVendor() == llvm::Triple::UnknownVendor &&
394 m_triple.getVendorName().empty();
397 bool TripleOSWasSpecified() const { return !m_triple.getOSName().empty(); }
399 bool TripleEnvironmentWasSpecified() const {
400 return !m_triple.getEnvironmentName().empty();
403 bool TripleOSIsUnspecifiedUnknown() const {
404 return m_triple.getOS() == llvm::Triple::UnknownOS &&
405 m_triple.getOSName().empty();
408 //------------------------------------------------------------------
409 /// Merges fields from another ArchSpec into this ArchSpec.
411 /// This will use the supplied ArchSpec to fill in any fields of
412 /// the triple in this ArchSpec which were unspecified. This can
413 /// be used to refine a generic ArchSpec with a more specific one.
414 /// For example, if this ArchSpec's triple is something like
415 /// i386-unknown-unknown-unknown, and we have a triple which is
416 /// x64-pc-windows-msvc, then merging that triple into this one
417 /// will result in the triple i386-pc-windows-msvc.
419 //------------------------------------------------------------------
420 void MergeFrom(const ArchSpec &other);
422 //------------------------------------------------------------------
423 /// Change the architecture object type, CPU type and OS type.
425 /// @param[in] arch_type The object type of this ArchSpec.
427 /// @param[in] cpu The required CPU type.
429 /// @param[in] os The optional OS type
430 /// The default value of 0 was chosen to from the ELF spec value
431 /// ELFOSABI_NONE. ELF is the only one using this parameter. If another
432 /// format uses this parameter and 0 does not work, use a value over
433 /// 255 because in the ELF header this is value is only a byte.
435 /// @return True if the object, and CPU were successfully set.
437 /// As a side effect, the vendor value is usually set to unknown.
438 /// The exections are
439 /// aarch64-apple-ios
445 /// As a side effect, the os value is usually set to unknown
446 /// The exceptions are
448 /// aarch64-apple-ios
451 /// powerpc-apple-darwin
457 //------------------------------------------------------------------
458 bool SetArchitecture(ArchitectureType arch_type, uint32_t cpu, uint32_t sub,
461 //------------------------------------------------------------------
462 /// Returns the byte order for the architecture specification.
464 /// @return The endian enumeration for the current endianness of
465 /// the architecture specification
466 //------------------------------------------------------------------
467 lldb::ByteOrder GetByteOrder() const;
469 //------------------------------------------------------------------
470 /// Sets this ArchSpec's byte order.
472 /// In the common case there is no need to call this method as the
473 /// byte order can almost always be determined by the architecture.
474 /// However, many CPU's are bi-endian (ARM, Alpha, PowerPC, etc)
475 /// and the default/assumed byte order may be incorrect.
476 //------------------------------------------------------------------
477 void SetByteOrder(lldb::ByteOrder byte_order) { m_byte_order = byte_order; }
479 uint32_t GetMinimumOpcodeByteSize() const;
481 uint32_t GetMaximumOpcodeByteSize() const;
483 Core GetCore() const { return m_core; }
485 uint32_t GetMachOCPUType() const;
487 uint32_t GetMachOCPUSubType() const;
489 //------------------------------------------------------------------
490 /// Architecture data byte width accessor
492 /// @return the size in 8-bit (host) bytes of a minimum addressable
493 /// unit from the Architecture's data bus
494 //------------------------------------------------------------------
495 uint32_t GetDataByteSize() const;
497 //------------------------------------------------------------------
498 /// Architecture code byte width accessor
500 /// @return the size in 8-bit (host) bytes of a minimum addressable
501 /// unit from the Architecture's code bus
502 //------------------------------------------------------------------
503 uint32_t GetCodeByteSize() const;
505 //------------------------------------------------------------------
506 /// Architecture tripple accessor.
508 /// @return A triple describing this ArchSpec.
509 //------------------------------------------------------------------
510 llvm::Triple &GetTriple() { return m_triple; }
512 //------------------------------------------------------------------
513 /// Architecture tripple accessor.
515 /// @return A triple describing this ArchSpec.
516 //------------------------------------------------------------------
517 const llvm::Triple &GetTriple() const { return m_triple; }
519 void DumpTriple(Stream &s) const;
521 //------------------------------------------------------------------
522 /// Architecture tripple setter.
524 /// Configures this ArchSpec according to the given triple. If the
525 /// triple has unknown components in all of the vendor, OS, and
526 /// the optional environment field (i.e. "i386-unknown-unknown")
527 /// then default values are taken from the host. Architecture and
528 /// environment components are used to further resolve the CPU type
529 /// and subtype, endian characteristics, etc.
531 /// @return A triple describing this ArchSpec.
532 //------------------------------------------------------------------
533 bool SetTriple(const llvm::Triple &triple);
535 bool SetTriple(llvm::StringRef triple_str);
536 bool SetTriple(llvm::StringRef triple_str, Platform *platform);
538 bool SetTriple(const char *triple_cstr);
539 bool SetTriple(const char *triple_cstr, Platform *platform);
541 //------------------------------------------------------------------
542 /// Returns the default endianness of the architecture.
544 /// @return The endian enumeration for the default endianness of
545 /// the architecture.
546 //------------------------------------------------------------------
547 lldb::ByteOrder GetDefaultEndian() const;
549 //------------------------------------------------------------------
550 /// Returns true if 'char' is a signed type by defualt in the
551 /// architecture false otherwise
553 /// @return True if 'char' is a signed type by default on the
554 /// architecture and false otherwise.
555 //------------------------------------------------------------------
556 bool CharIsSignedByDefault() const;
558 //------------------------------------------------------------------
559 /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu
560 /// type match between them.
561 /// e.g. armv7s is not an exact match with armv7 - this would return false
563 /// @return true if the two ArchSpecs match.
564 //------------------------------------------------------------------
565 bool IsExactMatch(const ArchSpec &rhs) const;
567 //------------------------------------------------------------------
568 /// Compare an ArchSpec to another ArchSpec, requiring a compatible
569 /// cpu type match between them.
570 /// e.g. armv7s is compatible with armv7 - this method would return true
572 /// @return true if the two ArchSpecs are compatible
573 //------------------------------------------------------------------
574 bool IsCompatibleMatch(const ArchSpec &rhs) const;
576 //------------------------------------------------------------------
577 /// Get a stop info override callback for the current architecture.
579 /// Most platform specific code should go in lldb_private::Platform,
580 /// but there are cases where no matter which platform you are on
581 /// certain things hold true.
583 /// This callback is currently intended to handle cases where a
584 /// program stops at an instruction that won't get executed and it
585 /// allows the stop reasonm, like "breakpoint hit", to be replaced
586 /// with a different stop reason like "no stop reason".
588 /// This is specifically used for ARM in Thumb code when we stop in
589 /// an IT instruction (if/then/else) where the instruction won't get
590 /// executed and therefore it wouldn't be correct to show the program
591 /// stopped at the current PC. The code is generic and applies to all
594 /// @return NULL or a valid stop info override callback for the
595 /// current architecture.
596 //------------------------------------------------------------------
597 StopInfoOverrideCallbackType GetStopInfoOverrideCallback() const;
599 bool IsFullySpecifiedTriple() const;
601 void PiecewiseTripleCompare(const ArchSpec &other, bool &arch_different,
602 bool &vendor_different, bool &os_different,
603 bool &os_version_different, bool &env_different);
605 //------------------------------------------------------------------
606 /// Detect whether this architecture uses thumb code exclusively
608 /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can
609 /// only execute the Thumb instructions, never Arm. We should normally
610 /// pick up arm/thumbness from their the processor status bits (cpsr/xpsr)
611 /// or hints on each function - but when doing bare-boards low level
612 /// debugging (especially common with these embedded processors), we may
613 /// not have those things easily accessible.
615 /// @return true if this is an arm ArchSpec which can only execute Thumb
617 //------------------------------------------------------------------
618 bool IsAlwaysThumbInstructions() const;
620 uint32_t GetFlags() const { return m_flags; }
622 void SetFlags(uint32_t flags) { m_flags = flags; }
624 void SetFlags(std::string elf_abi);
627 bool IsEqualTo(const ArchSpec &rhs, bool exact_match) const;
630 llvm::Triple m_triple;
631 Core m_core = kCore_invalid;
632 lldb::ByteOrder m_byte_order = lldb::eByteOrderInvalid;
634 // Additional arch flags which we cannot get from triple and core
635 // For MIPS these are application specific extensions like
636 // micromips, mips16 etc.
637 uint32_t m_flags = 0;
639 ConstString m_distribution_id;
641 // Called when m_def or m_entry are changed. Fills in all remaining
642 // members with default values.
643 void CoreUpdated(bool update_triple);
646 //------------------------------------------------------------------
647 /// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs)
648 /// @brief Less than operator.
650 /// Tests two ArchSpec objects to see if \a lhs is less than \a
653 /// @param[in] lhs The Left Hand Side ArchSpec object to compare.
654 /// @param[in] rhs The Left Hand Side ArchSpec object to compare.
656 /// @return true if \a lhs is less than \a rhs
657 //------------------------------------------------------------------
658 bool operator<(const ArchSpec &lhs, const ArchSpec &rhs);
660 bool ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str, ArchSpec &arch);
662 } // namespace lldb_private
664 #endif // #if defined(__cplusplus)
665 #endif // #ifndef liblldb_ArchSpec_h_