1 //===-- ArchSpec.h ----------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLDB_UTILITY_ARCHSPEC_H
11 #define LLDB_UTILITY_ARCHSPEC_H
13 #include "lldb/Utility/ConstString.h"
14 #include "lldb/lldb-enumerations.h"
15 #include "lldb/lldb-forward.h"
16 #include "lldb/lldb-private-enumerations.h"
17 #include "llvm/ADT/StringRef.h" // for StringRef
18 #include "llvm/ADT/Triple.h"
19 #include <cstddef> // for size_t
20 #include <cstdint> // for uint32_t
21 #include <string> // for string
23 namespace lldb_private {
25 //----------------------------------------------------------------------
26 /// @class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h"
27 /// @brief An architecture specification class.
29 /// A class designed to be created from a cpu type and subtype, a
30 /// string representation, or an llvm::Triple. Keeping all of the
31 /// conversions of strings to architecture enumeration values confined
32 /// to this class allows new architecture support to be added easily.
33 //----------------------------------------------------------------------
39 eMIPSSubType_mips32r2,
40 eMIPSSubType_mips32r6,
41 eMIPSSubType_mips32el,
42 eMIPSSubType_mips32r2el,
43 eMIPSSubType_mips32r6el,
45 eMIPSSubType_mips64r2,
46 eMIPSSubType_mips64r6,
47 eMIPSSubType_mips64el,
48 eMIPSSubType_mips64r2el,
49 eMIPSSubType_mips64r6el,
52 // Masks for the ases word of an ABI flags structure.
54 eMIPSAse_dsp = 0x00000001, // DSP ASE
55 eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE
56 eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme
57 eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE
58 eMIPSAse_mdmx = 0x00000010, // MDMX ASE
59 eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE
60 eMIPSAse_mt = 0x00000040, // MT ASE
61 eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE
62 eMIPSAse_virt = 0x00000100, // VZ ASE
63 eMIPSAse_msa = 0x00000200, // MSA ASE
64 eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE
65 eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE
66 eMIPSAse_xpa = 0x00001000, // XPA ASE
67 eMIPSAse_mask = 0x00001fff,
68 eMIPSABI_O32 = 0x00002000,
69 eMIPSABI_N32 = 0x00004000,
70 eMIPSABI_N64 = 0x00008000,
71 eMIPSABI_O64 = 0x00020000,
72 eMIPSABI_EABI32 = 0x00040000,
73 eMIPSABI_EABI64 = 0x00080000,
74 eMIPSABI_mask = 0x000ff000
77 // MIPS Floating point ABI Values
79 eMIPS_ABI_FP_ANY = 0x00000000,
80 eMIPS_ABI_FP_DOUBLE = 0x00100000, // hard float / -mdouble-float
81 eMIPS_ABI_FP_SINGLE = 0x00200000, // hard float / -msingle-float
82 eMIPS_ABI_FP_SOFT = 0x00300000, // soft float
83 eMIPS_ABI_FP_OLD_64 = 0x00400000, // -mips32r2 -mfp64
84 eMIPS_ABI_FP_XX = 0x00500000, // -mfpxx
85 eMIPS_ABI_FP_64 = 0x00600000, // -mips32r2 -mfp64
86 eMIPS_ABI_FP_64A = 0x00700000, // -mips32r2 -mfp64 -mno-odd-spreg
87 eMIPS_ABI_FP_mask = 0x00700000
90 // ARM specific e_flags
92 eARM_abi_soft_float = 0x00000200,
93 eARM_abi_hard_float = 0x00000400
164 eCore_ppc64le_generic,
166 eCore_ppc64_ppc970_64,
172 eCore_sparc9_generic,
180 eCore_x86_64_x86_64h, // Haswell enabled x86_64
181 eCore_hexagon_generic,
182 eCore_hexagon_hexagonv4,
183 eCore_hexagon_hexagonv5,
195 // The following constants are used for wildcard matching only
204 kCore_arm_first = eCore_arm_generic,
205 kCore_arm_last = eCore_arm_xscale,
207 kCore_thumb_first = eCore_thumb,
208 kCore_thumb_last = eCore_thumbv7em,
210 kCore_ppc_first = eCore_ppc_generic,
211 kCore_ppc_last = eCore_ppc_ppc970,
213 kCore_ppc64_first = eCore_ppc64_generic,
214 kCore_ppc64_last = eCore_ppc64_ppc970_64,
216 kCore_x86_32_first = eCore_x86_32_i386,
217 kCore_x86_32_last = eCore_x86_32_i686,
219 kCore_x86_64_first = eCore_x86_64_x86_64,
220 kCore_x86_64_last = eCore_x86_64_x86_64h,
222 kCore_hexagon_first = eCore_hexagon_generic,
223 kCore_hexagon_last = eCore_hexagon_hexagonv5,
225 kCore_kalimba_first = eCore_kalimba3,
226 kCore_kalimba_last = eCore_kalimba5,
228 kCore_mips32_first = eCore_mips32,
229 kCore_mips32_last = eCore_mips32r6,
231 kCore_mips32el_first = eCore_mips32el,
232 kCore_mips32el_last = eCore_mips32r6el,
234 kCore_mips64_first = eCore_mips64,
235 kCore_mips64_last = eCore_mips64r6,
237 kCore_mips64el_first = eCore_mips64el,
238 kCore_mips64el_last = eCore_mips64r6el,
240 kCore_mips_first = eCore_mips32,
241 kCore_mips_last = eCore_mips64r6el
245 //------------------------------------------------------------------
246 /// Default constructor.
248 /// Default constructor that initializes the object with invalid
249 /// cpu type and subtype values.
250 //------------------------------------------------------------------
253 //------------------------------------------------------------------
254 /// Constructor over triple.
256 /// Constructs an ArchSpec with properties consistent with the given
258 //------------------------------------------------------------------
259 explicit ArchSpec(const llvm::Triple &triple);
260 explicit ArchSpec(const char *triple_cstr);
261 explicit ArchSpec(llvm::StringRef triple_str);
262 //------------------------------------------------------------------
263 /// Constructor over architecture name.
265 /// Constructs an ArchSpec with properties consistent with the given
266 /// object type and architecture name.
267 //------------------------------------------------------------------
268 explicit ArchSpec(ArchitectureType arch_type, uint32_t cpu_type,
269 uint32_t cpu_subtype);
271 //------------------------------------------------------------------
273 //------------------------------------------------------------------
276 //------------------------------------------------------------------
277 /// Assignment operator.
279 /// @param[in] rhs another ArchSpec object to copy.
281 /// @return A const reference to this object.
282 //------------------------------------------------------------------
283 const ArchSpec &operator=(const ArchSpec &rhs);
285 //---------------------------------------------------------------------------
286 /// Returns true if the OS, vendor and environment fields of the triple are
287 /// unset. The triple is expected to be normalized (llvm::Triple::normalize).
288 //---------------------------------------------------------------------------
289 static bool ContainsOnlyArch(const llvm::Triple &normalized_triple);
291 static size_t AutoComplete(llvm::StringRef name, StringList &matches);
293 //------------------------------------------------------------------
294 /// Returns a static string representing the current architecture.
296 /// @return A static string correcponding to the current
298 //------------------------------------------------------------------
299 const char *GetArchitectureName() const;
301 //-----------------------------------------------------------------
302 /// if MIPS architecture return true.
304 /// @return a boolean value.
305 //-----------------------------------------------------------------
308 //------------------------------------------------------------------
309 /// Returns a string representing current architecture as a target CPU
310 /// for tools like compiler, disassembler etc.
312 /// @return A string representing target CPU for the current
314 //------------------------------------------------------------------
315 std::string GetClangTargetCPU() const;
317 //------------------------------------------------------------------
318 /// Return a string representing target application ABI.
320 /// @return A string representing target application ABI.
321 //------------------------------------------------------------------
322 std::string GetTargetABI() const;
324 //------------------------------------------------------------------
325 /// Clears the object state.
327 /// Clears the object state back to a default invalid state.
328 //------------------------------------------------------------------
331 //------------------------------------------------------------------
332 /// Returns the size in bytes of an address of the current
335 /// @return The byte size of an address of the current architecture.
336 //------------------------------------------------------------------
337 uint32_t GetAddressByteSize() const;
339 //------------------------------------------------------------------
340 /// Returns a machine family for the current architecture.
342 /// @return An LLVM arch type.
343 //------------------------------------------------------------------
344 llvm::Triple::ArchType GetMachine() const;
346 //------------------------------------------------------------------
347 /// Returns the distribution id of the architecture.
349 /// This will be something like "ubuntu", "fedora", etc. on Linux.
351 /// @return A ConstString ref containing the distribution id,
352 /// potentially empty.
353 //------------------------------------------------------------------
354 const ConstString &GetDistributionId() const;
356 //------------------------------------------------------------------
357 /// Set the distribution id of the architecture.
359 /// This will be something like "ubuntu", "fedora", etc. on Linux.
360 /// This should be the same value returned by
361 /// HostInfo::GetDistributionId ().
362 ///------------------------------------------------------------------
363 void SetDistributionId(const char *distribution_id);
365 //------------------------------------------------------------------
366 /// Tests if this ArchSpec is valid.
368 /// @return True if the current architecture is valid, false
370 //------------------------------------------------------------------
371 bool IsValid() const {
372 return m_core >= eCore_arm_generic && m_core < kNumCores;
375 bool TripleVendorWasSpecified() const {
376 return !m_triple.getVendorName().empty();
379 bool TripleVendorIsUnspecifiedUnknown() const {
380 return m_triple.getVendor() == llvm::Triple::UnknownVendor &&
381 m_triple.getVendorName().empty();
384 bool TripleOSWasSpecified() const { return !m_triple.getOSName().empty(); }
386 bool TripleEnvironmentWasSpecified() const {
387 return !m_triple.getEnvironmentName().empty();
390 bool TripleOSIsUnspecifiedUnknown() const {
391 return m_triple.getOS() == llvm::Triple::UnknownOS &&
392 m_triple.getOSName().empty();
395 //------------------------------------------------------------------
396 /// Merges fields from another ArchSpec into this ArchSpec.
398 /// This will use the supplied ArchSpec to fill in any fields of
399 /// the triple in this ArchSpec which were unspecified. This can
400 /// be used to refine a generic ArchSpec with a more specific one.
401 /// For example, if this ArchSpec's triple is something like
402 /// i386-unknown-unknown-unknown, and we have a triple which is
403 /// x64-pc-windows-msvc, then merging that triple into this one
404 /// will result in the triple i386-pc-windows-msvc.
406 //------------------------------------------------------------------
407 void MergeFrom(const ArchSpec &other);
409 //------------------------------------------------------------------
410 /// Change the architecture object type, CPU type and OS type.
412 /// @param[in] arch_type The object type of this ArchSpec.
414 /// @param[in] cpu The required CPU type.
416 /// @param[in] os The optional OS type
417 /// The default value of 0 was chosen to from the ELF spec value
418 /// ELFOSABI_NONE. ELF is the only one using this parameter. If another
419 /// format uses this parameter and 0 does not work, use a value over
420 /// 255 because in the ELF header this is value is only a byte.
422 /// @return True if the object, and CPU were successfully set.
424 /// As a side effect, the vendor value is usually set to unknown.
425 /// The exections are
426 /// aarch64-apple-ios
432 /// As a side effect, the os value is usually set to unknown
433 /// The exceptions are
435 /// aarch64-apple-ios
438 /// powerpc-apple-darwin
444 //------------------------------------------------------------------
445 bool SetArchitecture(ArchitectureType arch_type, uint32_t cpu, uint32_t sub,
448 //------------------------------------------------------------------
449 /// Returns the byte order for the architecture specification.
451 /// @return The endian enumeration for the current endianness of
452 /// the architecture specification
453 //------------------------------------------------------------------
454 lldb::ByteOrder GetByteOrder() const;
456 //------------------------------------------------------------------
457 /// Sets this ArchSpec's byte order.
459 /// In the common case there is no need to call this method as the
460 /// byte order can almost always be determined by the architecture.
461 /// However, many CPU's are bi-endian (ARM, Alpha, PowerPC, etc)
462 /// and the default/assumed byte order may be incorrect.
463 //------------------------------------------------------------------
464 void SetByteOrder(lldb::ByteOrder byte_order) { m_byte_order = byte_order; }
466 uint32_t GetMinimumOpcodeByteSize() const;
468 uint32_t GetMaximumOpcodeByteSize() const;
470 Core GetCore() const { return m_core; }
472 uint32_t GetMachOCPUType() const;
474 uint32_t GetMachOCPUSubType() const;
476 //------------------------------------------------------------------
477 /// Architecture data byte width accessor
479 /// @return the size in 8-bit (host) bytes of a minimum addressable
480 /// unit from the Architecture's data bus
481 //------------------------------------------------------------------
482 uint32_t GetDataByteSize() const;
484 //------------------------------------------------------------------
485 /// Architecture code byte width accessor
487 /// @return the size in 8-bit (host) bytes of a minimum addressable
488 /// unit from the Architecture's code bus
489 //------------------------------------------------------------------
490 uint32_t GetCodeByteSize() const;
492 //------------------------------------------------------------------
493 /// Architecture tripple accessor.
495 /// @return A triple describing this ArchSpec.
496 //------------------------------------------------------------------
497 llvm::Triple &GetTriple() { return m_triple; }
499 //------------------------------------------------------------------
500 /// Architecture tripple accessor.
502 /// @return A triple describing this ArchSpec.
503 //------------------------------------------------------------------
504 const llvm::Triple &GetTriple() const { return m_triple; }
506 void DumpTriple(Stream &s) const;
508 //------------------------------------------------------------------
509 /// Architecture tripple setter.
511 /// Configures this ArchSpec according to the given triple. If the
512 /// triple has unknown components in all of the vendor, OS, and
513 /// the optional environment field (i.e. "i386-unknown-unknown")
514 /// then default values are taken from the host. Architecture and
515 /// environment components are used to further resolve the CPU type
516 /// and subtype, endian characteristics, etc.
518 /// @return A triple describing this ArchSpec.
519 //------------------------------------------------------------------
520 bool SetTriple(const llvm::Triple &triple);
522 bool SetTriple(llvm::StringRef triple_str);
524 //------------------------------------------------------------------
525 /// Returns the default endianness of the architecture.
527 /// @return The endian enumeration for the default endianness of
528 /// the architecture.
529 //------------------------------------------------------------------
530 lldb::ByteOrder GetDefaultEndian() const;
532 //------------------------------------------------------------------
533 /// Returns true if 'char' is a signed type by defualt in the
534 /// architecture false otherwise
536 /// @return True if 'char' is a signed type by default on the
537 /// architecture and false otherwise.
538 //------------------------------------------------------------------
539 bool CharIsSignedByDefault() const;
541 //------------------------------------------------------------------
542 /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu
543 /// type match between them.
544 /// e.g. armv7s is not an exact match with armv7 - this would return false
546 /// @return true if the two ArchSpecs match.
547 //------------------------------------------------------------------
548 bool IsExactMatch(const ArchSpec &rhs) const;
550 //------------------------------------------------------------------
551 /// Compare an ArchSpec to another ArchSpec, requiring a compatible
552 /// cpu type match between them.
553 /// e.g. armv7s is compatible with armv7 - this method would return true
555 /// @return true if the two ArchSpecs are compatible
556 //------------------------------------------------------------------
557 bool IsCompatibleMatch(const ArchSpec &rhs) const;
559 bool IsFullySpecifiedTriple() const;
561 void PiecewiseTripleCompare(const ArchSpec &other, bool &arch_different,
562 bool &vendor_different, bool &os_different,
563 bool &os_version_different,
564 bool &env_different) const;
566 //------------------------------------------------------------------
567 /// Detect whether this architecture uses thumb code exclusively
569 /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can
570 /// only execute the Thumb instructions, never Arm. We should normally
571 /// pick up arm/thumbness from their the processor status bits (cpsr/xpsr)
572 /// or hints on each function - but when doing bare-boards low level
573 /// debugging (especially common with these embedded processors), we may
574 /// not have those things easily accessible.
576 /// @return true if this is an arm ArchSpec which can only execute Thumb
578 //------------------------------------------------------------------
579 bool IsAlwaysThumbInstructions() const;
581 uint32_t GetFlags() const { return m_flags; }
583 void SetFlags(uint32_t flags) { m_flags = flags; }
585 void SetFlags(std::string elf_abi);
588 bool IsEqualTo(const ArchSpec &rhs, bool exact_match) const;
591 llvm::Triple m_triple;
592 Core m_core = kCore_invalid;
593 lldb::ByteOrder m_byte_order = lldb::eByteOrderInvalid;
595 // Additional arch flags which we cannot get from triple and core
596 // For MIPS these are application specific extensions like
597 // micromips, mips16 etc.
598 uint32_t m_flags = 0;
600 ConstString m_distribution_id;
602 // Called when m_def or m_entry are changed. Fills in all remaining
603 // members with default values.
604 void CoreUpdated(bool update_triple);
607 //------------------------------------------------------------------
608 /// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs)
609 /// @brief Less than operator.
611 /// Tests two ArchSpec objects to see if \a lhs is less than \a
614 /// @param[in] lhs The Left Hand Side ArchSpec object to compare.
615 /// @param[in] rhs The Left Hand Side ArchSpec object to compare.
617 /// @return true if \a lhs is less than \a rhs
618 //------------------------------------------------------------------
619 bool operator<(const ArchSpec &lhs, const ArchSpec &rhs);
621 bool ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str, ArchSpec &arch);
623 } // namespace lldb_private
625 #endif // #ifndef LLDB_UTILITY_ARCHSPEC_H