1 //===-- ArchSpec.h ----------------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLDB_UTILITY_ARCHSPEC_H
11 #define LLDB_UTILITY_ARCHSPEC_H
13 #include "lldb/Utility/CompletionRequest.h"
14 #include "lldb/Utility/ConstString.h"
15 #include "lldb/lldb-enumerations.h"
16 #include "lldb/lldb-forward.h"
17 #include "lldb/lldb-private-enumerations.h"
18 #include "llvm/ADT/StringRef.h" // for StringRef
19 #include "llvm/ADT/Triple.h"
20 #include <cstddef> // for size_t
21 #include <cstdint> // for uint32_t
22 #include <string> // for string
24 namespace lldb_private {
26 //----------------------------------------------------------------------
27 /// @class ArchSpec ArchSpec.h "lldb/Utility/ArchSpec.h" An architecture
28 /// specification class.
30 /// A class designed to be created from a cpu type and subtype, a
31 /// string representation, or an llvm::Triple. Keeping all of the conversions
32 /// of strings to architecture enumeration values confined to this class
33 /// allows new architecture support to be added easily.
34 //----------------------------------------------------------------------
40 eMIPSSubType_mips32r2,
41 eMIPSSubType_mips32r6,
42 eMIPSSubType_mips32el,
43 eMIPSSubType_mips32r2el,
44 eMIPSSubType_mips32r6el,
46 eMIPSSubType_mips64r2,
47 eMIPSSubType_mips64r6,
48 eMIPSSubType_mips64el,
49 eMIPSSubType_mips64r2el,
50 eMIPSSubType_mips64r6el,
53 // Masks for the ases word of an ABI flags structure.
55 eMIPSAse_dsp = 0x00000001, // DSP ASE
56 eMIPSAse_dspr2 = 0x00000002, // DSP R2 ASE
57 eMIPSAse_eva = 0x00000004, // Enhanced VA Scheme
58 eMIPSAse_mcu = 0x00000008, // MCU (MicroController) ASE
59 eMIPSAse_mdmx = 0x00000010, // MDMX ASE
60 eMIPSAse_mips3d = 0x00000020, // MIPS-3D ASE
61 eMIPSAse_mt = 0x00000040, // MT ASE
62 eMIPSAse_smartmips = 0x00000080, // SmartMIPS ASE
63 eMIPSAse_virt = 0x00000100, // VZ ASE
64 eMIPSAse_msa = 0x00000200, // MSA ASE
65 eMIPSAse_mips16 = 0x00000400, // MIPS16 ASE
66 eMIPSAse_micromips = 0x00000800, // MICROMIPS ASE
67 eMIPSAse_xpa = 0x00001000, // XPA ASE
68 eMIPSAse_mask = 0x00001fff,
69 eMIPSABI_O32 = 0x00002000,
70 eMIPSABI_N32 = 0x00004000,
71 eMIPSABI_N64 = 0x00008000,
72 eMIPSABI_O64 = 0x00020000,
73 eMIPSABI_EABI32 = 0x00040000,
74 eMIPSABI_EABI64 = 0x00080000,
75 eMIPSABI_mask = 0x000ff000
78 // MIPS Floating point ABI Values
80 eMIPS_ABI_FP_ANY = 0x00000000,
81 eMIPS_ABI_FP_DOUBLE = 0x00100000, // hard float / -mdouble-float
82 eMIPS_ABI_FP_SINGLE = 0x00200000, // hard float / -msingle-float
83 eMIPS_ABI_FP_SOFT = 0x00300000, // soft float
84 eMIPS_ABI_FP_OLD_64 = 0x00400000, // -mips32r2 -mfp64
85 eMIPS_ABI_FP_XX = 0x00500000, // -mfpxx
86 eMIPS_ABI_FP_64 = 0x00600000, // -mips32r2 -mfp64
87 eMIPS_ABI_FP_64A = 0x00700000, // -mips32r2 -mfp64 -mno-odd-spreg
88 eMIPS_ABI_FP_mask = 0x00700000
91 // ARM specific e_flags
93 eARM_abi_soft_float = 0x00000200,
94 eARM_abi_hard_float = 0x00000400
165 eCore_ppc64le_generic,
167 eCore_ppc64_ppc970_64,
173 eCore_sparc9_generic,
181 eCore_x86_64_x86_64h, // Haswell enabled x86_64
182 eCore_hexagon_generic,
183 eCore_hexagon_hexagonv4,
184 eCore_hexagon_hexagonv5,
196 // The following constants are used for wildcard matching only
205 kCore_arm_first = eCore_arm_generic,
206 kCore_arm_last = eCore_arm_xscale,
208 kCore_thumb_first = eCore_thumb,
209 kCore_thumb_last = eCore_thumbv7em,
211 kCore_ppc_first = eCore_ppc_generic,
212 kCore_ppc_last = eCore_ppc_ppc970,
214 kCore_ppc64_first = eCore_ppc64_generic,
215 kCore_ppc64_last = eCore_ppc64_ppc970_64,
217 kCore_x86_32_first = eCore_x86_32_i386,
218 kCore_x86_32_last = eCore_x86_32_i686,
220 kCore_x86_64_first = eCore_x86_64_x86_64,
221 kCore_x86_64_last = eCore_x86_64_x86_64h,
223 kCore_hexagon_first = eCore_hexagon_generic,
224 kCore_hexagon_last = eCore_hexagon_hexagonv5,
226 kCore_kalimba_first = eCore_kalimba3,
227 kCore_kalimba_last = eCore_kalimba5,
229 kCore_mips32_first = eCore_mips32,
230 kCore_mips32_last = eCore_mips32r6,
232 kCore_mips32el_first = eCore_mips32el,
233 kCore_mips32el_last = eCore_mips32r6el,
235 kCore_mips64_first = eCore_mips64,
236 kCore_mips64_last = eCore_mips64r6,
238 kCore_mips64el_first = eCore_mips64el,
239 kCore_mips64el_last = eCore_mips64r6el,
241 kCore_mips_first = eCore_mips32,
242 kCore_mips_last = eCore_mips64r6el
246 //------------------------------------------------------------------
247 /// Default constructor.
249 /// Default constructor that initializes the object with invalid cpu type
250 /// and subtype values.
251 //------------------------------------------------------------------
254 //------------------------------------------------------------------
255 /// Constructor over triple.
257 /// Constructs an ArchSpec with properties consistent with the given Triple.
258 //------------------------------------------------------------------
259 explicit ArchSpec(const llvm::Triple &triple);
260 explicit ArchSpec(const char *triple_cstr);
261 explicit ArchSpec(llvm::StringRef triple_str);
262 //------------------------------------------------------------------
263 /// Constructor over architecture name.
265 /// Constructs an ArchSpec with properties consistent with the given object
266 /// type and architecture name.
267 //------------------------------------------------------------------
268 explicit ArchSpec(ArchitectureType arch_type, uint32_t cpu_type,
269 uint32_t cpu_subtype);
271 //------------------------------------------------------------------
273 //------------------------------------------------------------------
276 //------------------------------------------------------------------
277 /// Assignment operator.
279 /// @param[in] rhs another ArchSpec object to copy.
281 /// @return A const reference to this object.
282 //------------------------------------------------------------------
283 const ArchSpec &operator=(const ArchSpec &rhs);
285 //---------------------------------------------------------------------------
286 /// Returns true if the OS, vendor and environment fields of the triple are
287 /// unset. The triple is expected to be normalized
288 /// (llvm::Triple::normalize).
289 //---------------------------------------------------------------------------
290 static bool ContainsOnlyArch(const llvm::Triple &normalized_triple);
292 static void ListSupportedArchNames(StringList &list);
293 static size_t AutoComplete(CompletionRequest &request);
295 //------------------------------------------------------------------
296 /// Returns a static string representing the current architecture.
298 /// @return A static string corresponding to the current
300 //------------------------------------------------------------------
301 const char *GetArchitectureName() const;
303 //-----------------------------------------------------------------
304 /// if MIPS architecture return true.
306 /// @return a boolean value.
307 //-----------------------------------------------------------------
310 //------------------------------------------------------------------
311 /// Returns a string representing current architecture as a target CPU for
312 /// tools like compiler, disassembler etc.
314 /// @return A string representing target CPU for the current
316 //------------------------------------------------------------------
317 std::string GetClangTargetCPU() const;
319 //------------------------------------------------------------------
320 /// Return a string representing target application ABI.
322 /// @return A string representing target application ABI.
323 //------------------------------------------------------------------
324 std::string GetTargetABI() const;
326 //------------------------------------------------------------------
327 /// Clears the object state.
329 /// Clears the object state back to a default invalid state.
330 //------------------------------------------------------------------
333 //------------------------------------------------------------------
334 /// Returns the size in bytes of an address of the current architecture.
336 /// @return The byte size of an address of the current architecture.
337 //------------------------------------------------------------------
338 uint32_t GetAddressByteSize() const;
340 //------------------------------------------------------------------
341 /// Returns a machine family for the current architecture.
343 /// @return An LLVM arch type.
344 //------------------------------------------------------------------
345 llvm::Triple::ArchType GetMachine() const;
347 //------------------------------------------------------------------
348 /// Returns the distribution id of the architecture.
350 /// This will be something like "ubuntu", "fedora", etc. on Linux.
352 /// @return A ConstString ref containing the distribution id,
353 /// potentially empty.
354 //------------------------------------------------------------------
355 const ConstString &GetDistributionId() const;
357 //------------------------------------------------------------------
358 /// Set the distribution id of the architecture.
360 /// This will be something like "ubuntu", "fedora", etc. on Linux. This
361 /// should be the same value returned by HostInfo::GetDistributionId ().
362 ///------------------------------------------------------------------
363 void SetDistributionId(const char *distribution_id);
365 //------------------------------------------------------------------
366 /// Tests if this ArchSpec is valid.
368 /// @return True if the current architecture is valid, false
370 //------------------------------------------------------------------
371 bool IsValid() const {
372 return m_core >= eCore_arm_generic && m_core < kNumCores;
375 bool TripleVendorWasSpecified() const {
376 return !m_triple.getVendorName().empty();
379 bool TripleVendorIsUnspecifiedUnknown() const {
380 return m_triple.getVendor() == llvm::Triple::UnknownVendor &&
381 m_triple.getVendorName().empty();
384 bool TripleOSWasSpecified() const { return !m_triple.getOSName().empty(); }
386 bool TripleEnvironmentWasSpecified() const {
387 return !m_triple.getEnvironmentName().empty();
390 bool TripleOSIsUnspecifiedUnknown() const {
391 return m_triple.getOS() == llvm::Triple::UnknownOS &&
392 m_triple.getOSName().empty();
395 //------------------------------------------------------------------
396 /// Merges fields from another ArchSpec into this ArchSpec.
398 /// This will use the supplied ArchSpec to fill in any fields of the triple
399 /// in this ArchSpec which were unspecified. This can be used to refine a
400 /// generic ArchSpec with a more specific one. For example, if this
401 /// ArchSpec's triple is something like i386-unknown-unknown-unknown, and we
402 /// have a triple which is x64-pc-windows-msvc, then merging that triple
403 /// into this one will result in the triple i386-pc-windows-msvc.
405 //------------------------------------------------------------------
406 void MergeFrom(const ArchSpec &other);
408 //------------------------------------------------------------------
409 /// Change the architecture object type, CPU type and OS type.
411 /// @param[in] arch_type The object type of this ArchSpec.
413 /// @param[in] cpu The required CPU type.
415 /// @param[in] os The optional OS type
416 /// The default value of 0 was chosen to from the ELF spec value
417 /// ELFOSABI_NONE. ELF is the only one using this parameter. If another
418 /// format uses this parameter and 0 does not work, use a value over
419 /// 255 because in the ELF header this is value is only a byte.
421 /// @return True if the object, and CPU were successfully set.
423 /// As a side effect, the vendor value is usually set to unknown. The
425 /// aarch64-apple-ios
431 /// As a side effect, the os value is usually set to unknown The exceptions
434 /// aarch64-apple-ios
437 /// powerpc-apple-darwin
443 //------------------------------------------------------------------
444 bool SetArchitecture(ArchitectureType arch_type, uint32_t cpu, uint32_t sub,
447 //------------------------------------------------------------------
448 /// Returns the byte order for the architecture specification.
450 /// @return The endian enumeration for the current endianness of
451 /// the architecture specification
452 //------------------------------------------------------------------
453 lldb::ByteOrder GetByteOrder() const;
455 //------------------------------------------------------------------
456 /// Sets this ArchSpec's byte order.
458 /// In the common case there is no need to call this method as the byte
459 /// order can almost always be determined by the architecture. However, many
460 /// CPU's are bi-endian (ARM, Alpha, PowerPC, etc) and the default/assumed
461 /// byte order may be incorrect.
462 //------------------------------------------------------------------
463 void SetByteOrder(lldb::ByteOrder byte_order) { m_byte_order = byte_order; }
465 uint32_t GetMinimumOpcodeByteSize() const;
467 uint32_t GetMaximumOpcodeByteSize() const;
469 Core GetCore() const { return m_core; }
471 uint32_t GetMachOCPUType() const;
473 uint32_t GetMachOCPUSubType() const;
475 //------------------------------------------------------------------
476 /// Architecture data byte width accessor
478 /// @return the size in 8-bit (host) bytes of a minimum addressable unit
479 /// from the Architecture's data bus
480 //------------------------------------------------------------------
481 uint32_t GetDataByteSize() const;
483 //------------------------------------------------------------------
484 /// Architecture code byte width accessor
486 /// @return the size in 8-bit (host) bytes of a minimum addressable unit
487 /// from the Architecture's code bus
488 //------------------------------------------------------------------
489 uint32_t GetCodeByteSize() const;
491 //------------------------------------------------------------------
492 /// Architecture triple accessor.
494 /// @return A triple describing this ArchSpec.
495 //------------------------------------------------------------------
496 llvm::Triple &GetTriple() { return m_triple; }
498 //------------------------------------------------------------------
499 /// Architecture triple accessor.
501 /// @return A triple describing this ArchSpec.
502 //------------------------------------------------------------------
503 const llvm::Triple &GetTriple() const { return m_triple; }
505 void DumpTriple(Stream &s) const;
507 //------------------------------------------------------------------
508 /// Architecture triple setter.
510 /// Configures this ArchSpec according to the given triple. If the triple
511 /// has unknown components in all of the vendor, OS, and the optional
512 /// environment field (i.e. "i386-unknown-unknown") then default values are
513 /// taken from the host. Architecture and environment components are used
514 /// to further resolve the CPU type and subtype, endian characteristics,
517 /// @return A triple describing this ArchSpec.
518 //------------------------------------------------------------------
519 bool SetTriple(const llvm::Triple &triple);
521 bool SetTriple(llvm::StringRef triple_str);
523 //------------------------------------------------------------------
524 /// Returns the default endianness of the architecture.
526 /// @return The endian enumeration for the default endianness of
527 /// the architecture.
528 //------------------------------------------------------------------
529 lldb::ByteOrder GetDefaultEndian() const;
531 //------------------------------------------------------------------
532 /// Returns true if 'char' is a signed type by default in the architecture
535 /// @return True if 'char' is a signed type by default on the
536 /// architecture and false otherwise.
537 //------------------------------------------------------------------
538 bool CharIsSignedByDefault() const;
540 //------------------------------------------------------------------
541 /// Compare an ArchSpec to another ArchSpec, requiring an exact cpu type
542 /// match between them. e.g. armv7s is not an exact match with armv7 - this
543 /// would return false
545 /// @return true if the two ArchSpecs match.
546 //------------------------------------------------------------------
547 bool IsExactMatch(const ArchSpec &rhs) const;
549 //------------------------------------------------------------------
550 /// Compare an ArchSpec to another ArchSpec, requiring a compatible cpu type
551 /// match between them. e.g. armv7s is compatible with armv7 - this method
552 /// would return true
554 /// @return true if the two ArchSpecs are compatible
555 //------------------------------------------------------------------
556 bool IsCompatibleMatch(const ArchSpec &rhs) const;
558 bool IsFullySpecifiedTriple() const;
560 void PiecewiseTripleCompare(const ArchSpec &other, bool &arch_different,
561 bool &vendor_different, bool &os_different,
562 bool &os_version_different,
563 bool &env_different) const;
565 //------------------------------------------------------------------
566 /// Detect whether this architecture uses thumb code exclusively
568 /// Some embedded ARM chips (e.g. the ARM Cortex M0-7 line) can only execute
569 /// the Thumb instructions, never Arm. We should normally pick up
570 /// arm/thumbness from their the processor status bits (cpsr/xpsr) or hints
571 /// on each function - but when doing bare-boards low level debugging
572 /// (especially common with these embedded processors), we may not have
573 /// those things easily accessible.
575 /// @return true if this is an arm ArchSpec which can only execute Thumb
577 //------------------------------------------------------------------
578 bool IsAlwaysThumbInstructions() const;
580 uint32_t GetFlags() const { return m_flags; }
582 void SetFlags(uint32_t flags) { m_flags = flags; }
584 void SetFlags(std::string elf_abi);
587 bool IsEqualTo(const ArchSpec &rhs, bool exact_match) const;
590 llvm::Triple m_triple;
591 Core m_core = kCore_invalid;
592 lldb::ByteOrder m_byte_order = lldb::eByteOrderInvalid;
594 // Additional arch flags which we cannot get from triple and core For MIPS
595 // these are application specific extensions like micromips, mips16 etc.
596 uint32_t m_flags = 0;
598 ConstString m_distribution_id;
600 // Called when m_def or m_entry are changed. Fills in all remaining members
601 // with default values.
602 void CoreUpdated(bool update_triple);
605 //------------------------------------------------------------------
606 /// @fn bool operator< (const ArchSpec& lhs, const ArchSpec& rhs) Less than
609 /// Tests two ArchSpec objects to see if \a lhs is less than \a rhs.
611 /// @param[in] lhs The Left Hand Side ArchSpec object to compare. @param[in]
612 /// rhs The Left Hand Side ArchSpec object to compare.
614 /// @return true if \a lhs is less than \a rhs
615 //------------------------------------------------------------------
616 bool operator<(const ArchSpec &lhs, const ArchSpec &rhs);
617 bool operator==(const ArchSpec &lhs, const ArchSpec &rhs);
619 bool ParseMachCPUDashSubtypeTriple(llvm::StringRef triple_str, ArchSpec &arch);
621 } // namespace lldb_private
623 #endif // #ifndef LLDB_UTILITY_ARCHSPEC_H