1 //===-- ABISysV_mips.cpp ----------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "ABISysV_mips.h"
14 // Other libraries and framework includes
15 #include "llvm/ADT/STLExtras.h"
16 #include "llvm/ADT/Triple.h"
19 #include "lldb/Core/Module.h"
20 #include "lldb/Core/PluginManager.h"
21 #include "lldb/Core/RegisterValue.h"
22 #include "lldb/Core/Value.h"
23 #include "lldb/Core/ValueObjectConstResult.h"
24 #include "lldb/Core/ValueObjectMemory.h"
25 #include "lldb/Core/ValueObjectRegister.h"
26 #include "lldb/Symbol/UnwindPlan.h"
27 #include "lldb/Target/Process.h"
28 #include "lldb/Target/RegisterContext.h"
29 #include "lldb/Target/StackFrame.h"
30 #include "lldb/Target/Target.h"
31 #include "lldb/Target/Thread.h"
32 #include "lldb/Utility/ConstString.h"
33 #include "lldb/Utility/DataExtractor.h"
34 #include "lldb/Utility/Log.h"
35 #include "lldb/Utility/Status.h"
38 using namespace lldb_private;
81 static const RegisterInfo g_register_infos[] = {
82 // NAME ALT SZ OFF ENCODING FORMAT EH_FRAME
83 // DWARF GENERIC PROCESS PLUGINS
84 // LLDB NATIVE VALUE REGS INVALIDATE REGS
85 // ======== ====== == === ============= =========== ============
86 // ============== ============ =================
87 // =================== ========== =================
94 {dwarf_r0, dwarf_r0, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
106 {dwarf_r1, dwarf_r1, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
107 LLDB_INVALID_REGNUM},
118 {dwarf_r2, dwarf_r2, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
119 LLDB_INVALID_REGNUM},
130 {dwarf_r3, dwarf_r3, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
131 LLDB_INVALID_REGNUM},
142 {dwarf_r4, dwarf_r4, LLDB_REGNUM_GENERIC_ARG1, LLDB_INVALID_REGNUM,
143 LLDB_INVALID_REGNUM},
154 {dwarf_r5, dwarf_r5, LLDB_REGNUM_GENERIC_ARG2, LLDB_INVALID_REGNUM,
155 LLDB_INVALID_REGNUM},
166 {dwarf_r6, dwarf_r6, LLDB_REGNUM_GENERIC_ARG3, LLDB_INVALID_REGNUM,
167 LLDB_INVALID_REGNUM},
178 {dwarf_r7, dwarf_r7, LLDB_REGNUM_GENERIC_ARG4, LLDB_INVALID_REGNUM,
179 LLDB_INVALID_REGNUM},
190 {dwarf_r8, dwarf_r8, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
191 LLDB_INVALID_REGNUM},
202 {dwarf_r9, dwarf_r9, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
203 LLDB_INVALID_REGNUM},
214 {dwarf_r10, dwarf_r10, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
215 LLDB_INVALID_REGNUM},
226 {dwarf_r11, dwarf_r11, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
227 LLDB_INVALID_REGNUM},
238 {dwarf_r12, dwarf_r12, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
239 LLDB_INVALID_REGNUM},
250 {dwarf_r13, dwarf_r13, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
251 LLDB_INVALID_REGNUM},
262 {dwarf_r14, dwarf_r14, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
263 LLDB_INVALID_REGNUM},
274 {dwarf_r15, dwarf_r15, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
275 LLDB_INVALID_REGNUM},
286 {dwarf_r16, dwarf_r16, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
287 LLDB_INVALID_REGNUM},
298 {dwarf_r17, dwarf_r17, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
299 LLDB_INVALID_REGNUM},
310 {dwarf_r18, dwarf_r18, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
311 LLDB_INVALID_REGNUM},
322 {dwarf_r19, dwarf_r19, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
323 LLDB_INVALID_REGNUM},
334 {dwarf_r20, dwarf_r20, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
335 LLDB_INVALID_REGNUM},
346 {dwarf_r21, dwarf_r21, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
347 LLDB_INVALID_REGNUM},
358 {dwarf_r22, dwarf_r22, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
359 LLDB_INVALID_REGNUM},
370 {dwarf_r23, dwarf_r23, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
371 LLDB_INVALID_REGNUM},
382 {dwarf_r24, dwarf_r24, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
383 LLDB_INVALID_REGNUM},
394 {dwarf_r25, dwarf_r25, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
395 LLDB_INVALID_REGNUM},
406 {dwarf_r26, dwarf_r26, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
407 LLDB_INVALID_REGNUM},
418 {dwarf_r27, dwarf_r27, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
419 LLDB_INVALID_REGNUM},
430 {dwarf_r28, dwarf_r28, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
431 LLDB_INVALID_REGNUM},
442 {dwarf_r29, dwarf_r29, LLDB_REGNUM_GENERIC_SP, LLDB_INVALID_REGNUM,
443 LLDB_INVALID_REGNUM},
454 {dwarf_r30, dwarf_r30, LLDB_REGNUM_GENERIC_FP, LLDB_INVALID_REGNUM,
455 LLDB_INVALID_REGNUM},
466 {dwarf_r31, dwarf_r31, LLDB_REGNUM_GENERIC_RA, LLDB_INVALID_REGNUM,
467 LLDB_INVALID_REGNUM},
478 {dwarf_sr, dwarf_sr, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM,
479 LLDB_INVALID_REGNUM},
490 {dwarf_lo, dwarf_lo, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
491 LLDB_INVALID_REGNUM},
502 {dwarf_hi, dwarf_hi, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
503 LLDB_INVALID_REGNUM},
514 {dwarf_bad, dwarf_bad, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
515 LLDB_INVALID_REGNUM},
526 {dwarf_cause, dwarf_cause, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM,
527 LLDB_INVALID_REGNUM},
538 {dwarf_pc, dwarf_pc, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM,
539 LLDB_INVALID_REGNUM},
546 static const uint32_t k_num_register_infos =
547 llvm::array_lengthof(g_register_infos);
549 const lldb_private::RegisterInfo *
550 ABISysV_mips::GetRegisterInfoArray(uint32_t &count) {
551 count = k_num_register_infos;
552 return g_register_infos;
555 size_t ABISysV_mips::GetRedZoneSize() const { return 0; }
557 //------------------------------------------------------------------
559 //------------------------------------------------------------------
562 ABISysV_mips::CreateInstance(lldb::ProcessSP process_sp, const ArchSpec &arch) {
563 static ABISP g_abi_sp;
564 const llvm::Triple::ArchType arch_type = arch.GetTriple().getArch();
565 if ((arch_type == llvm::Triple::mips) ||
566 (arch_type == llvm::Triple::mipsel)) {
568 g_abi_sp.reset(new ABISysV_mips(process_sp));
574 bool ABISysV_mips::PrepareTrivialCall(Thread &thread, addr_t sp,
575 addr_t func_addr, addr_t return_addr,
576 llvm::ArrayRef<addr_t> args) const {
577 Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_EXPRESSIONS));
581 s.Printf("ABISysV_mips::PrepareTrivialCall (tid = 0x%" PRIx64
582 ", sp = 0x%" PRIx64 ", func_addr = 0x%" PRIx64
583 ", return_addr = 0x%" PRIx64,
584 thread.GetID(), (uint64_t)sp, (uint64_t)func_addr,
585 (uint64_t)return_addr);
587 for (size_t i = 0; i < args.size(); ++i)
588 s.Printf(", arg%zd = 0x%" PRIx64, i + 1, args[i]);
590 log->PutString(s.GetString());
593 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
597 const RegisterInfo *reg_info = nullptr;
599 RegisterValue reg_value;
601 // Argument registers
602 const char *reg_names[] = {"r4", "r5", "r6", "r7"};
604 llvm::ArrayRef<addr_t>::iterator ai = args.begin(), ae = args.end();
606 // Write arguments to registers
607 for (size_t i = 0; i < llvm::array_lengthof(reg_names); ++i) {
611 reg_info = reg_ctx->GetRegisterInfo(eRegisterKindGeneric,
612 LLDB_REGNUM_GENERIC_ARG1 + i);
614 log->Printf("About to write arg%zd (0x%" PRIx64 ") into %s", i + 1,
615 args[i], reg_info->name);
617 if (!reg_ctx->WriteRegisterFromUnsigned(reg_info, args[i]))
623 // If we have more than 4 arguments --Spill onto the stack
625 // No of arguments to go on stack
626 size_t num_stack_regs = args.size();
628 // Allocate needed space for args on the stack
629 sp -= (num_stack_regs * 4);
631 // Keep the stack 8 byte aligned
632 sp &= ~(8ull - 1ull);
634 // just using arg1 to get the right size
635 const RegisterInfo *reg_info = reg_ctx->GetRegisterInfo(
636 eRegisterKindGeneric, LLDB_REGNUM_GENERIC_ARG1);
638 addr_t arg_pos = sp + 16;
641 for (; ai != ae; ++ai) {
642 reg_value.SetUInt32(*ai);
644 log->Printf("About to write arg%zd (0x%" PRIx64 ") at 0x%" PRIx64 "",
645 i + 1, args[i], arg_pos);
648 ->WriteRegisterValueToMemory(reg_info, arg_pos,
649 reg_info->byte_size, reg_value)
652 arg_pos += reg_info->byte_size;
658 const RegisterInfo *pc_reg_info =
659 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_PC);
660 const RegisterInfo *sp_reg_info =
661 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_SP);
662 const RegisterInfo *ra_reg_info =
663 reg_ctx->GetRegisterInfo(eRegisterKindGeneric, LLDB_REGNUM_GENERIC_RA);
664 const RegisterInfo *r25_info = reg_ctx->GetRegisterInfoByName("r25", 0);
665 const RegisterInfo *r0_info = reg_ctx->GetRegisterInfoByName("zero", 0);
668 log->Printf("Writing R0: 0x%" PRIx64, (uint64_t)0);
670 /* Write r0 with 0, in case we are stopped in syscall,
671 * such setting prevents automatic decrement of the PC.
672 * This clears the bug 23659 for MIPS.
674 if (!reg_ctx->WriteRegisterFromUnsigned(r0_info, (uint64_t)0))
678 log->Printf("Writing SP: 0x%" PRIx64, (uint64_t)sp);
680 // Set "sp" to the requested value
681 if (!reg_ctx->WriteRegisterFromUnsigned(sp_reg_info, sp))
685 log->Printf("Writing RA: 0x%" PRIx64, (uint64_t)return_addr);
687 // Set "ra" to the return address
688 if (!reg_ctx->WriteRegisterFromUnsigned(ra_reg_info, return_addr))
692 log->Printf("Writing PC: 0x%" PRIx64, (uint64_t)func_addr);
694 // Set pc to the address of the called function.
695 if (!reg_ctx->WriteRegisterFromUnsigned(pc_reg_info, func_addr))
699 log->Printf("Writing r25: 0x%" PRIx64, (uint64_t)func_addr);
701 // All callers of position independent functions must place the address of
702 // the called function in t9 (r25)
703 if (!reg_ctx->WriteRegisterFromUnsigned(r25_info, func_addr))
709 bool ABISysV_mips::GetArgumentValues(Thread &thread, ValueList &values) const {
713 Status ABISysV_mips::SetReturnValueObject(lldb::StackFrameSP &frame_sp,
714 lldb::ValueObjectSP &new_value_sp) {
717 error.SetErrorString("Empty value object for return value.");
721 CompilerType compiler_type = new_value_sp->GetCompilerType();
722 if (!compiler_type) {
723 error.SetErrorString("Null clang type for return value.");
727 Thread *thread = frame_sp->GetThread().get();
733 RegisterContext *reg_ctx = thread->GetRegisterContext().get();
735 bool set_it_simple = false;
736 if (compiler_type.IsIntegerOrEnumerationType(is_signed) ||
737 compiler_type.IsPointerType()) {
740 size_t num_bytes = new_value_sp->GetData(data, data_error);
741 if (data_error.Fail()) {
742 error.SetErrorStringWithFormat(
743 "Couldn't convert return value to raw data: %s",
744 data_error.AsCString());
748 lldb::offset_t offset = 0;
749 if (num_bytes <= 8) {
750 const RegisterInfo *r2_info = reg_ctx->GetRegisterInfoByName("r2", 0);
751 if (num_bytes <= 4) {
752 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes);
754 if (reg_ctx->WriteRegisterFromUnsigned(r2_info, raw_value))
755 set_it_simple = true;
757 uint32_t raw_value = data.GetMaxU32(&offset, 4);
759 if (reg_ctx->WriteRegisterFromUnsigned(r2_info, raw_value)) {
760 const RegisterInfo *r3_info = reg_ctx->GetRegisterInfoByName("r3", 0);
761 uint32_t raw_value = data.GetMaxU32(&offset, num_bytes - offset);
763 if (reg_ctx->WriteRegisterFromUnsigned(r3_info, raw_value))
764 set_it_simple = true;
768 error.SetErrorString("We don't support returning longer than 64 bit "
769 "integer values at present.");
771 } else if (compiler_type.IsFloatingPointType(count, is_complex)) {
773 error.SetErrorString(
774 "We don't support returning complex values at present");
776 error.SetErrorString(
777 "We don't support returning float values at present");
781 error.SetErrorString(
782 "We only support setting simple integer return types at present.");
787 ValueObjectSP ABISysV_mips::GetReturnValueObjectSimple(
788 Thread &thread, CompilerType &return_compiler_type) const {
789 ValueObjectSP return_valobj_sp;
790 return return_valobj_sp;
793 ValueObjectSP ABISysV_mips::GetReturnValueObjectImpl(
794 Thread &thread, CompilerType &return_compiler_type) const {
795 ValueObjectSP return_valobj_sp;
798 if (!return_compiler_type)
799 return return_valobj_sp;
801 ExecutionContext exe_ctx(thread.shared_from_this());
802 if (exe_ctx.GetTargetPtr() == nullptr || exe_ctx.GetProcessPtr() == nullptr)
803 return return_valobj_sp;
805 Target *target = exe_ctx.GetTargetPtr();
806 const ArchSpec target_arch = target->GetArchitecture();
807 ByteOrder target_byte_order = target_arch.GetByteOrder();
808 value.SetCompilerType(return_compiler_type);
810 target_arch.GetFlags() & lldb_private::ArchSpec::eMIPS_ABI_FP_mask;
812 RegisterContext *reg_ctx = thread.GetRegisterContext().get();
814 return return_valobj_sp;
816 bool is_signed = false;
817 bool is_complex = false;
820 // In MIPS register "r2" (v0) holds the integer function return values
821 const RegisterInfo *r2_reg_info = reg_ctx->GetRegisterInfoByName("r2", 0);
822 size_t bit_width = return_compiler_type.GetBitSize(&thread);
823 if (return_compiler_type.IsIntegerOrEnumerationType(is_signed)) {
826 return return_valobj_sp;
828 const RegisterInfo *r3_reg_info = reg_ctx->GetRegisterInfoByName("r3", 0);
830 raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX;
831 raw_value |= ((uint64_t)(reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0) &
835 value.GetScalar() = (int64_t)raw_value;
837 value.GetScalar() = (uint64_t)raw_value;
841 value.GetScalar() = (int32_t)(
842 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX);
844 value.GetScalar() = (uint32_t)(
845 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT32_MAX);
849 value.GetScalar() = (int16_t)(
850 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT16_MAX);
852 value.GetScalar() = (uint16_t)(
853 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT16_MAX);
857 value.GetScalar() = (int8_t)(
858 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT8_MAX);
860 value.GetScalar() = (uint8_t)(
861 reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0) & UINT8_MAX);
864 } else if (return_compiler_type.IsPointerType()) {
866 thread.GetRegisterContext()->ReadRegisterAsUnsigned(r2_reg_info, 0) &
868 value.GetScalar() = ptr;
869 } else if (return_compiler_type.IsAggregateType()) {
870 // Structure/Vector is always passed in memory and pointer to that memory
872 uint64_t mem_address = reg_ctx->ReadRegisterAsUnsigned(
873 reg_ctx->GetRegisterInfoByName("r2", 0), 0);
874 // We have got the address. Create a memory object out of it
875 return_valobj_sp = ValueObjectMemory::Create(
876 &thread, "", Address(mem_address, nullptr), return_compiler_type);
877 return return_valobj_sp;
878 } else if (return_compiler_type.IsFloatingPointType(count, is_complex)) {
879 if (IsSoftFloat(fp_flag)) {
880 uint64_t raw_value = reg_ctx->ReadRegisterAsUnsigned(r2_reg_info, 0);
881 if (count != 1 && is_complex)
882 return return_valobj_sp;
885 return return_valobj_sp;
887 static_assert(sizeof(float) == sizeof(uint32_t), "");
888 value.GetScalar() = *((float *)(&raw_value));
891 static_assert(sizeof(double) == sizeof(uint64_t), "");
892 const RegisterInfo *r3_reg_info =
893 reg_ctx->GetRegisterInfoByName("r3", 0);
894 if (target_byte_order == eByteOrderLittle)
896 ((reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0)) << 32) |
899 raw_value = (raw_value << 32) |
900 reg_ctx->ReadRegisterAsUnsigned(r3_reg_info, 0);
901 value.GetScalar() = *((double *)(&raw_value));
907 const RegisterInfo *f0_info = reg_ctx->GetRegisterInfoByName("f0", 0);
908 RegisterValue f0_value;
909 DataExtractor f0_data;
910 reg_ctx->ReadRegister(f0_info, f0_value);
911 f0_value.GetData(f0_data);
912 lldb::offset_t offset = 0;
914 if (count == 1 && !is_complex) {
917 return return_valobj_sp;
919 static_assert(sizeof(double) == sizeof(uint64_t), "");
920 const RegisterInfo *f1_info = reg_ctx->GetRegisterInfoByName("f1", 0);
921 RegisterValue f1_value;
922 DataExtractor f1_data;
923 reg_ctx->ReadRegister(f1_info, f1_value);
924 DataExtractor *copy_from_extractor = nullptr;
925 DataBufferSP data_sp(new DataBufferHeap(8, 0));
926 DataExtractor return_ext(
927 data_sp, target_byte_order,
928 target->GetArchitecture().GetAddressByteSize());
930 if (target_byte_order == eByteOrderLittle) {
931 copy_from_extractor = &f0_data;
932 copy_from_extractor->CopyByteOrderedData(
933 offset, 4, data_sp->GetBytes(), 4, target_byte_order);
934 f1_value.GetData(f1_data);
935 copy_from_extractor = &f1_data;
936 copy_from_extractor->CopyByteOrderedData(
937 offset, 4, data_sp->GetBytes() + 4, 4, target_byte_order);
939 copy_from_extractor = &f0_data;
940 copy_from_extractor->CopyByteOrderedData(
941 offset, 4, data_sp->GetBytes() + 4, 4, target_byte_order);
942 f1_value.GetData(f1_data);
943 copy_from_extractor = &f1_data;
944 copy_from_extractor->CopyByteOrderedData(
945 offset, 4, data_sp->GetBytes(), 4, target_byte_order);
947 value.GetScalar() = (double)return_ext.GetDouble(&offset);
951 static_assert(sizeof(float) == sizeof(uint32_t), "");
952 value.GetScalar() = (float)f0_data.GetFloat(&offset);
958 return return_valobj_sp;
963 return return_valobj_sp;
966 // If we get here, we have a valid Value, so make our ValueObject out of it:
968 return_valobj_sp = ValueObjectConstResult::Create(
969 thread.GetStackFrameAtIndex(0).get(), value, ConstString(""));
970 return return_valobj_sp;
973 bool ABISysV_mips::CreateFunctionEntryUnwindPlan(UnwindPlan &unwind_plan) {
975 unwind_plan.SetRegisterKind(eRegisterKindDWARF);
977 UnwindPlan::RowSP row(new UnwindPlan::Row);
979 // Our Call Frame Address is the stack pointer value
980 row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
982 // The previous PC is in the RA
983 row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
984 unwind_plan.AppendRow(row);
986 // All other registers are the same.
988 unwind_plan.SetSourceName("mips at-func-entry default");
989 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
990 unwind_plan.SetReturnAddressRegister(dwarf_r31);
994 bool ABISysV_mips::CreateDefaultUnwindPlan(UnwindPlan &unwind_plan) {
996 unwind_plan.SetRegisterKind(eRegisterKindDWARF);
998 UnwindPlan::RowSP row(new UnwindPlan::Row);
1000 row->GetCFAValue().SetIsRegisterPlusOffset(dwarf_r29, 0);
1002 row->SetRegisterLocationToRegister(dwarf_pc, dwarf_r31, true);
1004 unwind_plan.AppendRow(row);
1005 unwind_plan.SetSourceName("mips default unwind plan");
1006 unwind_plan.SetSourcedFromCompiler(eLazyBoolNo);
1007 unwind_plan.SetUnwindPlanValidAtAllInstructions(eLazyBoolNo);
1011 bool ABISysV_mips::RegisterIsVolatile(const RegisterInfo *reg_info) {
1012 return !RegisterIsCalleeSaved(reg_info);
1015 bool ABISysV_mips::IsSoftFloat(uint32_t fp_flags) const {
1016 return (fp_flags == lldb_private::ArchSpec::eMIPS_ABI_FP_SOFT);
1019 bool ABISysV_mips::RegisterIsCalleeSaved(const RegisterInfo *reg_info) {
1021 // Preserved registers are :
1022 // r16-r23, r28, r29, r30, r31
1023 const char *name = reg_info->name;
1025 if (name[0] == 'r') {
1028 if (name[2] == '6' || name[2] == '7' || name[2] == '8' ||
1029 name[2] == '9') // r16-r19
1030 return name[3] == '\0';
1033 if (name[2] == '0' || name[2] == '1' || name[2] == '2' ||
1034 name[2] == '3' // r20-r23
1035 || name[2] == '8' || name[2] == '9') // r28 and r29
1036 return name[3] == '\0';
1039 if (name[2] == '0' || name[2] == '1') // r30 and r31
1040 return name[3] == '\0';
1044 if (name[0] == 'g' && name[1] == 'p' && name[2] == '\0') // gp (r28)
1046 if (name[0] == 's' && name[1] == 'p' && name[2] == '\0') // sp (r29)
1048 if (name[0] == 'f' && name[1] == 'p' && name[2] == '\0') // fp (r30)
1050 if (name[0] == 'r' && name[1] == 'a' && name[2] == '\0') // ra (r31)
1057 void ABISysV_mips::Initialize() {
1058 PluginManager::RegisterPlugin(
1059 GetPluginNameStatic(), "System V ABI for mips targets", CreateInstance);
1062 void ABISysV_mips::Terminate() {
1063 PluginManager::UnregisterPlugin(CreateInstance);
1066 lldb_private::ConstString ABISysV_mips::GetPluginNameStatic() {
1067 static ConstString g_name("sysv-mips");
1071 //------------------------------------------------------------------
1072 // PluginInterface protocol
1073 //------------------------------------------------------------------
1075 lldb_private::ConstString ABISysV_mips::GetPluginName() {
1076 return GetPluginNameStatic();
1079 uint32_t ABISysV_mips::GetPluginVersion() { return 1; }