1 //===-- RegisterContextDarwin_arm.h -----------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef liblldb_RegisterContextDarwin_arm_h_
11 #define liblldb_RegisterContextDarwin_arm_h_
15 // Other libraries and framework includes
17 #include "lldb/Target/RegisterContext.h"
18 #include "lldb/lldb-private.h"
20 // BCR address match type
21 #define BCR_M_IMVA_MATCH ((uint32_t)(0u << 21))
22 #define BCR_M_CONTEXT_ID_MATCH ((uint32_t)(1u << 21))
23 #define BCR_M_IMVA_MISMATCH ((uint32_t)(2u << 21))
24 #define BCR_M_RESERVED ((uint32_t)(3u << 21))
26 // Link a BVR/BCR or WVR/WCR pair to another
27 #define E_ENABLE_LINKING ((uint32_t)(1u << 20))
29 // Byte Address Select
30 #define BAS_IMVA_PLUS_0 ((uint32_t)(1u << 5))
31 #define BAS_IMVA_PLUS_1 ((uint32_t)(1u << 6))
32 #define BAS_IMVA_PLUS_2 ((uint32_t)(1u << 7))
33 #define BAS_IMVA_PLUS_3 ((uint32_t)(1u << 8))
34 #define BAS_IMVA_0_1 ((uint32_t)(3u << 5))
35 #define BAS_IMVA_2_3 ((uint32_t)(3u << 7))
36 #define BAS_IMVA_ALL ((uint32_t)(0xfu << 5))
38 // Break only in privileged or user mode
39 #define S_RSVD ((uint32_t)(0u << 1))
40 #define S_PRIV ((uint32_t)(1u << 1))
41 #define S_USER ((uint32_t)(2u << 1))
42 #define S_PRIV_USER ((S_PRIV) | (S_USER))
44 #define BCR_ENABLE ((uint32_t)(1u))
45 #define WCR_ENABLE ((uint32_t)(1u))
47 // Watchpoint load/store
48 #define WCR_LOAD ((uint32_t)(1u << 3))
49 #define WCR_STORE ((uint32_t)(1u << 4))
51 class RegisterContextDarwin_arm : public lldb_private::RegisterContext {
53 RegisterContextDarwin_arm(lldb_private::Thread &thread,
54 uint32_t concrete_frame_idx);
56 ~RegisterContextDarwin_arm() override;
58 void InvalidateAllRegisters() override;
60 size_t GetRegisterCount() override;
62 const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
64 size_t GetRegisterSetCount() override;
66 const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
68 bool ReadRegister(const lldb_private::RegisterInfo *reg_info,
69 lldb_private::RegisterValue ®_value) override;
71 bool WriteRegister(const lldb_private::RegisterInfo *reg_info,
72 const lldb_private::RegisterValue ®_value) override;
74 bool ReadAllRegisterValues(lldb::DataBufferSP &data_sp) override;
76 bool WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
78 uint32_t ConvertRegisterKindToRegisterNumber(lldb::RegisterKind kind,
79 uint32_t num) override;
81 uint32_t NumSupportedHardwareBreakpoints() override;
83 uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
85 bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
87 uint32_t NumSupportedHardwareWatchpoints() override;
89 uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size, bool read,
92 bool ClearHardwareWatchpoint(uint32_t hw_index) override;
95 uint32_t r[16]; // R0-R15
96 uint32_t cpsr; // CPSR
107 QReg q[16]; // the 128-bit NEON registers
114 // uint8_t bytes[16];
129 uint32_t fsr; /* Fault status */
130 uint32_t far; /* Virtual Fault Address */
140 static void LogDBGRegisters(lldb_private::Log *log, const DBG &dbg);
144 GPRRegSet = 1, // ARM_THREAD_STATE
145 GPRAltRegSet = 9, // ARM_THREAD_STATE32
146 FPURegSet = 2, // ARM_VFP_STATE
147 EXCRegSet = 3, // ARM_EXCEPTION_STATE
148 DBGRegSet = 4 // ARM_DEBUG_STATE
152 GPRWordCount = sizeof(GPR) / sizeof(uint32_t),
153 FPUWordCount = sizeof(FPU) / sizeof(uint32_t),
154 EXCWordCount = sizeof(EXC) / sizeof(uint32_t),
155 DBGWordCount = sizeof(DBG) / sizeof(uint32_t)
158 enum { Read = 0, Write = 1, kNumErrors = 2 };
164 int gpr_errs[2]; // Read/Write errors
165 int fpu_errs[2]; // Read/Write errors
166 int exc_errs[2]; // Read/Write errors
167 int dbg_errs[2]; // Read/Write errors
169 void InvalidateAllRegisterStates() {
170 SetError(GPRRegSet, Read, -1);
171 SetError(FPURegSet, Read, -1);
172 SetError(EXCRegSet, Read, -1);
175 int GetError(int flavor, uint32_t err_idx) const {
176 if (err_idx < kNumErrors) {
178 // When getting all errors, just OR all values together to see if
179 // we got any kind of error.
181 return gpr_errs[err_idx];
183 return fpu_errs[err_idx];
185 return exc_errs[err_idx];
187 return dbg_errs[err_idx];
195 bool SetError(int flavor, uint32_t err_idx, int err) {
196 if (err_idx < kNumErrors) {
199 gpr_errs[err_idx] = err;
203 fpu_errs[err_idx] = err;
207 exc_errs[err_idx] = err;
211 exc_errs[err_idx] = err;
221 bool RegisterSetIsCached(int set) const { return GetError(set, Read) == 0; }
223 int ReadGPR(bool force);
225 int ReadFPU(bool force);
227 int ReadEXC(bool force);
229 int ReadDBG(bool force);
239 // Subclasses override these to do the actual reading.
240 virtual int DoReadGPR(lldb::tid_t tid, int flavor, GPR &gpr) { return -1; }
242 virtual int DoReadFPU(lldb::tid_t tid, int flavor, FPU &fpu) = 0;
244 virtual int DoReadEXC(lldb::tid_t tid, int flavor, EXC &exc) = 0;
246 virtual int DoReadDBG(lldb::tid_t tid, int flavor, DBG &dbg) = 0;
248 virtual int DoWriteGPR(lldb::tid_t tid, int flavor, const GPR &gpr) = 0;
250 virtual int DoWriteFPU(lldb::tid_t tid, int flavor, const FPU &fpu) = 0;
252 virtual int DoWriteEXC(lldb::tid_t tid, int flavor, const EXC &exc) = 0;
254 virtual int DoWriteDBG(lldb::tid_t tid, int flavor, const DBG &dbg) = 0;
256 int ReadRegisterSet(uint32_t set, bool force);
258 int WriteRegisterSet(uint32_t set);
260 static uint32_t GetRegisterNumber(uint32_t reg_kind, uint32_t reg_num);
262 static int GetSetForNativeRegNum(int reg_num);
264 static size_t GetRegisterInfosCount();
266 static const lldb_private::RegisterInfo *GetRegisterInfos();
269 #endif // liblldb_RegisterContextDarwin_arm_h_