1 //===-- RegisterContextDarwin_arm64.cpp ---------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #if defined(__APPLE__)
12 #include "RegisterContextDarwin_arm64.h"
15 #include <mach/mach_types.h>
16 #include <mach/thread_act.h>
17 #include <sys/sysctl.h>
20 // Other libraries and framework includes
21 #include "lldb/Core/DataBufferHeap.h"
22 #include "lldb/Core/DataExtractor.h"
23 #include "lldb/Core/Log.h"
24 #include "lldb/Core/RegisterValue.h"
25 #include "lldb/Core/Scalar.h"
26 #include "lldb/Host/Endian.h"
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/Support/Compiler.h"
30 #include "Plugins/Process/Utility/InstructionUtils.h"
32 // Support building against older versions of LLVM, this macro was added
34 #ifndef LLVM_EXTENSION
35 #define LLVM_EXTENSION
39 #include "ARM64_DWARF_Registers.h"
42 using namespace lldb_private;
45 #define GPR_OFFSET(idx) ((idx) * 8)
46 #define GPR_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::GPR, reg))
48 #define FPU_OFFSET(idx) ((idx) * 16 + sizeof (RegisterContextDarwin_arm64::GPR))
49 #define FPU_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::FPU, reg))
51 #define EXC_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::EXC, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU))
52 #define DBG_OFFSET_NAME(reg) (LLVM_EXTENSION offsetof (RegisterContextDarwin_arm64::DBG, reg) + sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
54 #define DEFINE_DBG(reg, i) #reg, NULL, sizeof(((RegisterContextDarwin_arm64::DBG *)NULL)->reg[i]), DBG_OFFSET_NAME(reg[i]), eEncodingUint, eFormatHex, { LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM }, NULL, NULL
55 #define REG_CONTEXT_SIZE (sizeof (RegisterContextDarwin_arm64::GPR) + sizeof (RegisterContextDarwin_arm64::FPU) + sizeof (RegisterContextDarwin_arm64::EXC))
57 //-----------------------------------------------------------------------------
58 // Include RegisterInfos_arm64 to declare our g_register_infos_arm64 structure.
59 //-----------------------------------------------------------------------------
60 #define DECLARE_REGISTER_INFOS_ARM64_STRUCT
61 #include "RegisterInfos_arm64.h"
62 #undef DECLARE_REGISTER_INFOS_ARM64_STRUCT
64 // General purpose registers
104 // Floating point registers
144 // Exception registers
154 static size_t k_num_register_infos = llvm::array_lengthof(g_register_infos_arm64);
156 RegisterContextDarwin_arm64::RegisterContextDarwin_arm64(Thread &thread, uint32_t concrete_frame_idx) :
157 RegisterContext(thread, concrete_frame_idx),
163 for (i=0; i<kNumErrors; i++)
171 RegisterContextDarwin_arm64::~RegisterContextDarwin_arm64()
177 RegisterContextDarwin_arm64::InvalidateAllRegisters ()
179 InvalidateAllRegisterStates();
184 RegisterContextDarwin_arm64::GetRegisterCount ()
186 assert(k_num_register_infos == k_num_registers);
187 return k_num_registers;
191 RegisterContextDarwin_arm64::GetRegisterInfoAtIndex (size_t reg)
193 assert(k_num_register_infos == k_num_registers);
194 if (reg < k_num_registers)
195 return &g_register_infos_arm64[reg];
200 RegisterContextDarwin_arm64::GetRegisterInfosCount ()
202 return k_num_register_infos;
206 RegisterContextDarwin_arm64::GetRegisterInfos ()
208 return g_register_infos_arm64;
212 // Number of registers in each register set
213 const size_t k_num_gpr_registers = llvm::array_lengthof(g_gpr_regnums);
214 const size_t k_num_fpu_registers = llvm::array_lengthof(g_fpu_regnums);
215 const size_t k_num_exc_registers = llvm::array_lengthof(g_exc_regnums);
217 //----------------------------------------------------------------------
218 // Register set definitions. The first definitions at register set index
219 // of zero is for all registers, followed by other registers sets. The
220 // register information for the all register set need not be filled in.
221 //----------------------------------------------------------------------
222 static const RegisterSet g_reg_sets[] =
224 { "General Purpose Registers", "gpr", k_num_gpr_registers, g_gpr_regnums, },
225 { "Floating Point Registers", "fpu", k_num_fpu_registers, g_fpu_regnums },
226 { "Exception State Registers", "exc", k_num_exc_registers, g_exc_regnums }
229 const size_t k_num_regsets = llvm::array_lengthof(g_reg_sets);
233 RegisterContextDarwin_arm64::GetRegisterSetCount ()
235 return k_num_regsets;
239 RegisterContextDarwin_arm64::GetRegisterSet (size_t reg_set)
241 if (reg_set < k_num_regsets)
242 return &g_reg_sets[reg_set];
247 //----------------------------------------------------------------------
248 // Register information definitions for arm64
249 //----------------------------------------------------------------------
251 RegisterContextDarwin_arm64::GetSetForNativeRegNum (int reg)
255 else if (reg < exc_far)
257 else if (reg < k_num_registers)
263 RegisterContextDarwin_arm64::ReadGPR (bool force)
266 if (force || !RegisterSetIsCached(set))
268 SetError(set, Read, DoReadGPR(GetThreadID(), set, gpr));
270 return GetError(GPRRegSet, Read);
274 RegisterContextDarwin_arm64::ReadFPU (bool force)
277 if (force || !RegisterSetIsCached(set))
279 SetError(set, Read, DoReadFPU(GetThreadID(), set, fpu));
281 return GetError(FPURegSet, Read);
285 RegisterContextDarwin_arm64::ReadEXC (bool force)
288 if (force || !RegisterSetIsCached(set))
290 SetError(set, Read, DoReadEXC(GetThreadID(), set, exc));
292 return GetError(EXCRegSet, Read);
296 RegisterContextDarwin_arm64::ReadDBG (bool force)
299 if (force || !RegisterSetIsCached(set))
301 SetError(set, Read, DoReadDBG(GetThreadID(), set, dbg));
303 return GetError(DBGRegSet, Read);
307 RegisterContextDarwin_arm64::WriteGPR ()
310 if (!RegisterSetIsCached(set))
312 SetError (set, Write, -1);
313 return KERN_INVALID_ARGUMENT;
315 SetError (set, Write, DoWriteGPR(GetThreadID(), set, gpr));
316 SetError (set, Read, -1);
317 return GetError(GPRRegSet, Write);
321 RegisterContextDarwin_arm64::WriteFPU ()
324 if (!RegisterSetIsCached(set))
326 SetError (set, Write, -1);
327 return KERN_INVALID_ARGUMENT;
329 SetError (set, Write, DoWriteFPU(GetThreadID(), set, fpu));
330 SetError (set, Read, -1);
331 return GetError(FPURegSet, Write);
335 RegisterContextDarwin_arm64::WriteEXC ()
338 if (!RegisterSetIsCached(set))
340 SetError (set, Write, -1);
341 return KERN_INVALID_ARGUMENT;
343 SetError (set, Write, DoWriteEXC(GetThreadID(), set, exc));
344 SetError (set, Read, -1);
345 return GetError(EXCRegSet, Write);
349 RegisterContextDarwin_arm64::WriteDBG ()
352 if (!RegisterSetIsCached(set))
354 SetError (set, Write, -1);
355 return KERN_INVALID_ARGUMENT;
357 SetError (set, Write, DoWriteDBG(GetThreadID(), set, dbg));
358 SetError (set, Read, -1);
359 return GetError(DBGRegSet, Write);
364 RegisterContextDarwin_arm64::ReadRegisterSet (uint32_t set, bool force)
368 case GPRRegSet: return ReadGPR(force);
369 case FPURegSet: return ReadFPU(force);
370 case EXCRegSet: return ReadEXC(force);
371 case DBGRegSet: return ReadDBG(force);
374 return KERN_INVALID_ARGUMENT;
378 RegisterContextDarwin_arm64::WriteRegisterSet (uint32_t set)
380 // Make sure we have a valid context to set.
381 if (RegisterSetIsCached(set))
385 case GPRRegSet: return WriteGPR();
386 case FPURegSet: return WriteFPU();
387 case EXCRegSet: return WriteEXC();
388 case DBGRegSet: return WriteDBG();
392 return KERN_INVALID_ARGUMENT;
396 RegisterContextDarwin_arm64::LogDBGRegisters (Log *log, const DBG& dbg)
400 for (uint32_t i=0; i<16; i++)
401 log->Printf("BVR%-2u/BCR%-2u = { 0x%8.8llx, 0x%8.8llx } WVR%-2u/WCR%-2u = { 0x%8.8llx, 0x%8.8llx }",
402 i, i, dbg.bvr[i], dbg.bcr[i],
403 i, i, dbg.wvr[i], dbg.wcr[i]);
409 RegisterContextDarwin_arm64::ReadRegister (const RegisterInfo *reg_info, RegisterValue &value)
411 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
412 int set = RegisterContextDarwin_arm64::GetSetForNativeRegNum (reg);
417 if (ReadRegisterSet(set, false) != KERN_SUCCESS)
456 value.SetUInt64 (gpr.x[reg - gpr_x0]);
491 value.SetBytes(fpu.v[reg].bytes, reg_info->byte_size, endian::InlHostByteOrder());
495 value.SetUInt32 (fpu.fpsr);
499 value.SetUInt32 (fpu.fpcr);
503 value.SetUInt32 (exc.exception);
506 value.SetUInt32 (exc.esr);
509 value.SetUInt64 (exc.far);
513 value.SetValueToInvalid();
522 RegisterContextDarwin_arm64::WriteRegister (const RegisterInfo *reg_info,
523 const RegisterValue &value)
525 const uint32_t reg = reg_info->kinds[eRegisterKindLLDB];
526 int set = GetSetForNativeRegNum (reg);
531 if (ReadRegisterSet(set, false) != KERN_SUCCESS)
570 gpr.x[reg - gpr_x0] = value.GetAsUInt64();
605 ::memcpy (fpu.v[reg].bytes, value.GetBytes(), value.GetByteSize());
609 fpu.fpsr = value.GetAsUInt32();
613 fpu.fpcr = value.GetAsUInt32();
617 exc.exception = value.GetAsUInt32();
620 exc.esr = value.GetAsUInt32();
623 exc.far = value.GetAsUInt64();
630 return WriteRegisterSet(set) == KERN_SUCCESS;
634 RegisterContextDarwin_arm64::ReadAllRegisterValues (lldb::DataBufferSP &data_sp)
636 data_sp.reset (new DataBufferHeap (REG_CONTEXT_SIZE, 0));
638 ReadGPR (false) == KERN_SUCCESS &&
639 ReadFPU (false) == KERN_SUCCESS &&
640 ReadEXC (false) == KERN_SUCCESS)
642 uint8_t *dst = data_sp->GetBytes();
643 ::memcpy (dst, &gpr, sizeof(gpr));
646 ::memcpy (dst, &fpu, sizeof(fpu));
649 ::memcpy (dst, &exc, sizeof(exc));
656 RegisterContextDarwin_arm64::WriteAllRegisterValues (const lldb::DataBufferSP &data_sp)
658 if (data_sp && data_sp->GetByteSize() == REG_CONTEXT_SIZE)
660 const uint8_t *src = data_sp->GetBytes();
661 ::memcpy (&gpr, src, sizeof(gpr));
664 ::memcpy (&fpu, src, sizeof(fpu));
667 ::memcpy (&exc, src, sizeof(exc));
668 uint32_t success_count = 0;
669 if (WriteGPR() == KERN_SUCCESS)
671 if (WriteFPU() == KERN_SUCCESS)
673 if (WriteEXC() == KERN_SUCCESS)
675 return success_count == 3;
681 RegisterContextDarwin_arm64::ConvertRegisterKindToRegisterNumber (RegisterKind kind, uint32_t reg)
683 if (kind == eRegisterKindGeneric)
687 case LLDB_REGNUM_GENERIC_PC: return gpr_pc;
688 case LLDB_REGNUM_GENERIC_SP: return gpr_sp;
689 case LLDB_REGNUM_GENERIC_FP: return gpr_fp;
690 case LLDB_REGNUM_GENERIC_RA: return gpr_lr;
691 case LLDB_REGNUM_GENERIC_FLAGS: return gpr_cpsr;
696 else if (kind == eRegisterKindDWARF)
700 case arm64_dwarf::x0: return gpr_x0;
701 case arm64_dwarf::x1: return gpr_x1;
702 case arm64_dwarf::x2: return gpr_x2;
703 case arm64_dwarf::x3: return gpr_x3;
704 case arm64_dwarf::x4: return gpr_x4;
705 case arm64_dwarf::x5: return gpr_x5;
706 case arm64_dwarf::x6: return gpr_x6;
707 case arm64_dwarf::x7: return gpr_x7;
708 case arm64_dwarf::x8: return gpr_x8;
709 case arm64_dwarf::x9: return gpr_x9;
710 case arm64_dwarf::x10: return gpr_x10;
711 case arm64_dwarf::x11: return gpr_x11;
712 case arm64_dwarf::x12: return gpr_x12;
713 case arm64_dwarf::x13: return gpr_x13;
714 case arm64_dwarf::x14: return gpr_x14;
715 case arm64_dwarf::x15: return gpr_x15;
716 case arm64_dwarf::x16: return gpr_x16;
717 case arm64_dwarf::x17: return gpr_x17;
718 case arm64_dwarf::x18: return gpr_x18;
719 case arm64_dwarf::x19: return gpr_x19;
720 case arm64_dwarf::x20: return gpr_x20;
721 case arm64_dwarf::x21: return gpr_x21;
722 case arm64_dwarf::x22: return gpr_x22;
723 case arm64_dwarf::x23: return gpr_x23;
724 case arm64_dwarf::x24: return gpr_x24;
725 case arm64_dwarf::x25: return gpr_x25;
726 case arm64_dwarf::x26: return gpr_x26;
727 case arm64_dwarf::x27: return gpr_x27;
728 case arm64_dwarf::x28: return gpr_x28;
730 case arm64_dwarf::fp: return gpr_fp;
731 case arm64_dwarf::sp: return gpr_sp;
732 case arm64_dwarf::lr: return gpr_lr;
733 case arm64_dwarf::pc: return gpr_pc;
734 case arm64_dwarf::cpsr: return gpr_cpsr;
736 case arm64_dwarf::v0: return fpu_v0;
737 case arm64_dwarf::v1: return fpu_v1;
738 case arm64_dwarf::v2: return fpu_v2;
739 case arm64_dwarf::v3: return fpu_v3;
740 case arm64_dwarf::v4: return fpu_v4;
741 case arm64_dwarf::v5: return fpu_v5;
742 case arm64_dwarf::v6: return fpu_v6;
743 case arm64_dwarf::v7: return fpu_v7;
744 case arm64_dwarf::v8: return fpu_v8;
745 case arm64_dwarf::v9: return fpu_v9;
746 case arm64_dwarf::v10: return fpu_v10;
747 case arm64_dwarf::v11: return fpu_v11;
748 case arm64_dwarf::v12: return fpu_v12;
749 case arm64_dwarf::v13: return fpu_v13;
750 case arm64_dwarf::v14: return fpu_v14;
751 case arm64_dwarf::v15: return fpu_v15;
752 case arm64_dwarf::v16: return fpu_v16;
753 case arm64_dwarf::v17: return fpu_v17;
754 case arm64_dwarf::v18: return fpu_v18;
755 case arm64_dwarf::v19: return fpu_v19;
756 case arm64_dwarf::v20: return fpu_v20;
757 case arm64_dwarf::v21: return fpu_v21;
758 case arm64_dwarf::v22: return fpu_v22;
759 case arm64_dwarf::v23: return fpu_v23;
760 case arm64_dwarf::v24: return fpu_v24;
761 case arm64_dwarf::v25: return fpu_v25;
762 case arm64_dwarf::v26: return fpu_v26;
763 case arm64_dwarf::v27: return fpu_v27;
764 case arm64_dwarf::v28: return fpu_v28;
765 case arm64_dwarf::v29: return fpu_v29;
766 case arm64_dwarf::v30: return fpu_v30;
767 case arm64_dwarf::v31: return fpu_v31;
773 else if (kind == eRegisterKindEHFrame)
777 case arm64_ehframe::x0: return gpr_x0;
778 case arm64_ehframe::x1: return gpr_x1;
779 case arm64_ehframe::x2: return gpr_x2;
780 case arm64_ehframe::x3: return gpr_x3;
781 case arm64_ehframe::x4: return gpr_x4;
782 case arm64_ehframe::x5: return gpr_x5;
783 case arm64_ehframe::x6: return gpr_x6;
784 case arm64_ehframe::x7: return gpr_x7;
785 case arm64_ehframe::x8: return gpr_x8;
786 case arm64_ehframe::x9: return gpr_x9;
787 case arm64_ehframe::x10: return gpr_x10;
788 case arm64_ehframe::x11: return gpr_x11;
789 case arm64_ehframe::x12: return gpr_x12;
790 case arm64_ehframe::x13: return gpr_x13;
791 case arm64_ehframe::x14: return gpr_x14;
792 case arm64_ehframe::x15: return gpr_x15;
793 case arm64_ehframe::x16: return gpr_x16;
794 case arm64_ehframe::x17: return gpr_x17;
795 case arm64_ehframe::x18: return gpr_x18;
796 case arm64_ehframe::x19: return gpr_x19;
797 case arm64_ehframe::x20: return gpr_x20;
798 case arm64_ehframe::x21: return gpr_x21;
799 case arm64_ehframe::x22: return gpr_x22;
800 case arm64_ehframe::x23: return gpr_x23;
801 case arm64_ehframe::x24: return gpr_x24;
802 case arm64_ehframe::x25: return gpr_x25;
803 case arm64_ehframe::x26: return gpr_x26;
804 case arm64_ehframe::x27: return gpr_x27;
805 case arm64_ehframe::x28: return gpr_x28;
806 case arm64_ehframe::fp: return gpr_fp;
807 case arm64_ehframe::sp: return gpr_sp;
808 case arm64_ehframe::lr: return gpr_lr;
809 case arm64_ehframe::pc: return gpr_pc;
810 case arm64_ehframe::cpsr: return gpr_cpsr;
813 else if (kind == eRegisterKindLLDB)
817 return LLDB_INVALID_REGNUM;
822 RegisterContextDarwin_arm64::NumSupportedHardwareWatchpoints ()
824 #if defined (__arm64__) || defined (__aarch64__)
825 // autodetect how many watchpoints are supported dynamically...
826 static uint32_t g_num_supported_hw_watchpoints = UINT32_MAX;
827 if (g_num_supported_hw_watchpoints == UINT32_MAX)
832 if (::sysctlbyname("hw.optional.watchpoint", &n, &len, NULL, 0) == 0)
834 g_num_supported_hw_watchpoints = n;
837 return g_num_supported_hw_watchpoints;
839 // TODO: figure out remote case here!
846 RegisterContextDarwin_arm64::SetHardwareWatchpoint (lldb::addr_t addr, size_t size, bool read, bool write)
848 // if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(addr = %8.8p, size = %u, read = %u, write = %u)", addr, size, read, write);
850 const uint32_t num_hw_watchpoints = NumSupportedHardwareWatchpoints();
852 // Can't watch zero bytes
854 return LLDB_INVALID_INDEX32;
856 // We must watch for either read or write
857 if (read == false && write == false)
858 return LLDB_INVALID_INDEX32;
860 // Can't watch more than 4 bytes per WVR/WCR pair
862 return LLDB_INVALID_INDEX32;
864 // We can only watch up to four bytes that follow a 4 byte aligned address
865 // per watchpoint register pair. Since we have at most so we can only watch
866 // until the next 4 byte boundary and we need to make sure we can properly
868 uint32_t addr_word_offset = addr % 4;
869 // if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - addr_word_offset = 0x%8.8x", addr_word_offset);
871 uint32_t byte_mask = ((1u << size) - 1u) << addr_word_offset;
872 // if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() - byte_mask = 0x%8.8x", byte_mask);
873 if (byte_mask > 0xfu)
874 return LLDB_INVALID_INDEX32;
876 // Read the debug state
877 int kret = ReadDBG (false);
879 if (kret == KERN_SUCCESS)
881 // Check to make sure we have the needed hardware support
884 for (i=0; i<num_hw_watchpoints; ++i)
886 if ((dbg.wcr[i] & WCR_ENABLE) == 0)
887 break; // We found an available hw breakpoint slot (in i)
890 // See if we found an available hw breakpoint slot above
891 if (i < num_hw_watchpoints)
893 // Make the byte_mask into a valid Byte Address Select mask
894 uint32_t byte_address_select = byte_mask << 5;
895 // Make sure bits 1:0 are clear in our address
896 dbg.wvr[i] = addr & ~((lldb::addr_t)3);
897 dbg.wcr[i] = byte_address_select | // Which bytes that follow the IMVA that we will watch
898 S_USER | // Stop only in user mode
899 (read ? WCR_LOAD : 0) | // Stop on read access?
900 (write ? WCR_STORE : 0) | // Stop on write access?
901 WCR_ENABLE; // Enable this watchpoint;
904 // if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint() WriteDBG() => 0x%8.8x.", kret);
906 if (kret == KERN_SUCCESS)
911 // if (log) log->Printf ("RegisterContextDarwin_arm64::EnableHardwareWatchpoint(): All hardware resources (%u) are in use.", num_hw_watchpoints);
914 return LLDB_INVALID_INDEX32;
918 RegisterContextDarwin_arm64::ClearHardwareWatchpoint (uint32_t hw_index)
920 int kret = ReadDBG (false);
922 const uint32_t num_hw_points = NumSupportedHardwareWatchpoints();
923 if (kret == KERN_SUCCESS)
925 if (hw_index < num_hw_points)
927 dbg.wcr[hw_index] = 0;
928 // if (log) log->Printf ("RegisterContextDarwin_arm64::ClearHardwareWatchpoint( %u ) - WVR%u = 0x%8.8x WCR%u = 0x%8.8x",
931 // dbg.wvr[hw_index],
933 // dbg.wcr[hw_index]);
937 if (kret == KERN_SUCCESS)