contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_x86_64.cpp

   1 //===-- RegisterContextFreeBSD_x86_64.cpp ----------------------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===---------------------------------------------------------------------===//
   9
  10 #include <vector>
  11 #include "RegisterContextPOSIX_x86.h"
  12 #include "RegisterContextFreeBSD_i386.h"
  13 #include "RegisterContextFreeBSD_x86_64.h"
  14
  15 using namespace lldb_private;
  16 using namespace lldb;
  17
  18 // http://svnweb.freebsd.org/base/head/sys/x86/include/reg.h
  19 typedef struct _GPR
  20 {
  21     uint64_t r15;
  22     uint64_t r14;
  23     uint64_t r13;
  24     uint64_t r12;
  25     uint64_t r11;
  26     uint64_t r10;
  27     uint64_t r9;
  28     uint64_t r8;
  29     uint64_t rdi;
  30     uint64_t rsi;
  31     uint64_t rbp;
  32     uint64_t rbx;
  33     uint64_t rdx;
  34     uint64_t rcx;
  35     uint64_t rax;
  36     uint32_t trapno;
  37     uint16_t fs;
  38     uint16_t gs;
  39     uint32_t err;
  40     uint16_t es;
  41     uint16_t ds;
  42     uint64_t rip;
  43     uint64_t cs;
  44     uint64_t rflags;
  45     uint64_t rsp;
  46     uint64_t ss;
  47 } GPR;
  48
  49 struct DBG {
  50     uint64_t  dr[16];  /* debug registers */
  51                        /* Index 0-3: debug address registers */
  52                        /* Index 4-5: reserved */
  53                        /* Index 6: debug status */
  54                        /* Index 7: debug control */
  55                        /* Index 8-15: reserved */
  56 };
  57
  58 struct UserArea
  59 {
  60     GPR gpr;
  61     FPR fpr;
  62     DBG dbg;
  63 };
  64
  65 #define DR_OFFSET(reg_index) \
  66     (LLVM_EXTENSION offsetof(DBG, dr[reg_index]))
  67
  68 //---------------------------------------------------------------------------
  69 // Include RegisterInfos_x86_64 to declare our g_register_infos_x86_64 structure.
  70 //---------------------------------------------------------------------------
  71 #define DECLARE_REGISTER_INFOS_X86_64_STRUCT
  72 #include "RegisterInfos_x86_64.h"
  73 #undef DECLARE_REGISTER_INFOS_X86_64_STRUCT
  74
  75 static std::vector<lldb_private::RegisterInfo>&
  76 GetSharedRegisterInfoVector ()
  77 {
  78     static std::vector<lldb_private::RegisterInfo> register_infos;
  79     return register_infos;
  80 }
  81
  82 static const RegisterInfo *
  83 GetRegisterInfo_i386(const lldb_private::ArchSpec& arch)
  84 {
  85     static std::vector<lldb_private::RegisterInfo> g_register_infos (GetSharedRegisterInfoVector ());
  86
  87     // Allocate RegisterInfo only once
  88     if (g_register_infos.empty())
  89     {
  90         // Copy the register information from base class
  91         std::unique_ptr<RegisterContextFreeBSD_i386> reg_interface(new RegisterContextFreeBSD_i386 (arch));
  92         const RegisterInfo *base_info = reg_interface->GetRegisterInfo();
  93         g_register_infos.insert(g_register_infos.end(), &base_info[0], &base_info[k_num_registers_i386]);
  94
  95         //---------------------------------------------------------------------------
  96         // Include RegisterInfos_x86_64 to update the g_register_infos structure
  97         //  with x86_64 offsets.
  98         //---------------------------------------------------------------------------
  99         #define UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
 100         #include "RegisterInfos_x86_64.h"
 101         #undef UPDATE_REGISTER_INFOS_I386_STRUCT_WITH_X86_64_OFFSETS
 102     }
 103
 104     return &g_register_infos[0];
 105 }
 106
 107 static const RegisterInfo *
 108 PrivateGetRegisterInfoPtr (const lldb_private::ArchSpec& target_arch)
 109 {
 110     switch (target_arch.GetMachine())
 111     {
 112         case llvm::Triple::x86:
 113             return GetRegisterInfo_i386 (target_arch);
 114         case llvm::Triple::x86_64:
 115             return g_register_infos_x86_64;
 116         default:
 117             assert(false && "Unhandled target architecture.");
 118             return nullptr;
 119     }
 120 }
 121
 122 static uint32_t
 123 PrivateGetRegisterCount (const lldb_private::ArchSpec& target_arch)
 124 {
 125     switch (target_arch.GetMachine())
 126     {
 127         case llvm::Triple::x86:
 128             // This vector should have already been filled.
 129             assert (!GetSharedRegisterInfoVector ().empty () && "i386 register info vector not filled.");
 130             return static_cast<uint32_t> (GetSharedRegisterInfoVector().size ());
 131         case llvm::Triple::x86_64:
 132             return static_cast<uint32_t> (sizeof (g_register_infos_x86_64) / sizeof (g_register_infos_x86_64 [0]));
 133         default:
 134             assert(false && "Unhandled target architecture.");
 135             return 0;
 136     }
 137 }
 138
 139 RegisterContextFreeBSD_x86_64::RegisterContextFreeBSD_x86_64(const ArchSpec &target_arch) :
 140     lldb_private::RegisterInfoInterface(target_arch),
 141     m_register_info_p (PrivateGetRegisterInfoPtr (target_arch)),
 142     m_register_count (PrivateGetRegisterCount (target_arch))
 143 {
 144 }
 145
 146 size_t
 147 RegisterContextFreeBSD_x86_64::GetGPRSize() const
 148 {
 149     return sizeof(GPR);
 150 }
 151
 152 const RegisterInfo *
 153 RegisterContextFreeBSD_x86_64::GetRegisterInfo() const
 154 {
 155     return m_register_info_p;
 156 }
 157
 158 uint32_t
 159 RegisterContextFreeBSD_x86_64::GetRegisterCount () const
 160 {
 161     return m_register_count;
 162 }
 163
 164